8 years, 8 months ago.

Output Voltage of I/O pins and frequency of PWMOUT of FRDM KL25Z?

What is the output voltage acquired at I/O port pins when it has logic 1 on it? and what is the frequency of the pulse we get out of the PWMOUT pins ? can it be changed and how?

1 Answer

8 years, 8 months ago.

Hi Rushabh,

Thanks for getting in touch.

The document you need to refer to is here, Page 7: http://www.nxp.com/assets/documents/data/en/data-sheets/KL25P80M48SF0.pdf

With VDD being a maximum of 3.6V, nominally 3.3V

Input high voltage 0.7 × VDD

Input low voltage 0.35 × VDD

In regards to PWM, look here at the API: https://developer.mbed.org/handbook/PwmOut

Regards,

Andrea, team mbed