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9 years, 6 months ago.
SPI2 doesn't output SCK
Hello guys,
I'm a veteran user of the MBED LPC1768 (I own several and have been using them since 2012 in dozens of applications) and I just started "diversifying" with the LPC4088 module from EA.
One of the first things I'm trying to do is pump bytes into an FPGA via a very simple SPI slave. That didn't work at all. Since my FPGA has some LED's attached to it, I connected one to MOSI (p39) and one to SCK (p32).
The LED on MOSI blinks like crazy, so I know the LPC4088 is actually pumping out those bytes... but SCK stays off. To verify the electrical connection I changed the SPI mode to reverse the polarity and same result : MOSI toggles like there's no tomorrow, SCK stays on.
So, clearly, the problem is on the LPC4088 side. It just doesn't generate SCK.
No SCK, no data as far as the FPGA is concerned. Any idea what could be causing this ?
I've setup SPI2 for 8 bit transfers and 1 MHz SCK, and tried all four modes, no joy.
Jean
Question relating to:
1 Answer
9 years, 6 months ago.
Hi Jean, P5.2 (that carries the SPI#2 clock is an open drain output). Any capacitive loading on the signal will severely limit the bandwidth. I suggest hooking up an oscilloscope and have a look at the signal (to verify signal integrity). Kind Regards, Anders @ EA
Thank you Anders. I must admit my board is probably horrible in terms of signal integrity (it's just a typical prototyping PCB with lots of parallel stripes). Since I posted the question I've installed a probe connector on the signals running between the MCU and FPGA and I've revised the FPGA configuration. Not sure what really did the trick (Cyclone IV's can be tricky) but now my SPI is working : logic analyzer shows healthy MOSI and SCK at 1 MHz. I will follow your advice and have a look with an oscilloscope however. I really like the LPC4088 QSB, by the way. Looking forward to more great boards from EA.
Edit : I broke out the industrial-strength coffee and coded an SPI slave in my FPGA. Does nothing but take the bytes from the LPC4088 and send them back during the next transfer. On the LPC4088 I wrote a simple program to send a rolling 1-byte counter to the FPGA via SPI. This allows me to see with my logic analyzer if the data goes forth and back correctly (since it's a count, bit errors are fairly easy to spot with the naked eye).
I'm happy to report that contrary to what the LPC4088 user manual says (i.e. that SSP2 will not work at more than 1 MHz) I'm able to run it at 5 MHz. It may go faster but I was limited by my cheap logic analyzer. I'll use a better one tomorrow. Still, 5 MHz on a dorky strip-board with lots of straps ? That's not bad at all.
posted by 24 Sep 2014