6 years, 8 months ago.

Strange I2C Clock Trace

HI, I've encountered some trouble with a bespoke pcb I've built using the mbed hdk. I have a number of I2C devices connected to the following I2C port

I2C i2c(p28, p27);

When I run the I2CU program to scan the I2C bus nothing is returned, now I hooked up my logic analyiser to the SCL and SDA lines, channel 0 is the SCL and channel 1 is the SDA.


Is the SCL trace correct for a 100000 SCL? I was surprised to see an uneven clock, is this why non of the I2C devices arent responding?

I'm using the following I2C devices, with 4.7K pull ups on the SDA and SCL lines.

  • ADX345
  • HMC5883L
  • ITG3200
  • MPL115A2
  • PCA9538DW
  • MCP3424

I've double checked the wiring and addresses for each of the devices and cannot find any problems.

I'm very much out of my depth with this one so any help would be much appreciated.

Found the problem closer inspection revealed that one the I2C devices had been mounted backwards a quick bit of rework and all 6 devices appear on the I2C bus.

posted by Rob Cawsey 03 Apr 2014

2 Answers

6 years, 8 months ago.

Non-even clock shouldn't be an issue, and it also shouldn't be happening. Check what the sample rate of your logic analyser is set to, and if you can increase this. It might not have a high enough sample rate.

Or option B, you might be looking at the SDA trace instead of the SCL trace. Especially since if channel-1 should be the SDA trace something is going completely wrong, it is permanent low. This can happen when a device is locking up the bus. Obviously that already shouldn't happen, and if it happens then none of the other devices can respond. However additionally the host microcontroller should either see it as a busy bus, or as a collision once it starts sending and immediatly stop sending. Since that clearly isn't happening, I would assume channel-1 isn't connected correctly. Which makes one wonder if channel-0 is connected correctly.

Hi Erik,

Thanks for the input, ill recheck the connections but I'm sure the connections are good. I had the logic analyser sampling at 10Mhz so should be fast enough. I'm beginning to think that it might be one of the I2C devices better re read the datasheets incase I've wired one up wrong and its holding the bus low.

posted by Rob Cawsey 31 Mar 2014

While that theory would explain part of what is happening, the problem is that if the SDA line of the I2C bus is low, while the host wants it high, it assumes another host started sending at exactly the same time, and it will give control of the bus to the host which pulled SDA low: it stops sending. So if SDA is permanently low it shouldn't start sending in the first place, and if it did anyway, it should at the first '1' consider it a collision and stop sending.

posted by Erik - 31 Mar 2014
6 years, 8 months ago.

First test: cut the I2C SDA and SCL to all slaves and test directly on the mbed/processor with nothing but the pull-ups connected to SDA/SCL. When that works start testing with a single known good device.