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Data Structures | Macros | Variables
mbox_def.h File Reference

Mailbox definition. More...

#include "stm32_wpan_common.h"

Go to the source code of this file.

Data Structures

struct  MB_DeviceInfoTable_t
 
struct  MB_BleTable_t
 
struct  MB_ThreadTable_t
 
struct  MB_LldTestsTable_t
 
struct  MB_LldBleTable_t
 
struct  MB_ZigbeeTable_t
 
struct  MB_SysTable_t
 msg [0:7] = cmd/evt [8:31] = Reserved More...
 
struct  MB_MemManagerTable_t
 
struct  MB_TracesTable_t
 
struct  MB_Mac_802_15_4_t
 
struct  MB_RefTable_t
 

Macros

#define HW_IPCC_BLE_CMD_CHANNEL   LL_IPCC_CHANNEL_1
 IPCC CHANNELS. More...
 
#define HW_IPCC_BLE_EVENT_CHANNEL   LL_IPCC_CHANNEL_1
 CPU2. More...
 

Variables

typedef PACKED_STRUCT
 This file shall be identical between the CPU1 and the CPU2. More...
 

Detailed Description

Mailbox definition.

Author
MCD Application Team
Attention

© Copyright (c) 2019 STMicroelectronics. All rights reserved.

This software component is licensed by ST under BSD 3-Clause license, the "License"; You may not use this file except in compliance with the License. You may obtain a copy of the License at: opensource.org/licenses/BSD-3-Clause

Definition in file mbox_def.h.

Macro Definition Documentation

#define HW_IPCC_BLE_CMD_CHANNEL   LL_IPCC_CHANNEL_1

IPCC CHANNELS.

CPU1

Definition at line 230 of file mbox_def.h.

#define HW_IPCC_BLE_EVENT_CHANNEL   LL_IPCC_CHANNEL_1

CPU2.

Definition at line 243 of file mbox_def.h.

Variable Documentation

typedef PACKED_STRUCT
Initial value:
{
uint32_t Version

This file shall be identical between the CPU1 and the CPU2.

This format shall be used for all events (asynchronous and command response) reported by the CPU2 except for the command response of a system command where the header is not there and the format to be used shall be TL_EvtSerial_t.

This the payload of TL_Evt_t for an asynchronous event.

This the payload of TL_Evt_t for a command complete event.

This the payload of TL_Evt_t for a command status event.

Command parameters.

THE ORDER SHALL NOT BE CHANGED.

SHCI_SUB_EVT_NVM_END_ERASE This notifies the CPU1 that the CPU2 has erased all expected flash sectors.

SHCI_SUB_EVT_NVM_END_WRITE This notifies the CPU1 that the CPU2 has written all expected data in Flash.

SHCI_SUB_EVT_NVM_START_WRITE This notifies the CPU1 that the CPU2 has started a write procedure in Flash NumberOfWords : The number of 64bits data the CPU2 needs to write in Flash.

SHCI_SUB_EVT_OT_NVM_RAM_UPDATE This notifies the CPU1 which part of the OT NVM RAM has been updated so that only the modified section could be written in Flash/NVM StartAddress : Start address of the section that has been modified Size : Size (in bytes) of the section that has been modified.

SHCI_SUB_EVT_BLE_NVM_RAM_UPDATE This notifies the CPU1 which part of the BLE NVM RAM has been updated so that only the modified section could be written in Flash/NVM StartAddress : Start address of the section that has been modified Size : Size (in bytes) of the section that has been modified.

SHCI_SUB_EVT_ERROR_NOTIF This reports to the CPU1 some error form the CPU2.

TABLES Version [0:3] = Build - 0: Untracked - 15:Released - x: Tracked version [4:7] = branch - 0: Mass Market - x: ... [8:15] = Subversion [16:23] = Version minor [24:31] = Version major

Memory Size [0:7] = Flash ( Number of 4k sector) [8:15] = Reserved ( Shall be set to 0 - may be used as flash extension ) [16:23] = SRAM2b ( Number of 1k sector) [24:31] = SRAM2a ( Number of 1k sector)

For each 64bits data, the algorithm as described in AN5289 is executed. When this number is reported to 0, it means the Number of 64bits to be written was unknown when the procedure has started. When all data are written, the SHCI_SUB_EVT_NVM_END_WRITE event is reported

SHCI_SUB_EVT_NVM_START_ERASE This notifies the CPU1 that the CPU2 has started a erase procedure in Flash NumberOfSectors : The number of sectors the CPU2 needs to erase in Flash. For each sector, the algorithm as described in AN5289 is executed. When this number is reported to 0, it means the Number of sectors to be erased was unknown when the procedure has started. When all sectors are erased, the SHCI_SUB_EVT_NVM_END_ERASE event is reported

NOT USED CURRENTLY

Note: Be careful that the asynchronous events reported by the CPU2 on the system channel do include the header and shall use TL_EvtPacket_t format. Only the command response format on the system channel is different.

Definition at line 56 of file mbox_def.h.

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