18 #ifndef _TARGET_INFO_DATA_H_ 19 #define _TARGET_INFO_DATA_H_ 23 #define TARGET_CONFIG_CREATE_ID(major, minor, index) \ 24 (((major & 0xFF) << 24) | ((minor & 0xFF) << 16) | (index & 0xFFFF)) 25 #define TARGET_CONFIG_GET_MAJOR(config_id) ((config_id >> 24) & 0xFF) 26 #define TARGET_CONFIG_GET_MINOR(config_id) ((config_id >> 16) & 0xFF) 27 #define TARGET_CONFIG_INCREMENT_INDEX(config_id) \ 28 ((config_id & 0xFFFF0000) | ((config_id & 0xFFFF) + 1)) 29 #define GET_NUM_INSTANCE(struct_type) (struct_type->cfg_type.size >> 24) 30 #define VAL_TEST_MAJOR_GROUP_MASK 0xFF000000UL 31 #define VAL_TEST_MINOR_GROUP_MASK 0x00FF0000UL 32 #define VAL_TEST_CFG_INSTANCE_MASK 0x0000FFFFUL 33 #define VAL_TEST_INVALID_CFG_ID 0xFFFFFFFFUL 34 #define TARGET_MIN_CFG_ID TARGET_CONFIG_CREATE_ID(GROUP_SOC_PERIPHERAL, 0, 0) 35 #define TARGET_MAX_CFG_ID TARGET_CONFIG_CREATE_ID(GROUP_MAX, 0, 0) 49 GROUP_SOC_PERIPHERAL = 0x1,
51 GROUP_MISCELLANEOUS = 0x3,
58 typedef enum _SOC_PERIPHERAL_CONFIG_ID_ {
59 SOC_PERIPHERAL_UART = 0x1,
60 SOC_PERIPHERAL_TIMER = 0x2,
61 SOC_PERIPHERAL_WATCHDOG = 0x3,
62 } soc_peripheral_cfg_id_t;
64 typedef enum _MEMORY_CONFIG_ID_ {
66 MEMORY_NSPE_MMIO = 0x3,
67 MEMORY_CLIENT_PARTITION_MMIO = 0x4,
68 MEMORY_DRIVER_PARTITION_MMIO = 0x5,
71 typedef enum _MISCELLANEOUS_CONFIG_ID_ {
72 MISCELLANEOUS_BOOT = 0x1,
73 MISCELLANEOUS_DUT = 0x2
74 } miscellaneous_cfg_id_t;
80 UART = GROUP_SOC_PERIPHERAL,
81 TIMER = GROUP_SOC_PERIPHERAL,
82 WATCHDOG = GROUP_SOC_PERIPHERAL,
84 NSPE_MMIO = GROUP_MEMORY,
85 CLIENT_PARTITION_MMIO = GROUP_MEMORY,
86 DRIVER_PARTITION_MMIO = GROUP_MEMORY,
87 BOOT = GROUP_MISCELLANEOUS,
88 DUT = GROUP_MISCELLANEOUS,
96 uint32_t signature[2];
98 uint32_t target_string[2];
117 SECURE_ACCESS = 0x100,
120 NONSECURE_PROGRAMMABLE
130 TYPE_READ_ONLY = 0x10,
155 mem_tgt_attr_t attribute;
156 perm_type_t permission;
174 perm_type_t permission;
175 uint32_t timeout_in_micro_sec_low;
176 uint32_t timeout_in_micro_sec_medium;
177 uint32_t timeout_in_micro_sec_high;
178 uint32_t timeout_in_micro_sec_crypto;
179 uint32_t num_of_tick_per_micro_sec;
180 dev_attr_t attribute;
194 firmware_level_t implemented_psa_firmware_isolation_level;
195 addr_t ns_start_addr_of_combine_test_binary;
196 is_available_t combine_test_binary_in_ram;
201 STATIC_DECLARE val_status_t val_target_get_config(cfg_id_t cfg_id, uint8_t **data, uint32_t *size);
202 STATIC_DECLARE val_status_t val_target_cfg_get_next(
void **blob);
203 STATIC_DECLARE val_status_t val_target_get_cfg_blob(cfg_id_t cfg_id, uint8_t **data, uint32_t *size);
204 STATIC_DECLARE val_status_t val_target_get_config(cfg_id_t cfg_id, uint8_t **data, uint32_t *size);
struct _MISCELLANEOUS_INFO_HDR_ miscellaneous_hdr_t
System Miscellaneous Information.
enum _COMPONENT_GROUPING_ comp_group_assign_t
Assign group type to each system component.
_GROUP_CONFIG_ID_
Config IDs for each group/component 31:24 : MAJOR (group) 23:16 : MINOR (component) 16:8 : SUB-compon...
Copyright (c) 2018-2019, Arm Limited or its affiliates.
struct _MEM_INFO_DESC_ memory_hdr_t
Memory Information.
struct _TARGET_CFG_HDR_ target_cfg_hdr_t
Target Configuration Header.
System Miscellaneous Information.
enum _GROUP_CONFIG_ID_ group_cfg_id_t
Config IDs for each group/component 31:24 : MAJOR (group) 23:16 : MINOR (component) 16:8 : SUB-compon...
Target Configuration Header.
_COMPONENT_GROUPING_
Assign group type to each system component.