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Public Types | Public Member Functions
MbedTester Class Reference

The base class for controlling the FPGA CI Test Shield. More...

#include <MbedTester.h>

Inheritance diagram for MbedTester:
I2CTester SPITester UARTTester SPIMasterTester SPISlaveTester

Public Types

Public Member Functions

 MbedTester (const PinList *form_factor, const PinList *exclude_pins)
 Construct a new MbedTester object. More...
 
 ~MbedTester ()
 Destroy and cleanup resources associated with this object. More...
 
void set_control_pins_auto ()
 Enable automatic selection and update of control pins. More...
 
void set_control_pins_manual (PinName clk, PinName mosi, PinName miso, PinName aux)
 Set the control pins to use for communication. More...
 
bool firmware_dump (mbed::FileHandle *dest, mbed::Callback< void(uint8_t)> progress=mbed::Callback< void(uint8_t)>())
 Read FPGA CI Test Shield firmware. More...
 
bool firmware_dump_all (mbed::FileHandle *dest, mbed::Callback< void(uint8_t)> progress=mbed::Callback< void(uint8_t)>())
 Read FPGA CI Test Shield flash. More...
 
bool firmware_update (mbed::FileHandle *src, mbed::Callback< void(uint8_t)> progress=mbed::Callback< void(uint8_t)>())
 Program new FPGA CI Test Shield firmware. More...
 
void pin_map_set (PinName physical, LogicalPin logical)
 Map a physical pin to the given logical pin. More...
 
void pin_map_reset ()
 Reset all pin mappings. More...
 
void peripherals_reset ()
 Reset all peripherals. More...
 
void reset ()
 Reset everything. More...
 
void reprogram ()
 Reprogram the FPGA. More...
 
uint32_t version ()
 Get the running FPGA firmware version. More...
 
void select_peripheral (Peripheral peripheral)
 Select the currently active peripheral. More...
 
int gpio_read (LogicalPin gpio)
 Read a gpio pin. More...
 
void gpio_write (LogicalPin gpio, int value, bool drive)
 Set value and drive of a gpio pin. More...
 
void io_metrics_start ()
 Start recording metrics on all logical pins. More...
 
void io_metrics_stop ()
 Stop recording metrics on all logical pins. More...
 
void io_metrics_continue ()
 Continue recording metrics on all logical pins. More...
 
uint32_t io_metrics_min_pulse_low (LogicalPin pin)
 Get the shortest low pulse recorded. More...
 
uint32_t io_metrics_min_pulse_high (LogicalPin pin)
 Get the shortest high pulse recorded. More...
 
uint32_t io_metrics_max_pulse_low (LogicalPin pin)
 Get the longest low pulse recorded. More...
 
uint32_t io_metrics_max_pulse_high (LogicalPin pin)
 Get the longest high pulse recorded. More...
 
uint32_t io_metrics_rising_edges (LogicalPin pin)
 Get the number of rising edges. More...
 
uint32_t io_metrics_falling_edges (LogicalPin pin)
 Get the number of falling edges. More...
 
void pin_pull_reset_all ()
 Reset the IO expander modules. More...
 
int pin_set_pull (PinName pin, PullMode mode)
 Configure an Mbed pin for a pulldown resistor, pullup resistor, or tristate mode via PinName. More...
 
int pin_set_pull_index (int index, PullMode mode)
 Configure an Mbed pin for a pulldown resistor, pullup resistor, or tristate mode via pin index. More...
 
uint8_t io_expander_read (PinName pin, IOExpanderReg reg_type)
 Read a bit for a specific Mbed pin that is set in the input, output, or configuration registers inside of the IO expander via PinName. More...
 
uint8_t io_expander_read_index (int index, IOExpanderReg reg_type)
 Read a bit for a specific Mbed pin that is set in the input, output, or configuration registers inside of the IO expander via pin index. More...
 
int pin_set_pull_bb (PinName pin, PullMode mode)
 Configure an Mbed pin for a pulldown resistor, pullup resistor, or tristate mode (this version of the function uses io_expander_i2c_read_bb and io_expander_i2c_write_bb) More...
 
uint8_t io_expander_read_bb (PinName pin, IOExpanderReg reg_type)
 Read a bit for a specific Mbed pin that is set in the input, output, or configuration registers inside of the IO expander (this version of the function uses io_expander_i2c_read_bb) More...
 
void set_analog_out (bool enable, float voltage)
 Create an analog voltage via the FPGA sys pwm in order to test Mbed AnalogIn. More...
 
void set_sample_adc (bool val)
 Turn the FPGA ADC on and off (power management data will be collected while the ADC is on) More...
 
float get_analog_in ()
 Get the result of the analog to digital conversion computed on the FPGA in the form of a voltage reading. More...
 
float get_anin_voltage (int index)
 Similar to 'get_analog_in' but returns a voltage reading from ANIN0-3. More...
 
bool sys_pin_read (SystemPin pin)
 Read from the given system pin. More...
 
void sys_pin_write (SystemPin pin, int value, bool drive)
 Write to the given system pin. More...
 
int io_expander_i2c_read (uint8_t i2c_index, uint8_t dev_addr, uint8_t start_reg, uint8_t *data, int length)
 I2C read on I2C system channels 0, 1, or 2. More...
 
int io_expander_i2c_write (uint8_t i2c_index, uint8_t dev_addr, uint8_t *data, int length)
 I2C write on I2C system channels 0, 1, or 2. More...
 
int io_expander_i2c_read_bb (SystemPin sda, SystemPin scl, uint8_t dev_addr, uint8_t start_reg, uint8_t *data, int length)
 I2C read on I2C system channels 0, 1, or 2 (bit banged version of function, bit banged over control channel) More...
 
int io_expander_i2c_write_bb (SystemPin sda, SystemPin scl, uint8_t dev_addr, uint8_t *data, int length)
 I2C write on I2C system channels 0, 1, or 2 (bit banged version of function, bit banged over control channel) More...
 
int set_mux_addr (PinName pin)
 Set the AnalogMuxAddr pins on the FPGA via PinName. More...
 
int set_mux_addr_index (int index)
 Set the AnalogMuxAddr pins on the FPGA via pin index. More...
 
void set_mux_enable (bool val)
 Turn on/off the analog muxes. More...
 
void set_pwm_enable (bool val)
 Turn on/off pwm output on FPGA to test Mbed AnalogIn. More...
 
bool get_pwm_enable ()
 Check if FPGA pwm out is on or off. More...
 
void set_pwm_period_and_cycles_high (uint32_t period, uint32_t cycles_high)
 Set the pwm output period and number of cycles high (duty cycle) on the FPGA. More...
 
uint32_t get_pwm_period ()
 Get the pwm output period of the FPGA. More...
 
uint8_t get_pwm_cycles_high ()
 Get the number of cycles that are high (duty cycle) from FPGA pwm. More...
 
uint16_t get_analogmuxin_measurement ()
 Get the 12-bit analog to digital conversion result from the FPGA. More...
 
uint16_t get_anin_measurement (int index)
 Similar to 'get_analogmuxin_measurement' but returns the current XADC measurement for ANIN0-3. More...
 
void get_anin_sum_samples_cycles (int index, uint64_t *sum, uint32_t *samples, uint64_t *cycles)
 Gets (by reference) the sum of all ANIN ADC results for any of the 4 ANIN pins specified by the index, number of ADC sample sequences that have completed since the XADC was turned on, and the number of FPGA clk cycles that have taken place since the ADC was turned on. More...
 
void set_snapshot ()
 Allows safe reading of FPGA ADC related values while the FPGA ADC is on If snapshot is set then the ADC values will be safely latched in the FPGA and safe to read. More...
 
void sys_pin_mode_disabled ()
 Set the current system pin mode to disabled. More...
 
void sys_pin_mode_spi_serial_flash (PhysicalIndex mosi, PhysicalIndex miso, PhysicalIndex clk, PhysicalIndex ssel)
 Set the current system pin mode to serial flash. More...
 
void sys_pin_mode_i2c_io_expander (int index, PhysicalIndex sda_in, PhysicalIndex sda_val, PhysicalIndex scl_in, PhysicalIndex scl_val)
 Set the current system pin mode to io expander I2C bus. More...
 
void pin_map_index (PhysicalIndex physical_index, LogicalPin logical)
 Map a physical pin index to the given logical pin. More...
 
void write (uint32_t addr, const uint8_t *data, uint32_t size)
 Write to tester memory. More...
 
void read (uint32_t addr, uint8_t *data, uint32_t size)
 Read from tester memory. More...
 
bool self_test_all ()
 Run all self tests. More...
 
bool self_test_control_channels ()
 Test that all allowed control channels can be used. More...
 
bool self_test_control_miso ()
 Test that all allowed control miso lines can be used. More...
 
bool self_test_control_current ()
 Test that the current control channel works. More...
 

Detailed Description

The base class for controlling the FPGA CI Test Shield.

This is the primary interface to the FPGA CI Test Shield. It contains all the code to communicate with the FPGA. It also provides high level helper functions, such as functions to setup pin multiplexing, to select the currently active peripheral and to perform software updates.

Subclasses can inherit from this class and provide further functionality, such as the ability to test SPI.

Note
Synchronization level: Not protected

Example of how to toggle Arduino pin D6 from the FPGA cI Test Shield:

#include "mbed.h"
#include "MbedTester.h"
const PinList *form_factor = pinmap_ff_default_pins();
const PinList *restricted = pinmap_restricted_pins();
MbedTester tester(form_factor, restricted);
int main() {
// Reset the FPGA CI Test Shield to put it into a known state
tester.reset();
// Select the GPIO peripheral
tester.select_peripheral(MbedTester::PeripheralGPIO);
// Map D6 to LogicalPinGPIO0
tester.pin_map_set(D6, MbedTester::LogicalPinGPIO0);
// Toggle pin D6
int toggle = 0;
while (1) {
tester.gpio_write(MbedTester::LogicalPinGPIO0, toggle, true);
wait(0.5);
toggle = !toggle;
}
}

Definition at line 68 of file MbedTester.h.

Member Enumeration Documentation

enum PullMode

FPGA Pullup mode.

Definition at line 403 of file MbedTester.h.

Constructor & Destructor Documentation

MbedTester ( const PinList form_factor,
const PinList exclude_pins 
)

Construct a new MbedTester object.

The form factor pins passed into this class must match the physical MbedTester shield connected to this board or testing will not work correctly. The order of pins in this list must match the order of the shield.

The exclude pins list should be used to exclude pins which you either don't want to be tested or are not suitable for use as a control channel. This list is allowed to contain pins that are not in the form factor.

Parameters
form_factorThe pins that are available on this form factor
exclude_pinsThe pins that must not be used
~MbedTester ( )

Destroy and cleanup resources associated with this object.

Member Function Documentation

bool firmware_dump ( mbed::FileHandle dest,
mbed::Callback< void(uint8_t)>  progress = mbed::Callback< void(uint8_t)>() 
)

Read FPGA CI Test Shield firmware.

Read the firmware on the FPGA CI Test Shield. An optional progress callback can be supplied to display progress while the firmware is being read.

Parameters
destFile to write the firmware to. This file must have been opened as writeable
progressOptional progress callback called when the percent complete changes
Returns
true if firmware was successfully read, false otherwise
bool firmware_dump_all ( mbed::FileHandle dest,
mbed::Callback< void(uint8_t)>  progress = mbed::Callback< void(uint8_t)>() 
)

Read FPGA CI Test Shield flash.

Read the entire flash contents of the FPGA CI Test Shield. An optional progress callback can be supplied to display progress while the firmware is being read.

Parameters
destFile to write the firmware to. This file must have been opened as writeable
progressOptional progress callback called when the percent complete changes
Returns
true if firmware was successfully read, false otherwise
bool firmware_update ( mbed::FileHandle src,
mbed::Callback< void(uint8_t)>  progress = mbed::Callback< void(uint8_t)>() 
)

Program new FPGA CI Test Shield firmware.

Program firmware from the file given. The binary bitstream must be in the correct format and contain a correct CRC or the update will fail. To correctly format a bitstream binary the post_process_bitstream.py script in the fpga-ci-test-shield repository should be used.

Note - release binaries for the FPGA CI Test Shield have already been formatted and can be loaded directly with this function

Parameters
srcFile containing the new firmware to program
progressOptional progress callback called when the percent complete changes
Returns
true if firmware was successfully applied, false otherwise
float get_analog_in ( )

Get the result of the analog to digital conversion computed on the FPGA in the form of a voltage reading.

The FPGA ADC operates on 0V-1V, which means this function will only ever return a float ranging from 0.0-1.0.

Returns
The conversion result in the form of a voltage measurement for AnalogMuxIn, Eg. a return value of 0.7 means the ADC on the FPGA read 0.7 volts on its analog input
uint16_t get_analogmuxin_measurement ( )

Get the 12-bit analog to digital conversion result from the FPGA.

Returns
12-bit FPGA ADC result for AnalogMuxIn
uint16_t get_anin_measurement ( int  index)

Similar to 'get_analogmuxin_measurement' but returns the current XADC measurement for ANIN0-3.

Parameters
indexANIN pin to read (0-3)
Returns
12-bit FPGA ADC result for ANIN0-3
void get_anin_sum_samples_cycles ( int  index,
uint64_t *  sum,
uint32_t *  samples,
uint64_t *  cycles 
)

Gets (by reference) the sum of all ANIN ADC results for any of the 4 ANIN pins specified by the index, number of ADC sample sequences that have completed since the XADC was turned on, and the number of FPGA clk cycles that have taken place since the ADC was turned on.

Parameters
indexANIN pin of which to get sum of results (0-3)
sumThe sum of all specified ANIN pin's ADC results
samplesThe number of ADC sample sequences that have completed since the XADC was turned on
cyclesThe number of FPGA clk cycles that have taken place since the ADC was turned on
float get_anin_voltage ( int  index)

Similar to 'get_analog_in' but returns a voltage reading from ANIN0-3.

Parameters
indexANIN pin to read (0-3)
Returns
The conversion result in the form of a voltage measurement for ANIN0-3
uint8_t get_pwm_cycles_high ( )

Get the number of cycles that are high (duty cycle) from FPGA pwm.

Returns
FPGA pwm output cycles high
bool get_pwm_enable ( )

Check if FPGA pwm out is on or off.

Returns
FPGA enable bit (false: off, true: on)
uint32_t get_pwm_period ( )

Get the pwm output period of the FPGA.

Returns
FPGA pwm output period in units of clk cycles
int gpio_read ( LogicalPin  gpio)

Read a gpio pin.

Parameters
gpioLogical pin to read from
Returns
1 if the pin is high 0 if the pin is low
void gpio_write ( LogicalPin  gpio,
int  value,
bool  drive 
)

Set value and drive of a gpio pin.

Parameters
gpioLogical pin to write to
value0 to set the pin low or non-zero to set it high
driver0 to set the pin to Hi-Z or non-zero to drive the pin
int io_expander_i2c_read ( uint8_t  i2c_index,
uint8_t  dev_addr,
uint8_t  start_reg,
uint8_t *  data,
int  length 
)

I2C read on I2C system channels 0, 1, or 2.

Parameters
i2c_indexThe number corresponding to the system i2c bus being used (0, 1, or 2)
dev_addrThe I2C address of the device being read from
start_regThe internal device address where the read will start
dataData buffer for data to be read into
lengthThe number of bytes to read
Returns
0 on success (ACK), nonzero on failure (NACK)
int io_expander_i2c_read_bb ( SystemPin  sda,
SystemPin  scl,
uint8_t  dev_addr,
uint8_t  start_reg,
uint8_t *  data,
int  length 
)

I2C read on I2C system channels 0, 1, or 2 (bit banged version of function, bit banged over control channel)

Parameters
sdaSystem pin used for sda
sclSystem pin used for scl
dev_addrThe I2C address of the device being read from
start_regThe internal device address where the read will start
dataData buffer for data to be read into
lengthThe number of bytes to read
Returns
0 on success (ACK), nonzero on failure (NACK)
int io_expander_i2c_write ( uint8_t  i2c_index,
uint8_t  dev_addr,
uint8_t *  data,
int  length 
)

I2C write on I2C system channels 0, 1, or 2.

Parameters
i2c_indexThe number corresponding to the system i2c bus being used (0, 1, or 2)
dev_addrThe I2C address of the device being written to
dataThe data to be written
lengthThe number of bytes to be written
Returns
0 on success (ACK), nonzero on failure (NACK)
int io_expander_i2c_write_bb ( SystemPin  sda,
SystemPin  scl,
uint8_t  dev_addr,
uint8_t *  data,
int  length 
)

I2C write on I2C system channels 0, 1, or 2 (bit banged version of function, bit banged over control channel)

Parameters
sdaSystem pin used for sda
sclSystem pin used for scl
dev_addrThe I2C address of the device being written to
dataThe data to be written
lengthThe number of bytes to be written
Returns
0 on success (ACK), nonzero on failure (NACK)
uint8_t io_expander_read ( PinName  pin,
IOExpanderReg  reg_type 
)

Read a bit for a specific Mbed pin that is set in the input, output, or configuration registers inside of the IO expander via PinName.

Parameters
pinMbed pin whose register bit is being read
reg_typePin register to access, options are: MbedTester::RegInput, MbedTester::RegOutput, or MbedTester::RegConfig
Returns
The value of the bit read
uint8_t io_expander_read_bb ( PinName  pin,
IOExpanderReg  reg_type 
)

Read a bit for a specific Mbed pin that is set in the input, output, or configuration registers inside of the IO expander (this version of the function uses io_expander_i2c_read_bb)

Parameters
pinMbed pin whose register bit is being read
reg_typePin register to access, options are: MbedTester::RegInput, MbedTester::RegOutput, or MbedTester::RegConfig
Returns
The value of the bit read
uint8_t io_expander_read_index ( int  index,
IOExpanderReg  reg_type 
)

Read a bit for a specific Mbed pin that is set in the input, output, or configuration registers inside of the IO expander via pin index.

Parameters
indexMbed pin index whose register bit is being read
reg_typePin register to access, options are: MbedTester::RegInput, MbedTester::RegOutput, or MbedTester::RegConfig
Returns
The value of the bit read
void io_metrics_continue ( )

Continue recording metrics on all logical pins.

Resume recording metrics.

uint32_t io_metrics_falling_edges ( LogicalPin  pin)

Get the number of falling edges.

Parameters
pinPin to read the metrics for
Returns
The number of falling edges
uint32_t io_metrics_max_pulse_high ( LogicalPin  pin)

Get the longest high pulse recorded.

Parameters
pinPin to read the metrics for
Returns
The longest number of 100MHz clock cycles the pin was high
uint32_t io_metrics_max_pulse_low ( LogicalPin  pin)

Get the longest low pulse recorded.

Parameters
pinPin to read the metrics for
Returns
The longest number of 100MHz clock cycles the pin was low
uint32_t io_metrics_min_pulse_high ( LogicalPin  pin)

Get the shortest high pulse recorded.

Parameters
pinPin to read the metrics for
Returns
The shortest number of 100MHz clock cycles the pin was high
uint32_t io_metrics_min_pulse_low ( LogicalPin  pin)

Get the shortest low pulse recorded.

Parameters
pinPin to read the metrics for
Returns
The shortest number of 100MHz clock cycles the pin was low
uint32_t io_metrics_rising_edges ( LogicalPin  pin)

Get the number of rising edges.

Parameters
pinPin to read the metrics for
Returns
The number of rising edges
void io_metrics_start ( )

Start recording metrics on all logical pins.

This function resets all past metrics to 0. To preserve these call io_metrics_continue instead.

void io_metrics_stop ( )

Stop recording metrics on all logical pins.

This function should be called before any metrics are read to ensure the value does not change while they are being read.

void peripherals_reset ( )

Reset all peripherals.

This does not reset the pin mappings

void pin_map_index ( PhysicalIndex  physical_index,
LogicalPin  logical 
)

Map a physical pin index to the given logical pin.

This function will automatically move the control channel pins to avoid interfering with the mapped pin. The physical pin index does not need to be part of the form factor.

Parameters
physical_indexIndex of the physical pin on the board
logicalLogical pin to map to
void pin_map_reset ( )

Reset all pin mappings.

After this call all pins will be unmapped

void pin_map_set ( PinName  physical,
LogicalPin  logical 
)

Map a physical pin to the given logical pin.

This function will automatically move the control channel pins to avoid interfering with the mapped pin.

Parameters
physicalPhysical pin on the board
logicalLogical pin to map to
void pin_pull_reset_all ( )

Reset the IO expander modules.

int pin_set_pull ( PinName  pin,
PullMode  mode 
)

Configure an Mbed pin for a pulldown resistor, pullup resistor, or tristate mode via PinName.

Parameters
pinMbed pin whose mode is being set
mode(MbedTester::PullUp, MbedTester::PullDown, or MbedTester::PullNone)
Returns
0 on success, nonzero on failure
int pin_set_pull_bb ( PinName  pin,
PullMode  mode 
)

Configure an Mbed pin for a pulldown resistor, pullup resistor, or tristate mode (this version of the function uses io_expander_i2c_read_bb and io_expander_i2c_write_bb)

Parameters
pinMbed pin whose mode is being set
mode(MbedTester::PullUp, MbedTester::PullDown, or MbedTester::PullNone)
Returns
0 on success, nonzero on failure
int pin_set_pull_index ( int  index,
PullMode  mode 
)

Configure an Mbed pin for a pulldown resistor, pullup resistor, or tristate mode via pin index.

Parameters
indexMbed pin index whose mode is being set
mode(MbedTester::PullUp, MbedTester::PullDown, or MbedTester::PullNone)
Returns
0 on success, nonzero on failure
void read ( uint32_t  addr,
uint8_t *  data,
uint32_t  size 
)

Read from tester memory.

addr Address to read from

Parameters
dataBuffer to fill with data
sizeNumber of bytes to read
void reprogram ( )

Reprogram the FPGA.

This function causes the FPGA to reboot and reload RAM contents. This should be used after MbedTester::firmware_update to load the new image.

void reset ( )

Reset everything.

This function resets the state of both the FPGA CI Test Shield and the MbedTester object itself.

Reset effects on the FPGA CI Test Shield include:

  • All pins are tristated
  • All pin mappings are reset
  • All pullup/pulldown settings are reset
  • All peripherals are reset

Reset effects on the MbedTester object include

  • Control channels tristated and freed
  • Control channel selection set to automatic
  • Most internal state reinitialized
void select_peripheral ( Peripheral  peripheral)

Select the currently active peripheral.

Parameters
peripheralActive peripheral
bool self_test_all ( )

Run all self tests.

Returns
true if all self tests pass, false otherwise
bool self_test_control_channels ( )

Test that all allowed control channels can be used.

Check that all pairs of clk and mosi which aren't in the restricted list can be used.

Note
CLK and MOSI lines are paired, where CLK is always on an even index and MOSI is always on an oddd index: clk_index_N = N * 2 mosi_index_N = N * 2 + 1
This functions sets the control pin management mode to automatic when it completes.
Returns
true if all control channel pairs (clk and mosi) of this configuration can be used, false otherwise
bool self_test_control_current ( )

Test that the current control channel works.

Returns
true if communication is successful, false otherwise
bool self_test_control_miso ( )

Test that all allowed control miso lines can be used.

Check that every pin of this form factor aside from the pins in the restricted list can be used as miso.

Note
This functions sets the control pin management mode to automatic when it completes.
Returns
true if all control channel miso lines of this configuration can be used, false otherwise
void set_analog_out ( bool  enable,
float  voltage 
)

Create an analog voltage via the FPGA sys pwm in order to test Mbed AnalogIn.

Parameters
enableEnable the FPGA system PWM (false: of, true: on)
voltageThe analog voltage that will be created by the FPGA CI test shield (float: 0.0 to 1.0)
void set_control_pins_auto ( )

Enable automatic selection and update of control pins.

Calling this function configures MbedTester to automatically select and update the control pins. The control pins are moved if the function MbedTester::pin_map_set is called and maps a pin that is being used for control.

Note
Automatic selection and update of control pins is the default. Unless MbedTester::set_control_pins_manual has been called to manually set the control pins this function has no effect.
void set_control_pins_manual ( PinName  clk,
PinName  mosi,
PinName  miso,
PinName  aux 
)

Set the control pins to use for communication.

Manually set the control pins. Calling this function disables automatic control pin selection and updates. The function MbedTester::pin_map_set must not be used to map over control pins when in this mode.

Parameters
clkClock pin to use as the control channel
mosiMosi pin to use as the control channel
misoMiso pin to use as the control channel
auxAuxillary pin to use as the control cannel
int set_mux_addr ( PinName  pin)

Set the AnalogMuxAddr pins on the FPGA via PinName.

Parameters
pinThe Mbed pin that the analog signal will be routed to
Returns
0 on success, nonzero on failure
int set_mux_addr_index ( int  index)

Set the AnalogMuxAddr pins on the FPGA via pin index.

Parameters
indexThe Mbed pin index that the analog signal will be routed to
Returns
0 on success, nonzero on failure
void set_mux_enable ( bool  val)

Turn on/off the analog muxes.

Parameters
valfalse: off, true: on
void set_pwm_enable ( bool  val)

Turn on/off pwm output on FPGA to test Mbed AnalogIn.

Parameters
valfalse: off, true: on
void set_pwm_period_and_cycles_high ( uint32_t  period,
uint32_t  cycles_high 
)

Set the pwm output period and number of cycles high (duty cycle) on the FPGA.

Parameters
periodIn units of clk cycles
cycles_highIn units of clk cycles
void set_sample_adc ( bool  val)

Turn the FPGA ADC on and off (power management data will be collected while the ADC is on)

Parameters
valFPGA ADC enable bit (false: off, true: on)
void set_snapshot ( )

Allows safe reading of FPGA ADC related values while the FPGA ADC is on If snapshot is set then the ADC values will be safely latched in the FPGA and safe to read.

The RTL will set snapshot to 0 after 1 clk cycle.

void sys_pin_mode_disabled ( )

Set the current system pin mode to disabled.

This releases any pin mappings that were set by the previous pin mode.

void sys_pin_mode_i2c_io_expander ( int  index,
PhysicalIndex  sda_in,
PhysicalIndex  sda_val,
PhysicalIndex  scl_in,
PhysicalIndex  scl_val 
)

Set the current system pin mode to io expander I2C bus.

Remap physical pins to the io expander I2C bus. The IO expanders are used for setting pullups and pulldowns.

Parameters
indexThe index of the I2C bus to connect to
sda_inPhysical pin index for the FPGA to output the state of SDA on
sda_valPhysical pin index for the FPGA to read SDA from. When in this mode the Mbed board must always drive this pin. Driving a 0 causes the FPGA to pull the SDA on the I2C bus low. Setting a 1 causes the FPGA to let SDA on the I2C bus float (and get pulled to 1).
scl_inPhysical pin index for the FPGA to output the state of SCL on
scl_valPhysical pin index for the FPGA to read SCL from. When in this mode the Mbed board must always drive this pin. Driving a 0 causes the FPGA to pull the SCL on the I2C bus low. Setting a 1 causes the FPGA to let SDA on the SCL bus float (and get pulled to 1).
void sys_pin_mode_spi_serial_flash ( PhysicalIndex  mosi,
PhysicalIndex  miso,
PhysicalIndex  clk,
PhysicalIndex  ssel 
)

Set the current system pin mode to serial flash.

Remap physical pins to the serial flash the FPGA boots from. This is used for firmware updates.

Parameters
mosiThe physical pin index to connect to serial flash mosi
misoThe physical pin index to connect to serial flash miso
clkThe physical pin index to connect to serial flash clk
sselThe physical pin index to connect to serial flash cs
bool sys_pin_read ( SystemPin  pin)

Read from the given system pin.

Parameters
pinThe pin to read from
Returns
true if 1 was read, false if 0
void sys_pin_write ( SystemPin  pin,
int  value,
bool  drive 
)

Write to the given system pin.

Parameters
pinThe pin to write to
valueThe value to output on the pin when driven
trueto drive the output, false to set the output high-z
Returns
true if 1 was read, false if 0
uint32_t version ( )

Get the running FPGA firmware version.

Returns
The version of firmware running on the FPGA.
void write ( uint32_t  addr,
const uint8_t *  data,
uint32_t  size 
)

Write to tester memory.

addr Address to write to

Parameters
dataData to write
sizeNumber of bytes to write
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