BleNvmRamAddress The buffer shall have a size of BLE_NVM_SRAM_SIZE number of 32bits The buffer shall be allocated in SRAM2.

Definition at line 756 of file shci.h.

No response parameters.

Definition at line 769 of file shci.h.

Options Each definition below may be added together to build the Options value WARNING : Only one definition per bit shall be added to build the Options value.

Definition at line 573 of file shci.h.

Config1 Each definition below may be added together to build the Config1 value WARNING : Only one definition per bit shall be added to build the Config1 value.

Definition at line 734 of file shci.h.

EvtMask1 Each definition below may be added together to build the EvtMask1 value.

Definition at line 743 of file shci.h.

PayloadCmdSize Value that shall be used.

Definition at line 727 of file shci.h.

No command parameters.

No response parameters

Definition at line 372 of file shci.h.

No response parameters.

Definition at line 650 of file shci.h.

No response parameters.

Definition at line 642 of file shci.h.

No response parameters.

Definition at line 631 of file shci.h.

No response parameters.

Definition at line 710 of file shci.h.

No command parameters.

No response parameters

Definition at line 590 of file shci.h.

No response parameters.

Definition at line 621 of file shci.h.

No command parameters.

No response parameters

Definition at line 654 of file shci.h.

No command parameters.

1 byte holding the key index value

Definition at line 344 of file shci.h.

No structure for command parameters.

No response parameters

Definition at line 273 of file shci.h.

No command parameters.

No response parameters

Definition at line 269 of file shci.h.

Response parameters.

It responds a 1 byte value holding the index given for the stored key

Definition at line 316 of file shci.h.

No response parameters.

Definition at line 285 of file shci.h.

No command parameters.

No response parameters

Definition at line 334 of file shci.h.

No command parameters.

No response parameters

Definition at line 360 of file shci.h.

No command parameters.

No response parameters

Definition at line 364 of file shci.h.

No command parameters.

No response parameters

Definition at line 368 of file shci.h.

No command parameters.

No response parameters

Definition at line 326 of file shci.h.

No command parameters.

No response parameters

Definition at line 330 of file shci.h.

No command parameters.

No response parameters

Definition at line 348 of file shci.h.

No command parameters.

No response parameters

Definition at line 352 of file shci.h.

No command parameters.

No response parameters

Definition at line 356 of file shci.h.

Command parameters.

1 byte holding the key index value No response parameters

Definition at line 322 of file shci.h.

No command parameters.

No response parameters

Definition at line 289 of file shci.h.

Command parameters.

1 byte holding the key index value No response parameters

Definition at line 340 of file shci.h.

No command parameters.

No response parameters

Definition at line 277 of file shci.h.

No response parameters.

Definition at line 665 of file shci.h.

No response parameters.

Definition at line 700 of file shci.h.

ThreadNvmRamAddress The buffer shall have a size of THREAD_NVM_SRAM_SIZE number of 32bits The buffer shall be allocated in SRAM2.

Definition at line 763 of file shci.h.

THE ORDER SHALL NOT BE CHANGED.

SHCI_SUB_EVT_BLE_NVM_RAM_UPDATE This notifies the CPU1 which part of the BLE NVM RAM has been updated so that only the modified section could be written in Flash/NVM StartAddress : Start address of the section that has been modified Size : Size (in bytes) of the section that has been modified.

command parameters

Command parameters.

Command parameters.

SHCI_SUB_EVT_ERROR_NOTIF This reports to the CPU1 some error form the CPU2.

SHCI_SUB_EVT_NVM_END_WRITE This notifies the CPU1 that the CPU2 has written all expected data in Flash.

SHCI_SUB_EVT_NVM_START_ERASE This notifies the CPU1 that the CPU2 has started a erase procedure in Flash NumberOfSectors : The number of sectors the CPU2 needs to erase in Flash. For each sector, the algorithm as described in AN5289 is executed. When this number is reported to 0, it means the Number of sectors to be erased was unknown when the procedure has started. When all sectors are erased, the SHCI_SUB_EVT_NVM_END_ERASE event is reported

SHCI_SUB_EVT_NVM_START_WRITE This notifies the CPU1 that the CPU2 has started a write procedure in Flash NumberOfWords : The number of 64bits data the CPU2 needs to write in Flash.

For each 64bits data, the algorithm as described in AN5289 is executed. When this number is reported to 0, it means the Number of 64bits to be written was unknown when the procedure has started. When all data are written, the SHCI_SUB_EVT_NVM_END_WRITE event is reported

SHCI_SUB_EVT_CODE_READY This notifies the CPU1 that the CPU2 is now ready to receive commands It reports as well which firmware is running on CPU2 : The wireless stack of the FUS (previously named RSS)

SHCI_SUB_EVT_THREAD_NVM_RAM_UPDATE This notifies the CPU1 which part of the OT NVM RAM has been updated so that only the modified section could be written in Flash/NVM StartAddress : Start address of the section that has been modified Size : Size (in bytes) of the section that has been modified.

SHCI_SUB_EVT_NVM_END_ERASE This notifies the CPU1 that the CPU2 has erased all expected flash sectors.

Command parameters.

Definition at line 292 of file shci.h.

Command parameters.

Definition at line 679 of file shci.h.

command parameters

Definition at line 633 of file shci.h.

command parameters

Definition at line 657 of file shci.h.

Command parameters.

Definition at line 702 of file shci.h.

Command parameters.

Definition at line 623 of file shci.h.

No command parameters.

Response parameters It responds a 1 byte value holding FUS State error code when the FUS State value is 0xFF (FUS_STATE_VALUE_ERROR)

Definition at line 235 of file shci.h.

THE ORDER SHALL NOT BE CHANGED TO GUARANTEE COMPATIBILITY WITH THE CPU2 DEFINITION.

Definition at line 186 of file shci.h.

THE ORDER SHALL NOT BE CHANGED TO GUARANTEE COMPATIBILITY WITH THE CPU1 DEFINITION.

Definition at line 62 of file shci.h.

SHCI_C2_802_15_4_DeInit.

Deinit 802.15.4 layer (to be used before entering StandBy mode)

Parameters

None

Return values

Status

SHCI_C2_BLE_Init.

Provides parameters and starts the BLE Stack

Parameters

pCmdPacket

: Parameters are described SHCI_C2_Ble_Init_Cmd_Packet_t declaration

Return values

Status

SHCI_C2_BLE_LLD_Init.

Starts the LLD tests BLE

Parameters

param_size	: Nb of bytes
p_param	: pointeur with data to give from M4 to M0

Return values

Status

SHCI_C2_CONCURRENT_EnableNext_802154_EvtNotification.

Activate the next 802.15.4 event notification (one shot)

Parameters

None

Return values

None

SHCI_C2_CONCURRENT_GetNextBleEvtTime.

Get the next BLE event date (relative time)

Parameters

Command

Packet

Return values

None

SHCI_C2_CONCURRENT_SetMode.

Enable/Disable Thread on CPU2 (M0+)

Parameters

Mode	BLE or Thread enable flag

Return values

Status

SHCI_C2_Config.

Send the system configuration to the CPU2

Parameters

pCmdPacket

address of the buffer holding following parameters uint8_t PayloadCmdSize : Size of the payload - shall be SHCI_C2_CONFIG_PAYLOAD_CMD_SIZE uint8_t Config1 : bit0 : 0 - BLE NVM Data data are flushed in internal secure flash 1 - BLE NVM Data are written in SRAM cache pointed by BleNvmRamAddress bit1 : 0 - THREAD NVM Data data are flushed in internal secure flash 1 - THREAD NVM Data are written in SRAM cache pointed by ThreadNvmRamAddress bit2 to bit7 : Unused, shall be set to 0 uint8_t EvtMask1 : When a bit is set to 0, the event is not reported bit0 : Asynchronous Event with Sub Evt Code 0x9201 (= SHCI_SUB_EVT_ERROR_NOTIF) ... bit31 : Asynchronous Event with Sub Evt Code 0x9220 uint8_t Spare1 : Unused, shall be set to 0 uint32_t BleNvmRamAddress : Only considered when Config1.bit0 = 1 When set to 0, data are kept in internal SRAM on CPU2 Otherwise, data are copied in the cache pointed by BleNvmRamAddress The size of the buffer shall be BLE_NVM_SRAM_SIZE (number of 32bits) The buffer shall be allocated in SRAM2 uint32_t ThreadNvmRamAddress : Only considered when Config1.bit1 = 1 When set to 0, data are kept in internal SRAM on CPU2 Otherwise, data are copied in the cache pointed by ThreadNvmRamAddress The size of the buffer shall be THREAD_NVM_SRAM_SIZE (number of 32bits) The buffer shall be allocated in SRAM2

Please check macro definition to be used for this function They are defined in this file next to the definition of SHCI_OPCODE_C2_CONFIG

Return values

Status

SHCI_C2_DEBUG_Init.

Starts the Traces

Parameters

None

Return values

Status

SHCI_C2_ExtpaConfig.

Send the Ext PA configuration When the CPU2 receives the command, it controls the Ext PA as requested by the configuration This configures only which IO is used to enable/disable the ExtPA and the associated polarity This command has no effect on the other IO that is used to control the mode of the Ext PA (Rx/Tx)

Parameters

gpio_port	GPIOx where x can be (A..F) to select the GPIO peripheral for STM32WBxx family
gpio_pin_number	This parameter can be one of GPIO_PIN_x (= LL_GPIO_PIN_x) where x can be (0..15).
gpio_polarity	This parameter can be either EXT_PA_ENABLED_LOW: ExtPA is enabled when GPIO is low EXT_PA_ENABLED_HIGH: ExtPA is enabled when GPIO is high
gpio_status	This parameter can be either EXT_PA_DISABLED: Stop driving the ExtPA EXT_PA_ENABLED: Drive the ExtPA according to radio activity (ON before the Event and OFF at the end of the event)

Return values

Status

SHCI_C2_FLASH_EraseActivity.

Provides the information of the start and the end of a flash erase window on the CPU1

Parameters

erase_activity

Start/End of erase activity

Return values

Status

SHCI_C2_FLASH_EraseData.

Erase Data in Flash

Parameters

Ip	BLE or THREAD

Return values

Status

SHCI_C2_FLASH_StoreData.

Store Data in Flash

Parameters

Ip	BLE or THREAD

Return values

Status

SHCI_C2_FUS_ActivateAntiRollback.

Request the FUS to enable the AntiRollback feature so that it is not possible to update the wireless firmware with an older version than the current one. Note:

• This command is only supported by the FUS.
• Once this feature is enabled, it is not possible anymore to disable it.

Parameters

None

Return values

Status

SHCI_C2_FUS_FwDelete.

Delete the wireless stack on CPU2 Note: This command is only supported by the FUS.

Parameters

None

Return values

Status

SHCI_C2_FUS_FwUpgrade.

Request the FUS to install the CPU2 firmware update Note: This command is only supported by the FUS.

Parameters

fw_src_add	Address of the firmware image location
fw_dest_add	Address of the firmware destination

Return values

Status

SHCI_C2_FUS_GetState.

Read the FUS State If the user is not interested by the Error code response, a null value may be passed as parameter

Note: This command is fully supported only by the FUS. When the wireless firmware receives that command, it responds SHCI_FUS_CMD_NOT_SUPPORTED the first time. When the wireless firmware receives that command a second time, it reboots the full device with the FUS running on CPU2

Parameters

p_rsp

: return the error code when the FUS State Value = 0xFF

Return values

FUS	State Values

SHCI_C2_FUS_LoadUsrKey.

Request the FUS to load the user key into the AES Note: This command is supported by both the FUS and the wireless stack.

Parameters

key_index

: index of the user key to load in AES1

Return values

Status

SHCI_C2_FUS_LockAuthKey.

Request the FUS to prevent any future update of the authentication key Note: This command is only supported by the FUS.

Parameters

None

Return values

Status

SHCI_C2_FUS_LockUsrKey.

Request the FUS to lock the user key so that it cannot be updated later on Note: This command is supported by both the FUS and the wireless stack.

Parameters

key_index

: index of the user key to lock

Return values

Status

SHCI_C2_FUS_StartWs.

Request the FUS to reboot on the wireless stack Note: This command is only supported by the FUS.

Parameters

None

Return values

Status

SHCI_C2_FUS_StoreUsrKey.

Request the FUS to store the user key Note: This command is supported by both the FUS and the wireless stack.

Parameters

pParam	: command parameter
p_key_index	: Index allocated by the FUS to the stored key

Return values

Status

SHCI_C2_FUS_UnloadUsrKey.

Request the FUS to Unload the user key so that the CPU1 may use the AES with another Key Note: This command is supported by both the FUS and the wireless stack.

Parameters

key_index

: index of the user key to unload

Return values

Status

SHCI_C2_FUS_UpdateAuthKey.

Request the FUS to update the authentication key Note: This command is only supported by the FUS.

Parameters

pCmdPacket

Return values

Status

SHCI_C2_LLDTESTS_Init.

Starts the LLD tests CLI

Parameters

param_size	: Nb of bytes
p_param	: pointeur with data to give from M4 to M0

Return values

Status

SHCI_C2_MAC_802_15_4_Init.

Starts the MAC 802.15.4 on M0

Parameters

None

Return values

Status

SHCI_C2_RADIO_AllowLowPower.

Allow or forbid IP_radio (802_15_4 or BLE) to enter in low power mode.

Parameters

Ip	BLE or 802_15_5
FlagRadioLowPowerOn	True or false

Return values

Status

SHCI_C2_Reinit.

This is required to allow the CPU1 to fake a set C2BOOT when it has already been set. In order to fake a C2BOOT, the CPU1 shall :

• Send SHCI_C2_Reinit()
• call SEV instruction WARNING: This function is intended to be used by the SBSFU

Parameters

None

Return values

Status

SHCI_C2_SetFlashActivityControl.

Set the mechanism to be used on CPU2 to prevent the CPU1 to either write or erase in flash

Parameters

Source

It can be one of the following list FLASH_ACTIVITY_CONTROL_PES : The CPU2 set the PES bit to prevent the CPU1 to either read or write in flash FLASH_ACTIVITY_CONTROL_SEM7 : The CPU2 gets the semaphore 7 to prevent the CPU1 to either read or write in flash. This requires the CPU1 to first get semaphore 7 before erasing or writing the flash.

Return values

Status

SHCI_C2_THREAD_Init.

Starts the THREAD Stack

Parameters

None

Return values

Status

SHCI_C2_ZIGBEE_Init.

Starts the Zigbee Stack

Parameters

None

Return values

Status

SHCI_GetWirelessFwInfo.

This function read back the informations relative to the wireless binary loaded. Refer yourself to MB_WirelessFwInfoTable_t structure to get the significance of the different parameters returned.

Parameters

pWirelessInfo

: Pointer to WirelessFwInfo_t.

Return values

SHCI_Success

AttMtu NOTE: This parameter is ignored by the CPU2 when the parameter "Options" is set to "LL_only" ( see Options description in that structure )

Maximum ATT MTU size supported

• Min value: 23
• Max value: 512

Definition at line 463 of file shci.h.

AttrValueArrSize NOTE: This parameter is ignored by the CPU2 when the parameter "Options" is set to "LL_only" ( see Options description in that structure )

Size of the storage area for the attribute values. Each characteristic contributes to the attrValueArrSize value as follows:

• Characteristic value length plus:
  • 5 bytes if characteristic UUID is 16 bits
  • 19 bytes if characteristic UUID is 128 bits
  • 2 bytes if characteristic has a server configuration descriptor
  • 2 bytes * NumOfLinks if the characteristic has a client configuration descriptor
  • 2 bytes if the characteristic has extended properties Each descriptor contributes to the attrValueArrSize value as follows:
• Descriptor length

Definition at line 416 of file shci.h.

NOT USED - shall be set to 0.

Definition at line 376 of file shci.h.

ExtendedPacketLengthEnable Disable/enable the extended packet length BLE 5.0 feature.

• Disable: 0
• Enable: 1

Definition at line 432 of file shci.h.

HsStartupTime Startup time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 µs (~2.44 µs).

• Min value: 0
• Max value: 820 (~2 ms). A higher value can be specified, but the value that implemented in stack is forced to ~2 ms

Definition at line 518 of file shci.h.

HwVersion Reserved for future use - shall be set to 0.

Definition at line 542 of file shci.h.

LsSource Source for the 32 kHz slow speed clock.

• External crystal LSE: 0 - No calibration
• Others:1 - As the accuracy of this oscillator can vary depending upon external conditions (temperature), it is calibrated every second to ensure correct behavior of timing sensitive BLE operations

Definition at line 499 of file shci.h.

MasterSca The sleep clock accuracy handled in master mode.

It is used to determine the connection and advertising events timing. It is transmitted to the slave in CONNEC_REQ PDU used by the slave to calculate the window widening, see SlaveSca and Bluetooth Core Specification v5.0 Vol 6 - Part B - chap 4.5.7 and 4.2.2 Possible values:

• 251 ppm to 500 ppm: 0
• 151 ppm to 250 ppm: 1
• 101 ppm to 150 ppm: 2
• 76 ppm to 100 ppm: 3
• 51 ppm to 75 ppm: 4
• 31 ppm to 50 ppm: 5
• 21 ppm to 30 ppm: 6
• 0 ppm to 20 ppm: 7

Definition at line 490 of file shci.h.

Maximum number of connection-oriented channels in initiator mode.

Range: 0 .. 64

Definition at line 548 of file shci.h.

Maximum transmit power in dBm supported by the Controller.

Range: -127 .. 20

Definition at line 560 of file shci.h.

MaxConnEventLength This parameter determines the maximum duration of a slave connection event.

When this duration is reached the slave closes the current connections event (whatever is the CE_length parameter specified by the master in HCI_CREATE_CONNECTION HCI command), expressed in units of 625/256 µs (~2.44 µs)

• Min value: 0 (if 0 is specified, the master and slave perform only a single TX-RX exchange per connection event)
• Max value: 1638400 (4000 ms). A higher value can be specified (max 0xFFFFFFFF) but results in a maximum connection time of 4000 ms as specified. In this case the parameter is not applied, and the predicted CE length calculated on slave is not shortened

Definition at line 510 of file shci.h.

MblockCount NOTE: This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter "Options" is set to "LL_only" ( see Options description in that structure )

Number of allocated memory blocks for the BLE stack

• Min value: given by the macro MBLOCKS_CALC
• Max value: a higher value can improve data throughput performance, but uses more memory

Definition at line 453 of file shci.h.

MetaData holds : 2*32bits for chaining list 1*32bits with BLE header (type + Opcode + Length)

Definition at line 160 of file shci.h.

Minimum transmit power in dBm supported by the Controller.

Range: -127 .. 20

Definition at line 554 of file shci.h.

NumAttrRecord Maximum number of attribute records related to all the required characteristics (excluding the services) that can be stored in the GATT database, for the specific BLE user application.

For each characteristic, the number of attribute records goes from two to five depending on the characteristic properties:

• minimum of two (one for declaration and one for the value)
• add one more record for each additional property: notify or indicate, broadcast, extended property. The total calculated value must be increased by 9, due to the records related to the standard attribute profile and GAP service characteristics, and automatically added when initializing GATT and GAP layers

Min value: <number of="" user="" attributes>=""> + 9

• Max value: depending on the GATT database defined by user application

Definition at line 390 of file shci.h.

NumAttrServ Defines the maximum number of services that can be stored in the GATT database.

Note that the GAP and GATT services are automatically added at initialization so this parameter must be the number of user services increased by two.

• Min value: <number of="" user="" service>=""> + 2
• Max value: depending GATT database defined by user application

Definition at line 399 of file shci.h.

NumOfLinks Maximum number of BLE links supported.

• Min value: 1
• Max value: 8

Definition at line 424 of file shci.h.

Options flags.

• bit 0: 1: LL only 0: LL + host
• bit 1: 1: no service change desc. 0: with service change desc.
• bit 2: 1: device name Read-Only 0: device name R/W
• bit 7: 1: LE Power Class 1 0: LE Power Classe 2-3
• other bits: reserved ( shall be set to 0)

Definition at line 536 of file shci.h.

Does not need to be initialized by the user.

Definition at line 565 of file shci.h.

NOT USED - shall be set to 0.

Definition at line 375 of file shci.h.

PrWriteListSize NOTE: This parameter is ignored by the CPU2 when the parameter "Options" is set to "LL_only" ( see Options description in that structure )

Maximum number of supported “prepare write request”

• Min value: given by the macro DEFAULT_PREP_WRITE_LIST_SIZE
• Max value: a value higher than the minimum required can be specified, but it is not recommended

Definition at line 442 of file shci.h.

SlaveSca The sleep clock accuracy (ppm value) that used in BLE connected slave mode to calculate the window widening (in combination with the sleep clock accuracy sent by master in CONNECT_REQ PDU), refer to BLE 5.0 specifications - Vol 6 - Part B - chap 4.5.7 and 4.2.2.

• Min value: 0
• Max value: 500 (worst possible admitted by specification)

Definition at line 473 of file shci.h.

ViterbiEnable Viterbi implementation in BLE LL reception.

• 0: Enable
• 1: Disable

Definition at line 526 of file shci.h.