21 #ifndef INCLUDED_WHD_WLIOCTL_H 22 #define INCLUDED_WHD_WLIOCTL_H 29 #define DOT11_CAP_ESS (0x0001) 30 #define DOT11_CAP_IBSS (0x0002) 31 #define DOT11_CAP_PRIVACY (0x0010) 33 #define CH_MAX_2G_CHANNEL (14) 34 #define MAX_WFDS_SVC_NAME_LEN (200) 36 #define ACTION_FRAME_SIZE 1040 37 typedef uint16_t chanspec_t;
38 #define ETHER_ADDR_LEN 6 42 uint8_t octet[ETHER_ADDR_LEN];
46 uint8_t ether_dhost[ETHER_ADDR_LEN];
47 uint8_t ether_shost[ETHER_ADDR_LEN];
55 uint8_t data[ACTION_FRAME_SIZE];
66 #define WL_WIFI_AF_PARAMS_SIZE sizeof(struct wl_af_params) 69 #define ETHER_TYPE_LEN 2 70 #define ETHER_TYPE_MIN 0x0600 71 #define ETHER_TYPE_IP 0x0800 72 #define ETHER_TYPE_ARP 0x0806 73 #define ETHER_TYPE_8021Q 0x8100 74 #define ETHER_TYPE_802_1X 0x888e 75 #define ETHER_TYPE_WAI 0x88b4 76 #define ETHER_TYPE_802_1X_PREAUTH 0x88c7 77 #define WL_WIFI_ACTION_FRAME_SIZE sizeof(struct wl_action_frame) 78 #define BWL_DEFAULT_PACKING 80 #define RWL_ACTION_WIFI_CATEGORY 127 81 #define RWL_WIFI_OUI_BYTE1 0x90 82 #define RWL_WIFI_OUI_BYTE2 0x4C 83 #define RWL_WIFI_OUI_BYTE3 0x0F 84 #define RWL_WIFI_ACTION_FRAME_SIZE sizeof(struct dot11_action_wifi_vendor_specific) 85 #define RWL_WIFI_DEFAULT 0x00 86 #define RWL_WIFI_FIND_MY_PEER 0x09 87 #define RWL_WIFI_FOUND_PEER 0x0A 88 #define RWL_ACTION_WIFI_FRAG_TYPE 0x55 100 #define RWL_REF_MAC_ADDRESS_OFFSET 17 101 #define RWL_DUT_MAC_ADDRESS_OFFSET 23 102 #define RWL_WIFI_CLIENT_CHANNEL_OFFSET 50 103 #define RWL_WIFI_SERVER_CHANNEL_OFFSET 51 104 #define WL_BSS_INFO_VERSION 109 105 #define MCSSET_LEN 16 112 #define WL_BSSTYPE_INFRA 1 113 #define WL_BSSTYPE_INDEP 0 114 #define WL_BSSTYPE_ANY 2 115 #define WL_SCANFLAGS_PASSIVE 0x01 116 #define WL_SCANFLAGS_PROHIBITED 0x04 125 int32_t passive_time;
128 uint16_t channel_list[1];
130 #define WL_SCAN_PARAMS_FIXED_SIZE (64) 131 #define WL_SCAN_PARAMS_COUNT_MASK (0x0000ffff) 132 #define WL_SCAN_PARAMS_NSSID_SHIFT (16) 133 #define WL_SCAN_ACTION_START (1) 134 #define WL_SCAN_ACTION_CONTINUE (2) 135 #define WL_SCAN_ACTION_ABORT (3) 136 #define ISCAN_REQ_VERSION (1) 141 uint16_t scan_duration;
144 #define WL_ISCAN_PARAMS_FIXED_SIZE (offsetof(wl_iscan_params_t, params) + sizeof(wlc_ssid_t) ) 152 #define WL_SCAN_RESULTS_FIXED_SIZE (12) 153 #define WL_SCAN_RESULTS_SUCCESS (0) 154 #define WL_SCAN_RESULTS_PARTIAL (1) 155 #define WL_SCAN_RESULTS_PENDING (2) 156 #define WL_SCAN_RESULTS_ABORTED (3) 157 #define WL_SCAN_RESULTS_NO_MEM (4) 158 #define ESCAN_REQ_VERSION 1 166 #define WL_ESCAN_PARAMS_FIXED_SIZE (offsetof(wl_escan_params_t, params) + sizeof(wlc_ssid_t) ) 175 #define WL_ESCAN_RESULTS_FIXED_SIZE (sizeof(wl_escan_result_t) - sizeof(wl_bss_info_t) ) 181 #define WL_ISCAN_RESULTS_FIXED_SIZE \ 182 (WL_SCAN_RESULTS_FIXED_SIZE + offsetof(wl_iscan_results_t, results) ) 183 #define WL_MAXRATES_IN_SET 16 187 uint8_t rates[WL_MAXRATES_IN_SET];
193 uint8_t rates[WL_MAXRATES_IN_SET];
194 uint8_t mcs[WL_MAXRATES_IN_SET];
197 #define WL_RSPEC_RATE_MASK 0x000000FF 198 #define WL_RSPEC_VHT_MCS_MASK 0x0000000F 199 #define WL_RSPEC_VHT_NSS_MASK 0x000000F0 200 #define WL_RSPEC_VHT_NSS_SHIFT 4 201 #define WL_RSPEC_TXEXP_MASK 0x00000300 202 #define WL_RSPEC_TXEXP_SHIFT 8 203 #define WL_RSPEC_BW_MASK 0x00070000 204 #define WL_RSPEC_BW_SHIFT 16 205 #define WL_RSPEC_STBC 0x00100000 206 #define WL_RSPEC_TXBF 0x00200000 207 #define WL_RSPEC_LDPC 0x00400000 208 #define WL_RSPEC_SGI 0x00800000 209 #define WL_RSPEC_ENCODING_MASK 0x03000000 210 #define WL_RSPEC_OVERRIDE_RATE 0x40000000 211 #define WL_RSPEC_OVERRIDE_MODE 0x80000000 212 #define WL_RSPEC_BW_UNSPECIFIED 0 213 #define WL_RSPEC_BW_20MHZ 0x00010000 214 #define WL_RSPEC_BW_40MHZ 0x00020000 215 #define WL_RSPEC_BW_80MHZ 0x00030000 216 #define WL_RSPEC_BW_160MHZ 0x00040000 217 #define WL_RSPEC_BW_10MHZ 0x00050000 218 #define WL_RSPEC_BW_5MHZ 0x00060000 219 #define WL_RSPEC_BW_2P5MHZ 0x00070000 220 #define WL_RSPEC_ENCODE_RATE 0x00000000 221 #define WL_RSPEC_ENCODE_HT 0x01000000 222 #define WL_RSPEC_ENCODE_VHT 0x02000000 237 int32_t passive_time;
245 #define NRATE_MCS_INUSE (0x00000080) 246 #define NRATE_RATE_MASK (0x0000007f) 247 #define NRATE_STF_MASK (0x0000ff00) 248 #define NRATE_STF_SHIFT (8) 249 #define NRATE_OVERRIDE (0x80000000) 250 #define NRATE_OVERRIDE_MCS_ONLY (0x40000000) 251 #define NRATE_SGI_MASK (0x00800000) 252 #define NRATE_SGI_SHIFT (23) 253 #define NRATE_LDPC_CODING (0x00400000) 254 #define NRATE_LDPC_SHIFT (22) 255 #define NRATE_BCMC_OVERRIDE (0x00200000) 256 #define NRATE_BCMC_SHIFT (21) 257 #define NRATE_STF_SISO (0) 258 #define NRATE_STF_CDD (1) 259 #define NRATE_STF_STBC (2) 260 #define NRATE_STF_SDM (3) 261 #define ANTENNA_NUM_1 (1) 262 #define ANTENNA_NUM_2 (2) 263 #define ANTENNA_NUM_3 (3) 264 #define ANTENNA_NUM_4 (4) 265 #define ANT_SELCFG_AUTO (0x80) 266 #define ANT_SELCFG_MASK (0x33) 267 #define ANT_SELCFG_MAX (4) 268 #define ANT_SELCFG_TX_UNICAST (0) 269 #define ANT_SELCFG_RX_UNICAST (1) 270 #define ANT_SELCFG_TX_DEF (2) 271 #define ANT_SELCFG_RX_DEF (3) 274 uint8_t ant_config[ANT_SELCFG_MAX];
277 #define HIGHEST_SINGLE_STREAM_MCS (7) 278 #define WLC_CNTRY_BUF_SZ (4) 281 char country_abbrev[WLC_CNTRY_BUF_SZ];
283 char ccode[WLC_CNTRY_BUF_SZ];
289 int8_t country_abbrev[WLC_CNTRY_BUF_SZ];
299 int8_t country_abbrev[1];
301 #define WL_NUM_RPI_BINS 8 302 #define WL_RM_TYPE_BASIC 1 303 #define WL_RM_TYPE_CCA 2 304 #define WL_RM_TYPE_RPI 3 305 #define WL_RM_FLAG_PARALLEL (1 << 0) 306 #define WL_RM_FLAG_LATE (1 << 1) 307 #define WL_RM_FLAG_INCAPABLE (1 << 2) 308 #define WL_RM_FLAG_REFUSED (1 << 3) 327 #define WL_RM_REQ_FIXED_LEN offsetof(wl_rm_req_t, req) 340 #define WL_RM_REP_ELT_FIXED_LEN 24 341 #define WL_RPI_REP_BIN_NUM 8 344 uint8_t rpi[WL_RPI_REP_BIN_NUM];
345 int8_t rpi_max[WL_RPI_REP_BIN_NUM];
353 #define WL_RM_REP_FIXED_LEN 8 354 #define CRYPTO_ALGO_OFF 0 355 #define CRYPTO_ALGO_WEP1 1 356 #define CRYPTO_ALGO_TKIP 2 357 #define CRYPTO_ALGO_WEP128 3 358 #define CRYPTO_ALGO_AES_CCM 4 359 #define CRYPTO_ALGO_AES_OCB_MSDU 5 360 #define CRYPTO_ALGO_AES_OCB_MPDU 6 361 #define CRYPTO_ALGO_NALG 7 362 #define WSEC_GEN_MIC_ERROR 0x0001 363 #define WSEC_GEN_REPLAY 0x0002 364 #define WSEC_GEN_ICV_ERROR 0x0004 365 #define WL_SOFT_KEY (1 << 0) 366 #define WL_PRIMARY_KEY (1 << 1) 367 #define WL_KF_RES_4 (1 << 4) 368 #define WL_KF_RES_5 (1 << 5) 369 #define WL_IBSS_PEER_GROUP_KEY (1 << 6) 370 #define DOT11_MAX_KEY_SIZE 32 375 uint8_t data[DOT11_MAX_KEY_SIZE];
381 int32_t iv_initialized;
391 #define WSEC_MIN_PSK_LEN 8 392 #define WSEC_MAX_PSK_LEN 64 393 #define WSEC_PASSPHRASE (1 << 0) 398 uint8_t key[WSEC_MAX_PSK_LEN];
401 #define WSEC_MAX_SAE_PASSWORD_LEN 128 404 uint16_t password_len;
405 uint8_t password[WSEC_MAX_SAE_PASSWORD_LEN];
408 #define OPEN_AUTH 0x0000 409 #define SHARED_AUTH 0x0001 416 AUTH_ALGO_80211_OPEN = 1, AUTH_ALGO_80211_SHARED_KEY = 2, AUTH_ALGO_WPA = 3, AUTH_ALGO_WPA_PSK = 4,
417 AUTH_ALGO_WPA_NONE = 5, AUTH_ALGO_RSNA = 6, AUTH_ALGO_RSNA_PSK = 7,
420 #define WSEC_SWFLAG 0x0008 421 #define CKIP_KP_ENABLED 0x0010 422 #define CKIP_MIC_ENABLED 0x0020 423 #define SES_OW_ENABLED 0x0040 424 #define FIPS_ENABLED 0x0080 425 #define SMS4_ENABLED 0x0100 427 #define MFP_NONE 0x0000 428 #define MFP_CAPABLE 0x0200 429 #define MFP_REQUIRED 0x0400 430 #define MFP_SHA256 0x0800 432 #define WPA_AUTH_DISABLED 0x0000 433 #define WPA_AUTH_NONE 0x0001 434 #define WPA_AUTH_UNSPECIFIED 0x0002 435 #define WPA_AUTH_PSK 0x0004 436 #define WPA_AUTH_CCKM 0x0008 437 #define WPA2_AUTH_CCKM 0x0010 438 #define WPA2_AUTH_UNSPECIFIED 0x0040 439 #define WPA2_AUTH_PSK 0x0080 440 #define BRCM_AUTH_PSK 0x0100 441 #define BRCM_AUTH_DPT 0x0200 442 #define WPA_AUTH_WAPI 0x0400 443 #define WPA2_AUTH_MFP 0x1000 445 #define WPA2_AUTH_1X_SHA256 0x1000 446 #define WPA2_AUTH_TPK 0x2000 447 #define WPA2_AUTH_FT 0x4000 448 #define WPA2_AUTH_PSK_SHA256 0x8000 449 #define WPA2_AUTH_FILS_SHA256 0x10000 450 #define WPA2_AUTH_FILS_SHA384 0x20000 451 #define WPA2_AUTH_IS_FILS(auth) ( (auth) & (WPA2_AUTH_FILS_SHA256 | WPA2_AUTH_FILS_SHA384) ) 452 #define WPA3_AUTH_SAE_PSK 0x40000 453 #define WPA3_AUTH_SAE_FBT 0x80000 454 #define WPA3_AUTH_OWE 0x100000 455 #define WPA_AUTH_PFN_ANY 0xffffffff 458 #define WPA2_PMKID_LEN 16 462 uint8_t PMKID[WPA2_PMKID_LEN];
476 uint32_t npmkid_cand;
505 #define WLC_ASSOC_REQ_IS_REASSOC 0x01 518 #define WLC_CIS_DEFAULT 0 519 #define WLC_CIS_SROM 1 520 #define WLC_CIS_OTP 2 528 #define WL_ATTEN_APP_INPUT_PCL_OFF 0 529 #define WL_ATTEN_PCL_ON 1 530 #define WL_ATTEN_PCL_OFF 2 541 uint8_t short_fallback;
543 uint8_t long_fallback;
547 #define WL_WME_TX_PARAMS_IO_BYTES (sizeof(wme_tx_params_t) * AC_COUNT) 548 #define WL_PWRIDX_PCL_OFF -2 549 #define WL_PWRIDX_PCL_ON -1 550 #define WL_PWRIDX_LOWER_LIMIT -2 551 #define WL_PWRIDX_UPPER_LIMIT 63 557 #define BCM_MAC_STATUS_INDICATION (0x40010200L) 568 uint32_t listen_interval_inms;
570 uint32_t tx_failures;
571 uint32_t rx_ucast_pkts;
572 uint32_t rx_mcast_pkts;
576 #define WL_OLD_STAINFO_SIZE offsetof(sta_info_t, tx_pkts) 578 #define WL_STA_BRCM 0x1 579 #define WL_STA_WME 0x2 580 #define WL_STA_ABCAP 0x4 581 #define WL_STA_AUTHE 0x8 582 #define WL_STA_ASSOC 0x10 583 #define WL_STA_AUTHO 0x20 584 #define WL_STA_WDS 0x40 585 #define WL_STA_WDS_LINKUP 0x80 586 #define WL_STA_PS 0x100 587 #define WL_STA_APSD_BE 0x200 588 #define WL_STA_APSD_BK 0x400 589 #define WL_STA_APSD_VI 0x800 590 #define WL_STA_APSD_VO 0x1000 591 #define WL_STA_N_CAP 0x2000 592 #define WL_STA_SCBSTATS 0x4000 593 #define WL_WDS_LINKUP WL_STA_WDS_LINKUP 597 int32_t target_channel;
598 int32_t scan_channel;
607 uint32_t rx_good_pkt;
609 uint32_t tx_good_pkt;
611 uint32_t rx_ocast_good_pkt;
630 uint32_t boardvendor;
640 #define WL_REV_INFO_LEGACY_LENGTH 48 641 #define WL_BRAND_MAX 10 645 int8_t brand[WL_BRAND_MAX];
652 #define WLC_IOV_NAME_LEN 30 657 int8_t name[WLC_IOV_NAME_LEN];
661 typedef enum event_msgs_ext_command
663 EVENTMSGS_NONE = 0, EVENTMSGS_SET_BIT = 1, EVENTMSGS_RESET_BIT = 2, EVENTMSGS_SET_MASK = 3
664 } event_msgs_ext_command_t;
666 #define EVENTMSGS_VER 1 681 #define IOVAR_STR_ACTFRAME "actframe" 682 #define IOVAR_STR_BSS "bss" 683 #define IOVAR_STR_BSS_RATESET "bss_rateset" 684 #define IOVAR_STR_CSA "csa" 685 #define IOVAR_STR_AMPDU_TID "ampdu_tid" 686 #define IOVAR_STR_APSTA "apsta" 687 #define IOVAR_STR_ALLMULTI "allmulti" 688 #define IOVAR_STR_COUNTRY "country" 689 #define IOVAR_STR_EVENT_MSGS "event_msgs" 690 #define IOVAR_STR_EVENT_MSGS_EXT "event_msgs_ext" 691 #define IOVAR_STR_ESCAN "escan" 692 #define IOVAR_STR_SUP_WPA "sup_wpa" 693 #define IOVAR_STR_CUR_ETHERADDR "cur_etheraddr" 694 #define IOVAR_STR_QTXPOWER "qtxpower" 695 #define IOVAR_STR_MCAST_LIST "mcast_list" 696 #define IOVAR_STR_PM2_SLEEP_RET "pm2_sleep_ret" 697 #define IOVAR_STR_PM_LIMIT "pm_limit" 698 #define IOVAR_STR_LISTEN_INTERVAL_BEACON "bcn_li_bcn" 699 #define IOVAR_STR_LISTEN_INTERVAL_DTIM "bcn_li_dtim" 700 #define IOVAR_STR_LISTEN_INTERVAL_ASSOC "assoc_listen" 701 #define IOVAR_PSPOLL_PERIOD "pspoll_prd" 702 #define IOVAR_STR_VENDOR_IE "vndr_ie" 703 #define IOVAR_STR_TX_GLOM "bus:txglom" 704 #define IOVAR_STR_ACTION_FRAME "actframe" 705 #define IOVAR_STR_AC_PARAMS_STA "wme_ac_sta" 706 #define IOVAR_STR_COUNTERS "counters" 707 #define IOVAR_STR_PKT_FILTER_ADD "pkt_filter_add" 708 #define IOVAR_STR_PKT_FILTER_DELETE "pkt_filter_delete" 709 #define IOVAR_STR_PKT_FILTER_ENABLE "pkt_filter_enable" 710 #define IOVAR_STR_PKT_FILTER_MODE "pkt_filter_mode" 711 #define IOVAR_STR_PKT_FILTER_LIST "pkt_filter_list" 712 #define IOVAR_STR_PKT_FILTER_STATS "pkt_filter_stats" 713 #define IOVAR_STR_PKT_FILTER_CLEAR_STATS "pkt_filter_clear_stats" 714 #define IOVAR_STR_DUTY_CYCLE_CCK "dutycycle_cck" 715 #define IOVAR_STR_DUTY_CYCLE_OFDM "dutycycle_ofdm" 716 #define IOVAR_STR_MKEEP_ALIVE "mkeep_alive" 717 #define IOVAR_STR_VERSION "ver" 718 #define IOVAR_STR_SUP_WPA2_EAPVER "sup_wpa2_eapver" 719 #define IOVAR_STR_ROAM_OFF "roam_off" 720 #define IOVAR_STR_CLOSEDNET "closednet" 721 #define IOVAR_STR_P2P_DISC "p2p_disc" 722 #define IOVAR_STR_P2P_DEV "p2p_dev" 723 #define IOVAR_STR_P2P_IF "p2p_if" 724 #define IOVAR_STR_P2P_IFADD "p2p_ifadd" 725 #define IOVAR_STR_P2P_IFDEL "p2p_ifdel" 726 #define IOVAR_STR_P2P_IFUPD "p2p_ifupd" 727 #define IOVAR_STR_P2P_SCAN "p2p_scan" 728 #define IOVAR_STR_P2P_STATE "p2p_state" 729 #define IOVAR_STR_P2P_SSID "p2p_ssid" 730 #define IOVAR_STR_P2P_IP_ADDR "p2p_ip_addr" 731 #define IOVAR_STR_NRATE "nrate" 732 #define IOVAR_STR_BGRATE "bg_rate" 733 #define IOVAR_STR_ARATE "a_rate" 734 #define IOVAR_STR_NMODE "nmode" 735 #define IOVAR_STR_MAX_ASSOC "maxassoc" 736 #define IOVAR_STR_2G_MULTICAST_RATE "2g_mrate" 737 #define IOVAR_STR_2G_RATE "2g_rate" 738 #define IOVAR_STR_MPC "mpc" 739 #define IOVAR_STR_IBSS_JOIN "IBSS_join_only" 740 #define IOVAR_STR_AMPDU_BA_WINDOW_SIZE "ampdu_ba_wsize" 741 #define IOVAR_STR_AMPDU_MPDU "ampdu_mpdu" 742 #define IOVAR_STR_AMPDU_RX "ampdu_rx" 743 #define IOVAR_STR_AMPDU_RX_FACTOR "ampdu_rx_factor" 744 #define IOVAR_STR_AMPDU_HOST_REORDER "ampdu_hostreorder" 745 #define IOVAR_STR_MIMO_BW_CAP "mimo_bw_cap" 746 #define IOVAR_STR_RMC_ACKREQ "rmc_ackreq" 747 #define IOVAR_STR_RMC_STATUS "rmc_status" 748 #define IOVAR_STR_RMC_COUNTS "rmc_stats" 749 #define IOVAR_STR_RMC_ROLE "rmc_role" 750 #define IOVAR_STR_HT40_INTOLERANCE "intol40" 751 #define IOVAR_STR_RAND "rand" 752 #define IOVAR_STR_SSID "ssid" 753 #define IOVAR_STR_WSEC "wsec" 754 #define IOVAR_STR_WPA_AUTH "wpa_auth" 755 #define IOVAR_STR_INTERFACE_REMOVE "interface_remove" 756 #define IOVAR_STR_SUP_WPA_TMO "sup_wpa_tmo" 757 #define IOVAR_STR_JOIN "join" 758 #define IOVAR_STR_TLV "tlv" 759 #define IOVAR_STR_NPHY_ANTSEL "nphy_antsel" 760 #define IOVAR_STR_AVB_TIMESTAMP_ADDR "avb_timestamp_addr" 761 #define IOVAR_STR_BSS_MAX_ASSOC "bss_maxassoc" 762 #define IOVAR_STR_RM_REQ "rm_req" 763 #define IOVAR_STR_RM_REP "rm_rep" 764 #define IOVAR_STR_PSPRETEND_RETRY_LIMIT "pspretend_retry_limit" 765 #define IOVAR_STR_PSPRETEND_THRESHOLD "pspretend_threshold" 766 #define IOVAR_STR_SWDIV_TIMEOUT "swdiv_timeout" 767 #define IOVAR_STR_RESET_CNTS "reset_cnts" 768 #define IOVAR_STR_PHYRATE_LOG "phyrate_log" 769 #define IOVAR_STR_PHYRATE_LOG_SIZE "phyrate_log_size" 770 #define IOVAR_STR_PHYRATE_LOG_DUMP "phyrate_dump" 771 #define IOVAR_STR_SCAN_ASSOC_TIME "scan_assoc_time" 772 #define IOVAR_STR_SCAN_UNASSOC_TIME "scan_unassoc_time" 773 #define IOVAR_STR_SCAN_PASSIVE_TIME "scan_passive_time" 774 #define IOVAR_STR_SCAN_HOME_TIME "scan_home_time" 775 #define IOVAR_STR_SCAN_NPROBES "scan_nprobes" 776 #define IOVAR_STR_AUTOCOUNTRY "autocountry" 777 #define IOVAR_STR_CAP "cap" 778 #define IOVAR_STR_MPDU_PER_AMPDU "ampdu_mpdu" 779 #define IOVAR_STR_VHT_FEATURES "vht_features" 780 #define IOVAR_STR_CHANSPEC "chanspec" 782 #define IOVAR_STR_WOWL "wowl" 783 #define IOVAR_STR_WOWL_OS "wowl_os" 784 #define IOVAR_STR_WOWL_KEEP_ALIVE "wowl_keepalive" 785 #define IOVAR_STR_WOWL_PATTERN "wowl_pattern" 786 #define IOVAR_STR_WOWL_PATTERN_CLR "clr" 787 #define IOVAR_STR_WOWL_PATTERN_ADD "add" 788 #define IOVAR_STR_WOWL_ARP_HOST_IP "wowl_arp_hostip" 789 #define IOVAR_STR_ULP_WAIT "ulp_wait" 790 #define IOVAR_STR_ULP "ulp" 792 #define IOVAR_STR_PNO_ON "pfn" 793 #define IOVAR_STR_PNO_ADD "pfn_add" 794 #define IOVAR_STR_PNO_SET "pfn_set" 795 #define IOVAR_STR_PNO_CLEAR "pfnclear" 796 #define IOVAR_STR_SCAN_CACHE_CLEAR "scancache_clear" 797 #define MCS_SETLEN 16 799 #define IOVAR_STR_RRM "rrm" 800 #define IOVAR_STR_RRM_NOISE_REQ "rrm_noise_req" 801 #define IOVAR_STR_RRM_NBR_REQ "rrm_nbr_req" 802 #define IOVAR_STR_RRM_LM_REQ "rrm_lm_req" 803 #define IOVAR_STR_RRM_STAT_REQ "rrm_stat_req" 804 #define IOVAR_STR_RRM_FRAME_REQ "rrm_frame_req" 805 #define IOVAR_STR_RRM_CHLOAD_REQ "rrm_chload_req" 806 #define IOVAR_STR_RRM_BCN_REQ "rrm_bcn_req" 807 #define IOVAR_STR_RRM_NBR_LIST "rrm_nbr_list" 808 #define IOVAR_STR_RRM_NBR_ADD "rrm_nbr_add_nbr" 809 #define IOVAR_STR_RRM_NBR_DEL "rrm_nbr_del_nbr" 810 #define IOVAR_STR_RRM_BCNREQ_THRTL_WIN "rrm_bcn_req_thrtl_win" 811 #define IOVAR_STR_RRM_BCNREQ_MAXOFF_TIME "rrm_bcn_req_max_off_chan_time" 812 #define IOVAR_STR_RRM_BCNREQ_TRFMS_PRD "rrm_bcn_req_traff_meas_per" 814 #define IOVAR_STR_WNM "wnm" 815 #define IOVAR_STR_BSSTRANS_QUERY "wnm_bsstrans_query" 816 #define IOVAR_STR_BSSTRANS_RESP "wnm_bsstrans_resp" 818 #define IOVAR_STR_MESH_ADD_ROUTE "mesh_add_route" 819 #define IOVAR_STR_MESH_DEL_ROUTE "mesh_del_route" 820 #define IOVAR_STR_MESH_FIND "mesh_find" 821 #define IOVAR_STR_MESH_FILTER "mesh_filter" 822 #define IOVAR_STR_MESH_PEER "mesh_peer" 823 #define IOVAR_STR_MESH_PEER_STATUS "mesh_peer_status" 824 #define IOVAR_STR_MESH_DELFILTER "mesh_delfilter" 825 #define IOVAR_STR_MESH_MAX_PEERS "mesh_max_peers" 827 #define IOVAR_STR_FBT_OVER_DS "fbtoverds" 828 #define IOVAR_STR_FBT_CAPABILITIES "fbt_cap" 830 #define IOVAR_STR_MFP "mfp" 832 #define IOVAR_STR_OTPRAW "otpraw" 833 #define IOVAR_NAN "nan" 834 #define IOVAR_STR_CLMLOAD "clmload" 835 #define IOVAR_STR_CLMLOAD_STATUS "clmload_status" 836 #define IOVAR_STR_CLMVER "clmver" 837 #define IOVAR_STR_MEMUSE "memuse" 839 #define IOVAR_STR_LDPC_CAP "ldpc_cap" 840 #define IOVAR_STR_LDPC_TX "ldpc_tx" 841 #define IOVAR_STR_SGI_RX "sgi_rx" 842 #define IOVAR_STR_SGI_TX "sgi_tx" 844 #define IOVAR_STR_APIVTW_OVERRIDE "brcmapivtwo" 846 #define IOVAR_STR_BWTE_BWTE_GCI_MASK "bwte_gci_mask" 847 #define IOVAR_STR_BWTE_GCI_SENDMSG "bwte_gci_sendm" 848 #define IOVAR_STR_WD_DISABLE "wd_disable" 849 #define IOVAR_STR_DLTRO "dltro" 850 #define IOVAR_STR_SAE_PASSWORD "sae_password" 852 #define IOVAR_STR_BTC_LESCAN_PARAMS "btc_lescan_params" 854 #define IOVAR_STR_ARP_VERSION "arp_version" 855 #define IOVAR_STR_ARP_PEERAGE "arp_peerage" 856 #define IOVAR_STR_ARPOE "arpoe" 857 #define IOVAR_STR_ARP_OL "arp_ol" 858 #define IOVAR_STR_ARP_TABLE_CLEAR "arp_table_clear" 859 #define IOVAR_STR_ARP_HOSTIP "arp_hostip" 860 #define IOVAR_STR_ARP_HOSTIP_CLEAR "arp_hostip_clear" 861 #define IOVAR_STR_ARP_STATS "arp_stats" 862 #define IOVAR_STR_ARP_STATS_CLEAR "arp_stats_clear" 863 #define IOVAR_STR_TKO "tko" 866 #define IOVAR_NAME_STR_MAX_SIZE 32 868 #define WLC_IOCTL_MAGIC (0x14e46c77) 869 #define WLC_IOCTL_VERSION (1) 870 #define WLC_IOCTL_SMLEN (256) 871 #define WLC_IOCTL_MEDLEN (1536) 872 #define WLC_IOCTL_MAXLEN (8192) 874 #define WLC_GET_MAGIC ( (uint32_t)0 ) 875 #define WLC_GET_VERSION ( (uint32_t)1 ) 876 #define WLC_UP ( (uint32_t)2 ) 877 #define WLC_DOWN ( (uint32_t)3 ) 878 #define WLC_GET_LOOP ( (uint32_t)4 ) 879 #define WLC_SET_LOOP ( (uint32_t)5 ) 880 #define WLC_DUMP ( (uint32_t)6 ) 881 #define WLC_GET_MSGLEVEL ( (uint32_t)7 ) 882 #define WLC_SET_MSGLEVEL ( (uint32_t)8 ) 883 #define WLC_GET_PROMISC ( (uint32_t)9 ) 884 #define WLC_SET_PROMISC ( (uint32_t)10 ) 885 #define WLC_GET_RATE ( (uint32_t)12 ) 886 #define WLC_GET_INSTANCE ( (uint32_t)14 ) 887 #define WLC_GET_INFRA ( (uint32_t)19 ) 888 #define WLC_SET_INFRA ( (uint32_t)20 ) 889 #define WLC_GET_AUTH ( (uint32_t)21 ) 890 #define WLC_SET_AUTH ( (uint32_t)22 ) 891 #define WLC_GET_BSSID ( (uint32_t)23 ) 892 #define WLC_SET_BSSID ( (uint32_t)24 ) 893 #define WLC_GET_SSID ( (uint32_t)25 ) 894 #define WLC_SET_SSID ( (uint32_t)26 ) 895 #define WLC_RESTART ( (uint32_t)27 ) 896 #define WLC_GET_CHANNEL ( (uint32_t)29 ) 897 #define WLC_SET_CHANNEL ( (uint32_t)30 ) 898 #define WLC_GET_SRL ( (uint32_t)31 ) 899 #define WLC_SET_SRL ( (uint32_t)32 ) 900 #define WLC_GET_LRL ( (uint32_t)33 ) 901 #define WLC_SET_LRL ( (uint32_t)34 ) 902 #define WLC_GET_PLCPHDR ( (uint32_t)35 ) 903 #define WLC_SET_PLCPHDR ( (uint32_t)36 ) 904 #define WLC_GET_RADIO ( (uint32_t)37 ) 905 #define WLC_SET_RADIO ( (uint32_t)38 ) 906 #define WLC_GET_PHYTYPE ( (uint32_t)39 ) 907 #define WLC_DUMP_RATE ( (uint32_t)40 ) 908 #define WLC_SET_RATE_PARAMS ( (uint32_t)41 ) 909 #define WLC_GET_KEY ( (uint32_t)44 ) 910 #define WLC_SET_KEY ( (uint32_t)45 ) 911 #define WLC_GET_REGULATORY ( (uint32_t)46 ) 912 #define WLC_SET_REGULATORY ( (uint32_t)47 ) 913 #define WLC_GET_PASSIVE_SCAN ( (uint32_t)48 ) 914 #define WLC_SET_PASSIVE_SCAN ( (uint32_t)49 ) 915 #define WLC_SCAN ( (uint32_t)50 ) 916 #define WLC_SCAN_RESULTS ( (uint32_t)51 ) 917 #define WLC_DISASSOC ( (uint32_t)52 ) 918 #define WLC_REASSOC ( (uint32_t)53 ) 919 #define WLC_GET_ROAM_TRIGGER ( (uint32_t)54 ) 920 #define WLC_SET_ROAM_TRIGGER ( (uint32_t)55 ) 921 #define WLC_GET_ROAM_DELTA ( (uint32_t)56 ) 922 #define WLC_SET_ROAM_DELTA ( (uint32_t)57 ) 923 #define WLC_GET_ROAM_SCAN_PERIOD ( (uint32_t)58 ) 924 #define WLC_SET_ROAM_SCAN_PERIOD ( (uint32_t)59 ) 925 #define WLC_EVM ( (uint32_t)60 ) 926 #define WLC_GET_TXANT ( (uint32_t)61 ) 927 #define WLC_SET_TXANT ( (uint32_t)62 ) 928 #define WLC_GET_ANTDIV ( (uint32_t)63 ) 929 #define WLC_SET_ANTDIV ( (uint32_t)64 ) 930 #define WLC_GET_CLOSED ( (uint32_t)67 ) 931 #define WLC_SET_CLOSED ( (uint32_t)68 ) 932 #define WLC_GET_MACLIST ( (uint32_t)69 ) 933 #define WLC_SET_MACLIST ( (uint32_t)70 ) 934 #define WLC_GET_RATESET ( (uint32_t)71 ) 935 #define WLC_SET_RATESET ( (uint32_t)72 ) 936 #define WLC_LONGTRAIN ( (uint32_t)74 ) 937 #define WLC_GET_BCNPRD ( (uint32_t)75 ) 938 #define WLC_SET_BCNPRD ( (uint32_t)76 ) 939 #define WLC_GET_DTIMPRD ( (uint32_t)77 ) 940 #define WLC_SET_DTIMPRD ( (uint32_t)78 ) 941 #define WLC_GET_SROM ( (uint32_t)79 ) 942 #define WLC_SET_SROM ( (uint32_t)80 ) 943 #define WLC_GET_WEP_RESTRICT ( (uint32_t)81 ) 944 #define WLC_SET_WEP_RESTRICT ( (uint32_t)82 ) 945 #define WLC_GET_COUNTRY ( (uint32_t)83 ) 946 #define WLC_SET_COUNTRY ( (uint32_t)84 ) 947 #define WLC_GET_PM ( (uint32_t)85 ) 948 #define WLC_SET_PM ( (uint32_t)86 ) 949 #define WLC_GET_WAKE ( (uint32_t)87 ) 950 #define WLC_SET_WAKE ( (uint32_t)88 ) 951 #define WLC_GET_FORCELINK ( (uint32_t)90 ) 952 #define WLC_SET_FORCELINK ( (uint32_t)91 ) 953 #define WLC_FREQ_ACCURACY ( (uint32_t)92 ) 954 #define WLC_CARRIER_SUPPRESS ( (uint32_t)93 ) 955 #define WLC_GET_PHYREG ( (uint32_t)94 ) 956 #define WLC_SET_PHYREG ( (uint32_t)95 ) 957 #define WLC_GET_RADIOREG ( (uint32_t)96 ) 958 #define WLC_SET_RADIOREG ( (uint32_t)97 ) 959 #define WLC_GET_REVINFO ( (uint32_t)98 ) 960 #define WLC_GET_UCANTDIV ( (uint32_t)99 ) 961 #define WLC_SET_UCANTDIV ( (uint32_t)100 ) 962 #define WLC_R_REG ( (uint32_t)101 ) 963 #define WLC_W_REG ( (uint32_t)102 ) 964 #define WLC_GET_MACMODE ( (uint32_t)105 ) 965 #define WLC_SET_MACMODE ( (uint32_t)106 ) 966 #define WLC_GET_MONITOR ( (uint32_t)107 ) 967 #define WLC_SET_MONITOR ( (uint32_t)108 ) 968 #define WLC_GET_GMODE ( (uint32_t)109 ) 969 #define WLC_SET_GMODE ( (uint32_t)110 ) 970 #define WLC_GET_LEGACY_ERP ( (uint32_t)111 ) 971 #define WLC_SET_LEGACY_ERP ( (uint32_t)112 ) 972 #define WLC_GET_RX_ANT ( (uint32_t)113 ) 973 #define WLC_GET_CURR_RATESET ( (uint32_t)114 ) 974 #define WLC_GET_SCANSUPPRESS ( (uint32_t)115 ) 975 #define WLC_SET_SCANSUPPRESS ( (uint32_t)116 ) 976 #define WLC_GET_AP ( (uint32_t)117 ) 977 #define WLC_SET_AP ( (uint32_t)118 ) 978 #define WLC_GET_EAP_RESTRICT ( (uint32_t)119 ) 979 #define WLC_SET_EAP_RESTRICT ( (uint32_t)120 ) 980 #define WLC_SCB_AUTHORIZE ( (uint32_t)121 ) 981 #define WLC_SCB_DEAUTHORIZE ( (uint32_t)122 ) 982 #define WLC_GET_WDSLIST ( (uint32_t)123 ) 983 #define WLC_SET_WDSLIST ( (uint32_t)124 ) 984 #define WLC_GET_ATIM ( (uint32_t)125 ) 985 #define WLC_SET_ATIM ( (uint32_t)126 ) 986 #define WLC_GET_RSSI ( (uint32_t)127 ) 987 #define WLC_GET_PHYANTDIV ( (uint32_t)128 ) 988 #define WLC_SET_PHYANTDIV ( (uint32_t)129 ) 989 #define WLC_AP_RX_ONLY ( (uint32_t)130 ) 990 #define WLC_GET_TX_PATH_PWR ( (uint32_t)131 ) 991 #define WLC_SET_TX_PATH_PWR ( (uint32_t)132 ) 992 #define WLC_GET_WSEC ( (uint32_t)133 ) 993 #define WLC_SET_WSEC ( (uint32_t)134 ) 994 #define WLC_GET_PHY_NOISE ( (uint32_t)135 ) 995 #define WLC_GET_BSS_INFO ( (uint32_t)136 ) 996 #define WLC_GET_PKTCNTS ( (uint32_t)137 ) 997 #define WLC_GET_LAZYWDS ( (uint32_t)138 ) 998 #define WLC_SET_LAZYWDS ( (uint32_t)139 ) 999 #define WLC_GET_BANDLIST ( (uint32_t)140 ) 1000 #define WLC_GET_BAND ( (uint32_t)141 ) 1001 #define WLC_SET_BAND ( (uint32_t)142 ) 1002 #define WLC_SCB_DEAUTHENTICATE ( (uint32_t)143 ) 1003 #define WLC_GET_SHORTSLOT ( (uint32_t)144 ) 1004 #define WLC_GET_SHORTSLOT_OVERRIDE ( (uint32_t)145 ) 1005 #define WLC_SET_SHORTSLOT_OVERRIDE ( (uint32_t)146 ) 1006 #define WLC_GET_SHORTSLOT_RESTRICT ( (uint32_t)147 ) 1007 #define WLC_SET_SHORTSLOT_RESTRICT ( (uint32_t)148 ) 1008 #define WLC_GET_GMODE_PROTECTION ( (uint32_t)149 ) 1009 #define WLC_GET_GMODE_PROTECTION_OVERRIDE ( (uint32_t)150 ) 1010 #define WLC_SET_GMODE_PROTECTION_OVERRIDE ( (uint32_t)151 ) 1011 #define WLC_UPGRADE ( (uint32_t)152 ) 1012 #define WLC_GET_IGNORE_BCNS ( (uint32_t)155 ) 1013 #define WLC_SET_IGNORE_BCNS ( (uint32_t)156 ) 1014 #define WLC_GET_SCB_TIMEOUT ( (uint32_t)157 ) 1015 #define WLC_SET_SCB_TIMEOUT ( (uint32_t)158 ) 1016 #define WLC_GET_ASSOCLIST ( (uint32_t)159 ) 1017 #define WLC_GET_CLK ( (uint32_t)160 ) 1018 #define WLC_SET_CLK ( (uint32_t)161 ) 1019 #define WLC_GET_UP ( (uint32_t)162 ) 1020 #define WLC_OUT ( (uint32_t)163 ) 1021 #define WLC_GET_WPA_AUTH ( (uint32_t)164 ) 1022 #define WLC_SET_WPA_AUTH ( (uint32_t)165 ) 1023 #define WLC_GET_UCFLAGS ( (uint32_t)166 ) 1024 #define WLC_SET_UCFLAGS ( (uint32_t)167 ) 1025 #define WLC_GET_PWRIDX ( (uint32_t)168 ) 1026 #define WLC_SET_PWRIDX ( (uint32_t)169 ) 1027 #define WLC_GET_TSSI ( (uint32_t)170 ) 1028 #define WLC_GET_SUP_RATESET_OVERRIDE ( (uint32_t)171 ) 1029 #define WLC_SET_SUP_RATESET_OVERRIDE ( (uint32_t)172 ) 1030 #define WLC_GET_PROTECTION_CONTROL ( (uint32_t)178 ) 1031 #define WLC_SET_PROTECTION_CONTROL ( (uint32_t)179 ) 1032 #define WLC_GET_PHYLIST ( (uint32_t)180 ) 1033 #define WLC_ENCRYPT_STRENGTH ( (uint32_t)181 ) 1034 #define WLC_DECRYPT_STATUS ( (uint32_t)182 ) 1035 #define WLC_GET_KEY_SEQ ( (uint32_t)183 ) 1036 #define WLC_GET_SCAN_CHANNEL_TIME ( (uint32_t)184 ) 1037 #define WLC_SET_SCAN_CHANNEL_TIME ( (uint32_t)185 ) 1038 #define WLC_GET_SCAN_UNASSOC_TIME ( (uint32_t)186 ) 1039 #define WLC_SET_SCAN_UNASSOC_TIME ( (uint32_t)187 ) 1040 #define WLC_GET_SCAN_HOME_TIME ( (uint32_t)188 ) 1041 #define WLC_SET_SCAN_HOME_TIME ( (uint32_t)189 ) 1042 #define WLC_GET_SCAN_NPROBES ( (uint32_t)190 ) 1043 #define WLC_SET_SCAN_NPROBES ( (uint32_t)191 ) 1044 #define WLC_GET_PRB_RESP_TIMEOUT ( (uint32_t)192 ) 1045 #define WLC_SET_PRB_RESP_TIMEOUT ( (uint32_t)193 ) 1046 #define WLC_GET_ATTEN ( (uint32_t)194 ) 1047 #define WLC_SET_ATTEN ( (uint32_t)195 ) 1048 #define WLC_GET_SHMEM ( (uint32_t)196 ) 1049 #define WLC_SET_SHMEM ( (uint32_t)197 ) 1050 #define WLC_SET_WSEC_TEST ( (uint32_t)200 ) 1051 #define WLC_SCB_DEAUTHENTICATE_FOR_REASON ( (uint32_t)201 ) 1052 #define WLC_TKIP_COUNTERMEASURES ( (uint32_t)202 ) 1053 #define WLC_GET_PIOMODE ( (uint32_t)203 ) 1054 #define WLC_SET_PIOMODE ( (uint32_t)204 ) 1055 #define WLC_SET_ASSOC_PREFER ( (uint32_t)205 ) 1056 #define WLC_GET_ASSOC_PREFER ( (uint32_t)206 ) 1057 #define WLC_SET_ROAM_PREFER ( (uint32_t)207 ) 1058 #define WLC_GET_ROAM_PREFER ( (uint32_t)208 ) 1059 #define WLC_SET_LED ( (uint32_t)209 ) 1060 #define WLC_GET_LED ( (uint32_t)210 ) 1061 #define WLC_GET_INTERFERENCE_MODE ( (uint32_t)211 ) 1062 #define WLC_SET_INTERFERENCE_MODE ( (uint32_t)212 ) 1063 #define WLC_GET_CHANNEL_QA ( (uint32_t)213 ) 1064 #define WLC_START_CHANNEL_QA ( (uint32_t)214 ) 1065 #define WLC_GET_CHANNEL_SEL ( (uint32_t)215 ) 1066 #define WLC_START_CHANNEL_SEL ( (uint32_t)216 ) 1067 #define WLC_GET_VALID_CHANNELS ( (uint32_t)217 ) 1068 #define WLC_GET_FAKEFRAG ( (uint32_t)218 ) 1069 #define WLC_SET_FAKEFRAG ( (uint32_t)219 ) 1070 #define WLC_GET_PWROUT_PERCENTAGE ( (uint32_t)220 ) 1071 #define WLC_SET_PWROUT_PERCENTAGE ( (uint32_t)221 ) 1072 #define WLC_SET_BAD_FRAME_PREEMPT ( (uint32_t)222 ) 1073 #define WLC_GET_BAD_FRAME_PREEMPT ( (uint32_t)223 ) 1074 #define WLC_SET_LEAP_LIST ( (uint32_t)224 ) 1075 #define WLC_GET_LEAP_LIST ( (uint32_t)225 ) 1076 #define WLC_GET_CWMIN ( (uint32_t)226 ) 1077 #define WLC_SET_CWMIN ( (uint32_t)227 ) 1078 #define WLC_GET_CWMAX ( (uint32_t)228 ) 1079 #define WLC_SET_CWMAX ( (uint32_t)229 ) 1080 #define WLC_GET_WET ( (uint32_t)230 ) 1081 #define WLC_SET_WET ( (uint32_t)231 ) 1082 #define WLC_GET_PUB ( (uint32_t)232 ) 1083 #define WLC_GET_KEY_PRIMARY ( (uint32_t)235 ) 1084 #define WLC_SET_KEY_PRIMARY ( (uint32_t)236 ) 1085 #define WLC_GET_ACI_ARGS ( (uint32_t)238 ) 1086 #define WLC_SET_ACI_ARGS ( (uint32_t)239 ) 1087 #define WLC_UNSET_CALLBACK ( (uint32_t)240 ) 1088 #define WLC_SET_CALLBACK ( (uint32_t)241 ) 1089 #define WLC_GET_RADAR ( (uint32_t)242 ) 1090 #define WLC_SET_RADAR ( (uint32_t)243 ) 1091 #define WLC_SET_SPECT_MANAGMENT ( (uint32_t)244 ) 1092 #define WLC_GET_SPECT_MANAGMENT ( (uint32_t)245 ) 1093 #define WLC_WDS_GET_REMOTE_HWADDR ( (uint32_t)246 ) 1094 #define WLC_WDS_GET_WPA_SUP ( (uint32_t)247 ) 1095 #define WLC_SET_CS_SCAN_TIMER ( (uint32_t)248 ) 1096 #define WLC_GET_CS_SCAN_TIMER ( (uint32_t)249 ) 1097 #define WLC_MEASURE_REQUEST ( (uint32_t)250 ) 1098 #define WLC_INIT ( (uint32_t)251 ) 1099 #define WLC_SEND_QUIET ( (uint32_t)252 ) 1100 #define WLC_KEEPALIVE ( (uint32_t)253 ) 1101 #define WLC_SEND_PWR_CONSTRAINT ( (uint32_t)254 ) 1102 #define WLC_UPGRADE_STATUS ( (uint32_t)255 ) 1103 #define WLC_CURRENT_PWR ( (uint32_t)256 ) 1104 #define WLC_GET_SCAN_PASSIVE_TIME ( (uint32_t)257 ) 1105 #define WLC_SET_SCAN_PASSIVE_TIME ( (uint32_t)258 ) 1106 #define WLC_LEGACY_LINK_BEHAVIOR ( (uint32_t)259 ) 1107 #define WLC_GET_CHANNELS_IN_COUNTRY ( (uint32_t)260 ) 1108 #define WLC_GET_COUNTRY_LIST ( (uint32_t)261 ) 1109 #define WLC_GET_VAR ( (uint32_t)262 ) 1110 #define WLC_SET_VAR ( (uint32_t)263 ) 1111 #define WLC_NVRAM_GET ( (uint32_t)264 ) 1112 #define WLC_NVRAM_SET ( (uint32_t)265 ) 1113 #define WLC_NVRAM_DUMP ( (uint32_t)266 ) 1114 #define WLC_REBOOT ( (uint32_t)267 ) 1115 #define WLC_SET_WSEC_PMK ( (uint32_t)268 ) 1116 #define WLC_GET_AUTH_MODE ( (uint32_t)269 ) 1117 #define WLC_SET_AUTH_MODE ( (uint32_t)270 ) 1118 #define WLC_GET_WAKEENTRY ( (uint32_t)271 ) 1119 #define WLC_SET_WAKEENTRY ( (uint32_t)272 ) 1120 #define WLC_NDCONFIG_ITEM ( (uint32_t)273 ) 1121 #define WLC_NVOTPW ( (uint32_t)274 ) 1122 #define WLC_OTPW ( (uint32_t)275 ) 1123 #define WLC_IOV_BLOCK_GET ( (uint32_t)276 ) 1124 #define WLC_IOV_MODULES_GET ( (uint32_t)277 ) 1125 #define WLC_SOFT_RESET ( (uint32_t)278 ) 1126 #define WLC_GET_ALLOW_MODE ( (uint32_t)279 ) 1127 #define WLC_SET_ALLOW_MODE ( (uint32_t)280 ) 1128 #define WLC_GET_DESIRED_BSSID ( (uint32_t)281 ) 1129 #define WLC_SET_DESIRED_BSSID ( (uint32_t)282 ) 1130 #define WLC_DISASSOC_MYAP ( (uint32_t)283 ) 1131 #define WLC_GET_NBANDS ( (uint32_t)284 ) 1132 #define WLC_GET_BANDSTATES ( (uint32_t)285 ) 1133 #define WLC_GET_WLC_BSS_INFO ( (uint32_t)286 ) 1134 #define WLC_GET_ASSOC_INFO ( (uint32_t)287 ) 1135 #define WLC_GET_OID_PHY ( (uint32_t)288 ) 1136 #define WLC_SET_OID_PHY ( (uint32_t)289 ) 1137 #define WLC_SET_ASSOC_TIME ( (uint32_t)290 ) 1138 #define WLC_GET_DESIRED_SSID ( (uint32_t)291 ) 1139 #define WLC_GET_CHANSPEC ( (uint32_t)292 ) 1140 #define WLC_GET_ASSOC_STATE ( (uint32_t)293 ) 1141 #define WLC_SET_PHY_STATE ( (uint32_t)294 ) 1142 #define WLC_GET_SCAN_PENDING ( (uint32_t)295 ) 1143 #define WLC_GET_SCANREQ_PENDING ( (uint32_t)296 ) 1144 #define WLC_GET_PREV_ROAM_REASON ( (uint32_t)297 ) 1145 #define WLC_SET_PREV_ROAM_REASON ( (uint32_t)298 ) 1146 #define WLC_GET_BANDSTATES_PI ( (uint32_t)299 ) 1147 #define WLC_GET_PHY_STATE ( (uint32_t)300 ) 1148 #define WLC_GET_BSS_WPA_RSN ( (uint32_t)301 ) 1149 #define WLC_GET_BSS_WPA2_RSN ( (uint32_t)302 ) 1150 #define WLC_GET_BSS_BCN_TS ( (uint32_t)303 ) 1151 #define WLC_GET_INT_DISASSOC ( (uint32_t)304 ) 1152 #define WLC_SET_NUM_PEERS ( (uint32_t)305 ) 1153 #define WLC_GET_NUM_BSS ( (uint32_t)306 ) 1154 #define WLC_GET_WSEC_PMK ( (uint32_t)318 ) 1155 #define WLC_GET_RANDOM_BYTES ( (uint32_t)319 ) 1156 #define WLC_LAST ( (uint32_t)320 ) 1158 #define EPICTRL_COOKIE 0xABADCEDE 1159 #define CMN_IOCTL_OFF 0x180 1160 #define WL_OID_BASE 0xFFE41420 1161 #define OID_WL_GETINSTANCE (WL_OID_BASE + WLC_GET_INSTANCE) 1162 #define OID_WL_GET_FORCELINK (WL_OID_BASE + WLC_GET_FORCELINK) 1163 #define OID_WL_SET_FORCELINK (WL_OID_BASE + WLC_SET_FORCELINK) 1164 #define OID_WL_ENCRYPT_STRENGTH (WL_OID_BASE + WLC_ENCRYPT_STRENGTH) 1165 #define OID_WL_DECRYPT_STATUS (WL_OID_BASE + WLC_DECRYPT_STATUS) 1166 #define OID_LEGACY_LINK_BEHAVIOR (WL_OID_BASE + WLC_LEGACY_LINK_BEHAVIOR) 1167 #define OID_WL_NDCONFIG_ITEM (WL_OID_BASE + WLC_NDCONFIG_ITEM) 1168 #define OID_STA_CHANSPEC (WL_OID_BASE + WLC_GET_CHANSPEC) 1169 #define OID_STA_NBANDS (WL_OID_BASE + WLC_GET_NBANDS) 1170 #define OID_STA_GET_PHY (WL_OID_BASE + WLC_GET_OID_PHY) 1171 #define OID_STA_SET_PHY (WL_OID_BASE + WLC_SET_OID_PHY) 1172 #define OID_STA_ASSOC_TIME (WL_OID_BASE + WLC_SET_ASSOC_TIME) 1173 #define OID_STA_DESIRED_SSID (WL_OID_BASE + WLC_GET_DESIRED_SSID) 1174 #define OID_STA_SET_PHY_STATE (WL_OID_BASE + WLC_SET_PHY_STATE) 1175 #define OID_STA_SCAN_PENDING (WL_OID_BASE + WLC_GET_SCAN_PENDING) 1176 #define OID_STA_SCANREQ_PENDING (WL_OID_BASE + WLC_GET_SCANREQ_PENDING) 1177 #define OID_STA_GET_ROAM_REASON (WL_OID_BASE + WLC_GET_PREV_ROAM_REASON) 1178 #define OID_STA_SET_ROAM_REASON (WL_OID_BASE + WLC_SET_PREV_ROAM_REASON) 1179 #define OID_STA_GET_PHY_STATE (WL_OID_BASE + WLC_GET_PHY_STATE) 1180 #define OID_STA_INT_DISASSOC (WL_OID_BASE + WLC_GET_INT_DISASSOC) 1181 #define OID_STA_SET_NUM_PEERS (WL_OID_BASE + WLC_SET_NUM_PEERS) 1182 #define OID_STA_GET_NUM_BSS (WL_OID_BASE + WLC_GET_NUM_BSS) 1183 #define WL_DECRYPT_STATUS_SUCCESS 1 1184 #define WL_DECRYPT_STATUS_FAILURE 2 1185 #define WL_DECRYPT_STATUS_UNKNOWN 3 1186 #define WLC_UPGRADE_SUCCESS 0 1187 #define WLC_UPGRADE_PENDING 1 1195 unsigned long associated;
1196 unsigned long NDIS_auth;
1197 unsigned long NDIS_infra;
1199 #define WL_RADIO_SW_DISABLE (1 << 0) 1200 #define WL_RADIO_HW_DISABLE (1 << 1) 1201 #define WL_RADIO_MPC_DISABLE (1 << 2) 1202 #define WL_RADIO_COUNTRY_DISABLE (1 << 3) 1203 #define WL_TXPWR_OVERRIDE (1U << 31) 1204 #define WL_PHY_PAVARS_LEN (6) 1205 #define WL_DIAG_INTERRUPT (1) 1206 #define WL_DIAG_LOOPBACK (2) 1207 #define WL_DIAG_MEMORY (3) 1208 #define WL_DIAG_LED (4) 1209 #define WL_DIAG_REG (5) 1210 #define WL_DIAG_SROM (6) 1211 #define WL_DIAG_DMA (7) 1212 #define WL_DIAGERR_SUCCESS (0) 1213 #define WL_DIAGERR_FAIL_TO_RUN (1) 1214 #define WL_DIAGERR_NOT_SUPPORTED (2) 1215 #define WL_DIAGERR_INTERRUPT_FAIL (3) 1216 #define WL_DIAGERR_LOOPBACK_FAIL (4) 1217 #define WL_DIAGERR_SROM_FAIL (5) 1218 #define WL_DIAGERR_SROM_BADCRC (6) 1219 #define WL_DIAGERR_REG_FAIL (7) 1220 #define WL_DIAGERR_MEMORY_FAIL (8) 1221 #define WL_DIAGERR_NOMEM (9) 1222 #define WL_DIAGERR_DMA_FAIL (10) 1223 #define WL_DIAGERR_MEMORY_TIMEOUT (11) 1224 #define WL_DIAGERR_MEMORY_BADPATTERN (12) 1225 #define WLC_BAND_AUTO (0) 1226 #define WLC_BAND_5G (1) 1227 #define WLC_BAND_2G (2) 1228 #define WLC_BAND_ALL (3) 1229 #define WL_CHAN_FREQ_RANGE_2G (0) 1230 #define WL_CHAN_FREQ_RANGE_5GL (1) 1231 #define WL_CHAN_FREQ_RANGE_5GM (2) 1232 #define WL_CHAN_FREQ_RANGE_5GH (3) 1233 #define WLC_PHY_TYPE_A (0) 1234 #define WLC_PHY_TYPE_B (1) 1235 #define WLC_PHY_TYPE_G (2) 1236 #define WLC_PHY_TYPE_N (4) 1237 #define WLC_PHY_TYPE_LP (5) 1238 #define WLC_PHY_TYPE_SSN (6) 1239 #define WLC_PHY_TYPE_NULL (0xf) 1240 #define WLC_MACMODE_DISABLED (0) 1241 #define WLC_MACMODE_DENY (1) 1242 #define WLC_MACMODE_ALLOW (2) 1243 #define GMODE_LEGACY_B (0) 1244 #define GMODE_AUTO (1) 1245 #define GMODE_ONLY (2) 1246 #define GMODE_B_DEFERRED (3) 1247 #define GMODE_PERFORMANCE (4) 1248 #define GMODE_LRS (5) 1249 #define GMODE_MAX (6) 1250 #define WLC_PLCP_AUTO (-1) 1251 #define WLC_PLCP_SHORT (0) 1252 #define WLC_PLCP_LONG (1) 1253 #define WLC_PROTECTION_AUTO (-1) 1254 #define WLC_PROTECTION_OFF (0) 1255 #define WLC_PROTECTION_ON (1) 1256 #define WLC_PROTECTION_MMHDR_ONLY (2) 1257 #define WLC_PROTECTION_CTS_ONLY (3) 1258 #define WLC_PROTECTION_CTL_OFF (0) 1259 #define WLC_PROTECTION_CTL_LOCAL (1) 1260 #define WLC_PROTECTION_CTL_OVERLAP (2) 1261 #define WLC_N_PROTECTION_OFF (0) 1262 #define WLC_N_PROTECTION_OPTIONAL (1) 1263 #define WLC_N_PROTECTION_20IN40 (2) 1264 #define WLC_N_PROTECTION_MIXEDMODE (3) 1265 #define WLC_N_PREAMBLE_MIXEDMODE (0) 1266 #define WLC_N_PREAMBLE_GF (1) 1267 #define WLC_N_BW_20ALL (0) 1268 #define WLC_N_BW_40ALL (1) 1269 #define WLC_N_BW_20IN2G_40IN5G (2) 1270 #define WLC_N_TXRX_CHAIN0 (0) 1271 #define WLC_N_TXRX_CHAIN1 (1) 1272 #define WLC_N_SGI_20 (0x01) 1273 #define WLC_N_SGI_40 (0x02) 1277 #define PM_FORCE_OFF (3) 1278 #define INTERFERE_NONE (0) 1279 #define NON_WLAN (1) 1280 #define WLAN_MANUAL (2) 1281 #define WLAN_AUTO (3) 1282 #define AUTO_ACTIVE (1 << 7) 1285 int32_t enter_aci_thresh;
1286 int32_t exit_aci_thresh;
1288 int32_t glitch_delay;
1289 uint16_t nphy_adcpwr_enter_thresh;
1290 uint16_t nphy_adcpwr_exit_thresh;
1291 uint16_t nphy_repeat_ctr;
1292 uint16_t nphy_num_samples;
1293 uint16_t nphy_undetect_window_sz;
1294 uint16_t nphy_b_energy_lo_aci;
1295 uint16_t nphy_b_energy_md_aci;
1296 uint16_t nphy_b_energy_hi_aci;
1298 #define WL_ACI_ARGS_LEGACY_LENGTH 16 1308 uint16_t fmdemodcfg;
1313 int32_t max_deltat_lp;
1317 uint16_t st_level_time;
1321 #define WL_RADAR_ARGS_VERSION 1 1322 #define WL_RADAR_DETECTOR_OFF 0 1323 #define WL_RADAR_DETECTOR_ON 1 1324 #define WL_RADAR_SIMULATED 2 1325 #define WL_RSSI_ANT_VERSION 1 1326 #define WL_RSSI_ANT_MAX 4 1331 int8_t rssi_ant[WL_RSSI_ANT_MAX];
1333 #define WL_DFS_CACSTATE_IDLE 0 1334 #define WL_DFS_CACSTATE_PREISM_CAC 1 1335 #define WL_DFS_CACSTATE_ISM 2 1336 #define WL_DFS_CACSTATE_CSA 3 1337 #define WL_DFS_CACSTATE_POSTISM_CAC 4 1338 #define WL_DFS_CACSTATE_PREISM_OOC 5 1339 #define WL_DFS_CACSTATE_POSTISM_OOC 6 1340 #define WL_DFS_CACSTATES 7 1348 #define NUM_PWRCTRL_RATES 12 1351 uint8_t txpwr_band_max[NUM_PWRCTRL_RATES];
1352 uint8_t txpwr_limit[NUM_PWRCTRL_RATES];
1353 uint8_t txpwr_local_max;
1354 uint8_t txpwr_local_constraint;
1355 uint8_t txpwr_chan_reg_max;
1356 uint8_t txpwr_target[2][NUM_PWRCTRL_RATES];
1357 uint8_t txpwr_est_Pout[2];
1358 uint8_t txpwr_opo[NUM_PWRCTRL_RATES];
1359 uint8_t txpwr_bphy_cck_max[NUM_PWRCTRL_RATES];
1360 uint8_t txpwr_bphy_ofdm_max;
1361 uint8_t txpwr_aphy_max[NUM_PWRCTRL_RATES];
1362 int8_t txpwr_antgain[2];
1363 uint8_t txpwr_est_Pout_gofdm;
1365 #define WL_TX_POWER_RATES 45 1366 #define WL_TX_POWER_CCK_FIRST 0 1367 #define WL_TX_POWER_CCK_NUM 4 1368 #define WL_TX_POWER_OFDM_FIRST 4 1369 #define WL_TX_POWER_OFDM_NUM 8 1370 #define WL_TX_POWER_MCS_SISO_NUM 8 1371 #define WL_TX_POWER_MCS20_FIRST 12 1372 #define WL_TX_POWER_MCS20_NUM 16 1373 #define WL_TX_POWER_MCS40_FIRST 28 1374 #define WL_TX_POWER_MCS40_NUM 17 1375 #define WL_TX_POWER_MCS20SISO_NUM 8 1376 #define WL_TX_POWER_MCS40_LAST 44 1377 #define WL_TX_POWER_F_ENABLED 1 1378 #define WL_TX_POWER_F_HW 2 1379 #define WL_TX_POWER_F_MIMO 4 1380 #define WL_TX_POWER_F_SISO 8 1381 #define WL_TX_POWER_F_40M_CAP 16 1383 #define MAX_QTX_POWER 32 1390 uint8_t local_constraint;
1393 uint8_t est_Pout[4];
1394 uint8_t est_Pout_cck;
1395 uint8_t user_limit[WL_TX_POWER_RATES];
1396 uint8_t reg_limit[WL_TX_POWER_RATES];
1397 uint8_t board_limit[WL_TX_POWER_RATES];
1398 uint8_t target[WL_TX_POWER_RATES];
1402 uint8_t txpwr_est_Pout[2];
1403 uint8_t txpwr_est_Pout_gofdm;
1405 #define WLC_MEASURE_TPC 1 1406 #define WLC_MEASURE_CHANNEL_BASIC 2 1407 #define WLC_MEASURE_CHANNEL_CCA 3 1408 #define WLC_MEASURE_CHANNEL_RPI 4 1409 #define SPECT_MNGMT_OFF 0 1410 #define SPECT_MNGMT_LOOSE_11H 1 1411 #define SPECT_MNGMT_STRICT_11H 2 1412 #define SPECT_MNGMT_STRICT_11D 3 1413 #define SPECT_MNGMT_LOOSE_11H_D 4 1414 #define WL_CHAN_VALID_HW (1 << 0) 1415 #define WL_CHAN_VALID_SW (1 << 1) 1416 #define WL_CHAN_BAND_5G (1 << 2) 1417 #define WL_CHAN_RADAR (1 << 3) 1418 #define WL_CHAN_INACTIVE (1 << 4) 1419 #define WL_CHAN_PASSIVE (1 << 5) 1420 #define WL_CHAN_RESTRICTED (1 << 6) 1421 #define WL_BTC_DISABLE 0 1422 #define WL_BTC_ENABLE (1 << 0) 1423 #define WL_BTC_PREMPT (1 << 1) 1424 #define WL_BTC_PARTIAL (1 << 2) 1425 #define WL_BTC_DEFAULT (1 << 3) 1426 #define WL_BTC_HYBRID (WL_BTC_ENABLE | WL_BTC_PARTIAL) 1427 #define WL_INF_BTC_DISABLE 0 1428 #define WL_INF_BTC_ENABLE 1 1429 #define WL_INF_BTC_AUTO 3 1430 #define WL_BTC_DEFWIRE 0 1431 #define WL_BTC_2WIRE 2 1432 #define WL_BTC_3WIRE 3 1433 #define WL_BTC_4WIRE 4 1434 #define WL_BTC_FLAG_PREMPT (1 << 0) 1435 #define WL_BTC_FLAG_BT_DEF (1 << 1) 1436 #define WL_BTC_FLAG_ACTIVE_PROT (1 << 2) 1437 #define WL_BTC_FLAG_SIM_RSP (1 << 3) 1438 #define WL_BTC_FLAG_PS_PROTECT (1 << 4) 1439 #define WL_BTC_FLAG_SIM_TX_LP (1 << 5) 1440 #define WL_BTC_FLAG_ECI (1 << 6) 1441 #define WL_ERROR_VAL 0x00000001 1442 #define WL_TRACE_VAL 0x00000002 1443 #define WL_PRHDRS_VAL 0x00000004 1444 #define WL_PRPKT_VAL 0x00000008 1445 #define WL_INFORM_VAL 0x00000010 1446 #define WL_TMP_VAL 0x00000020 1447 #define WL_OID_VAL 0x00000040 1448 #define WL_RATE_VAL 0x00000080 1449 #define WL_ASSOC_VAL 0x00000100 1450 #define WL_PRUSR_VAL 0x00000200 1451 #define WL_PS_VAL 0x00000400 1452 #define WL_TXPWR_VAL 0x00000800 1453 #define WL_PORT_VAL 0x00001000 1454 #define WL_DUAL_VAL 0x00002000 1455 #define WL_WSEC_VAL 0x00004000 1456 #define WL_WSEC_DUMP_VAL 0x00008000 1457 #define WL_LOG_VAL 0x00010000 1458 #define WL_NRSSI_VAL 0x00020000 1459 #define WL_LOFT_VAL 0x00040000 1460 #define WL_REGULATORY_VAL 0x00080000 1461 #define WL_PHYCAL_VAL 0x00100000 1462 #define WL_RADAR_VAL 0x00200000 1463 #define WL_MPC_VAL 0x00400000 1464 #define WL_APSTA_VAL 0x00800000 1465 #define WL_DFS_VAL 0x01000000 1466 #define WL_BA_VAL 0x02000000 1467 #define WL_NITRO_VAL 0x04000000 1468 #define WL_MBSS_VAL 0x04000000 1469 #define WL_CAC_VAL 0x08000000 1470 #define WL_AMSDU_VAL 0x10000000 1471 #define WL_AMPDU_VAL 0x20000000 1472 #define WL_FFPLD_VAL 0x40000000 1473 #define WL_NIN_VAL 0x80000000 1474 #define WL_DPT_VAL 0x00000001 1475 #define WL_SCAN_VAL 0x00000002 1476 #define WL_WOWL_VAL 0x00000004 1477 #define WL_COEX_VAL 0x00000008 1478 #define WL_RTDC_VAL 0x00000010 1479 #define WL_BTA_VAL 0x00000040 1480 #define WL_LED_NUMGPIO 16 1481 #define WL_LED_OFF 0 1483 #define WL_LED_ACTIVITY 2 1484 #define WL_LED_RADIO 3 1485 #define WL_LED_ARADIO 4 1486 #define WL_LED_BRADIO 5 1487 #define WL_LED_BGMODE 6 1488 #define WL_LED_WI1 7 1489 #define WL_LED_WI2 8 1490 #define WL_LED_WI3 9 1491 #define WL_LED_ASSOC 10 1492 #define WL_LED_INACTIVE 11 1493 #define WL_LED_ASSOCACT 12 1494 #define WL_LED_NUMBEHAVIOR 13 1495 #define WL_LED_BEH_MASK 0x7f 1496 #define WL_LED_AL_MASK 0x80 1497 #define WL_NUMCHANNELS 64 1498 #define WL_NUMCHANSPECS 100 1499 #define WL_WDS_WPA_ROLE_AUTH 0 1500 #define WL_WDS_WPA_ROLE_SUP 1 1501 #define WL_WDS_WPA_ROLE_AUTO 255 1502 #define WL_EVENTING_MASK_LEN ( (WLC_E_LAST + 7) / 8 ) 1504 #define VNDR_IE_CMD_LEN 4 1505 #define VNDR_IE_BEACON_FLAG 0x1 1506 #define VNDR_IE_PRBRSP_FLAG 0x2 1507 #define VNDR_IE_ASSOCRSP_FLAG 0x4 1508 #define VNDR_IE_AUTHRSP_FLAG 0x8 1509 #define VNDR_IE_PRBREQ_FLAG 0x10 1510 #define VNDR_IE_ASSOCREQ_FLAG 0x20 1511 #define VNDR_IE_CUSTOM_FLAG 0x100 1512 #define VNDR_IE_INFO_HDR_LEN (sizeof(uint32_t) ) 1524 wl_vndr_ie_t vndr_ie_data;
1533 int8_t cmd[VNDR_IE_CMD_LEN];
1536 #define WL_JOIN_PREF_RSSI 1 1537 #define WL_JOIN_PREF_WPA 2 1538 #define WL_JOIN_PREF_BAND 3 1539 #define WLJP_BAND_ASSOC_PREF 255 1540 #define WL_WPA_ACP_MCS_ANY "\x00\x00\x00\x00" 1546 #define WL_CNT_T_VERSION 6 1547 #define WL_CNT_EXT_T_VERSION 1 1548 #define WL_PHYRATE_LOG_SIZE 1200 1587 uint32_t rxbadproto;
1588 uint32_t rxbadsrcmac;
1594 uint32_t rxuflo[NFIFO];
1596 uint32_t d11cnt_txrts_off;
1597 uint32_t d11cnt_rxcrc_off;
1598 uint32_t d11cnt_txnocts_off;
1607 uint32_t pkt_callback_reg_fail;
1618 uint32_t txfunfl[8];
1622 uint32_t txphyerror;
1625 uint32_t rxfrmtoolong;
1626 uint32_t rxfrmtooshrt;
1627 uint32_t rxinvmachdr;
1632 uint32_t rxcrsglitch;
1636 uint32_t rxdfrmucastmbss;
1637 uint32_t rxmfrmucastmbss;
1638 uint32_t rxcfrmucast;
1639 uint32_t rxrtsucast;
1640 uint32_t rxctsucast;
1641 uint32_t rxackucast;
1642 uint32_t rxdfrmocast;
1643 uint32_t rxmfrmocast;
1644 uint32_t rxcfrmocast;
1645 uint32_t rxrtsocast;
1646 uint32_t rxctsocast;
1647 uint32_t rxdfrmmcast;
1648 uint32_t rxmfrmmcast;
1649 uint32_t rxcfrmmcast;
1652 uint32_t rxbeaconmbss;
1653 uint32_t rxdfrmucastobss;
1656 uint32_t rxbeaconobss;
1657 uint32_t rxrsptmout;
1660 uint32_t bcntxcancl;
1666 uint32_t rxcgprqfrm;
1669 uint32_t rxcgprsqovfl;
1670 uint32_t txcgprsfail;
1673 uint32_t txcgprssuc;
1674 uint32_t prs_timeout;
1683 uint32_t txglitch_nack;
1703 uint32_t tkipmicfaill;
1704 uint32_t tkipcntrmsr;
1705 uint32_t tkipreplay;
1706 uint32_t ccmpfmterr;
1707 uint32_t ccmpreplay;
1709 uint32_t fourwayfail;
1712 uint32_t decsuccess;
1713 uint32_t tkipicverr;
1714 uint32_t wepexcluded;
1716 uint32_t rxundec_mcst;
1719 uint32_t tkipmicfaill_mcst;
1720 uint32_t tkipcntrmsr_mcst;
1721 uint32_t tkipreplay_mcst;
1722 uint32_t ccmpfmterr_mcst;
1723 uint32_t ccmpreplay_mcst;
1724 uint32_t ccmpundec_mcst;
1725 uint32_t fourwayfail_mcst;
1726 uint32_t wepundec_mcst;
1727 uint32_t wepicverr_mcst;
1728 uint32_t decsuccess_mcst;
1729 uint32_t tkipicverr_mcst;
1730 uint32_t wepexcluded_mcst;
1735 uint32_t phywatchdog;
1738 uint32_t prq_entries_handled;
1739 uint32_t prq_undirected_entries;
1740 uint32_t prq_bad_entries;
1741 uint32_t atim_suppress_count;
1742 uint32_t bcn_template_not_ready;
1743 uint32_t bcn_template_not_ready_done;
1744 uint32_t late_tbtt_dpc;
1770 uint32_t pktengrxducast;
1771 uint32_t pktengrxdmcast;
1774 uint32_t bphy_rxcrsglitch;
1776 uint32_t txmpdu_sgi;
1777 uint32_t rxmpdu_sgi;
1778 uint32_t txmpdu_stbc;
1779 uint32_t rxmpdu_stbc;
1819 uint32_t rxbadproto;
1820 uint32_t rxbadsrcmac;
1826 uint32_t rxuflo[NFIFO];
1828 uint32_t d11cnt_txrts_off;
1829 uint32_t d11cnt_rxcrc_off;
1830 uint32_t d11cnt_txnocts_off;
1839 uint32_t pkt_callback_reg_fail;
1850 uint32_t txfunfl[8];
1854 uint32_t txphyerror;
1857 uint32_t rxfrmtoolong;
1858 uint32_t rxfrmtooshrt;
1859 uint32_t rxinvmachdr;
1864 uint32_t rxcrsglitch;
1868 uint32_t rxdfrmucastmbss;
1869 uint32_t rxmfrmucastmbss;
1870 uint32_t rxcfrmucast;
1871 uint32_t rxrtsucast;
1872 uint32_t rxctsucast;
1873 uint32_t rxackucast;
1874 uint32_t rxdfrmocast;
1875 uint32_t rxmfrmocast;
1876 uint32_t rxcfrmocast;
1877 uint32_t rxrtsocast;
1878 uint32_t rxctsocast;
1879 uint32_t rxdfrmmcast;
1880 uint32_t rxmfrmmcast;
1881 uint32_t rxcfrmmcast;
1884 uint32_t rxbeaconmbss;
1885 uint32_t rxdfrmucastobss;
1888 uint32_t rxbeaconobss;
1889 uint32_t rxrsptmout;
1892 uint32_t bcntxcancl;
1898 uint32_t rxcgprqfrm;
1901 uint32_t rxcgprsqovfl;
1902 uint32_t txcgprsfail;
1905 uint32_t txcgprssuc;
1906 uint32_t prs_timeout;
1913 uint32_t txglitch_nack;
1933 uint32_t tkipmicfaill;
1934 uint32_t tkipcntrmsr;
1935 uint32_t tkipreplay;
1936 uint32_t ccmpfmterr;
1937 uint32_t ccmpreplay;
1939 uint32_t fourwayfail;
1942 uint32_t decsuccess;
1943 uint32_t tkipicverr;
1944 uint32_t wepexcluded;
1948 uint32_t phywatchdog;
1951 uint32_t prq_entries_handled;
1952 uint32_t prq_undirected_entries;
1953 uint32_t prq_bad_entries;
1954 uint32_t atim_suppress_count;
1955 uint32_t bcn_template_not_ready;
1956 uint32_t bcn_template_not_ready_done;
1957 uint32_t late_tbtt_dpc;
1983 uint32_t pktengrxducast;
1984 uint32_t pktengrxdmcast;
1987 uint32_t bphy_rxcrsglitch;
1991 uint32_t txmpdu_sgi;
1992 uint32_t rxmpdu_sgi;
1993 uint32_t txmpdu_stbc;
1994 uint32_t rxmpdu_stbc;
1996 uint32_t rxundec_mcst;
1999 uint32_t tkipmicfaill_mcst;
2000 uint32_t tkipcntrmsr_mcst;
2001 uint32_t tkipreplay_mcst;
2002 uint32_t ccmpfmterr_mcst;
2003 uint32_t ccmpreplay_mcst;
2004 uint32_t ccmpundec_mcst;
2005 uint32_t fourwayfail_mcst;
2006 uint32_t wepundec_mcst;
2007 uint32_t wepicverr_mcst;
2008 uint32_t decsuccess_mcst;
2009 uint32_t tkipicverr_mcst;
2010 uint32_t wepexcluded_mcst;
2052 uint32_t rxbadproto;
2053 uint32_t rxbadsrcmac;
2059 uint32_t rxuflo[NFIFO];
2061 uint32_t d11cnt_txrts_off;
2062 uint32_t d11cnt_rxcrc_off;
2063 uint32_t d11cnt_txnocts_off;
2072 uint32_t pkt_callback_reg_fail;
2083 uint32_t txfunfl[6];
2089 uint32_t txphyerror;
2092 uint32_t rxfrmtoolong;
2093 uint32_t rxfrmtooshrt;
2094 uint32_t rxinvmachdr;
2099 uint32_t rxcrsglitch;
2103 uint32_t rxdfrmucastmbss;
2104 uint32_t rxmfrmucastmbss;
2105 uint32_t rxcfrmucast;
2106 uint32_t rxrtsucast;
2107 uint32_t rxctsucast;
2108 uint32_t rxackucast;
2109 uint32_t rxdfrmocast;
2110 uint32_t rxmfrmocast;
2111 uint32_t rxcfrmocast;
2112 uint32_t rxrtsocast;
2113 uint32_t rxctsocast;
2114 uint32_t rxdfrmmcast;
2115 uint32_t rxmfrmmcast;
2116 uint32_t rxcfrmmcast;
2119 uint32_t rxbeaconmbss;
2120 uint32_t rxdfrmucastobss;
2123 uint32_t rxbeaconobss;
2124 uint32_t rxrsptmout;
2127 uint32_t bcntxcancl;
2133 uint32_t rxcgprqfrm;
2136 uint32_t rxcgprsqovfl;
2137 uint32_t txcgprsfail;
2140 uint32_t txcgprssuc;
2141 uint32_t prs_timeout;
2168 uint32_t tkipmicfaill;
2169 uint32_t tkipcntrmsr;
2170 uint32_t tkipreplay;
2171 uint32_t ccmpfmterr;
2172 uint32_t ccmpreplay;
2174 uint32_t fourwayfail;
2177 uint32_t decsuccess;
2178 uint32_t tkipicverr;
2179 uint32_t wepexcluded;
2183 uint32_t phywatchdog;
2186 uint32_t prq_entries_handled;
2187 uint32_t prq_undirected_entries;
2188 uint32_t prq_bad_entries;
2189 uint32_t atim_suppress_count;
2190 uint32_t bcn_template_not_ready;
2191 uint32_t bcn_template_not_ready_done;
2192 uint32_t late_tbtt_dpc;
2218 uint32_t pktengrxducast;
2219 uint32_t pktengrxdmcast;
2222 uint32_t bphy_rxcrsglitch;
2223 uint32_t bphy_badplcp;
2227 uint32_t txmpdu_sgi;
2228 uint32_t rxmpdu_sgi;
2229 uint32_t txmpdu_stbc;
2230 uint32_t rxmpdu_stbc;
2232 uint32_t rxundec_mcst;
2235 uint32_t tkipmicfaill_mcst;
2236 uint32_t tkipcntrmsr_mcst;
2237 uint32_t tkipreplay_mcst;
2238 uint32_t ccmpfmterr_mcst;
2239 uint32_t ccmpreplay_mcst;
2240 uint32_t ccmpundec_mcst;
2241 uint32_t fourwayfail_mcst;
2242 uint32_t wepundec_mcst;
2243 uint32_t wepicverr_mcst;
2244 uint32_t decsuccess_mcst;
2245 uint32_t tkipicverr_mcst;
2246 uint32_t wepexcluded_mcst;
2251 uint32_t pstatxucast;
2252 uint32_t pstatxnoassoc;
2253 uint32_t pstarxucast;
2254 uint32_t pstarxbcmc;
2255 uint32_t pstatxbcmc;
2257 uint32_t cso_passthrough;
2258 uint32_t cso_normal;
2260 uint32_t chainedsz1;
2262 uint32_t maxchainsz;
2263 uint32_t currchainsz;
2293 uint8_t log[WL_PHYRATE_LOG_SIZE];
2333 uint32_t rxbadproto;
2334 uint32_t rxbadsrcmac;
2340 uint32_t rxuflo[NFIFO];
2342 uint32_t d11cnt_txrts_off;
2343 uint32_t d11cnt_rxcrc_off;
2344 uint32_t d11cnt_txnocts_off;
2353 uint32_t pkt_callback_reg_fail;
2364 uint32_t txfunfl[6];
2370 uint32_t txphyerror;
2373 uint32_t rxfrmtoolong;
2374 uint32_t rxfrmtooshrt;
2375 uint32_t rxinvmachdr;
2380 uint32_t rxcrsglitch;
2384 uint32_t rxdfrmucastmbss;
2385 uint32_t rxmfrmucastmbss;
2386 uint32_t rxcfrmucast;
2387 uint32_t rxrtsucast;
2388 uint32_t rxctsucast;
2389 uint32_t rxackucast;
2390 uint32_t rxdfrmocast;
2391 uint32_t rxmfrmocast;
2392 uint32_t rxcfrmocast;
2393 uint32_t rxrtsocast;
2394 uint32_t rxctsocast;
2395 uint32_t rxdfrmmcast;
2396 uint32_t rxmfrmmcast;
2397 uint32_t rxcfrmmcast;
2400 uint32_t rxbeaconmbss;
2401 uint32_t rxdfrmucastobss;
2404 uint32_t rxbeaconobss;
2405 uint32_t rxrsptmout;
2408 uint32_t bcntxcancl;
2414 uint32_t rxcgprqfrm;
2417 uint32_t rxcgprsqovfl;
2418 uint32_t txcgprsfail;
2421 uint32_t txcgprssuc;
2422 uint32_t prs_timeout;
2449 uint32_t tkipmicfaill;
2450 uint32_t tkipcntrmsr;
2451 uint32_t tkipreplay;
2452 uint32_t ccmpfmterr;
2453 uint32_t ccmpreplay;
2455 uint32_t fourwayfail;
2458 uint32_t decsuccess;
2459 uint32_t tkipicverr;
2460 uint32_t wepexcluded;
2464 uint32_t phywatchdog;
2467 uint32_t prq_entries_handled;
2468 uint32_t prq_undirected_entries;
2469 uint32_t prq_bad_entries;
2470 uint32_t atim_suppress_count;
2471 uint32_t bcn_template_not_ready;
2472 uint32_t bcn_template_not_ready_done;
2473 uint32_t late_tbtt_dpc;
2499 uint32_t pktengrxducast;
2500 uint32_t pktengrxdmcast;
2503 uint32_t bphy_rxcrsglitch;
2504 uint32_t bphy_badplcp;
2508 uint32_t txmpdu_sgi;
2509 uint32_t rxmpdu_sgi;
2510 uint32_t txmpdu_stbc;
2511 uint32_t rxmpdu_stbc;
2513 uint32_t rxundec_mcst;
2516 uint32_t tkipmicfaill_mcst;
2517 uint32_t tkipcntrmsr_mcst;
2518 uint32_t tkipreplay_mcst;
2519 uint32_t ccmpfmterr_mcst;
2520 uint32_t ccmpreplay_mcst;
2521 uint32_t ccmpundec_mcst;
2522 uint32_t fourwayfail_mcst;
2523 uint32_t wepundec_mcst;
2524 uint32_t wepicverr_mcst;
2525 uint32_t decsuccess_mcst;
2526 uint32_t tkipicverr_mcst;
2527 uint32_t wepexcluded_mcst;
2532 uint32_t pstatxucast;
2533 uint32_t pstatxnoassoc;
2534 uint32_t pstarxucast;
2535 uint32_t pstarxbcmc;
2536 uint32_t pstatxbcmc;
2538 uint32_t cso_passthrough;
2539 uint32_t cso_normal;
2541 uint32_t chainedsz1;
2543 uint32_t maxchainsz;
2544 uint32_t currchainsz;
2547 uint32_t cfgrestore;
2548 uint32_t reinitreason[8];
2556 uint32_t rxampdu_sgi;
2557 uint32_t rxampdu_stbc;
2558 uint32_t rxmpdu_sgi;
2559 uint32_t rxmpdu_stbc;
2560 uint32_t rxmcs0_40M;
2561 uint32_t rxmcs1_40M;
2562 uint32_t rxmcs2_40M;
2563 uint32_t rxmcs3_40M;
2564 uint32_t rxmcs4_40M;
2565 uint32_t rxmcs5_40M;
2566 uint32_t rxmcs6_40M;
2567 uint32_t rxmcs7_40M;
2568 uint32_t rxmcs32_40M;
2569 uint32_t txfrmsnt_20Mlo;
2570 uint32_t txfrmsnt_20Mup;
2571 uint32_t txfrmsnt_40M;
2574 #define WL_RXDIV_STATS_T_VERSION 1 2581 #define WL_DELTA_STATS_T_VERSION 1 2614 #define WL_WME_CNT_VERSION 1 2633 #define WL_MKEEP_ALIVE_VERSION 1 2634 #define WL_MKEEP_ALIVE_FIXED_LEN offsetof(wl_mkeep_alive_pkt_t, data) 2635 #define WL_MKEEP_ALIVE_PRECISION 500 2637 #define WLC_BA_CNT_VERSION 1 2649 uint32_t txaddbareq;
2650 uint32_t txaddbaresp;
2659 uint32_t rxaddbareq;
2660 uint32_t rxaddbaresp;
2691 uint8_t ba_tx_wsize;
2692 uint8_t ba_rx_wsize;
2694 #define DPT_DISCOVERY_MANUAL 0x01 2695 #define DPT_DISCOVERY_AUTO 0x02 2696 #define DPT_DISCOVERY_SCAN 0x04 2697 #define DPT_PATHSEL_AUTO 0 2698 #define DPT_PATHSEL_DIRECT 1 2699 #define DPT_PATHSEL_APPATH 2 2700 #define DPT_DENY_LIST_ADD 1 2701 #define DPT_DENY_LIST_REMOVE 2 2702 #define DPT_MANUAL_EP_CREATE 1 2703 #define DPT_MANUAL_EP_MODIFY 2 2704 #define DPT_MANUAL_EP_DELETE 3 2711 #define DPT_STATUS_ACTIVE 0x01 2712 #define DPT_STATUS_AES 0x02 2713 #define DPT_STATUS_FAILED 0x04 2714 #define DPT_FNAME_LEN 48 2719 uint8_t name[DPT_FNAME_LEN];
2731 uint8_t name[DPT_FNAME_LEN];
2733 #define BDD_FNAME_LEN 32 2737 uint8_t name[BDD_FNAME_LEN];
2750 uint16_t nom_msdu_size;
2751 uint16_t max_msdu_size;
2752 uint32_t min_srv_interval;
2753 uint32_t max_srv_interval;
2754 uint32_t inactivity_interval;
2755 uint32_t suspension_interval;
2756 uint32_t srv_start_time;
2757 uint32_t min_data_rate;
2758 uint32_t mean_data_rate;
2759 uint32_t peak_data_rate;
2760 uint32_t max_burst_size;
2761 uint32_t delay_bound;
2762 uint32_t min_phy_rate;
2763 uint16_t surplus_bw;
2764 uint16_t medium_time;
2765 uint8_t dialog_token;
2774 uint32_t ac[AC_COUNT];
2776 #define WL_WME_MBW_PARAMS_IO_BYTES (sizeof(wme_max_bandwidth_t) ) 2777 #define TSPEC_ARG_VERSION 2 2778 #define TSPEC_ARG_LENGTH 55 2779 #define TSPEC_DEFAULT_DIALOG_TOKEN 42 2780 #define TSPEC_DEFAULT_SBW_FACTOR 0x3000 2781 #define TSPEC_PENDING 0 2782 #define TSPEC_ACCEPTED 1 2783 #define TSPEC_REJECTED 2 2784 #define TSPEC_UNKNOWN 3 2785 #define TSPEC_STATUS_MASK 7 2786 #define WL_WLAN_ASSOC_REASON_NORMAL_NETWORK 0 2787 #define WL_WLAN_ASSOC_REASON_ROAM_FROM_CELLULAR_NETWORK 1 2788 #define WL_WLAN_ASSOC_REASON_ROAM_FROM_LAN 2 2789 #define WL_WLAN_ASSOC_REASON_MAX 2 2790 #define WL_SWFL_ABBFL 0x0001 2791 #define WL_SWFL_ABENCORE 0x0002 2792 #define WL_SWFL_NOHWRADIO 0x0004 2793 #define WL_LIFETIME_MAX 0xFFFF 2806 #define WLC_ROAM_TRIGGER_DEFAULT 0 2807 #define WLC_ROAM_TRIGGER_BANDWIDTH 1 2808 #define WLC_ROAM_TRIGGER_DISTANCE 2 2809 #define WLC_ROAM_TRIGGER_MAX_VALUE 2 2812 PFN_LIST_ORDER, PFN_RSSI
2814 #define SORT_CRITERIA_BIT 0 2815 #define AUTO_NET_SWITCH_BIT 1 2816 #define ENABLE_BKGRD_SCAN_BIT 2 2817 #define IMMEDIATE_SCAN_BIT 3 2818 #define AUTO_CONNECT_BIT 4 2819 #define IMMEDIATE_EVENT_BIT 8 2820 #define SUPPRESS_SSID_BIT 9 2821 #define ENABLE_NET_OFFLOAD_BIT 10 2822 #define SORT_CRITERIA_MASK 0x01 2823 #define AUTO_NET_SWITCH_MASK 0x02 2824 #define ENABLE_BKGRD_SCAN_MASK 0x04 2825 #define IMMEDIATE_SCAN_MASK 0x08 2826 #define AUTO_CONNECT_MASK 0x10 2827 #define PFN_VERSION 2 2861 int32_t lost_network_timeout;
2868 int16_t rssi_margin;
2890 uint32_t reporttype;
2891 int32_t channel_num;
2892 uint16_t channel_list[WL_NUMCHANNELS];
2897 #define WL_PFN_HIDDEN_MASK 0x4 2898 #define WL_PFN_SUPPRESSLOST_MASK 0x10 2910 #define TOE_TX_CSUM_OL 0x00000001 2911 #define TOE_RX_CSUM_OL 0x00000002 2912 #define TOE_ERRTEST_TX_CSUM 0x00000001 2913 #define TOE_ERRTEST_RX_CSUM 0x00000002 2914 #define TOE_ERRTEST_RX_CSUM2 0x00000004 2918 uint32_t tx_iph_fill;
2919 uint32_t tx_tcp_fill;
2920 uint32_t tx_udp_fill;
2921 uint32_t tx_icmp_fill;
2922 uint32_t rx_iph_good;
2923 uint32_t rx_iph_bad;
2924 uint32_t rx_tcp_good;
2925 uint32_t rx_tcp_bad;
2926 uint32_t rx_udp_good;
2927 uint32_t rx_udp_bad;
2928 uint32_t rx_icmp_good;
2929 uint32_t rx_icmp_bad;
2930 uint32_t tx_tcp_errinj;
2931 uint32_t tx_udp_errinj;
2932 uint32_t tx_icmp_errinj;
2933 uint32_t rx_tcp_errinj;
2934 uint32_t rx_udp_errinj;
2935 uint32_t rx_icmp_errinj;
2937 #define ARP_OL_AGENT 0x00000001 2938 #define ARP_OL_SNOOP 0x00000002 2939 #define ARP_OL_HOST_AUTO_REPLY 0x00000004 2940 #define ARP_OL_PEER_AUTO_REPLY 0x00000008 2941 #define ARP_ERRTEST_REPLY_PEER 0x1 2942 #define ARP_ERRTEST_REPLY_HOST 0x2 2943 #define ARP_MULTIHOMING_MAX 8 2946 uint32_t host_ip_entries;
2947 uint32_t host_ip_overflow;
2948 uint32_t arp_table_entries;
2949 uint32_t arp_table_overflow;
2950 uint32_t host_request;
2951 uint32_t host_reply;
2952 uint32_t host_service;
2953 uint32_t peer_request;
2954 uint32_t peer_request_drop;
2955 uint32_t peer_reply;
2956 uint32_t peer_reply_drop;
2957 uint32_t peer_service;
2961 uint32_t period_msec;
2965 #define WL_KEEP_ALIVE_FIXED_LEN offsetof(wl_keep_alive_pkt_t, data) 2966 typedef enum wl_pkt_filter_type
2968 WL_PKT_FILTER_TYPE_PATTERN_MATCH
2969 } wl_pkt_filter_type_t;
2970 #define WL_PKT_FILTER_TYPE wl_pkt_filter_type_t 2974 uint32_t size_bytes;
2975 uint8_t mask_and_pattern[1];
2981 uint32_t negate_match;
2987 #define WL_PKT_FILTER_FIXED_LEN offsetof(wl_pkt_filter_t, u) 2988 #define WL_PKT_FILTER_PATTERN_FIXED_LEN offsetof(wl_pkt_filter_pattern_t, mask_and_pattern) 2999 #define WL_PKT_FILTER_LIST_FIXED_LEN offsetof(wl_pkt_filter_list_t, filter) 3002 uint32_t num_pkts_matched;
3003 uint32_t num_pkts_forwarded;
3004 uint32_t num_pkts_discarded;
3011 #define WL_SEQ_CMD_ALIGN_BYTES 4 3012 #define WL_SEQ_CMDS_GET_IOCTL_FILTER(cmd) \ 3013 ( ( (cmd) == WLC_GET_MAGIC ) || \ 3014 ( (cmd) == WLC_GET_VERSION ) || \ 3015 ( (cmd) == WLC_GET_AP ) || \ 3016 ( (cmd) == WLC_GET_INSTANCE ) ) 3017 #define WL_PKTENG_PER_TX_START 0x01 3018 #define WL_PKTENG_PER_TX_STOP 0x02 3019 #define WL_PKTENG_PER_RX_START 0x04 3020 #define WL_PKTENG_PER_RX_WITH_ACK_START 0x05 3021 #define WL_PKTENG_PER_TX_WITH_ACK_START 0x06 3022 #define WL_PKTENG_PER_RX_STOP 0x08 3023 #define WL_PKTENG_PER_MASK 0xff 3024 #define WL_PKTENG_SYNCHRONOUS 0x100 3035 #define NUM_80211b_RATES 4 3036 #define NUM_80211ag_RATES 8 3037 #define NUM_80211n_RATES 32 3038 #define NUM_80211_RATES (NUM_80211b_RATES + NUM_80211ag_RATES + NUM_80211n_RATES) 3041 uint32_t lostfrmcnt;
3044 uint16_t rxpktcnt[NUM_80211_RATES + 1];
3058 int16_t papdcompRe[64];
3059 int16_t papdcompIm[64];
3063 uint16_t tbl_length;
3064 int16_t spbreal[256];
3065 int16_t spbimg[256];
3071 uint8_t prev_cal_idx;
3072 uint32_t percal_ctr;
3073 int32_t nxt_cal_idx;
3074 uint32_t force_1idxcal;
3075 uint32_t onedxacl_req;
3076 int32_t last_cal_volt;
3077 int8_t last_cal_temp;
3078 uint32_t vbat_ripple;
3079 uint32_t exit_route;
3080 int32_t volt_winner;
3082 #define WL_WOWL_MAGIC (1 << 0) 3083 #define WL_WOWL_NET (1 << 1) 3084 #define WL_WOWL_DIS (1 << 2) 3085 #define WL_WOWL_RETR (1 << 3) 3086 #define WL_WOWL_BCN (1 << 4) 3087 #define WL_WOWL_TST (1 << 5) 3088 #define WL_WOWL_TRAFFIC (1 << 12) 3089 #define WL_WOWL_BCAST (1 << 15) 3090 #define WL_WOWL_GTK (0x441f) 3091 #define WL_WOWL_DEAUTH (0x1F) 3092 #define WL_WOWL_ALL (0x541E) 3094 #define MAGIC_PKT_MINLEN 102 3099 uint32_t patternoffset;
3100 uint32_t patternsize;
3109 uint8_t pci_wakeind;
3110 uint16_t ucode_wakeind;
3118 #define WL_DELAYMODE_DEFER 0 3119 #define WL_DELAYMODE_FORCE 1 3120 #define WL_DELAYMODE_AUTO 2 3121 #define WLC_OBSS_SCAN_PASSIVE_DWELL_DEFAULT 100 3122 #define WLC_OBSS_SCAN_PASSIVE_DWELL_MIN 5 3123 #define WLC_OBSS_SCAN_PASSIVE_DWELL_MAX 1000 3124 #define WLC_OBSS_SCAN_ACTIVE_DWELL_DEFAULT 20 3125 #define WLC_OBSS_SCAN_ACTIVE_DWELL_MIN 10 3126 #define WLC_OBSS_SCAN_ACTIVE_DWELL_MAX 1000 3127 #define WLC_OBSS_SCAN_WIDTHSCAN_INTERVAL_DEFAULT 300 3128 #define WLC_OBSS_SCAN_WIDTHSCAN_INTERVAL_MIN 10 3129 #define WLC_OBSS_SCAN_WIDTHSCAN_INTERVAL_MAX 900 3130 #define WLC_OBSS_SCAN_CHANWIDTH_TRANSITION_DLY_DEFAULT 5 3131 #define WLC_OBSS_SCAN_CHANWIDTH_TRANSITION_DLY_MIN 5 3132 #define WLC_OBSS_SCAN_CHANWIDTH_TRANSITION_DLY_MAX 100 3133 #define WLC_OBSS_SCAN_PASSIVE_TOTAL_PER_CHANNEL_DEFAULT 200 3134 #define WLC_OBSS_SCAN_PASSIVE_TOTAL_PER_CHANNEL_MIN 200 3135 #define WLC_OBSS_SCAN_PASSIVE_TOTAL_PER_CHANNEL_MAX 10000 3136 #define WLC_OBSS_SCAN_ACTIVE_TOTAL_PER_CHANNEL_DEFAULT 20 3137 #define WLC_OBSS_SCAN_ACTIVE_TOTAL_PER_CHANNEL_MIN 20 3138 #define WLC_OBSS_SCAN_ACTIVE_TOTAL_PER_CHANNEL_MAX 10000 3139 #define WLC_OBSS_SCAN_ACTIVITY_THRESHOLD_DEFAULT 25 3140 #define WLC_OBSS_SCAN_ACTIVITY_THRESHOLD_MIN 0 3141 #define WLC_OBSS_SCAN_ACTIVITY_THRESHOLD_MAX 100 3144 int16_t passive_dwell;
3145 int16_t active_dwell;
3146 int16_t bss_widthscan_interval;
3147 int16_t passive_total;
3148 int16_t active_total;
3149 int16_t chanwidth_transition_delay;
3150 int16_t activity_threshold;
3152 #define WL_OBSS_SCAN_PARAM_LEN sizeof(wl_obss_scan_arg_t) 3153 #define WL_MIN_NUM_OBSS_SCAN_ARG 7 3154 #define WL_COEX_INFO_MASK 0x07 3155 #define WL_COEX_INFO_REQ 0x01 3156 #define WL_COEX_40MHZ_INTOLERANT 0x02 3157 #define WL_COEX_WIDTH20 0x04 3164 #define MAX_RSSI_LEVELS 8 3167 uint32_t rate_limit_msec;
3168 uint8_t num_rssi_levels;
3169 int8_t rssi_levels[MAX_RSSI_LEVELS];
3171 #define WLFEATURE_DISABLE_11N 0x00000001 3172 #define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002 3173 #define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004 3174 #define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008 3175 #define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010 3176 #define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020 3177 #define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040 3178 #define WLFEATURE_DISABLE_11N_GF 0x00000080 3197 uint8_t ieDataList[1];
3203 #define EDCF_AIFSN_MIN 1 3204 #define EDCF_AIFSN_MAX 15 3205 #define EDCF_AIFSN_MASK 0x0f 3206 #define EDCF_ACM_MASK 0x10 3207 #define EDCF_ACI_MASK 0x60 3208 #define EDCF_ACI_SHIFT 5 3209 #define EDCF_AIFSN_SHIFT 12 3212 #define EDCF_ECW_MIN 0 3213 #define EDCF_ECW_MAX 15 3214 #define EDCF_ECW2CW(exp) ( (1 << (exp) ) - 1 ) 3215 #define EDCF_ECWMIN_MASK 0x0f 3216 #define EDCF_ECWMAX_MASK 0xf0 3217 #define EDCF_ECWMAX_SHIFT 4 3220 #define EDCF_TXOP_MIN 0 3221 #define EDCF_TXOP_MAX 65535 3222 #define EDCF_TXOP2USEC(txop) ( (txop) << 5 ) 3224 #define EDCF_ACPARAM 3241 uint16_t dwell_time_ms;
3248 uint8_t reserved[3];
3256 uint8_t reserved[3];
3266 uint8_t interface_type;
3302 #define WL_P2P_SCHED_TYPE_ABS 0 3303 #define WL_P2P_SCHED_TYPE_REQ_ABS 1 3304 #define WL_P2P_SCHED_TYPE_REQ_PSC 2 3307 #define WL_P2P_SCHED_ACTION_NONE 0 3308 #define WL_P2P_SCHED_ACTION_DOZE 1 3309 #define WL_P2P_SCHED_ACTION_RESET 255 3312 #define WL_P2P_SCHED_OPTION_NORMAL 0 3313 #define WL_P2P_SCHED_OPTION_BCNPCT 1 3318 uint16_t nw_cfg_method;
3319 uint8_t wfds_hash[6];
3321 uint8_t service_name[MAX_WFDS_SVC_NAME_LEN];
3324 #define P2P_IP_ALLOC_LEN 12 3328 #define WL_RMC_CNT_VERSION (1) 3329 #define WL_RMC_TR_VERSION (1) 3330 #define WL_RMC_MAX_CLIENT (32) 3331 #define WL_RMC_FLAG_INBLACKLIST (1) 3332 #define WL_RMC_FLAG_ACTIVEACKER (2) 3333 #define WL_RMC_FLAG_RELMCAST (4) 3334 #define WL_RMC_FLAG_MASTER_TX (8) 3335 #define WL_RMC_MAX_TABLE_ENTRY (8) 3337 #define WL_RMC_VER (1) 3338 #define WL_RMC_INDEX_ACK_ALL (255) 3339 #define WL_RMC_NUM_OF_MC_STREAMS (4) 3340 #define WL_RMC_MAX_TRS_PER_GROUP (1) 3341 #define WL_RMC_MAX_TRS_IN_ACKALL (1) 3342 #define WL_RMC_ACK_MCAST0 (0x02) 3343 #define WL_RMC_ACK_MCAST_ALL (0x01) 3344 #define WL_RMC_ACTF_TIME_MIN (300) 3345 #define WL_RMC_ACTF_TIME_MAX (20000) 3346 #define WL_RMC_MAX_NUM_TRS (32) 3347 #define WL_RMC_ARTMO_MIN (350) 3348 #define WL_RMC_ARTMO_MAX (40000) 3352 RELMCAST_ENTRY_OP_DISABLE = 0,
3353 RELMCAST_ENTRY_OP_DELETE = 1,
3354 RELMCAST_ENTRY_OP_ENABLE = 2,
3355 RELMCAST_ENTRY_OP_ACK_ALL = 3
3361 WL_RMC_MODE_RECEIVER = 0,
3362 WL_RMC_MODE_TRANSMITTER = 1,
3363 WL_RMC_MODE_INITIATOR = 2
3380 uint16_t ackreq_err;
3382 uint16_t null_tx_err;
3383 uint16_t af_unicast_tx_err;
3384 uint16_t mc_no_amt_slot;
3386 uint16_t mc_no_glb_slot;
3387 uint16_t mc_not_mirrored;
3388 uint16_t mc_existing_tr;
3389 uint16_t mc_exist_in_amt;
3391 uint16_t mc_not_exist_in_gbl;
3392 uint16_t mc_not_exist_in_amt;
3393 uint16_t mc_utilized;
3394 uint16_t mc_taken_other_tr;
3395 uint32_t rmc_rx_frames_mac;
3396 uint32_t rmc_tx_frames_mac;
3397 uint32_t mc_null_ar_cnt;
3398 uint32_t mc_ar_role_selected;
3399 uint32_t mc_ar_role_deleted;
3400 uint32_t mc_noacktimer_expired;
3401 uint16_t mc_no_wl_clk;
3402 uint16_t mc_tr_cnt_exceeded;
3410 wl_relmcast_client_t clients[WL_RMC_MAX_CLIENT];
3430 wl_rmc_entry_t entry[WL_RMC_MAX_TABLE_ENTRY];
3458 #define WL_ULP_EVENT_VERSION 1 3459 #define WL_ULP_DISABLE_CONSOLE 1 3460 #define WL_ULP_UCODE_DOWNLOAD 2 3461 #define WL_ULP_ENTRY 3 3466 uint16_t ulp_dongle_action;
3470 #define DLOAD_HANDLER_VER 1 3471 #define DLOAD_FLAG_VER_MASK 0xf000 3472 #define DLOAD_FLAG_VER_SHIFT 12 3474 #define DL_CRC_NOT_INUSE 0x0001 3475 #define DL_BEGIN 0x0002 3476 #define DL_END 0x0004 3480 DL_TYPE_UCODE = 1, DL_TYPE_CLM = 2
3486 uint16_t dload_type;
3496 uint32_t clm_total_len;
3497 uint32_t num_chunks;
3499 uint32_t chunk_offset;
3500 uint8_t data_chunk[1];
3507 uint16_t mesh_peer_prot_id;
3508 uint16_t local_link_id;
3509 uint16_t peer_link_id;
3519 uint32_t entry_state;
3531 #define WL_CHANSPEC_CTL_SB_LLL 0x0000 3532 #define WL_CHANSPEC_CTL_SB_LLU 0x0100 3533 #define WL_CHANSPEC_CTL_SB_LUL 0x0200 3534 #define WL_CHANSPEC_CTL_SB_LUU 0x0300 3535 #define WL_CHANSPEC_CTL_SB_ULL 0x0400 3536 #define WL_CHANSPEC_CTL_SB_ULU 0x0500 3537 #define WL_CHANSPEC_CTL_SB_UUL 0x0600 3538 #define WL_CHANSPEC_CTL_SB_UUU 0x0700 3539 #define WL_CHANSPEC_CTL_SB_LL WL_CHANSPEC_CTL_SB_LLL 3540 #define WL_CHANSPEC_CTL_SB_LU WL_CHANSPEC_CTL_SB_LLU 3541 #define WL_CHANSPEC_CTL_SB_UL WL_CHANSPEC_CTL_SB_LUL 3542 #define WL_CHANSPEC_CTL_SB_UU WL_CHANSPEC_CTL_SB_LUU 3543 #define WL_CHANSPEC_CTL_SB_L WL_CHANSPEC_CTL_SB_LLL 3544 #define WL_CHANSPEC_CTL_SB_U WL_CHANSPEC_CTL_SB_LLU 3545 #define INVCHANSPEC 255 3546 #define WL_CHANSPEC_CTL_SB_SHIFT 8 3547 #define WL_CHANSPEC_BW_5 0x0000 3548 #define WL_CHANSPEC_BW_80 0x2000 3549 #define WL_CHANSPEC_BW_160 0x2800 3550 #define WL_CHANSPEC_BW_8080 0x3000 3559 uint32_t chanspec_num;
3560 chanspec_t chanspec_list[1];
3562 #define WL_ASSOC_PARAMS_FIXED_SIZE (sizeof(wl_assoc_params_t) - sizeof(wl_chanspec_t) ) 3564 #define WL_REASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE 3566 #define WL_JOIN_ASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE 3572 #define WL_JOIN_PARAMS_FIXED_SIZE (sizeof(wl_join_params_t) - sizeof(wl_chanspec_t) ) 3579 wl_join_assoc_params_t assoc_params;
3584 #define WL_EXTJOIN_PARAMS_FIXED_SIZE (sizeof(wl_extjoin_params_t) - sizeof(chanspec_t) ) 3586 #define WLC_SET_CUSTOM_COUNTRY ( (uint32_t)320 ) 3589 #define WL_AUTH_OPEN_SYSTEM 0 3590 #define WL_AUTH_SHARED_KEY 1 3591 #define WL_AUTH_OPEN_SHARED 2 3592 #define WL_AUTH_SAE 3 3602 uint32_t host_ip_list[ARP_MULTIHOMING_MAX];
3613 #define MAX_TKO_CONN 4 3614 #define IPV4_ADDR_LEN 4 3617 #define TCP_KEEPALIVE_OFFLOAD_INTERVAL_SEC (20) 3618 #define TCP_KEEPALIVE_OFFLOAD_RETRY_COUNT (3) 3619 #define TCP_KEEPALIVE_OFFLOAD_RETRY_INTERVAL_SEC (3) 3630 #define WL_TKO_SUBCMD_MAX_TCP 0 3631 #define WL_TKO_SUBCMD_PARAM 1 3632 #define WL_TKO_SUBCMD_CONNECT 2 3633 #define WL_TKO_SUBCMD_ENABLE 3 3634 #define WL_TKO_SUBCMD_STATUS 4 3647 uint16_t retry_interval;
3648 uint16_t retry_count;
3658 uint8_t ip_addr_type;
3659 uint16_t local_port;
3660 uint16_t remote_port;
3662 uint32_t remote_seq;
3663 uint16_t request_len;
3664 uint16_t response_len;
3715 TKO_STATUS_NORMAL = 0,
3716 TKO_STATUS_NO_RESPONSE = 1,
3717 TKO_STATUS_NO_TCP_ACK_FLAG = 2,
3718 TKO_STATUS_UNEXPECT_TCP_FLAG = 3,
3719 TKO_STATUS_SEQ_NUM_INVALID = 4,
3720 TKO_STATUS_REMOTE_SEQ_NUM_INVALID = 5,
3721 TKO_STATUS_TCP_DATA = 6,
3722 TKO_STATUS_UNAVAILABLE = 255,
3729 uint8_t status[MAX_TKO_CONN];
uint16_t local_port
local port
uint16_t tko_retry_interval
Wait time between retries (in seconds)
Get/Set TKO intervals & retrys.
uint8_t ip_addr_type
0 - IPv4, 1 - IPv6
uint16_t response_len
TCP keepalive response packet length.
Struct to query FW for current TKO configuation.
uint8_t count
number of status entries
uint32_t arpoe
Agent enabled state.
uint16_t tko_retry_count
Max times to retry if original fails.
uint16_t tko_interval
How often to send (in seconds)
uint16_t remote_port
remote port
uint16_t wl_chanspec_t
Channel specified in uint16_t.
Status of each TCP connection.
uint32_t features_enabled
ARP Feature Flags CY_ARP_OL_AGENT_ENABLE, etc.
uint32_t version
WLAN version.
uint32_t peerage
Current peer age-out time.
arp_ol_stats_t stats
Current stats.
BSS(Basic Service Set) information structure.
uint32_t local_seq
local sequence number
uint16_t request_len
TCP keepalive request packet length.
uint32_t remote_seq
remote sequence number
uint8_t index
TCP connection index, 0 to max-1.