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r_ether_rza2_private.h
1 /***********************************************************************************************************************
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17  * Copyright (C) 2018-2020 Renesas Electronics Corporation. All rights reserved.
18  ***********************************************************************************************************************/
19 /* Copyright (c) 2018-2020 Renesas Electronics Corporation.
20  * SPDX-License-Identifier: Apache-2.0
21  *
22  * Licensed under the Apache License, Version 2.0 (the "License");
23  * you may not use this file except in compliance with the License.
24  * You may obtain a copy of the License at
25  *
26  * http://www.apache.org/licenses/LICENSE-2.0
27  *
28  * Unless required by applicable law or agreed to in writing, software
29  * distributed under the License is distributed on an "AS IS" BASIS,
30  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
31  * See the License for the specific language governing permissions and
32  * limitations under the License.
33  */
34 /***********************************************************************************************************************
35  * File Name : r_ether_rza2_private.h
36  * Version : 1.00
37  * Device : RZA2M
38  * H/W Platform :
39  * Description : File that defines macro and structure seen only in "r_ether_rza2.c" file.
40  ***********************************************************************************************************************/
41 
42 /* Guards against multiple inclusion */
43 #ifndef R_ETHER_PRIVATE_H
44 #define R_ETHER_PRIVATE_H
45 
46 #ifdef __cplusplus
47 extern "C" {
48 #endif
49 
50 /***********************************************************************************************************************
51  Includes <System Includes> , "Project Includes"
52  ***********************************************************************************************************************/
53 #include "r_ether_rza2_if.h"
54 #include "r_ether_rza2_config.h"
55 
56 /***********************************************************************************************************************
57  Macro definitions
58  ***********************************************************************************************************************/
59 
60 /* Check the setting values is valid. Please review the setting values in r_ether_rza2_config.h if error message is output */
61 #if !((ETHER_CFG_MODE_SEL == 0) || (ETHER_CFG_MODE_SEL == 1))
62 #error "ERROR- ETHER_CFG_MODE_SEL - Ethernet interface select is out of range defined in r_ether_rza2_config.h."
63 #endif
64 
65 #if !((ETHER_CFG_CH0_PHY_ADDRESS >= 0) && (ETHER_CFG_CH0_PHY_ADDRESS <= 31))
66 #error "ERROR- ETHER_CFG_CH0_PHY_ADDRESS - PHY-LSI address is out of range defined in r_ether_rza2_config.h."
67 #endif
68 
69 #if !((ETHER_CFG_CH1_PHY_ADDRESS >= 0) && (ETHER_CFG_CH1_PHY_ADDRESS <= 31))
70 #error "ERROR- ETHER_CFG_CH1_PHY_ADDRESS - PHY-LSI address is out of range defined in r_ether_rza2_config.h."
71 #endif
72 
73 #if !(ETHER_CFG_EMAC_RX_DESCRIPTORS >= 1)
74 #error "ERROR- ETHER_CFG_EMAC_RX_DESCRIPTORS - Transmission descriptors is out of range defined in r_ether_rza2_config.h."
75 #endif
76 
77 #if !(ETHER_CFG_EMAC_TX_DESCRIPTORS >= 1)
78 #error "ERROR- ETHER_CFG_EMAC_TX_DESCRIPTORS - Receive descriptors is out of range defined in r_ether_rza2_config.h."
79 #endif
80 
81 #if !((ETHER_CFG_BUFSIZE % 32) == 0)
82 #error "ERROR- ETHER_CFG_BUFSIZE - transmission and receive buffers is not 32-byte aligned in r_ether_rza2_config.h."
83 #endif
84 
85 #if !(ETHER_CFG_PHY_MII_WAIT >= 1)
86 #error "ERROR- ETHER_CFG_PHY_MII_WAIT - PHY-LSI access timing is out of range defined in r_ether_rza2_config.h."
87 #endif
88 
89 #if !((ETHER_CFG_LINK_PRESENT == 0) || (ETHER_CFG_LINK_PRESENT == 1))
90 #error "ERROR- ETHER_CFG_LINK_PRESENT - Link signal polarity of PHY-LSI is out of range defined in r_ether_rza2_config.h."
91 #endif
92 
93 #if !((ETHER_CFG_USE_LINKSTA == 0) || (ETHER_CFG_USE_LINKSTA == 1))
94 #error "ERROR- ETHER_CFG_USE_LINKSTA - Use LINKSTA select is out of range defined in r_ether_rza2_config.h."
95 #endif
96 
97 #if !((ETHER_CFG_USE_PHY_KSZ8041NL == 0) || (ETHER_CFG_USE_PHY_KSZ8041NL == 1))
98 #error "ERROR- ETHER_CFG_USE_PHY_KSZ8041NL - use KSZ8041NL is out of range defined in r_ether_rza2_config.h."
99 #endif
100 
101 /*
102  * The total number of EMAC buffers to allocate. The number of
103  * total buffers is simply the sum of the number of transmit and
104  * receive buffers.
105  */
106 #define EMAC_NUM_BUFFERS (ETHER_CFG_EMAC_RX_DESCRIPTORS + (ETHER_CFG_EMAC_TX_DESCRIPTORS))
107 
108 /* Definition of the maximum / minimum number of data that can be sent at one time in the Ethernet */
109 #define ETHER_BUFSIZE_MAX (1514) /* Maximum number of transmitted data */
110 #define ETHER_BUFSIZE_MIN (60) /* Minimum number of transmitted data */
111 
112 /* Bit definition of interrupt factor of Ethernet interrupt */
113 #define EMAC_LCHNG_INT (1UL << 2)
114 #define EMAC_MPD_INT (1UL << 1)
115 
116 #define EMAC_RFCOF_INT (1UL << 24)
117 #define EMAC_ECI_INT (1UL << 22)
118 #define EMAC_TC_INT (1UL << 21)
119 #define EMAC_FR_INT (1UL << 18)
120 #define EMAC_RDE_INT (1UL << 17)
121 #define EMAC_RFOF_INT (1UL << 16)
122 
123 /* Bit definitions of status member of DescriptorS */
124 #define TACT (0x80000000)
125 #define RACT (0x80000000)
126 #define TDLE (0x40000000)
127 #define RDLE (0x40000000)
128 #define TFP1 (0x20000000)
129 #define RFP1 (0x20000000)
130 #define TFP0 (0x10000000)
131 #define RFP0 (0x10000000)
132 #define TFE (0x08000000)
133 #define RFE (0x08000000)
134 
135 #define RFS9_RFOVER (0x00000200)
136 #define RFS8_RAD (0x00000100)
137 #define RFS7_RMAF (0x00000080)
138 #define RFS4_RRF (0x00000010)
139 #define RFS3_RTLF (0x00000008)
140 #define RFS2_RTSF (0x00000004)
141 #define RFS1_PRE (0x00000002)
142 #define RFS0_CERF (0x00000001)
143 
144 #define TWBI (0x04000000)
145 #define TFS8_TAD (0x00000100)
146 #define TFS3_CND (0x00000008)
147 #define TFS2_DLC (0x00000004)
148 #define TFS1_CD (0x00000002)
149 #define TFS0_TRO (0x00000001)
150 
151 /* Number of entries in PAUSE resolution table */
152 #define PAUSE_TABLE_ENTRIES (8)
153 
154 /* Local device and link partner PAUSE settings */
155 #define XMIT_PAUSE_OFF (0) /* The pause frame transmission is prohibited. */
156 #define RECV_PAUSE_OFF (0) /* The pause frame reception is prohibited. */
157 #define XMIT_PAUSE_ON (1) /* The pause frame transmission is permitted. */
158 #define RECV_PAUSE_ON (1) /* The pause frame reception is permitted. */
159 
160 /* PAUSE link mask and shift values */
161 /*
162  * The mask value and shift value which are for that shift the bits form a line and
163  * for comparing the bit information of PAUSE function which support the local device and
164  * Link partner with the assorted table(pause_resolution) which enable or disable the PAUSE frame.
165  */
166 #define LINK_RES_ABILITY_MASK (3)
167 #define LINK_RES_LOCAL_ABILITY_BITSHIFT (2)
168 
169 /* Etherc mode */
170 #define NO_USE_MAGIC_PACKET_DETECT (0)
171 #define USE_MAGIC_PACKET_DETECT (1)
172 
173 /* Defines the port connection to be used in the Ether */
174 #define PORT_CONNECT_ET0 (0x01)
175 #define PORT_CONNECT_ET1 (0x02)
176 
177 /** Ethernet module usage status */
178 #define ETEHR_MODULE_NOT_USE (0) /* Ethernet module is not used */
179 #define ETHER_MODULE_USE (1) /* Ethernet module is used */
180 
181 /***********************************************************************************************************************
182  Typedef definitions
183  ***********************************************************************************************************************/
184 /*
185  * EDMAC descriptor as defined in the hardware manual. It is
186  * modified to support little endian CPU mode.
187  */
188 typedef struct DescriptorS {
189  volatile uint32_t status;
190  volatile uint16_t size;
191  volatile uint16_t bufsize;
192  volatile uint8_t *buf_p;
193  struct DescriptorS *next;
194 } descriptor_t;
195 
196 /*
197  * Ethernet buffer type definition.
198  */
199 typedef struct EtherBufferS {
200  uint8_t buffer[EMAC_NUM_BUFFERS][ETHER_CFG_BUFSIZE];
201 
202 } etherbuffer_t;
203 
204 /*
205  * PauseMaskE, PauseValE and pause_resolutionS are use to create
206  * PAUSE resolution Table 28B-3 in IEEE 802.3-2008 standard.
207  */
208 typedef enum PauseMaskE {
209  PAUSE_MASK0,
210  PAUSE_MASK1,
211  PAUSE_MASK2,
212  PAUSE_MASK3,
213  PAUSE_MASK4,
214  PAUSE_MASK5,
215  PAUSE_MASK6,
216  PAUSE_MASK7,
217  PAUSE_MASK8,
218  PAUSE_MASK9,
219  PAUSE_MASKA,
220  PAUSE_MASKB,
221  PAUSE_MASKC,
222  PAUSE_MASKD,
223  PAUSE_MASKE,
224  PAUSE_MASKF
225 } pausemask_t;
226 
227 typedef enum PauseValE {
228  PAUSE_VAL0,
229  PAUSE_VAL1,
230  PAUSE_VAL2,
231  PAUSE_VAL3,
232  PAUSE_VAL4,
233  PAUSE_VAL5,
234  PAUSE_VAL6,
235  PAUSE_VAL7,
236  PAUSE_VAL8,
237  PAUSE_VAL9,
238  PAUSE_VALA,
239  PAUSE_VALB,
240  PAUSE_VALC,
241  PAUSE_VALD,
242  PAUSE_VALE,
243  PAUSE_VALF
244 } pauseval_t;
245 
246 typedef struct pause_resolutionS {
247  pausemask_t mask;
248  pauseval_t value;
249  uint8_t transmit;
250  uint8_t receive;
251 } pauseresolution_t;
252 
253 typedef struct {
254  volatile struct st_etherc *petherc; /* ETHERC module */
255  volatile struct st_edmac *pedmac; /* EDMAC */
256  volatile uint32_t *preg_pir;
257  uint32_t phy_address;
258  uint8_t port_connect;
259 } ether_control_t;
260 
261 /***********************************************************************************************************************
262  Exported global variables
263  ***********************************************************************************************************************/
264 extern const ether_control_t g_eth_control_ch[];
265 
266 /***********************************************************************************************************************
267  Exported global functions (to be accessed by other files)
268  ***********************************************************************************************************************/
269 extern void ether_set_phy_mode(uint8_t connect);
270 
271 #ifdef __cplusplus
272 }
273 #endif
274 
275 #endif /* R_ETHER_PRIVATE_H */
ether_control_t
Definition: r_ether_rza2_private.h:253
pause_resolutionS
Definition: r_ether_rza2_private.h:246
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