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ospi_test_utils.h
1 /* mbed Microcontroller Library
2  * Copyright (c) 2018-2020 ARM Limited
3  * SPDX-License-Identifier: Apache-2.0
4  *
5  * Licensed under the Apache License, Version 2.0 (the "License");
6  * you may not use this file except in compliance with the License.
7  * You may obtain a copy of the License at
8  *
9  * http://www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an "AS IS" BASIS,
13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16  */
17 #ifndef MBED_OSPI_TEST_UTILS_H
18 #define MBED_OSPI_TEST_UTILS_H
19 
20 #include "flash_configs/flash_configs.h"
21 #include "unity/unity.h"
22 #include "hal/ospi_api.h"
23 #define OSPI_NONE (-1)
24 
25 enum OspiStatus {
26  sOK,
27  sError,
28  sTimeout,
29  sUnknown
30 };
31 
32 class OspiCommand {
33 public:
34  void configure(ospi_bus_width_t inst_width, ospi_bus_width_t addr_width, ospi_bus_width_t data_width,
35  ospi_bus_width_t alt_width, ospi_address_size_t addr_size, ospi_alt_size_t alt_size,
36  int dummy_cycles = 0);
37 
38  void set_dummy_cycles(int dummy_cycles);
39 
40  void build(int instruction, int address = OSPI_NONE, int alt = OSPI_NONE);
41 
42  ospi_command_t *get();
43 
44 private:
45  ospi_command_t _cmd;
46 };
47 
48 struct Ospi {
49  ospi_t handle;
50  OspiCommand cmd;
51 };
52 
53 // MODE_Command_Address_Data_Alt
54 #define MODE_1_1_1 OSPI_CFG_BUS_SINGLE, OSPI_CFG_BUS_SINGLE, OSPI_CFG_BUS_SINGLE, OSPI_CFG_BUS_SINGLE
55 #define MODE_1_1_2 OSPI_CFG_BUS_SINGLE, OSPI_CFG_BUS_SINGLE, OSPI_CFG_BUS_DUAL, OSPI_CFG_BUS_DUAL
56 #define MODE_1_2_2 OSPI_CFG_BUS_SINGLE, OSPI_CFG_BUS_DUAL, OSPI_CFG_BUS_DUAL, OSPI_CFG_BUS_DUAL
57 #define MODE_2_2_2 OSPI_CFG_BUS_DUAL, OSPI_CFG_BUS_DUAL, OSPI_CFG_BUS_DUAL, OSPI_CFG_BUS_DUAL
58 #define MODE_1_1_4 OSPI_CFG_BUS_SINGLE, OSPI_CFG_BUS_SINGLE, OSPI_CFG_BUS_QUAD, OSPI_CFG_BUS_QUAD
59 #define MODE_1_4_4 OSPI_CFG_BUS_SINGLE, OSPI_CFG_BUS_QUAD, OSPI_CFG_BUS_QUAD, OSPI_CFG_BUS_QUAD
60 #define MODE_4_4_4 OSPI_CFG_BUS_QUAD, OSPI_CFG_BUS_QUAD, OSPI_CFG_BUS_QUAD, OSPI_CFG_BUS_QUAD
61 #define MODE_8_8_8 OSPI_CFG_BUS_OCTA, OSPI_CFG_BUS_OCTA, OSPI_CFG_BUS_OCTA, OSPI_CFG_BUS_OCTA
62 #define MODE_8D_8D_8D OSPI_CFG_BUS_OCTA_DTR, OSPI_CFG_BUS_OCTA_DTR, OSPI_CFG_BUS_OCTA_DTR, OSPI_CFG_BUS_OCTA_DTR
63 
64 
65 #define WRITE_1_1_1 MODE_1_1_1, OSPI_CMD_WRITE_1IO
66 #ifdef OSPI_CMD_WRITE_2IO
67 #define WRITE_1_2_2 MODE_1_2_2, OSPI_CMD_WRITE_2IO
68 #endif
69 #ifdef OSPI_CMD_WRITE_1I4O // Quad page program - command: 0x32
70 #define WRITE_1_1_4 MODE_1_1_4, OSPI_CMD_WRITE_1I4O
71 #endif
72 #ifdef OSPI_CMD_WRITE_4IO
73 #define WRITE_1_4_4 MODE_1_4_4, OSPI_CMD_WRITE_4IO
74 #endif
75 #ifdef OSPI_CMD_WRITE_DPI
76 #define WRITE_2_2_2 MODE_2_2_2, OSPI_CMD_WRITE_DPI
77 #endif
78 #ifdef OSPI_CMD_WRITE_QPI
79 #define WRITE_4_4_4 MODE_4_4_4, OSPI_CMD_WRITE_QPI
80 #endif
81 #ifdef OSPI_CMD_WRITE_OPI
82 #define WRITE_8_8_8 MODE_8_8_8, OSPI_CMD_WRITE_OPI
83 #endif
84 #ifdef OSPI_CMD_WRITE_OPI
85 #define WRITE_8D_8D_8D MODE_8D_8D_8D, OSPI_CMD_WRITE_OPI
86 #endif
87 
88 #define READ_1_1_1 MODE_1_1_1, OSPI_CMD_READ_1IO, OSPI_READ_1IO_DUMMY_CYCLE
89 #ifdef OSPI_CMD_READ_1I2O
90 #define READ_1_1_2 MODE_1_1_2, OSPI_CMD_READ_1I2O, OSPI_READ_1I2O_DUMMY_CYCLE
91 #endif
92 #ifdef OSPI_CMD_READ_2IO
93 #define READ_1_2_2 MODE_1_2_2, OSPI_CMD_READ_2IO, OSPI_READ_2IO_DUMMY_CYCLE
94 #endif
95 #ifdef OSPI_CMD_READ_1I4O
96 #define READ_1_1_4 MODE_1_1_4, OSPI_CMD_READ_1I4O, OSPI_READ_1I4O_DUMMY_CYCLE
97 #endif
98 #ifdef OSPI_CMD_READ_4IO
99 #define READ_1_4_4 MODE_1_4_4, OSPI_CMD_READ_4IO, OSPI_READ_4IO_DUMMY_CYCLE
100 #endif
101 #ifdef OSPI_CMD_READ_OPI
102 #define READ_8_8_8 MODE_8_8_8, OSPI_CMD_READ_OPI, OSPI_READ_8IO_DUMMY_CYCLE
103 #endif
104 #ifdef OSPI_CMD_READ_DOPI
105 #define READ_8D_8D_8D MODE_8D_8D_8D, OSPI_CMD_READ_DOPI, OSPI_READ_8IO_DUMMY_CYCLE
106 #endif
107 
108 #ifdef OSPI_CMD_READ_DPI
109 #define READ_2_2_2 MODE_2_2_2, OSPI_CMD_READ_DPI, OSPI_READ_2IO_DUMMY_CYCLE
110 #endif
111 #ifdef OSPI_CMD_READ_QPI
112 #define READ_4_4_4 MODE_4_4_4, OSPI_CMD_READ_QPI, OSPI_READ_4IO_DUMMY_CYCLE
113 #endif
114 
115 #define ADDR_SIZE_8 OSPI_CFG_ADDR_SIZE_8
116 #define ADDR_SIZE_16 OSPI_CFG_ADDR_SIZE_16
117 #define ADDR_SIZE_24 OSPI_CFG_ADDR_SIZE_24
118 #define ADDR_SIZE_32 OSPI_CFG_ADDR_SIZE_32
119 
120 #define ALT_SIZE_8 OSPI_CFG_ALT_SIZE_8
121 #define ALT_SIZE_16 OSPI_CFG_ALT_SIZE_16
122 #define ALT_SIZE_24 OSPI_CFG_ALT_SIZE_24
123 #define ALT_SIZE_32 OSPI_CFG_ALT_SIZE_32
124 
125 #define STATUS_REG OSPI_CMD_RDSR
126 #define CONFIG_REG0 OSPI_CMD_RDCR0
127 #ifdef OSPI_CMD_RDCR1
128 #define CONFIG_REG1 OSPI_CMD_RDCR1
129 #endif
130 #ifdef OSPI_CMD_RDCR2
131 #define CONFIG_REG2 OSPI_CMD_RDCR2
132 #endif
133 #define SECURITY_REG OSPI_CMD_RDSCUR
134 
135 #ifndef OSPI_CONFIG_REG_1_SIZE
136 #define OSPI_CONFIG_REG_1_SIZE 0
137 #endif
138 
139 #ifndef OSPI_CONFIG_REG_2_SIZE
140 #define OSPI_CONFIG_REG_2_SIZE 0
141 #endif
142 
143 
144 #define SECTOR_ERASE OSPI_CMD_ERASE_SECTOR
145 #define BLOCK_ERASE OSPI_CMD_ERASE_BLOCK_64
146 
147 
148 #define SECTOR_ERASE_MAX_TIME OSPI_ERASE_SECTOR_MAX_TIME
149 #define BLOCK32_ERASE_MAX_TIME OSPI_ERASE_BLOCK_32_MAX_TIME
150 #define BLOCK64_ERASE_MAX_TIME OSPI_ERASE_BLOCK_64_MAX_TIME
151 #define PAGE_PROG_MAX_TIME OSPI_PAGE_PROG_MAX_TIME
152 #define WRSR_MAX_TIME OSPI_WRSR_MAX_TIME
153 #define WAIT_MAX_TIME OSPI_WAIT_MAX_TIME
154 
155 
156 
157 ospi_status_t read_register(uint32_t cmd, uint8_t *buf, uint32_t size, Ospi &q);
158 ospi_status_t write_register(uint32_t cmd, uint8_t *buf, uint32_t size, Ospi &q);
159 
160 OspiStatus flash_wait_for(uint32_t time_us, Ospi &ospi);
161 
162 void flash_init(Ospi &ospi);
163 
164 ospi_status_t write_enable(Ospi &ospi);
165 ospi_status_t write_disable(Ospi &ospi);
166 
167 void log_register(uint32_t cmd, uint32_t reg_size, Ospi &ospi, const char *str = NULL);
168 
169 ospi_status_t mode_enable(Ospi &ospi, ospi_bus_width_t inst_width, ospi_bus_width_t addr_width, ospi_bus_width_t data_width);
170 ospi_status_t mode_disable(Ospi &ospi, ospi_bus_width_t inst_width, ospi_bus_width_t addr_width, ospi_bus_width_t data_width);
171 
172 ospi_status_t fast_mode_enable(Ospi &ospi);
173 ospi_status_t fast_mode_disable(Ospi &ospi);
174 
175 ospi_status_t erase(uint32_t erase_cmd, uint32_t flash_addr, Ospi &ospi);
176 
177 bool is_extended_mode(ospi_bus_width_t inst_width, ospi_bus_width_t addr_width, ospi_bus_width_t data_width);
178 bool is_dual_mode(ospi_bus_width_t inst_width, ospi_bus_width_t addr_width, ospi_bus_width_t data_width);
179 bool is_quad_mode(ospi_bus_width_t inst_width, ospi_bus_width_t addr_width, ospi_bus_width_t data_width);
180 bool is_octa_mode(ospi_bus_width_t inst_width, ospi_bus_width_t addr_width, ospi_bus_width_t data_width);
181 bool is_octa_dtr_mode(ospi_bus_width_t inst_width, ospi_bus_width_t addr_width, ospi_bus_width_t data_width);
182 
183 #define WAIT_FOR(timeout, q) TEST_ASSERT_EQUAL_MESSAGE(sOK, flash_wait_for(timeout, q), "flash_wait_for failed!!!")
184 
185 
186 #endif // MBED_OSPI_TEST_UTILS_H
flash_init
int32_t flash_init(flash_t *obj)
Initialize the flash peripheral and the flash_t object.
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