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TARGET_NUCLEO_L4R5ZI_P/TOOLCHAIN_ARM_STD/stm32l4xx_ll_lptim.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:65be27845400 1 /**
AnnaBridge 172:65be27845400 2 ******************************************************************************
AnnaBridge 172:65be27845400 3 * @file stm32l4xx_ll_lptim.h
AnnaBridge 172:65be27845400 4 * @author MCD Application Team
AnnaBridge 172:65be27845400 5 * @brief Header file of LPTIM LL module.
AnnaBridge 172:65be27845400 6 ******************************************************************************
AnnaBridge 172:65be27845400 7 * @attention
AnnaBridge 172:65be27845400 8 *
AnnaBridge 172:65be27845400 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 172:65be27845400 10 *
AnnaBridge 172:65be27845400 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 172:65be27845400 12 * are permitted provided that the following conditions are met:
AnnaBridge 172:65be27845400 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 172:65be27845400 14 * this list of conditions and the following disclaimer.
AnnaBridge 172:65be27845400 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 172:65be27845400 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 172:65be27845400 17 * and/or other materials provided with the distribution.
AnnaBridge 172:65be27845400 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 172:65be27845400 19 * may be used to endorse or promote products derived from this software
AnnaBridge 172:65be27845400 20 * without specific prior written permission.
AnnaBridge 172:65be27845400 21 *
AnnaBridge 172:65be27845400 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 172:65be27845400 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 172:65be27845400 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 172:65be27845400 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 172:65be27845400 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 172:65be27845400 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 172:65be27845400 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 172:65be27845400 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 172:65be27845400 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 172:65be27845400 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 172:65be27845400 32 *
AnnaBridge 172:65be27845400 33 ******************************************************************************
AnnaBridge 172:65be27845400 34 */
AnnaBridge 172:65be27845400 35
AnnaBridge 172:65be27845400 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 172:65be27845400 37 #ifndef __STM32L4xx_LL_LPTIM_H
AnnaBridge 172:65be27845400 38 #define __STM32L4xx_LL_LPTIM_H
AnnaBridge 172:65be27845400 39
AnnaBridge 172:65be27845400 40 #ifdef __cplusplus
AnnaBridge 172:65be27845400 41 extern "C" {
AnnaBridge 172:65be27845400 42 #endif
AnnaBridge 172:65be27845400 43
AnnaBridge 172:65be27845400 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 172:65be27845400 45 #include "stm32l4xx.h"
AnnaBridge 172:65be27845400 46
AnnaBridge 172:65be27845400 47 /** @addtogroup STM32L4xx_LL_Driver
AnnaBridge 172:65be27845400 48 * @{
AnnaBridge 172:65be27845400 49 */
AnnaBridge 172:65be27845400 50 #if defined (LPTIM1) || defined (LPTIM2)
AnnaBridge 172:65be27845400 51
AnnaBridge 172:65be27845400 52 /** @defgroup LPTIM_LL LPTIM
AnnaBridge 172:65be27845400 53 * @{
AnnaBridge 172:65be27845400 54 */
AnnaBridge 172:65be27845400 55
AnnaBridge 172:65be27845400 56 /* Private types -------------------------------------------------------------*/
AnnaBridge 172:65be27845400 57 /* Private variables ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 58
AnnaBridge 172:65be27845400 59 /* Private constants ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 60
AnnaBridge 172:65be27845400 61 /* Private macros ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 62 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 172:65be27845400 63 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
AnnaBridge 172:65be27845400 64 * @{
AnnaBridge 172:65be27845400 65 */
AnnaBridge 172:65be27845400 66 /**
AnnaBridge 172:65be27845400 67 * @}
AnnaBridge 172:65be27845400 68 */
AnnaBridge 172:65be27845400 69 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 172:65be27845400 70
AnnaBridge 172:65be27845400 71 /* Exported types ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 72 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 172:65be27845400 73 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
AnnaBridge 172:65be27845400 74 * @{
AnnaBridge 172:65be27845400 75 */
AnnaBridge 172:65be27845400 76
AnnaBridge 172:65be27845400 77 /**
AnnaBridge 172:65be27845400 78 * @brief LPTIM Init structure definition
AnnaBridge 172:65be27845400 79 */
AnnaBridge 172:65be27845400 80 typedef struct
AnnaBridge 172:65be27845400 81 {
AnnaBridge 172:65be27845400 82 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
AnnaBridge 172:65be27845400 83 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
AnnaBridge 172:65be27845400 84
AnnaBridge 172:65be27845400 85 This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
AnnaBridge 172:65be27845400 86
AnnaBridge 172:65be27845400 87 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
AnnaBridge 172:65be27845400 88 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
AnnaBridge 172:65be27845400 89
AnnaBridge 172:65be27845400 90 This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
AnnaBridge 172:65be27845400 91
AnnaBridge 172:65be27845400 92 uint32_t Waveform; /*!< Specifies the waveform shape.
AnnaBridge 172:65be27845400 93 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
AnnaBridge 172:65be27845400 94
AnnaBridge 172:65be27845400 95 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
AnnaBridge 172:65be27845400 96
AnnaBridge 172:65be27845400 97 uint32_t Polarity; /*!< Specifies waveform polarity.
AnnaBridge 172:65be27845400 98 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
AnnaBridge 172:65be27845400 99
AnnaBridge 172:65be27845400 100 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
AnnaBridge 172:65be27845400 101 } LL_LPTIM_InitTypeDef;
AnnaBridge 172:65be27845400 102
AnnaBridge 172:65be27845400 103 /**
AnnaBridge 172:65be27845400 104 * @}
AnnaBridge 172:65be27845400 105 */
AnnaBridge 172:65be27845400 106 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 172:65be27845400 107
AnnaBridge 172:65be27845400 108 /* Exported constants --------------------------------------------------------*/
AnnaBridge 172:65be27845400 109 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
AnnaBridge 172:65be27845400 110 * @{
AnnaBridge 172:65be27845400 111 */
AnnaBridge 172:65be27845400 112
AnnaBridge 172:65be27845400 113 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge 172:65be27845400 114 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
AnnaBridge 172:65be27845400 115 * @{
AnnaBridge 172:65be27845400 116 */
AnnaBridge 172:65be27845400 117 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
AnnaBridge 172:65be27845400 118 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
AnnaBridge 172:65be27845400 119 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
AnnaBridge 172:65be27845400 120 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
AnnaBridge 172:65be27845400 121 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
AnnaBridge 172:65be27845400 122 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
AnnaBridge 172:65be27845400 123 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
AnnaBridge 172:65be27845400 124 /**
AnnaBridge 172:65be27845400 125 * @}
AnnaBridge 172:65be27845400 126 */
AnnaBridge 172:65be27845400 127
AnnaBridge 172:65be27845400 128 /** @defgroup LPTIM_LL_EC_IT IT Defines
AnnaBridge 172:65be27845400 129 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
AnnaBridge 172:65be27845400 130 * @{
AnnaBridge 172:65be27845400 131 */
AnnaBridge 172:65be27845400 132 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match Interrupt Enable */
AnnaBridge 172:65be27845400 133 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match Interrupt Enable */
AnnaBridge 172:65be27845400 134 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger valid edge Interrupt Enable */
AnnaBridge 172:65be27845400 135 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK Interrupt Enable */
AnnaBridge 172:65be27845400 136 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK Interrupt Enable */
AnnaBridge 172:65be27845400 137 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Direction change to UP Interrupt Enable */
AnnaBridge 172:65be27845400 138 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Direction change to down Interrupt Enable */
AnnaBridge 172:65be27845400 139 /**
AnnaBridge 172:65be27845400 140 * @}
AnnaBridge 172:65be27845400 141 */
AnnaBridge 172:65be27845400 142
AnnaBridge 172:65be27845400 143 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
AnnaBridge 172:65be27845400 144 * @{
AnnaBridge 172:65be27845400 145 */
AnnaBridge 172:65be27845400 146 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
AnnaBridge 172:65be27845400 147 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
AnnaBridge 172:65be27845400 148 /**
AnnaBridge 172:65be27845400 149 * @}
AnnaBridge 172:65be27845400 150 */
AnnaBridge 172:65be27845400 151
AnnaBridge 172:65be27845400 152 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
AnnaBridge 172:65be27845400 153 * @{
AnnaBridge 172:65be27845400 154 */
AnnaBridge 172:65be27845400 155 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
AnnaBridge 172:65be27845400 156 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
AnnaBridge 172:65be27845400 157 /**
AnnaBridge 172:65be27845400 158 * @}
AnnaBridge 172:65be27845400 159 */
AnnaBridge 172:65be27845400 160
AnnaBridge 172:65be27845400 161 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
AnnaBridge 172:65be27845400 162 * @{
AnnaBridge 172:65be27845400 163 */
AnnaBridge 172:65be27845400 164 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
AnnaBridge 172:65be27845400 165 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
AnnaBridge 172:65be27845400 166 /**
AnnaBridge 172:65be27845400 167 * @}
AnnaBridge 172:65be27845400 168 */
AnnaBridge 172:65be27845400 169
AnnaBridge 172:65be27845400 170 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
AnnaBridge 172:65be27845400 171 * @{
AnnaBridge 172:65be27845400 172 */
AnnaBridge 172:65be27845400 173 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE*/
AnnaBridge 172:65be27845400 174 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
AnnaBridge 172:65be27845400 175 /**
AnnaBridge 172:65be27845400 176 * @}
AnnaBridge 172:65be27845400 177 */
AnnaBridge 172:65be27845400 178
AnnaBridge 172:65be27845400 179 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
AnnaBridge 172:65be27845400 180 * @{
AnnaBridge 172:65be27845400 181 */
AnnaBridge 172:65be27845400 182 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
AnnaBridge 172:65be27845400 183 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
AnnaBridge 172:65be27845400 184 /**
AnnaBridge 172:65be27845400 185 * @}
AnnaBridge 172:65be27845400 186 */
AnnaBridge 172:65be27845400 187
AnnaBridge 172:65be27845400 188 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
AnnaBridge 172:65be27845400 189 * @{
AnnaBridge 172:65be27845400 190 */
AnnaBridge 172:65be27845400 191 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
AnnaBridge 172:65be27845400 192 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
AnnaBridge 172:65be27845400 193 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
AnnaBridge 172:65be27845400 194 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
AnnaBridge 172:65be27845400 195 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
AnnaBridge 172:65be27845400 196 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
AnnaBridge 172:65be27845400 197 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
AnnaBridge 172:65be27845400 198 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
AnnaBridge 172:65be27845400 199 /**
AnnaBridge 172:65be27845400 200 * @}
AnnaBridge 172:65be27845400 201 */
AnnaBridge 172:65be27845400 202
AnnaBridge 172:65be27845400 203 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
AnnaBridge 172:65be27845400 204 * @{
AnnaBridge 172:65be27845400 205 */
AnnaBridge 172:65be27845400 206 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
AnnaBridge 172:65be27845400 207 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
AnnaBridge 172:65be27845400 208 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
AnnaBridge 172:65be27845400 209 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
AnnaBridge 172:65be27845400 210 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2 LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to RTC Tamper 2*/
AnnaBridge 172:65be27845400 211 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
AnnaBridge 172:65be27845400 212 #define LL_LPTIM_TRIG_SOURCE_COMP1 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
AnnaBridge 172:65be27845400 213 #define LL_LPTIM_TRIG_SOURCE_COMP2 LPTIM_CFGR_TRIGSEL /*!<External input trigger is connected to COMP2 output*/
AnnaBridge 172:65be27845400 214 /**
AnnaBridge 172:65be27845400 215 * @}
AnnaBridge 172:65be27845400 216 */
AnnaBridge 172:65be27845400 217
AnnaBridge 172:65be27845400 218 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
AnnaBridge 172:65be27845400 219 * @{
AnnaBridge 172:65be27845400 220 */
AnnaBridge 172:65be27845400 221 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
AnnaBridge 172:65be27845400 222 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
AnnaBridge 172:65be27845400 223 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
AnnaBridge 172:65be27845400 224 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
AnnaBridge 172:65be27845400 225 /**
AnnaBridge 172:65be27845400 226 * @}
AnnaBridge 172:65be27845400 227 */
AnnaBridge 172:65be27845400 228
AnnaBridge 172:65be27845400 229 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
AnnaBridge 172:65be27845400 230 * @{
AnnaBridge 172:65be27845400 231 */
AnnaBridge 172:65be27845400 232 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
AnnaBridge 172:65be27845400 233 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
AnnaBridge 172:65be27845400 234 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
AnnaBridge 172:65be27845400 235 /**
AnnaBridge 172:65be27845400 236 * @}
AnnaBridge 172:65be27845400 237 */
AnnaBridge 172:65be27845400 238
AnnaBridge 172:65be27845400 239 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
AnnaBridge 172:65be27845400 240 * @{
AnnaBridge 172:65be27845400 241 */
AnnaBridge 172:65be27845400 242 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
AnnaBridge 172:65be27845400 243 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
AnnaBridge 172:65be27845400 244 /**
AnnaBridge 172:65be27845400 245 * @}
AnnaBridge 172:65be27845400 246 */
AnnaBridge 172:65be27845400 247
AnnaBridge 172:65be27845400 248 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
AnnaBridge 172:65be27845400 249 * @{
AnnaBridge 172:65be27845400 250 */
AnnaBridge 172:65be27845400 251 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
AnnaBridge 172:65be27845400 252 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
AnnaBridge 172:65be27845400 253 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
AnnaBridge 172:65be27845400 254 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
AnnaBridge 172:65be27845400 255 /**
AnnaBridge 172:65be27845400 256 * @}
AnnaBridge 172:65be27845400 257 */
AnnaBridge 172:65be27845400 258
AnnaBridge 172:65be27845400 259 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
AnnaBridge 172:65be27845400 260 * @{
AnnaBridge 172:65be27845400 261 */
AnnaBridge 172:65be27845400 262 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
AnnaBridge 172:65be27845400 263 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
AnnaBridge 172:65be27845400 264 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
AnnaBridge 172:65be27845400 265 /**
AnnaBridge 172:65be27845400 266 * @}
AnnaBridge 172:65be27845400 267 */
AnnaBridge 172:65be27845400 268
AnnaBridge 172:65be27845400 269 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
AnnaBridge 172:65be27845400 270 * @{
AnnaBridge 172:65be27845400 271 */
AnnaBridge 172:65be27845400 272 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
AnnaBridge 172:65be27845400 273 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
AnnaBridge 172:65be27845400 274 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
AnnaBridge 172:65be27845400 275 /**
AnnaBridge 172:65be27845400 276 * @}
AnnaBridge 172:65be27845400 277 */
AnnaBridge 172:65be27845400 278
AnnaBridge 172:65be27845400 279 /** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
AnnaBridge 172:65be27845400 280 * @{
AnnaBridge 172:65be27845400 281 */
AnnaBridge 172:65be27845400 282 #define LL_LPTIM_INPUT1_SRC_GPIO 0x00000000U /*!< For LPTIM1 and LPTIM2 */
AnnaBridge 172:65be27845400 283 #define LL_LPTIM_INPUT1_SRC_COMP1 LPTIM_OR_OR_0 /*!< For LPTIM1 and LPTIM2 */
AnnaBridge 172:65be27845400 284 #define LL_LPTIM_INPUT1_SRC_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM2 */
AnnaBridge 172:65be27845400 285 #define LL_LPTIM_INPUT1_SRC_COMP1_COMP2 LPTIM_OR_OR /*!< For LPTIM2 */
AnnaBridge 172:65be27845400 286 /**
AnnaBridge 172:65be27845400 287 * @}
AnnaBridge 172:65be27845400 288 */
AnnaBridge 172:65be27845400 289
AnnaBridge 172:65be27845400 290 /** @defgroup LPTIM_EC_INPUT2_SRC Input2 Source
AnnaBridge 172:65be27845400 291 * @{
AnnaBridge 172:65be27845400 292 */
AnnaBridge 172:65be27845400 293 #define LL_LPTIM_INPUT2_SRC_GPIO 0x00000000U /*!< For LPTIM1 */
AnnaBridge 172:65be27845400 294 #define LL_LPTIM_INPUT2_SRC_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM1 */
AnnaBridge 172:65be27845400 295 /**
AnnaBridge 172:65be27845400 296 * @}
AnnaBridge 172:65be27845400 297 */
AnnaBridge 172:65be27845400 298
AnnaBridge 172:65be27845400 299 /**
AnnaBridge 172:65be27845400 300 * @}
AnnaBridge 172:65be27845400 301 */
AnnaBridge 172:65be27845400 302
AnnaBridge 172:65be27845400 303 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 304 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
AnnaBridge 172:65be27845400 305 * @{
AnnaBridge 172:65be27845400 306 */
AnnaBridge 172:65be27845400 307
AnnaBridge 172:65be27845400 308 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge 172:65be27845400 309 * @{
AnnaBridge 172:65be27845400 310 */
AnnaBridge 172:65be27845400 311
AnnaBridge 172:65be27845400 312 /**
AnnaBridge 172:65be27845400 313 * @brief Write a value in LPTIM register
AnnaBridge 172:65be27845400 314 * @param __INSTANCE__ LPTIM Instance
AnnaBridge 172:65be27845400 315 * @param __REG__ Register to be written
AnnaBridge 172:65be27845400 316 * @param __VALUE__ Value to be written in the register
AnnaBridge 172:65be27845400 317 * @retval None
AnnaBridge 172:65be27845400 318 */
AnnaBridge 172:65be27845400 319 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge 172:65be27845400 320
AnnaBridge 172:65be27845400 321 /**
AnnaBridge 172:65be27845400 322 * @brief Read a value in LPTIM register
AnnaBridge 172:65be27845400 323 * @param __INSTANCE__ LPTIM Instance
AnnaBridge 172:65be27845400 324 * @param __REG__ Register to be read
AnnaBridge 172:65be27845400 325 * @retval Register value
AnnaBridge 172:65be27845400 326 */
AnnaBridge 172:65be27845400 327 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge 172:65be27845400 328 /**
AnnaBridge 172:65be27845400 329 * @}
AnnaBridge 172:65be27845400 330 */
AnnaBridge 172:65be27845400 331
AnnaBridge 172:65be27845400 332 /**
AnnaBridge 172:65be27845400 333 * @}
AnnaBridge 172:65be27845400 334 */
AnnaBridge 172:65be27845400 335
AnnaBridge 172:65be27845400 336
AnnaBridge 172:65be27845400 337 /* Exported functions --------------------------------------------------------*/
AnnaBridge 172:65be27845400 338 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
AnnaBridge 172:65be27845400 339 * @{
AnnaBridge 172:65be27845400 340 */
AnnaBridge 172:65be27845400 341
AnnaBridge 172:65be27845400 342 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
AnnaBridge 172:65be27845400 343 * @{
AnnaBridge 172:65be27845400 344 */
AnnaBridge 172:65be27845400 345
AnnaBridge 172:65be27845400 346 /**
AnnaBridge 172:65be27845400 347 * @brief Enable the LPTIM instance
AnnaBridge 172:65be27845400 348 * @note After setting the ENABLE bit, a delay of two counter clock is needed
AnnaBridge 172:65be27845400 349 * before the LPTIM instance is actually enabled.
AnnaBridge 172:65be27845400 350 * @rmtoll CR ENABLE LL_LPTIM_Enable
AnnaBridge 172:65be27845400 351 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 352 * @retval None
AnnaBridge 172:65be27845400 353 */
AnnaBridge 172:65be27845400 354 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 355 {
AnnaBridge 172:65be27845400 356 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
AnnaBridge 172:65be27845400 357 }
AnnaBridge 172:65be27845400 358
AnnaBridge 172:65be27845400 359 /**
AnnaBridge 172:65be27845400 360 * @brief Disable the LPTIM instance
AnnaBridge 172:65be27845400 361 * @rmtoll CR ENABLE LL_LPTIM_Disable
AnnaBridge 172:65be27845400 362 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 363 * @retval None
AnnaBridge 172:65be27845400 364 */
AnnaBridge 172:65be27845400 365 __STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 366 {
AnnaBridge 172:65be27845400 367 CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
AnnaBridge 172:65be27845400 368 }
AnnaBridge 172:65be27845400 369
AnnaBridge 172:65be27845400 370 /**
AnnaBridge 172:65be27845400 371 * @brief Indicates whether the LPTIM instance is enabled.
AnnaBridge 172:65be27845400 372 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
AnnaBridge 172:65be27845400 373 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 374 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 375 */
AnnaBridge 172:65be27845400 376 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 377 {
AnnaBridge 172:65be27845400 378 return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE));
AnnaBridge 172:65be27845400 379 }
AnnaBridge 172:65be27845400 380
AnnaBridge 172:65be27845400 381 /**
AnnaBridge 172:65be27845400 382 * @brief Starts the LPTIM counter in the desired mode.
AnnaBridge 172:65be27845400 383 * @note LPTIM instance must be enabled before starting the counter.
AnnaBridge 172:65be27845400 384 * @note It is possible to change on the fly from One Shot mode to
AnnaBridge 172:65be27845400 385 * Continuous mode.
AnnaBridge 172:65be27845400 386 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
AnnaBridge 172:65be27845400 387 * CR SNGSTRT LL_LPTIM_StartCounter
AnnaBridge 172:65be27845400 388 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 389 * @param OperatingMode This parameter can be one of the following values:
AnnaBridge 172:65be27845400 390 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
AnnaBridge 172:65be27845400 391 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
AnnaBridge 172:65be27845400 392 * @retval None
AnnaBridge 172:65be27845400 393 */
AnnaBridge 172:65be27845400 394 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
AnnaBridge 172:65be27845400 395 {
AnnaBridge 172:65be27845400 396 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
AnnaBridge 172:65be27845400 397 }
AnnaBridge 172:65be27845400 398
AnnaBridge 172:65be27845400 399
AnnaBridge 172:65be27845400 400 /**
AnnaBridge 172:65be27845400 401 * @brief Set the LPTIM registers update mode (enable/disable register preload)
AnnaBridge 172:65be27845400 402 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 403 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
AnnaBridge 172:65be27845400 404 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 405 * @param UpdateMode This parameter can be one of the following values:
AnnaBridge 172:65be27845400 406 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
AnnaBridge 172:65be27845400 407 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
AnnaBridge 172:65be27845400 408 * @retval None
AnnaBridge 172:65be27845400 409 */
AnnaBridge 172:65be27845400 410 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
AnnaBridge 172:65be27845400 411 {
AnnaBridge 172:65be27845400 412 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
AnnaBridge 172:65be27845400 413 }
AnnaBridge 172:65be27845400 414
AnnaBridge 172:65be27845400 415 /**
AnnaBridge 172:65be27845400 416 * @brief Get the LPTIM registers update mode
AnnaBridge 172:65be27845400 417 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
AnnaBridge 172:65be27845400 418 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 419 * @retval Returned value can be one of the following values:
AnnaBridge 172:65be27845400 420 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
AnnaBridge 172:65be27845400 421 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
AnnaBridge 172:65be27845400 422 */
AnnaBridge 172:65be27845400 423 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 424 {
AnnaBridge 172:65be27845400 425 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
AnnaBridge 172:65be27845400 426 }
AnnaBridge 172:65be27845400 427
AnnaBridge 172:65be27845400 428 /**
AnnaBridge 172:65be27845400 429 * @brief Set the auto reload value
AnnaBridge 172:65be27845400 430 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
AnnaBridge 172:65be27845400 431 * @note After a write to the LPTIMx_ARR register a new write operation to the
AnnaBridge 172:65be27845400 432 * same register can only be performed when the previous write operation
AnnaBridge 172:65be27845400 433 * is completed. Any successive write before the ARROK flag be set, will
AnnaBridge 172:65be27845400 434 * lead to unpredictable results.
AnnaBridge 172:65be27845400 435 * @note autoreload value be strictly greater than the compare value.
AnnaBridge 172:65be27845400 436 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
AnnaBridge 172:65be27845400 437 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 438 * @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge 172:65be27845400 439 * @retval None
AnnaBridge 172:65be27845400 440 */
AnnaBridge 172:65be27845400 441 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
AnnaBridge 172:65be27845400 442 {
AnnaBridge 172:65be27845400 443 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
AnnaBridge 172:65be27845400 444 }
AnnaBridge 172:65be27845400 445
AnnaBridge 172:65be27845400 446 /**
AnnaBridge 172:65be27845400 447 * @brief Get actual auto reload value
AnnaBridge 172:65be27845400 448 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
AnnaBridge 172:65be27845400 449 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 450 * @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge 172:65be27845400 451 */
AnnaBridge 172:65be27845400 452 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 453 {
AnnaBridge 172:65be27845400 454 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
AnnaBridge 172:65be27845400 455 }
AnnaBridge 172:65be27845400 456
AnnaBridge 172:65be27845400 457 /**
AnnaBridge 172:65be27845400 458 * @brief Set the compare value
AnnaBridge 172:65be27845400 459 * @note After a write to the LPTIMx_CMP register a new write operation to the
AnnaBridge 172:65be27845400 460 * same register can only be performed when the previous write operation
AnnaBridge 172:65be27845400 461 * is completed. Any successive write before the CMPOK flag be set, will
AnnaBridge 172:65be27845400 462 * lead to unpredictable results.
AnnaBridge 172:65be27845400 463 * @rmtoll CMP CMP LL_LPTIM_SetCompare
AnnaBridge 172:65be27845400 464 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 465 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge 172:65be27845400 466 * @retval None
AnnaBridge 172:65be27845400 467 */
AnnaBridge 172:65be27845400 468 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
AnnaBridge 172:65be27845400 469 {
AnnaBridge 172:65be27845400 470 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
AnnaBridge 172:65be27845400 471 }
AnnaBridge 172:65be27845400 472
AnnaBridge 172:65be27845400 473 /**
AnnaBridge 172:65be27845400 474 * @brief Get actual compare value
AnnaBridge 172:65be27845400 475 * @rmtoll CMP CMP LL_LPTIM_GetCompare
AnnaBridge 172:65be27845400 476 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 477 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge 172:65be27845400 478 */
AnnaBridge 172:65be27845400 479 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 480 {
AnnaBridge 172:65be27845400 481 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
AnnaBridge 172:65be27845400 482 }
AnnaBridge 172:65be27845400 483
AnnaBridge 172:65be27845400 484 /**
AnnaBridge 172:65be27845400 485 * @brief Get actual counter value
AnnaBridge 172:65be27845400 486 * @note When the LPTIM instance is running with an asynchronous clock, reading
AnnaBridge 172:65be27845400 487 * the LPTIMx_CNT register may return unreliable values. So in this case
AnnaBridge 172:65be27845400 488 * it is necessary to perform two consecutive read accesses and verify
AnnaBridge 172:65be27845400 489 * that the two returned values are identical.
AnnaBridge 172:65be27845400 490 * @rmtoll CNT CNT LL_LPTIM_GetCounter
AnnaBridge 172:65be27845400 491 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 492 * @retval Counter value
AnnaBridge 172:65be27845400 493 */
AnnaBridge 172:65be27845400 494 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 495 {
AnnaBridge 172:65be27845400 496 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
AnnaBridge 172:65be27845400 497 }
AnnaBridge 172:65be27845400 498
AnnaBridge 172:65be27845400 499 /**
AnnaBridge 172:65be27845400 500 * @brief Set the counter mode (selection of the LPTIM counter clock source).
AnnaBridge 172:65be27845400 501 * @note The counter mode can be set only when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 502 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
AnnaBridge 172:65be27845400 503 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 504 * @param CounterMode This parameter can be one of the following values:
AnnaBridge 172:65be27845400 505 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
AnnaBridge 172:65be27845400 506 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
AnnaBridge 172:65be27845400 507 * @retval None
AnnaBridge 172:65be27845400 508 */
AnnaBridge 172:65be27845400 509 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
AnnaBridge 172:65be27845400 510 {
AnnaBridge 172:65be27845400 511 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
AnnaBridge 172:65be27845400 512 }
AnnaBridge 172:65be27845400 513
AnnaBridge 172:65be27845400 514 /**
AnnaBridge 172:65be27845400 515 * @brief Get the counter mode
AnnaBridge 172:65be27845400 516 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
AnnaBridge 172:65be27845400 517 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 518 * @retval Returned value can be one of the following values:
AnnaBridge 172:65be27845400 519 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
AnnaBridge 172:65be27845400 520 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
AnnaBridge 172:65be27845400 521 */
AnnaBridge 172:65be27845400 522 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 523 {
AnnaBridge 172:65be27845400 524 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
AnnaBridge 172:65be27845400 525 }
AnnaBridge 172:65be27845400 526
AnnaBridge 172:65be27845400 527 /**
AnnaBridge 172:65be27845400 528 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
AnnaBridge 172:65be27845400 529 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 530 * @note Regarding the LPTIM output polarity the change takes effect
AnnaBridge 172:65be27845400 531 * immediately, so the output default value will change immediately after
AnnaBridge 172:65be27845400 532 * the polarity is re-configured, even before the timer is enabled.
AnnaBridge 172:65be27845400 533 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
AnnaBridge 172:65be27845400 534 * CFGR WAVPOL LL_LPTIM_ConfigOutput
AnnaBridge 172:65be27845400 535 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 536 * @param Waveform This parameter can be one of the following values:
AnnaBridge 172:65be27845400 537 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
AnnaBridge 172:65be27845400 538 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
AnnaBridge 172:65be27845400 539 * @param Polarity This parameter can be one of the following values:
AnnaBridge 172:65be27845400 540 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
AnnaBridge 172:65be27845400 541 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
AnnaBridge 172:65be27845400 542 * @retval None
AnnaBridge 172:65be27845400 543 */
AnnaBridge 172:65be27845400 544 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
AnnaBridge 172:65be27845400 545 {
AnnaBridge 172:65be27845400 546 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
AnnaBridge 172:65be27845400 547 }
AnnaBridge 172:65be27845400 548
AnnaBridge 172:65be27845400 549 /**
AnnaBridge 172:65be27845400 550 * @brief Set waveform shape
AnnaBridge 172:65be27845400 551 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
AnnaBridge 172:65be27845400 552 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 553 * @param Waveform This parameter can be one of the following values:
AnnaBridge 172:65be27845400 554 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
AnnaBridge 172:65be27845400 555 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
AnnaBridge 172:65be27845400 556 * @retval None
AnnaBridge 172:65be27845400 557 */
AnnaBridge 172:65be27845400 558 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
AnnaBridge 172:65be27845400 559 {
AnnaBridge 172:65be27845400 560 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
AnnaBridge 172:65be27845400 561 }
AnnaBridge 172:65be27845400 562
AnnaBridge 172:65be27845400 563 /**
AnnaBridge 172:65be27845400 564 * @brief Get actual waveform shape
AnnaBridge 172:65be27845400 565 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
AnnaBridge 172:65be27845400 566 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 567 * @retval Returned value can be one of the following values:
AnnaBridge 172:65be27845400 568 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
AnnaBridge 172:65be27845400 569 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
AnnaBridge 172:65be27845400 570 */
AnnaBridge 172:65be27845400 571 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 572 {
AnnaBridge 172:65be27845400 573 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
AnnaBridge 172:65be27845400 574 }
AnnaBridge 172:65be27845400 575
AnnaBridge 172:65be27845400 576 /**
AnnaBridge 172:65be27845400 577 * @brief Set output polarity
AnnaBridge 172:65be27845400 578 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
AnnaBridge 172:65be27845400 579 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 580 * @param Polarity This parameter can be one of the following values:
AnnaBridge 172:65be27845400 581 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
AnnaBridge 172:65be27845400 582 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
AnnaBridge 172:65be27845400 583 * @retval None
AnnaBridge 172:65be27845400 584 */
AnnaBridge 172:65be27845400 585 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
AnnaBridge 172:65be27845400 586 {
AnnaBridge 172:65be27845400 587 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
AnnaBridge 172:65be27845400 588 }
AnnaBridge 172:65be27845400 589
AnnaBridge 172:65be27845400 590 /**
AnnaBridge 172:65be27845400 591 * @brief Get actual output polarity
AnnaBridge 172:65be27845400 592 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
AnnaBridge 172:65be27845400 593 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 594 * @retval Returned value can be one of the following values:
AnnaBridge 172:65be27845400 595 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
AnnaBridge 172:65be27845400 596 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
AnnaBridge 172:65be27845400 597 */
AnnaBridge 172:65be27845400 598 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 599 {
AnnaBridge 172:65be27845400 600 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
AnnaBridge 172:65be27845400 601 }
AnnaBridge 172:65be27845400 602
AnnaBridge 172:65be27845400 603 /**
AnnaBridge 172:65be27845400 604 * @brief Set actual prescaler division ratio.
AnnaBridge 172:65be27845400 605 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 606 * @note When the LPTIM is configured to be clocked by an internal clock source
AnnaBridge 172:65be27845400 607 * and the LPTIM counter is configured to be updated by active edges
AnnaBridge 172:65be27845400 608 * detected on the LPTIM external Input1, the internal clock provided to
AnnaBridge 172:65be27845400 609 * the LPTIM must be not be prescaled.
AnnaBridge 172:65be27845400 610 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
AnnaBridge 172:65be27845400 611 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 612 * @param Prescaler This parameter can be one of the following values:
AnnaBridge 172:65be27845400 613 * @arg @ref LL_LPTIM_PRESCALER_DIV1
AnnaBridge 172:65be27845400 614 * @arg @ref LL_LPTIM_PRESCALER_DIV2
AnnaBridge 172:65be27845400 615 * @arg @ref LL_LPTIM_PRESCALER_DIV4
AnnaBridge 172:65be27845400 616 * @arg @ref LL_LPTIM_PRESCALER_DIV8
AnnaBridge 172:65be27845400 617 * @arg @ref LL_LPTIM_PRESCALER_DIV16
AnnaBridge 172:65be27845400 618 * @arg @ref LL_LPTIM_PRESCALER_DIV32
AnnaBridge 172:65be27845400 619 * @arg @ref LL_LPTIM_PRESCALER_DIV64
AnnaBridge 172:65be27845400 620 * @arg @ref LL_LPTIM_PRESCALER_DIV128
AnnaBridge 172:65be27845400 621 * @retval None
AnnaBridge 172:65be27845400 622 */
AnnaBridge 172:65be27845400 623 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
AnnaBridge 172:65be27845400 624 {
AnnaBridge 172:65be27845400 625 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
AnnaBridge 172:65be27845400 626 }
AnnaBridge 172:65be27845400 627
AnnaBridge 172:65be27845400 628 /**
AnnaBridge 172:65be27845400 629 * @brief Get actual prescaler division ratio.
AnnaBridge 172:65be27845400 630 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
AnnaBridge 172:65be27845400 631 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 632 * @retval Returned value can be one of the following values:
AnnaBridge 172:65be27845400 633 * @arg @ref LL_LPTIM_PRESCALER_DIV1
AnnaBridge 172:65be27845400 634 * @arg @ref LL_LPTIM_PRESCALER_DIV2
AnnaBridge 172:65be27845400 635 * @arg @ref LL_LPTIM_PRESCALER_DIV4
AnnaBridge 172:65be27845400 636 * @arg @ref LL_LPTIM_PRESCALER_DIV8
AnnaBridge 172:65be27845400 637 * @arg @ref LL_LPTIM_PRESCALER_DIV16
AnnaBridge 172:65be27845400 638 * @arg @ref LL_LPTIM_PRESCALER_DIV32
AnnaBridge 172:65be27845400 639 * @arg @ref LL_LPTIM_PRESCALER_DIV64
AnnaBridge 172:65be27845400 640 * @arg @ref LL_LPTIM_PRESCALER_DIV128
AnnaBridge 172:65be27845400 641 */
AnnaBridge 172:65be27845400 642 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 643 {
AnnaBridge 172:65be27845400 644 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
AnnaBridge 172:65be27845400 645 }
AnnaBridge 172:65be27845400 646
AnnaBridge 172:65be27845400 647 /**
AnnaBridge 172:65be27845400 648 * @brief Set LPTIM input 1 source (default GPIO).
AnnaBridge 172:65be27845400 649 * @rmtoll OR OR_0 LL_LPTIM_SetInput1Src
AnnaBridge 172:65be27845400 650 * @rmtoll OR OR_1 LL_LPTIM_SetInput1Src
AnnaBridge 172:65be27845400 651 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 652 * @param Src This parameter can be one of the following values:
AnnaBridge 172:65be27845400 653 * @arg @ref LL_LPTIM_INPUT1_SRC_GPIO
AnnaBridge 172:65be27845400 654 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1
AnnaBridge 172:65be27845400 655 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP2
AnnaBridge 172:65be27845400 656 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1_COMP2
AnnaBridge 172:65be27845400 657 * @retval None
AnnaBridge 172:65be27845400 658 */
AnnaBridge 172:65be27845400 659 __STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
AnnaBridge 172:65be27845400 660 {
AnnaBridge 172:65be27845400 661 WRITE_REG(LPTIMx->OR, Src);
AnnaBridge 172:65be27845400 662 }
AnnaBridge 172:65be27845400 663
AnnaBridge 172:65be27845400 664 /**
AnnaBridge 172:65be27845400 665 * @brief Set LPTIM input 2 source (default GPIO).
AnnaBridge 172:65be27845400 666 * @rmtoll OR OR_0 LL_LPTIM_SetInput2Src
AnnaBridge 172:65be27845400 667 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 668 * @param Src This parameter can be one of the following values:
AnnaBridge 172:65be27845400 669 * @arg @ref LL_LPTIM_INPUT2_SRC_GPIO
AnnaBridge 172:65be27845400 670 * @arg @ref LL_LPTIM_INPUT2_SRC_COMP2
AnnaBridge 172:65be27845400 671 * @retval None
AnnaBridge 172:65be27845400 672 */
AnnaBridge 172:65be27845400 673 __STATIC_INLINE void LL_LPTIM_SetInput2Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
AnnaBridge 172:65be27845400 674 {
AnnaBridge 172:65be27845400 675 WRITE_REG(LPTIMx->OR, Src);
AnnaBridge 172:65be27845400 676 }
AnnaBridge 172:65be27845400 677
AnnaBridge 172:65be27845400 678 /**
AnnaBridge 172:65be27845400 679 * @}
AnnaBridge 172:65be27845400 680 */
AnnaBridge 172:65be27845400 681
AnnaBridge 172:65be27845400 682 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
AnnaBridge 172:65be27845400 683 * @{
AnnaBridge 172:65be27845400 684 */
AnnaBridge 172:65be27845400 685
AnnaBridge 172:65be27845400 686 /**
AnnaBridge 172:65be27845400 687 * @brief Enable the timeout function
AnnaBridge 172:65be27845400 688 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 689 * @note The first trigger event will start the timer, any successive trigger
AnnaBridge 172:65be27845400 690 * event will reset the counter and the timer will restart.
AnnaBridge 172:65be27845400 691 * @note The timeout value corresponds to the compare value; if no trigger
AnnaBridge 172:65be27845400 692 * occurs within the expected time frame, the MCU is waked-up by the
AnnaBridge 172:65be27845400 693 * compare match event.
AnnaBridge 172:65be27845400 694 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
AnnaBridge 172:65be27845400 695 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 696 * @retval None
AnnaBridge 172:65be27845400 697 */
AnnaBridge 172:65be27845400 698 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 699 {
AnnaBridge 172:65be27845400 700 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
AnnaBridge 172:65be27845400 701 }
AnnaBridge 172:65be27845400 702
AnnaBridge 172:65be27845400 703 /**
AnnaBridge 172:65be27845400 704 * @brief Disable the timeout function
AnnaBridge 172:65be27845400 705 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 706 * @note A trigger event arriving when the timer is already started will be
AnnaBridge 172:65be27845400 707 * ignored.
AnnaBridge 172:65be27845400 708 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
AnnaBridge 172:65be27845400 709 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 710 * @retval None
AnnaBridge 172:65be27845400 711 */
AnnaBridge 172:65be27845400 712 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 713 {
AnnaBridge 172:65be27845400 714 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
AnnaBridge 172:65be27845400 715 }
AnnaBridge 172:65be27845400 716
AnnaBridge 172:65be27845400 717 /**
AnnaBridge 172:65be27845400 718 * @brief Indicate whether the timeout function is enabled.
AnnaBridge 172:65be27845400 719 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
AnnaBridge 172:65be27845400 720 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 721 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 722 */
AnnaBridge 172:65be27845400 723 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 724 {
AnnaBridge 172:65be27845400 725 return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT));
AnnaBridge 172:65be27845400 726 }
AnnaBridge 172:65be27845400 727
AnnaBridge 172:65be27845400 728 /**
AnnaBridge 172:65be27845400 729 * @brief Start the LPTIM counter
AnnaBridge 172:65be27845400 730 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 731 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
AnnaBridge 172:65be27845400 732 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 733 * @retval None
AnnaBridge 172:65be27845400 734 */
AnnaBridge 172:65be27845400 735 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 736 {
AnnaBridge 172:65be27845400 737 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
AnnaBridge 172:65be27845400 738 }
AnnaBridge 172:65be27845400 739
AnnaBridge 172:65be27845400 740 /**
AnnaBridge 172:65be27845400 741 * @brief Configure the external trigger used as a trigger event for the LPTIM.
AnnaBridge 172:65be27845400 742 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 743 * @note An internal clock source must be present when a digital filter is
AnnaBridge 172:65be27845400 744 * required for the trigger.
AnnaBridge 172:65be27845400 745 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
AnnaBridge 172:65be27845400 746 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
AnnaBridge 172:65be27845400 747 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
AnnaBridge 172:65be27845400 748 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 749 * @param Source This parameter can be one of the following values:
AnnaBridge 172:65be27845400 750 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
AnnaBridge 172:65be27845400 751 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
AnnaBridge 172:65be27845400 752 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
AnnaBridge 172:65be27845400 753 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
AnnaBridge 172:65be27845400 754 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
AnnaBridge 172:65be27845400 755 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
AnnaBridge 172:65be27845400 756 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
AnnaBridge 172:65be27845400 757 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
AnnaBridge 172:65be27845400 758 * @param Filter This parameter can be one of the following values:
AnnaBridge 172:65be27845400 759 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
AnnaBridge 172:65be27845400 760 * @arg @ref LL_LPTIM_TRIG_FILTER_2
AnnaBridge 172:65be27845400 761 * @arg @ref LL_LPTIM_TRIG_FILTER_4
AnnaBridge 172:65be27845400 762 * @arg @ref LL_LPTIM_TRIG_FILTER_8
AnnaBridge 172:65be27845400 763 * @param Polarity This parameter can be one of the following values:
AnnaBridge 172:65be27845400 764 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
AnnaBridge 172:65be27845400 765 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
AnnaBridge 172:65be27845400 766 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
AnnaBridge 172:65be27845400 767 * @retval None
AnnaBridge 172:65be27845400 768 */
AnnaBridge 172:65be27845400 769 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
AnnaBridge 172:65be27845400 770 {
AnnaBridge 172:65be27845400 771 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
AnnaBridge 172:65be27845400 772 }
AnnaBridge 172:65be27845400 773
AnnaBridge 172:65be27845400 774 /**
AnnaBridge 172:65be27845400 775 * @brief Get actual external trigger source.
AnnaBridge 172:65be27845400 776 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
AnnaBridge 172:65be27845400 777 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 778 * @retval Returned value can be one of the following values:
AnnaBridge 172:65be27845400 779 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
AnnaBridge 172:65be27845400 780 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
AnnaBridge 172:65be27845400 781 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
AnnaBridge 172:65be27845400 782 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
AnnaBridge 172:65be27845400 783 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
AnnaBridge 172:65be27845400 784 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
AnnaBridge 172:65be27845400 785 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
AnnaBridge 172:65be27845400 786 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
AnnaBridge 172:65be27845400 787 */
AnnaBridge 172:65be27845400 788 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 789 {
AnnaBridge 172:65be27845400 790 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
AnnaBridge 172:65be27845400 791 }
AnnaBridge 172:65be27845400 792
AnnaBridge 172:65be27845400 793 /**
AnnaBridge 172:65be27845400 794 * @brief Get actual external trigger filter.
AnnaBridge 172:65be27845400 795 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
AnnaBridge 172:65be27845400 796 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 797 * @retval Returned value can be one of the following values:
AnnaBridge 172:65be27845400 798 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
AnnaBridge 172:65be27845400 799 * @arg @ref LL_LPTIM_TRIG_FILTER_2
AnnaBridge 172:65be27845400 800 * @arg @ref LL_LPTIM_TRIG_FILTER_4
AnnaBridge 172:65be27845400 801 * @arg @ref LL_LPTIM_TRIG_FILTER_8
AnnaBridge 172:65be27845400 802 */
AnnaBridge 172:65be27845400 803 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 804 {
AnnaBridge 172:65be27845400 805 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
AnnaBridge 172:65be27845400 806 }
AnnaBridge 172:65be27845400 807
AnnaBridge 172:65be27845400 808 /**
AnnaBridge 172:65be27845400 809 * @brief Get actual external trigger polarity.
AnnaBridge 172:65be27845400 810 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
AnnaBridge 172:65be27845400 811 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 812 * @retval Returned value can be one of the following values:
AnnaBridge 172:65be27845400 813 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
AnnaBridge 172:65be27845400 814 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
AnnaBridge 172:65be27845400 815 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
AnnaBridge 172:65be27845400 816 */
AnnaBridge 172:65be27845400 817 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 818 {
AnnaBridge 172:65be27845400 819 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
AnnaBridge 172:65be27845400 820 }
AnnaBridge 172:65be27845400 821
AnnaBridge 172:65be27845400 822 /**
AnnaBridge 172:65be27845400 823 * @}
AnnaBridge 172:65be27845400 824 */
AnnaBridge 172:65be27845400 825
AnnaBridge 172:65be27845400 826 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
AnnaBridge 172:65be27845400 827 * @{
AnnaBridge 172:65be27845400 828 */
AnnaBridge 172:65be27845400 829
AnnaBridge 172:65be27845400 830 /**
AnnaBridge 172:65be27845400 831 * @brief Set the source of the clock used by the LPTIM instance.
AnnaBridge 172:65be27845400 832 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 833 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
AnnaBridge 172:65be27845400 834 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 835 * @param ClockSource This parameter can be one of the following values:
AnnaBridge 172:65be27845400 836 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
AnnaBridge 172:65be27845400 837 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
AnnaBridge 172:65be27845400 838 * @retval None
AnnaBridge 172:65be27845400 839 */
AnnaBridge 172:65be27845400 840 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
AnnaBridge 172:65be27845400 841 {
AnnaBridge 172:65be27845400 842 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
AnnaBridge 172:65be27845400 843 }
AnnaBridge 172:65be27845400 844
AnnaBridge 172:65be27845400 845 /**
AnnaBridge 172:65be27845400 846 * @brief Get actual LPTIM instance clock source.
AnnaBridge 172:65be27845400 847 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
AnnaBridge 172:65be27845400 848 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 849 * @retval Returned value can be one of the following values:
AnnaBridge 172:65be27845400 850 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
AnnaBridge 172:65be27845400 851 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
AnnaBridge 172:65be27845400 852 */
AnnaBridge 172:65be27845400 853 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 854 {
AnnaBridge 172:65be27845400 855 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
AnnaBridge 172:65be27845400 856 }
AnnaBridge 172:65be27845400 857
AnnaBridge 172:65be27845400 858 /**
AnnaBridge 172:65be27845400 859 * @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
AnnaBridge 172:65be27845400 860 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 861 * @note When both external clock signal edges are considered active ones,
AnnaBridge 172:65be27845400 862 * the LPTIM must also be clocked by an internal clock source with a
AnnaBridge 172:65be27845400 863 * frequency equal to at least four times the external clock frequency.
AnnaBridge 172:65be27845400 864 * @note An internal clock source must be present when a digital filter is
AnnaBridge 172:65be27845400 865 * required for external clock.
AnnaBridge 172:65be27845400 866 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
AnnaBridge 172:65be27845400 867 * CFGR CKPOL LL_LPTIM_ConfigClock
AnnaBridge 172:65be27845400 868 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 869 * @param ClockFilter This parameter can be one of the following values:
AnnaBridge 172:65be27845400 870 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
AnnaBridge 172:65be27845400 871 * @arg @ref LL_LPTIM_CLK_FILTER_2
AnnaBridge 172:65be27845400 872 * @arg @ref LL_LPTIM_CLK_FILTER_4
AnnaBridge 172:65be27845400 873 * @arg @ref LL_LPTIM_CLK_FILTER_8
AnnaBridge 172:65be27845400 874 * @param ClockPolarity This parameter can be one of the following values:
AnnaBridge 172:65be27845400 875 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
AnnaBridge 172:65be27845400 876 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
AnnaBridge 172:65be27845400 877 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
AnnaBridge 172:65be27845400 878 * @retval None
AnnaBridge 172:65be27845400 879 */
AnnaBridge 172:65be27845400 880 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
AnnaBridge 172:65be27845400 881 {
AnnaBridge 172:65be27845400 882 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
AnnaBridge 172:65be27845400 883 }
AnnaBridge 172:65be27845400 884
AnnaBridge 172:65be27845400 885 /**
AnnaBridge 172:65be27845400 886 * @brief Get actual clock polarity
AnnaBridge 172:65be27845400 887 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
AnnaBridge 172:65be27845400 888 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 889 * @retval Returned value can be one of the following values:
AnnaBridge 172:65be27845400 890 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
AnnaBridge 172:65be27845400 891 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
AnnaBridge 172:65be27845400 892 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
AnnaBridge 172:65be27845400 893 */
AnnaBridge 172:65be27845400 894 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 895 {
AnnaBridge 172:65be27845400 896 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
AnnaBridge 172:65be27845400 897 }
AnnaBridge 172:65be27845400 898
AnnaBridge 172:65be27845400 899 /**
AnnaBridge 172:65be27845400 900 * @brief Get actual clock digital filter
AnnaBridge 172:65be27845400 901 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
AnnaBridge 172:65be27845400 902 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 903 * @retval Returned value can be one of the following values:
AnnaBridge 172:65be27845400 904 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
AnnaBridge 172:65be27845400 905 * @arg @ref LL_LPTIM_CLK_FILTER_2
AnnaBridge 172:65be27845400 906 * @arg @ref LL_LPTIM_CLK_FILTER_4
AnnaBridge 172:65be27845400 907 * @arg @ref LL_LPTIM_CLK_FILTER_8
AnnaBridge 172:65be27845400 908 */
AnnaBridge 172:65be27845400 909 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 910 {
AnnaBridge 172:65be27845400 911 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
AnnaBridge 172:65be27845400 912 }
AnnaBridge 172:65be27845400 913
AnnaBridge 172:65be27845400 914 /**
AnnaBridge 172:65be27845400 915 * @}
AnnaBridge 172:65be27845400 916 */
AnnaBridge 172:65be27845400 917
AnnaBridge 172:65be27845400 918 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
AnnaBridge 172:65be27845400 919 * @{
AnnaBridge 172:65be27845400 920 */
AnnaBridge 172:65be27845400 921
AnnaBridge 172:65be27845400 922 /**
AnnaBridge 172:65be27845400 923 * @brief Configure the encoder mode.
AnnaBridge 172:65be27845400 924 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 925 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
AnnaBridge 172:65be27845400 926 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 927 * @param EncoderMode This parameter can be one of the following values:
AnnaBridge 172:65be27845400 928 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
AnnaBridge 172:65be27845400 929 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
AnnaBridge 172:65be27845400 930 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
AnnaBridge 172:65be27845400 931 * @retval None
AnnaBridge 172:65be27845400 932 */
AnnaBridge 172:65be27845400 933 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
AnnaBridge 172:65be27845400 934 {
AnnaBridge 172:65be27845400 935 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
AnnaBridge 172:65be27845400 936 }
AnnaBridge 172:65be27845400 937
AnnaBridge 172:65be27845400 938 /**
AnnaBridge 172:65be27845400 939 * @brief Get actual encoder mode.
AnnaBridge 172:65be27845400 940 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
AnnaBridge 172:65be27845400 941 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 942 * @retval Returned value can be one of the following values:
AnnaBridge 172:65be27845400 943 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
AnnaBridge 172:65be27845400 944 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
AnnaBridge 172:65be27845400 945 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
AnnaBridge 172:65be27845400 946 */
AnnaBridge 172:65be27845400 947 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 948 {
AnnaBridge 172:65be27845400 949 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
AnnaBridge 172:65be27845400 950 }
AnnaBridge 172:65be27845400 951
AnnaBridge 172:65be27845400 952 /**
AnnaBridge 172:65be27845400 953 * @brief Enable the encoder mode
AnnaBridge 172:65be27845400 954 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 955 * @note In this mode the LPTIM instance must be clocked by an internal clock
AnnaBridge 172:65be27845400 956 * source. Also, the prescaler division ratio must be equal to 1.
AnnaBridge 172:65be27845400 957 * @note LPTIM instance must be configured in continuous mode prior enabling
AnnaBridge 172:65be27845400 958 * the encoder mode.
AnnaBridge 172:65be27845400 959 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
AnnaBridge 172:65be27845400 960 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 961 * @retval None
AnnaBridge 172:65be27845400 962 */
AnnaBridge 172:65be27845400 963 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 964 {
AnnaBridge 172:65be27845400 965 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
AnnaBridge 172:65be27845400 966 }
AnnaBridge 172:65be27845400 967
AnnaBridge 172:65be27845400 968 /**
AnnaBridge 172:65be27845400 969 * @brief Disable the encoder mode
AnnaBridge 172:65be27845400 970 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 172:65be27845400 971 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
AnnaBridge 172:65be27845400 972 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 973 * @retval None
AnnaBridge 172:65be27845400 974 */
AnnaBridge 172:65be27845400 975 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 976 {
AnnaBridge 172:65be27845400 977 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
AnnaBridge 172:65be27845400 978 }
AnnaBridge 172:65be27845400 979
AnnaBridge 172:65be27845400 980 /**
AnnaBridge 172:65be27845400 981 * @brief Indicates whether the LPTIM operates in encoder mode.
AnnaBridge 172:65be27845400 982 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
AnnaBridge 172:65be27845400 983 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 984 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 985 */
AnnaBridge 172:65be27845400 986 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 987 {
AnnaBridge 172:65be27845400 988 return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC));
AnnaBridge 172:65be27845400 989 }
AnnaBridge 172:65be27845400 990
AnnaBridge 172:65be27845400 991 /**
AnnaBridge 172:65be27845400 992 * @}
AnnaBridge 172:65be27845400 993 */
AnnaBridge 172:65be27845400 994
AnnaBridge 172:65be27845400 995 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
AnnaBridge 172:65be27845400 996 * @{
AnnaBridge 172:65be27845400 997 */
AnnaBridge 172:65be27845400 998
AnnaBridge 172:65be27845400 999 /**
AnnaBridge 172:65be27845400 1000 * @brief Clear the compare match flag (CMPMCF)
AnnaBridge 172:65be27845400 1001 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM
AnnaBridge 172:65be27845400 1002 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1003 * @retval None
AnnaBridge 172:65be27845400 1004 */
AnnaBridge 172:65be27845400 1005 __STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1006 {
AnnaBridge 172:65be27845400 1007 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
AnnaBridge 172:65be27845400 1008 }
AnnaBridge 172:65be27845400 1009
AnnaBridge 172:65be27845400 1010 /**
AnnaBridge 172:65be27845400 1011 * @brief Inform application whether a compare match interrupt has occurred.
AnnaBridge 172:65be27845400 1012 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
AnnaBridge 172:65be27845400 1013 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1014 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1015 */
AnnaBridge 172:65be27845400 1016 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1017 {
AnnaBridge 172:65be27845400 1018 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM));
AnnaBridge 172:65be27845400 1019 }
AnnaBridge 172:65be27845400 1020
AnnaBridge 172:65be27845400 1021 /**
AnnaBridge 172:65be27845400 1022 * @brief Clear the autoreload match flag (ARRMCF)
AnnaBridge 172:65be27845400 1023 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
AnnaBridge 172:65be27845400 1024 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1025 * @retval None
AnnaBridge 172:65be27845400 1026 */
AnnaBridge 172:65be27845400 1027 __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1028 {
AnnaBridge 172:65be27845400 1029 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
AnnaBridge 172:65be27845400 1030 }
AnnaBridge 172:65be27845400 1031
AnnaBridge 172:65be27845400 1032 /**
AnnaBridge 172:65be27845400 1033 * @brief Inform application whether a autoreload match interrupt has occured.
AnnaBridge 172:65be27845400 1034 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
AnnaBridge 172:65be27845400 1035 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1036 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1037 */
AnnaBridge 172:65be27845400 1038 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1039 {
AnnaBridge 172:65be27845400 1040 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM));
AnnaBridge 172:65be27845400 1041 }
AnnaBridge 172:65be27845400 1042
AnnaBridge 172:65be27845400 1043 /**
AnnaBridge 172:65be27845400 1044 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
AnnaBridge 172:65be27845400 1045 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
AnnaBridge 172:65be27845400 1046 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1047 * @retval None
AnnaBridge 172:65be27845400 1048 */
AnnaBridge 172:65be27845400 1049 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1050 {
AnnaBridge 172:65be27845400 1051 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
AnnaBridge 172:65be27845400 1052 }
AnnaBridge 172:65be27845400 1053
AnnaBridge 172:65be27845400 1054 /**
AnnaBridge 172:65be27845400 1055 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
AnnaBridge 172:65be27845400 1056 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
AnnaBridge 172:65be27845400 1057 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1058 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1059 */
AnnaBridge 172:65be27845400 1060 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1061 {
AnnaBridge 172:65be27845400 1062 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG));
AnnaBridge 172:65be27845400 1063 }
AnnaBridge 172:65be27845400 1064
AnnaBridge 172:65be27845400 1065 /**
AnnaBridge 172:65be27845400 1066 * @brief Clear the compare register update interrupt flag (CMPOKCF).
AnnaBridge 172:65be27845400 1067 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
AnnaBridge 172:65be27845400 1068 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1069 * @retval None
AnnaBridge 172:65be27845400 1070 */
AnnaBridge 172:65be27845400 1071 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1072 {
AnnaBridge 172:65be27845400 1073 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
AnnaBridge 172:65be27845400 1074 }
AnnaBridge 172:65be27845400 1075
AnnaBridge 172:65be27845400 1076 /**
AnnaBridge 172:65be27845400 1077 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated.
AnnaBridge 172:65be27845400 1078 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
AnnaBridge 172:65be27845400 1079 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1080 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1081 */
AnnaBridge 172:65be27845400 1082 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1083 {
AnnaBridge 172:65be27845400 1084 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK));
AnnaBridge 172:65be27845400 1085 }
AnnaBridge 172:65be27845400 1086
AnnaBridge 172:65be27845400 1087 /**
AnnaBridge 172:65be27845400 1088 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
AnnaBridge 172:65be27845400 1089 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
AnnaBridge 172:65be27845400 1090 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1091 * @retval None
AnnaBridge 172:65be27845400 1092 */
AnnaBridge 172:65be27845400 1093 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1094 {
AnnaBridge 172:65be27845400 1095 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
AnnaBridge 172:65be27845400 1096 }
AnnaBridge 172:65be27845400 1097
AnnaBridge 172:65be27845400 1098 /**
AnnaBridge 172:65be27845400 1099 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated.
AnnaBridge 172:65be27845400 1100 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
AnnaBridge 172:65be27845400 1101 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1102 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1103 */
AnnaBridge 172:65be27845400 1104 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1105 {
AnnaBridge 172:65be27845400 1106 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK));
AnnaBridge 172:65be27845400 1107 }
AnnaBridge 172:65be27845400 1108
AnnaBridge 172:65be27845400 1109 /**
AnnaBridge 172:65be27845400 1110 * @brief Clear the counter direction change to up interrupt flag (UPCF).
AnnaBridge 172:65be27845400 1111 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
AnnaBridge 172:65be27845400 1112 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1113 * @retval None
AnnaBridge 172:65be27845400 1114 */
AnnaBridge 172:65be27845400 1115 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1116 {
AnnaBridge 172:65be27845400 1117 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
AnnaBridge 172:65be27845400 1118 }
AnnaBridge 172:65be27845400 1119
AnnaBridge 172:65be27845400 1120 /**
AnnaBridge 172:65be27845400 1121 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
AnnaBridge 172:65be27845400 1122 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
AnnaBridge 172:65be27845400 1123 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1124 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1125 */
AnnaBridge 172:65be27845400 1126 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1127 {
AnnaBridge 172:65be27845400 1128 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP));
AnnaBridge 172:65be27845400 1129 }
AnnaBridge 172:65be27845400 1130
AnnaBridge 172:65be27845400 1131 /**
AnnaBridge 172:65be27845400 1132 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
AnnaBridge 172:65be27845400 1133 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
AnnaBridge 172:65be27845400 1134 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1135 * @retval None
AnnaBridge 172:65be27845400 1136 */
AnnaBridge 172:65be27845400 1137 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1138 {
AnnaBridge 172:65be27845400 1139 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
AnnaBridge 172:65be27845400 1140 }
AnnaBridge 172:65be27845400 1141
AnnaBridge 172:65be27845400 1142 /**
AnnaBridge 172:65be27845400 1143 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
AnnaBridge 172:65be27845400 1144 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
AnnaBridge 172:65be27845400 1145 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1146 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1147 */
AnnaBridge 172:65be27845400 1148 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1149 {
AnnaBridge 172:65be27845400 1150 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN));
AnnaBridge 172:65be27845400 1151 }
AnnaBridge 172:65be27845400 1152
AnnaBridge 172:65be27845400 1153 /**
AnnaBridge 172:65be27845400 1154 * @}
AnnaBridge 172:65be27845400 1155 */
AnnaBridge 172:65be27845400 1156
AnnaBridge 172:65be27845400 1157 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
AnnaBridge 172:65be27845400 1158 * @{
AnnaBridge 172:65be27845400 1159 */
AnnaBridge 172:65be27845400 1160
AnnaBridge 172:65be27845400 1161 /**
AnnaBridge 172:65be27845400 1162 * @brief Enable compare match interrupt (CMPMIE).
AnnaBridge 172:65be27845400 1163 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
AnnaBridge 172:65be27845400 1164 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1165 * @retval None
AnnaBridge 172:65be27845400 1166 */
AnnaBridge 172:65be27845400 1167 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1168 {
AnnaBridge 172:65be27845400 1169 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
AnnaBridge 172:65be27845400 1170 }
AnnaBridge 172:65be27845400 1171
AnnaBridge 172:65be27845400 1172 /**
AnnaBridge 172:65be27845400 1173 * @brief Disable compare match interrupt (CMPMIE).
AnnaBridge 172:65be27845400 1174 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
AnnaBridge 172:65be27845400 1175 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1176 * @retval None
AnnaBridge 172:65be27845400 1177 */
AnnaBridge 172:65be27845400 1178 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1179 {
AnnaBridge 172:65be27845400 1180 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
AnnaBridge 172:65be27845400 1181 }
AnnaBridge 172:65be27845400 1182
AnnaBridge 172:65be27845400 1183 /**
AnnaBridge 172:65be27845400 1184 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
AnnaBridge 172:65be27845400 1185 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
AnnaBridge 172:65be27845400 1186 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1187 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1188 */
AnnaBridge 172:65be27845400 1189 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1190 {
AnnaBridge 172:65be27845400 1191 return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE));
AnnaBridge 172:65be27845400 1192 }
AnnaBridge 172:65be27845400 1193
AnnaBridge 172:65be27845400 1194 /**
AnnaBridge 172:65be27845400 1195 * @brief Enable autoreload match interrupt (ARRMIE).
AnnaBridge 172:65be27845400 1196 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
AnnaBridge 172:65be27845400 1197 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1198 * @retval None
AnnaBridge 172:65be27845400 1199 */
AnnaBridge 172:65be27845400 1200 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1201 {
AnnaBridge 172:65be27845400 1202 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
AnnaBridge 172:65be27845400 1203 }
AnnaBridge 172:65be27845400 1204
AnnaBridge 172:65be27845400 1205 /**
AnnaBridge 172:65be27845400 1206 * @brief Disable autoreload match interrupt (ARRMIE).
AnnaBridge 172:65be27845400 1207 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
AnnaBridge 172:65be27845400 1208 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1209 * @retval None
AnnaBridge 172:65be27845400 1210 */
AnnaBridge 172:65be27845400 1211 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1212 {
AnnaBridge 172:65be27845400 1213 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
AnnaBridge 172:65be27845400 1214 }
AnnaBridge 172:65be27845400 1215
AnnaBridge 172:65be27845400 1216 /**
AnnaBridge 172:65be27845400 1217 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
AnnaBridge 172:65be27845400 1218 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
AnnaBridge 172:65be27845400 1219 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1220 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1221 */
AnnaBridge 172:65be27845400 1222 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1223 {
AnnaBridge 172:65be27845400 1224 return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE));
AnnaBridge 172:65be27845400 1225 }
AnnaBridge 172:65be27845400 1226
AnnaBridge 172:65be27845400 1227 /**
AnnaBridge 172:65be27845400 1228 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
AnnaBridge 172:65be27845400 1229 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
AnnaBridge 172:65be27845400 1230 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1231 * @retval None
AnnaBridge 172:65be27845400 1232 */
AnnaBridge 172:65be27845400 1233 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1234 {
AnnaBridge 172:65be27845400 1235 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
AnnaBridge 172:65be27845400 1236 }
AnnaBridge 172:65be27845400 1237
AnnaBridge 172:65be27845400 1238 /**
AnnaBridge 172:65be27845400 1239 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
AnnaBridge 172:65be27845400 1240 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
AnnaBridge 172:65be27845400 1241 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1242 * @retval None
AnnaBridge 172:65be27845400 1243 */
AnnaBridge 172:65be27845400 1244 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1245 {
AnnaBridge 172:65be27845400 1246 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
AnnaBridge 172:65be27845400 1247 }
AnnaBridge 172:65be27845400 1248
AnnaBridge 172:65be27845400 1249 /**
AnnaBridge 172:65be27845400 1250 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
AnnaBridge 172:65be27845400 1251 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
AnnaBridge 172:65be27845400 1252 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1253 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1254 */
AnnaBridge 172:65be27845400 1255 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1256 {
AnnaBridge 172:65be27845400 1257 return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE));
AnnaBridge 172:65be27845400 1258 }
AnnaBridge 172:65be27845400 1259
AnnaBridge 172:65be27845400 1260 /**
AnnaBridge 172:65be27845400 1261 * @brief Enable compare register write completed interrupt (CMPOKIE).
AnnaBridge 172:65be27845400 1262 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
AnnaBridge 172:65be27845400 1263 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1264 * @retval None
AnnaBridge 172:65be27845400 1265 */
AnnaBridge 172:65be27845400 1266 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1267 {
AnnaBridge 172:65be27845400 1268 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
AnnaBridge 172:65be27845400 1269 }
AnnaBridge 172:65be27845400 1270
AnnaBridge 172:65be27845400 1271 /**
AnnaBridge 172:65be27845400 1272 * @brief Disable compare register write completed interrupt (CMPOKIE).
AnnaBridge 172:65be27845400 1273 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
AnnaBridge 172:65be27845400 1274 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1275 * @retval None
AnnaBridge 172:65be27845400 1276 */
AnnaBridge 172:65be27845400 1277 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1278 {
AnnaBridge 172:65be27845400 1279 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
AnnaBridge 172:65be27845400 1280 }
AnnaBridge 172:65be27845400 1281
AnnaBridge 172:65be27845400 1282 /**
AnnaBridge 172:65be27845400 1283 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
AnnaBridge 172:65be27845400 1284 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
AnnaBridge 172:65be27845400 1285 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1286 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1287 */
AnnaBridge 172:65be27845400 1288 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1289 {
AnnaBridge 172:65be27845400 1290 return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE));
AnnaBridge 172:65be27845400 1291 }
AnnaBridge 172:65be27845400 1292
AnnaBridge 172:65be27845400 1293 /**
AnnaBridge 172:65be27845400 1294 * @brief Enable autoreload register write completed interrupt (ARROKIE).
AnnaBridge 172:65be27845400 1295 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
AnnaBridge 172:65be27845400 1296 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1297 * @retval None
AnnaBridge 172:65be27845400 1298 */
AnnaBridge 172:65be27845400 1299 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1300 {
AnnaBridge 172:65be27845400 1301 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
AnnaBridge 172:65be27845400 1302 }
AnnaBridge 172:65be27845400 1303
AnnaBridge 172:65be27845400 1304 /**
AnnaBridge 172:65be27845400 1305 * @brief Disable autoreload register write completed interrupt (ARROKIE).
AnnaBridge 172:65be27845400 1306 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
AnnaBridge 172:65be27845400 1307 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1308 * @retval None
AnnaBridge 172:65be27845400 1309 */
AnnaBridge 172:65be27845400 1310 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1311 {
AnnaBridge 172:65be27845400 1312 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
AnnaBridge 172:65be27845400 1313 }
AnnaBridge 172:65be27845400 1314
AnnaBridge 172:65be27845400 1315 /**
AnnaBridge 172:65be27845400 1316 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
AnnaBridge 172:65be27845400 1317 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
AnnaBridge 172:65be27845400 1318 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1319 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1320 */
AnnaBridge 172:65be27845400 1321 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1322 {
AnnaBridge 172:65be27845400 1323 return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE));
AnnaBridge 172:65be27845400 1324 }
AnnaBridge 172:65be27845400 1325
AnnaBridge 172:65be27845400 1326 /**
AnnaBridge 172:65be27845400 1327 * @brief Enable direction change to up interrupt (UPIE).
AnnaBridge 172:65be27845400 1328 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
AnnaBridge 172:65be27845400 1329 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1330 * @retval None
AnnaBridge 172:65be27845400 1331 */
AnnaBridge 172:65be27845400 1332 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1333 {
AnnaBridge 172:65be27845400 1334 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
AnnaBridge 172:65be27845400 1335 }
AnnaBridge 172:65be27845400 1336
AnnaBridge 172:65be27845400 1337 /**
AnnaBridge 172:65be27845400 1338 * @brief Disable direction change to up interrupt (UPIE).
AnnaBridge 172:65be27845400 1339 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
AnnaBridge 172:65be27845400 1340 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1341 * @retval None
AnnaBridge 172:65be27845400 1342 */
AnnaBridge 172:65be27845400 1343 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1344 {
AnnaBridge 172:65be27845400 1345 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
AnnaBridge 172:65be27845400 1346 }
AnnaBridge 172:65be27845400 1347
AnnaBridge 172:65be27845400 1348 /**
AnnaBridge 172:65be27845400 1349 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
AnnaBridge 172:65be27845400 1350 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
AnnaBridge 172:65be27845400 1351 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1352 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1353 */
AnnaBridge 172:65be27845400 1354 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1355 {
AnnaBridge 172:65be27845400 1356 return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE));
AnnaBridge 172:65be27845400 1357 }
AnnaBridge 172:65be27845400 1358
AnnaBridge 172:65be27845400 1359 /**
AnnaBridge 172:65be27845400 1360 * @brief Enable direction change to down interrupt (DOWNIE).
AnnaBridge 172:65be27845400 1361 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
AnnaBridge 172:65be27845400 1362 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1363 * @retval None
AnnaBridge 172:65be27845400 1364 */
AnnaBridge 172:65be27845400 1365 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1366 {
AnnaBridge 172:65be27845400 1367 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
AnnaBridge 172:65be27845400 1368 }
AnnaBridge 172:65be27845400 1369
AnnaBridge 172:65be27845400 1370 /**
AnnaBridge 172:65be27845400 1371 * @brief Disable direction change to down interrupt (DOWNIE).
AnnaBridge 172:65be27845400 1372 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
AnnaBridge 172:65be27845400 1373 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1374 * @retval None
AnnaBridge 172:65be27845400 1375 */
AnnaBridge 172:65be27845400 1376 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1377 {
AnnaBridge 172:65be27845400 1378 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
AnnaBridge 172:65be27845400 1379 }
AnnaBridge 172:65be27845400 1380
AnnaBridge 172:65be27845400 1381 /**
AnnaBridge 172:65be27845400 1382 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
AnnaBridge 172:65be27845400 1383 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
AnnaBridge 172:65be27845400 1384 * @param LPTIMx Low-Power Timer instance
AnnaBridge 172:65be27845400 1385 * @retval State of bit (1 or 0).
AnnaBridge 172:65be27845400 1386 */
AnnaBridge 172:65be27845400 1387 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge 172:65be27845400 1388 {
AnnaBridge 172:65be27845400 1389 return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE));
AnnaBridge 172:65be27845400 1390 }
AnnaBridge 172:65be27845400 1391
AnnaBridge 172:65be27845400 1392 /**
AnnaBridge 172:65be27845400 1393 * @}
AnnaBridge 172:65be27845400 1394 */
AnnaBridge 172:65be27845400 1395
AnnaBridge 172:65be27845400 1396 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 172:65be27845400 1397 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
AnnaBridge 172:65be27845400 1398 * @{
AnnaBridge 172:65be27845400 1399 */
AnnaBridge 172:65be27845400 1400
AnnaBridge 172:65be27845400 1401 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
AnnaBridge 172:65be27845400 1402 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
AnnaBridge 172:65be27845400 1403 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
AnnaBridge 172:65be27845400 1404 /**
AnnaBridge 172:65be27845400 1405 * @}
AnnaBridge 172:65be27845400 1406 */
AnnaBridge 172:65be27845400 1407 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 172:65be27845400 1408
AnnaBridge 172:65be27845400 1409 /**
AnnaBridge 172:65be27845400 1410 * @}
AnnaBridge 172:65be27845400 1411 */
AnnaBridge 172:65be27845400 1412
AnnaBridge 172:65be27845400 1413 /**
AnnaBridge 172:65be27845400 1414 * @}
AnnaBridge 172:65be27845400 1415 */
AnnaBridge 172:65be27845400 1416
AnnaBridge 172:65be27845400 1417 #endif /* LPTIM1 || LPTIM2 */
AnnaBridge 172:65be27845400 1418
AnnaBridge 172:65be27845400 1419 /**
AnnaBridge 172:65be27845400 1420 * @}
AnnaBridge 172:65be27845400 1421 */
AnnaBridge 172:65be27845400 1422
AnnaBridge 172:65be27845400 1423 #ifdef __cplusplus
AnnaBridge 172:65be27845400 1424 }
AnnaBridge 172:65be27845400 1425 #endif
AnnaBridge 172:65be27845400 1426
AnnaBridge 172:65be27845400 1427 #endif /* __STM32L4xx_LL_LPTIM_H */
AnnaBridge 172:65be27845400 1428
AnnaBridge 172:65be27845400 1429 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/