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TARGET_NUCLEO_L4R5ZI_P/TOOLCHAIN_ARM_STD/stm32l4xx_hal_sram.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:65be27845400 1 /**
AnnaBridge 172:65be27845400 2 ******************************************************************************
AnnaBridge 172:65be27845400 3 * @file stm32l4xx_hal_sram.h
AnnaBridge 172:65be27845400 4 * @author MCD Application Team
AnnaBridge 172:65be27845400 5 * @brief Header file of SRAM HAL module.
AnnaBridge 172:65be27845400 6 ******************************************************************************
AnnaBridge 172:65be27845400 7 * @attention
AnnaBridge 172:65be27845400 8 *
AnnaBridge 172:65be27845400 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 172:65be27845400 10 *
AnnaBridge 172:65be27845400 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 172:65be27845400 12 * are permitted provided that the following conditions are met:
AnnaBridge 172:65be27845400 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 172:65be27845400 14 * this list of conditions and the following disclaimer.
AnnaBridge 172:65be27845400 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 172:65be27845400 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 172:65be27845400 17 * and/or other materials provided with the distribution.
AnnaBridge 172:65be27845400 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 172:65be27845400 19 * may be used to endorse or promote products derived from this software
AnnaBridge 172:65be27845400 20 * without specific prior written permission.
AnnaBridge 172:65be27845400 21 *
AnnaBridge 172:65be27845400 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 172:65be27845400 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 172:65be27845400 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 172:65be27845400 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 172:65be27845400 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 172:65be27845400 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 172:65be27845400 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 172:65be27845400 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 172:65be27845400 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 172:65be27845400 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 172:65be27845400 32 *
AnnaBridge 172:65be27845400 33 ******************************************************************************
AnnaBridge 172:65be27845400 34 */
AnnaBridge 172:65be27845400 35
AnnaBridge 172:65be27845400 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 172:65be27845400 37 #ifndef __STM32L4xx_HAL_SRAM_H
AnnaBridge 172:65be27845400 38 #define __STM32L4xx_HAL_SRAM_H
AnnaBridge 172:65be27845400 39
AnnaBridge 172:65be27845400 40 #ifdef __cplusplus
AnnaBridge 172:65be27845400 41 extern "C" {
AnnaBridge 172:65be27845400 42 #endif
AnnaBridge 172:65be27845400 43
AnnaBridge 172:65be27845400 44 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
AnnaBridge 172:65be27845400 45 defined(STM32L496xx) || defined(STM32L4A6xx) || \
AnnaBridge 172:65be27845400 46 defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
AnnaBridge 172:65be27845400 47
AnnaBridge 172:65be27845400 48 /* Includes ------------------------------------------------------------------*/
AnnaBridge 172:65be27845400 49 #include "stm32l4xx_ll_fmc.h"
AnnaBridge 172:65be27845400 50
AnnaBridge 172:65be27845400 51 /** @addtogroup STM32L4xx_HAL_Driver
AnnaBridge 172:65be27845400 52 * @{
AnnaBridge 172:65be27845400 53 */
AnnaBridge 172:65be27845400 54
AnnaBridge 172:65be27845400 55 /** @addtogroup SRAM
AnnaBridge 172:65be27845400 56 * @{
AnnaBridge 172:65be27845400 57 */
AnnaBridge 172:65be27845400 58
AnnaBridge 172:65be27845400 59 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 172:65be27845400 60
AnnaBridge 172:65be27845400 61 /** @defgroup SRAM_Exported_Types SRAM Exported Types
AnnaBridge 172:65be27845400 62 * @{
AnnaBridge 172:65be27845400 63 */
AnnaBridge 172:65be27845400 64 /**
AnnaBridge 172:65be27845400 65 * @brief HAL SRAM State structures definition
AnnaBridge 172:65be27845400 66 */
AnnaBridge 172:65be27845400 67 typedef enum
AnnaBridge 172:65be27845400 68 {
AnnaBridge 172:65be27845400 69 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
AnnaBridge 172:65be27845400 70 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
AnnaBridge 172:65be27845400 71 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
AnnaBridge 172:65be27845400 72 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
AnnaBridge 172:65be27845400 73 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
AnnaBridge 172:65be27845400 74
AnnaBridge 172:65be27845400 75 }HAL_SRAM_StateTypeDef;
AnnaBridge 172:65be27845400 76
AnnaBridge 172:65be27845400 77 /**
AnnaBridge 172:65be27845400 78 * @brief SRAM handle Structure definition
AnnaBridge 172:65be27845400 79 */
AnnaBridge 172:65be27845400 80 typedef struct
AnnaBridge 172:65be27845400 81 {
AnnaBridge 172:65be27845400 82 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
AnnaBridge 172:65be27845400 83
AnnaBridge 172:65be27845400 84 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
AnnaBridge 172:65be27845400 85
AnnaBridge 172:65be27845400 86 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
AnnaBridge 172:65be27845400 87
AnnaBridge 172:65be27845400 88 HAL_LockTypeDef Lock; /*!< SRAM locking object */
AnnaBridge 172:65be27845400 89
AnnaBridge 172:65be27845400 90 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
AnnaBridge 172:65be27845400 91
AnnaBridge 172:65be27845400 92 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
AnnaBridge 172:65be27845400 93
AnnaBridge 172:65be27845400 94 }SRAM_HandleTypeDef;
AnnaBridge 172:65be27845400 95
AnnaBridge 172:65be27845400 96 /**
AnnaBridge 172:65be27845400 97 * @}
AnnaBridge 172:65be27845400 98 */
AnnaBridge 172:65be27845400 99
AnnaBridge 172:65be27845400 100 /* Exported constants --------------------------------------------------------*/
AnnaBridge 172:65be27845400 101 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 102
AnnaBridge 172:65be27845400 103 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
AnnaBridge 172:65be27845400 104 * @{
AnnaBridge 172:65be27845400 105 */
AnnaBridge 172:65be27845400 106
AnnaBridge 172:65be27845400 107 /** @brief Reset SRAM handle state.
AnnaBridge 172:65be27845400 108 * @param __HANDLE__: SRAM handle
AnnaBridge 172:65be27845400 109 * @retval None
AnnaBridge 172:65be27845400 110 */
AnnaBridge 172:65be27845400 111 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
AnnaBridge 172:65be27845400 112
AnnaBridge 172:65be27845400 113 /**
AnnaBridge 172:65be27845400 114 * @}
AnnaBridge 172:65be27845400 115 */
AnnaBridge 172:65be27845400 116
AnnaBridge 172:65be27845400 117 /* Exported functions --------------------------------------------------------*/
AnnaBridge 172:65be27845400 118 /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
AnnaBridge 172:65be27845400 119 * @{
AnnaBridge 172:65be27845400 120 */
AnnaBridge 172:65be27845400 121
AnnaBridge 172:65be27845400 122 /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 172:65be27845400 123 * @{
AnnaBridge 172:65be27845400 124 */
AnnaBridge 172:65be27845400 125
AnnaBridge 172:65be27845400 126 /* Initialization/de-initialization functions ********************************/
AnnaBridge 172:65be27845400 127 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
AnnaBridge 172:65be27845400 128 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
AnnaBridge 172:65be27845400 129 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
AnnaBridge 172:65be27845400 130 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
AnnaBridge 172:65be27845400 131
AnnaBridge 172:65be27845400 132 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 172:65be27845400 133 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 172:65be27845400 134
AnnaBridge 172:65be27845400 135 /**
AnnaBridge 172:65be27845400 136 * @}
AnnaBridge 172:65be27845400 137 */
AnnaBridge 172:65be27845400 138
AnnaBridge 172:65be27845400 139 /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
AnnaBridge 172:65be27845400 140 * @{
AnnaBridge 172:65be27845400 141 */
AnnaBridge 172:65be27845400 142
AnnaBridge 172:65be27845400 143 /* I/O operation functions ***************************************************/
AnnaBridge 172:65be27845400 144 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 172:65be27845400 145 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 172:65be27845400 146 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 172:65be27845400 147 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 172:65be27845400 148 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 172:65be27845400 149 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 172:65be27845400 150 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 172:65be27845400 151 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 172:65be27845400 152
AnnaBridge 172:65be27845400 153 /**
AnnaBridge 172:65be27845400 154 * @}
AnnaBridge 172:65be27845400 155 */
AnnaBridge 172:65be27845400 156
AnnaBridge 172:65be27845400 157 /** @addtogroup SRAM_Exported_Functions_Group3 Control functions
AnnaBridge 172:65be27845400 158 * @{
AnnaBridge 172:65be27845400 159 */
AnnaBridge 172:65be27845400 160
AnnaBridge 172:65be27845400 161 /* SRAM Control functions ****************************************************/
AnnaBridge 172:65be27845400 162 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
AnnaBridge 172:65be27845400 163 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
AnnaBridge 172:65be27845400 164
AnnaBridge 172:65be27845400 165 /**
AnnaBridge 172:65be27845400 166 * @}
AnnaBridge 172:65be27845400 167 */
AnnaBridge 172:65be27845400 168
AnnaBridge 172:65be27845400 169 /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
AnnaBridge 172:65be27845400 170 * @{
AnnaBridge 172:65be27845400 171 */
AnnaBridge 172:65be27845400 172
AnnaBridge 172:65be27845400 173 /* SRAM Peripheral State functions ********************************************/
AnnaBridge 172:65be27845400 174 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
AnnaBridge 172:65be27845400 175
AnnaBridge 172:65be27845400 176 /**
AnnaBridge 172:65be27845400 177 * @}
AnnaBridge 172:65be27845400 178 */
AnnaBridge 172:65be27845400 179
AnnaBridge 172:65be27845400 180 /**
AnnaBridge 172:65be27845400 181 * @}
AnnaBridge 172:65be27845400 182 */
AnnaBridge 172:65be27845400 183
AnnaBridge 172:65be27845400 184 /**
AnnaBridge 172:65be27845400 185 * @}
AnnaBridge 172:65be27845400 186 */
AnnaBridge 172:65be27845400 187
AnnaBridge 172:65be27845400 188 /**
AnnaBridge 172:65be27845400 189 * @}
AnnaBridge 172:65be27845400 190 */
AnnaBridge 172:65be27845400 191
AnnaBridge 172:65be27845400 192 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
AnnaBridge 172:65be27845400 193 /* STM32L496xx || STM32L4A6xx || */
AnnaBridge 172:65be27845400 194 /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
AnnaBridge 172:65be27845400 195
AnnaBridge 172:65be27845400 196 #ifdef __cplusplus
AnnaBridge 172:65be27845400 197 }
AnnaBridge 172:65be27845400 198 #endif
AnnaBridge 172:65be27845400 199
AnnaBridge 172:65be27845400 200 #endif /* __STM32L4xx_HAL_SRAM_H */
AnnaBridge 172:65be27845400 201
AnnaBridge 172:65be27845400 202 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/