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TARGET_NUCLEO_L4R5ZI_P/TOOLCHAIN_ARM_STD/stm32l4xx_hal_sd.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:65be27845400 1 /**
AnnaBridge 172:65be27845400 2 ******************************************************************************
AnnaBridge 172:65be27845400 3 * @file stm32l4xx_hal_sd.h
AnnaBridge 172:65be27845400 4 * @author MCD Application Team
AnnaBridge 172:65be27845400 5 * @brief Header file of SD HAL module.
AnnaBridge 172:65be27845400 6 ******************************************************************************
AnnaBridge 172:65be27845400 7 * @attention
AnnaBridge 172:65be27845400 8 *
AnnaBridge 172:65be27845400 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 172:65be27845400 10 *
AnnaBridge 172:65be27845400 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 172:65be27845400 12 * are permitted provided that the following conditions are met:
AnnaBridge 172:65be27845400 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 172:65be27845400 14 * this list of conditions and the following disclaimer.
AnnaBridge 172:65be27845400 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 172:65be27845400 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 172:65be27845400 17 * and/or other materials provided with the distribution.
AnnaBridge 172:65be27845400 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 172:65be27845400 19 * may be used to endorse or promote products derived from this software
AnnaBridge 172:65be27845400 20 * without specific prior written permission.
AnnaBridge 172:65be27845400 21 *
AnnaBridge 172:65be27845400 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 172:65be27845400 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 172:65be27845400 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 172:65be27845400 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 172:65be27845400 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 172:65be27845400 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 172:65be27845400 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 172:65be27845400 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 172:65be27845400 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 172:65be27845400 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 172:65be27845400 32 *
AnnaBridge 172:65be27845400 33 ******************************************************************************
AnnaBridge 172:65be27845400 34 */
AnnaBridge 172:65be27845400 35
AnnaBridge 172:65be27845400 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 172:65be27845400 37 #ifndef __STM32L4xx_HAL_SD_H
AnnaBridge 172:65be27845400 38 #define __STM32L4xx_HAL_SD_H
AnnaBridge 172:65be27845400 39
AnnaBridge 172:65be27845400 40 #ifdef __cplusplus
AnnaBridge 172:65be27845400 41 extern "C" {
AnnaBridge 172:65be27845400 42 #endif
AnnaBridge 172:65be27845400 43
AnnaBridge 172:65be27845400 44 #if defined(SDMMC1)
AnnaBridge 172:65be27845400 45
AnnaBridge 172:65be27845400 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 172:65be27845400 47 #include "stm32l4xx_ll_sdmmc.h"
AnnaBridge 172:65be27845400 48
AnnaBridge 172:65be27845400 49 /** @addtogroup STM32L4xx_HAL_Driver
AnnaBridge 172:65be27845400 50 * @{
AnnaBridge 172:65be27845400 51 */
AnnaBridge 172:65be27845400 52
AnnaBridge 172:65be27845400 53 /** @addtogroup SD
AnnaBridge 172:65be27845400 54 * @{
AnnaBridge 172:65be27845400 55 */
AnnaBridge 172:65be27845400 56
AnnaBridge 172:65be27845400 57 /* Exported types ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 58 /** @defgroup SD_Exported_Types SD Exported Types
AnnaBridge 172:65be27845400 59 * @{
AnnaBridge 172:65be27845400 60 */
AnnaBridge 172:65be27845400 61
AnnaBridge 172:65be27845400 62 /** @defgroup SD_Exported_Types_Group1 SD State enumeration structure
AnnaBridge 172:65be27845400 63 * @{
AnnaBridge 172:65be27845400 64 */
AnnaBridge 172:65be27845400 65 typedef enum
AnnaBridge 172:65be27845400 66 {
AnnaBridge 172:65be27845400 67 HAL_SD_STATE_RESET = ((uint32_t)0x00000000U), /*!< SD not yet initialized or disabled */
AnnaBridge 172:65be27845400 68 HAL_SD_STATE_READY = ((uint32_t)0x00000001U), /*!< SD initialized and ready for use */
AnnaBridge 172:65be27845400 69 HAL_SD_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< SD Timeout state */
AnnaBridge 172:65be27845400 70 HAL_SD_STATE_BUSY = ((uint32_t)0x00000003U), /*!< SD process ongoing */
AnnaBridge 172:65be27845400 71 HAL_SD_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< SD Programming State */
AnnaBridge 172:65be27845400 72 HAL_SD_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< SD Receiving State */
AnnaBridge 172:65be27845400 73 HAL_SD_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< SD Transfert State */
AnnaBridge 172:65be27845400 74 HAL_SD_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< SD is in error state */
AnnaBridge 172:65be27845400 75 }HAL_SD_StateTypeDef;
AnnaBridge 172:65be27845400 76 /**
AnnaBridge 172:65be27845400 77 * @}
AnnaBridge 172:65be27845400 78 */
AnnaBridge 172:65be27845400 79
AnnaBridge 172:65be27845400 80 /** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure
AnnaBridge 172:65be27845400 81 * @{
AnnaBridge 172:65be27845400 82 */
AnnaBridge 172:65be27845400 83 typedef enum
AnnaBridge 172:65be27845400 84 {
AnnaBridge 172:65be27845400 85 HAL_SD_CARD_READY = ((uint32_t)0x00000001U), /*!< Card state is ready */
AnnaBridge 172:65be27845400 86 HAL_SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002U), /*!< Card is in identification state */
AnnaBridge 172:65be27845400 87 HAL_SD_CARD_STANDBY = ((uint32_t)0x00000003U), /*!< Card is in standby state */
AnnaBridge 172:65be27845400 88 HAL_SD_CARD_TRANSFER = ((uint32_t)0x00000004U), /*!< Card is in transfer state */
AnnaBridge 172:65be27845400 89 HAL_SD_CARD_SENDING = ((uint32_t)0x00000005U), /*!< Card is sending an operation */
AnnaBridge 172:65be27845400 90 HAL_SD_CARD_RECEIVING = ((uint32_t)0x00000006U), /*!< Card is receiving operation information */
AnnaBridge 172:65be27845400 91 HAL_SD_CARD_PROGRAMMING = ((uint32_t)0x00000007U), /*!< Card is in programming state */
AnnaBridge 172:65be27845400 92 HAL_SD_CARD_DISCONNECTED = ((uint32_t)0x00000008U), /*!< Card is disconnected */
AnnaBridge 172:65be27845400 93 HAL_SD_CARD_ERROR = ((uint32_t)0x000000FFU) /*!< Card response Error */
AnnaBridge 172:65be27845400 94 }HAL_SD_CardStateTypedef;
AnnaBridge 172:65be27845400 95 /**
AnnaBridge 172:65be27845400 96 * @}
AnnaBridge 172:65be27845400 97 */
AnnaBridge 172:65be27845400 98
AnnaBridge 172:65be27845400 99 /** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition
AnnaBridge 172:65be27845400 100 * @{
AnnaBridge 172:65be27845400 101 */
AnnaBridge 172:65be27845400 102 #define SD_InitTypeDef SDMMC_InitTypeDef
AnnaBridge 172:65be27845400 103 #define SD_TypeDef SDMMC_TypeDef
AnnaBridge 172:65be27845400 104
AnnaBridge 172:65be27845400 105 /**
AnnaBridge 172:65be27845400 106 * @brief SD Card Information Structure definition
AnnaBridge 172:65be27845400 107 */
AnnaBridge 172:65be27845400 108 typedef struct
AnnaBridge 172:65be27845400 109 {
AnnaBridge 172:65be27845400 110 uint32_t CardType; /*!< Specifies the card Type */
AnnaBridge 172:65be27845400 111
AnnaBridge 172:65be27845400 112 uint32_t CardVersion; /*!< Specifies the card version */
AnnaBridge 172:65be27845400 113
AnnaBridge 172:65be27845400 114 uint32_t Class; /*!< Specifies the class of the card class */
AnnaBridge 172:65be27845400 115
AnnaBridge 172:65be27845400 116 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */
AnnaBridge 172:65be27845400 117
AnnaBridge 172:65be27845400 118 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */
AnnaBridge 172:65be27845400 119
AnnaBridge 172:65be27845400 120 uint32_t BlockSize; /*!< Specifies one block size in bytes */
AnnaBridge 172:65be27845400 121
AnnaBridge 172:65be27845400 122 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */
AnnaBridge 172:65be27845400 123
AnnaBridge 172:65be27845400 124 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */
AnnaBridge 172:65be27845400 125
AnnaBridge 172:65be27845400 126 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
AnnaBridge 172:65be27845400 127
AnnaBridge 172:65be27845400 128 uint32_t CardSpeed; /*!< Specifies the card Speed */
AnnaBridge 172:65be27845400 129
AnnaBridge 172:65be27845400 130 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
AnnaBridge 172:65be27845400 131 }HAL_SD_CardInfoTypeDef;
AnnaBridge 172:65be27845400 132
AnnaBridge 172:65be27845400 133 /**
AnnaBridge 172:65be27845400 134 * @brief SD handle Structure definition
AnnaBridge 172:65be27845400 135 */
AnnaBridge 172:65be27845400 136 typedef struct
AnnaBridge 172:65be27845400 137 {
AnnaBridge 172:65be27845400 138 SD_TypeDef *Instance; /*!< SD registers base address */
AnnaBridge 172:65be27845400 139
AnnaBridge 172:65be27845400 140 SD_InitTypeDef Init; /*!< SD required parameters */
AnnaBridge 172:65be27845400 141
AnnaBridge 172:65be27845400 142 HAL_LockTypeDef Lock; /*!< SD locking object */
AnnaBridge 172:65be27845400 143
AnnaBridge 172:65be27845400 144 uint32_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */
AnnaBridge 172:65be27845400 145
AnnaBridge 172:65be27845400 146 uint32_t TxXferSize; /*!< SD Tx Transfer size */
AnnaBridge 172:65be27845400 147
AnnaBridge 172:65be27845400 148 uint32_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */
AnnaBridge 172:65be27845400 149
AnnaBridge 172:65be27845400 150 uint32_t RxXferSize; /*!< SD Rx Transfer size */
AnnaBridge 172:65be27845400 151
AnnaBridge 172:65be27845400 152 __IO uint32_t Context; /*!< SD transfer context */
AnnaBridge 172:65be27845400 153
AnnaBridge 172:65be27845400 154 __IO HAL_SD_StateTypeDef State; /*!< SD card State */
AnnaBridge 172:65be27845400 155
AnnaBridge 172:65be27845400 156 __IO uint32_t ErrorCode; /*!< SD Card Error codes */
AnnaBridge 172:65be27845400 157
AnnaBridge 172:65be27845400 158 #if !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
AnnaBridge 172:65be27845400 159
AnnaBridge 172:65be27845400 160 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
AnnaBridge 172:65be27845400 161
AnnaBridge 172:65be27845400 162 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
AnnaBridge 172:65be27845400 163
AnnaBridge 172:65be27845400 164 #endif /* !STM32L4R5xx && !STM32L4R7xx && !STM32L4R9xx && !STM32L4S5xx && !STM32L4S7xx && !STM32L4S9xx */
AnnaBridge 172:65be27845400 165 HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */
AnnaBridge 172:65be27845400 166
AnnaBridge 172:65be27845400 167 uint32_t CSD[4]; /*!< SD card specific data table */
AnnaBridge 172:65be27845400 168
AnnaBridge 172:65be27845400 169 uint32_t CID[4]; /*!< SD card identification number table */
AnnaBridge 172:65be27845400 170
AnnaBridge 172:65be27845400 171 }SD_HandleTypeDef;
AnnaBridge 172:65be27845400 172
AnnaBridge 172:65be27845400 173 /**
AnnaBridge 172:65be27845400 174 * @}
AnnaBridge 172:65be27845400 175 */
AnnaBridge 172:65be27845400 176
AnnaBridge 172:65be27845400 177 /** @defgroup SD_Exported_Types_Group4 Card Specific Data: CSD Register
AnnaBridge 172:65be27845400 178 * @{
AnnaBridge 172:65be27845400 179 */
AnnaBridge 172:65be27845400 180 typedef struct
AnnaBridge 172:65be27845400 181 {
AnnaBridge 172:65be27845400 182 __IO uint8_t CSDStruct; /*!< CSD structure */
AnnaBridge 172:65be27845400 183 __IO uint8_t SysSpecVersion; /*!< System specification version */
AnnaBridge 172:65be27845400 184 __IO uint8_t Reserved1; /*!< Reserved */
AnnaBridge 172:65be27845400 185 __IO uint8_t TAAC; /*!< Data read access time 1 */
AnnaBridge 172:65be27845400 186 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
AnnaBridge 172:65be27845400 187 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
AnnaBridge 172:65be27845400 188 __IO uint16_t CardComdClasses; /*!< Card command classes */
AnnaBridge 172:65be27845400 189 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
AnnaBridge 172:65be27845400 190 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
AnnaBridge 172:65be27845400 191 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
AnnaBridge 172:65be27845400 192 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
AnnaBridge 172:65be27845400 193 __IO uint8_t DSRImpl; /*!< DSR implemented */
AnnaBridge 172:65be27845400 194 __IO uint8_t Reserved2; /*!< Reserved */
AnnaBridge 172:65be27845400 195 __IO uint32_t DeviceSize; /*!< Device Size */
AnnaBridge 172:65be27845400 196 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
AnnaBridge 172:65be27845400 197 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
AnnaBridge 172:65be27845400 198 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
AnnaBridge 172:65be27845400 199 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
AnnaBridge 172:65be27845400 200 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
AnnaBridge 172:65be27845400 201 __IO uint8_t EraseGrSize; /*!< Erase group size */
AnnaBridge 172:65be27845400 202 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
AnnaBridge 172:65be27845400 203 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
AnnaBridge 172:65be27845400 204 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
AnnaBridge 172:65be27845400 205 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
AnnaBridge 172:65be27845400 206 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
AnnaBridge 172:65be27845400 207 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
AnnaBridge 172:65be27845400 208 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
AnnaBridge 172:65be27845400 209 __IO uint8_t Reserved3; /*!< Reserved */
AnnaBridge 172:65be27845400 210 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
AnnaBridge 172:65be27845400 211 __IO uint8_t FileFormatGrouop; /*!< File format group */
AnnaBridge 172:65be27845400 212 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
AnnaBridge 172:65be27845400 213 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
AnnaBridge 172:65be27845400 214 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
AnnaBridge 172:65be27845400 215 __IO uint8_t FileFormat; /*!< File format */
AnnaBridge 172:65be27845400 216 __IO uint8_t ECC; /*!< ECC code */
AnnaBridge 172:65be27845400 217 __IO uint8_t CSD_CRC; /*!< CSD CRC */
AnnaBridge 172:65be27845400 218 __IO uint8_t Reserved4; /*!< Always 1 */
AnnaBridge 172:65be27845400 219
AnnaBridge 172:65be27845400 220 }HAL_SD_CardCSDTypedef;
AnnaBridge 172:65be27845400 221 /**
AnnaBridge 172:65be27845400 222 * @}
AnnaBridge 172:65be27845400 223 */
AnnaBridge 172:65be27845400 224
AnnaBridge 172:65be27845400 225 /** @defgroup SD_Exported_Types_Group5 Card Identification Data: CID Register
AnnaBridge 172:65be27845400 226 * @{
AnnaBridge 172:65be27845400 227 */
AnnaBridge 172:65be27845400 228 typedef struct
AnnaBridge 172:65be27845400 229 {
AnnaBridge 172:65be27845400 230 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
AnnaBridge 172:65be27845400 231 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
AnnaBridge 172:65be27845400 232 __IO uint32_t ProdName1; /*!< Product Name part1 */
AnnaBridge 172:65be27845400 233 __IO uint8_t ProdName2; /*!< Product Name part2 */
AnnaBridge 172:65be27845400 234 __IO uint8_t ProdRev; /*!< Product Revision */
AnnaBridge 172:65be27845400 235 __IO uint32_t ProdSN; /*!< Product Serial Number */
AnnaBridge 172:65be27845400 236 __IO uint8_t Reserved1; /*!< Reserved1 */
AnnaBridge 172:65be27845400 237 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
AnnaBridge 172:65be27845400 238 __IO uint8_t CID_CRC; /*!< CID CRC */
AnnaBridge 172:65be27845400 239 __IO uint8_t Reserved2; /*!< Always 1 */
AnnaBridge 172:65be27845400 240
AnnaBridge 172:65be27845400 241 }HAL_SD_CardCIDTypedef;
AnnaBridge 172:65be27845400 242 /**
AnnaBridge 172:65be27845400 243 * @}
AnnaBridge 172:65be27845400 244 */
AnnaBridge 172:65be27845400 245
AnnaBridge 172:65be27845400 246 /** @defgroup SD_Exported_Types_Group6 SD Card Status returned by ACMD13
AnnaBridge 172:65be27845400 247 * @{
AnnaBridge 172:65be27845400 248 */
AnnaBridge 172:65be27845400 249 typedef struct
AnnaBridge 172:65be27845400 250 {
AnnaBridge 172:65be27845400 251 __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */
AnnaBridge 172:65be27845400 252 __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */
AnnaBridge 172:65be27845400 253 __IO uint16_t CardType; /*!< Carries information about card type */
AnnaBridge 172:65be27845400 254 __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */
AnnaBridge 172:65be27845400 255 __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */
AnnaBridge 172:65be27845400 256 __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */
AnnaBridge 172:65be27845400 257 __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */
AnnaBridge 172:65be27845400 258 __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */
AnnaBridge 172:65be27845400 259 __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */
AnnaBridge 172:65be27845400 260 __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */
AnnaBridge 172:65be27845400 261
AnnaBridge 172:65be27845400 262 }HAL_SD_CardStatusTypedef;
AnnaBridge 172:65be27845400 263 /**
AnnaBridge 172:65be27845400 264 * @}
AnnaBridge 172:65be27845400 265 */
AnnaBridge 172:65be27845400 266
AnnaBridge 172:65be27845400 267 /**
AnnaBridge 172:65be27845400 268 * @}
AnnaBridge 172:65be27845400 269 */
AnnaBridge 172:65be27845400 270
AnnaBridge 172:65be27845400 271 /* Exported constants --------------------------------------------------------*/
AnnaBridge 172:65be27845400 272 /** @defgroup SD_Exported_Constants Exported Constants
AnnaBridge 172:65be27845400 273 * @{
AnnaBridge 172:65be27845400 274 */
AnnaBridge 172:65be27845400 275
AnnaBridge 172:65be27845400 276 #define BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */
AnnaBridge 172:65be27845400 277
AnnaBridge 172:65be27845400 278 /** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition
AnnaBridge 172:65be27845400 279 * @{
AnnaBridge 172:65be27845400 280 */
AnnaBridge 172:65be27845400 281 #define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */
AnnaBridge 172:65be27845400 282 #define HAL_SD_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */
AnnaBridge 172:65be27845400 283 #define HAL_SD_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */
AnnaBridge 172:65be27845400 284 #define HAL_SD_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */
AnnaBridge 172:65be27845400 285 #define HAL_SD_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */
AnnaBridge 172:65be27845400 286 #define HAL_SD_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */
AnnaBridge 172:65be27845400 287 #define HAL_SD_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */
AnnaBridge 172:65be27845400 288 #define HAL_SD_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */
AnnaBridge 172:65be27845400 289 #define HAL_SD_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the
AnnaBridge 172:65be27845400 290 number of transferred bytes does not match the block length */
AnnaBridge 172:65be27845400 291 #define HAL_SD_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */
AnnaBridge 172:65be27845400 292 #define HAL_SD_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */
AnnaBridge 172:65be27845400 293 #define HAL_SD_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */
AnnaBridge 172:65be27845400 294 #define HAL_SD_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock
AnnaBridge 172:65be27845400 295 command or if there was an attempt to access a locked card */
AnnaBridge 172:65be27845400 296 #define HAL_SD_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */
AnnaBridge 172:65be27845400 297 #define HAL_SD_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */
AnnaBridge 172:65be27845400 298 #define HAL_SD_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */
AnnaBridge 172:65be27845400 299 #define HAL_SD_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */
AnnaBridge 172:65be27845400 300 #define HAL_SD_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */
AnnaBridge 172:65be27845400 301 #define HAL_SD_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */
AnnaBridge 172:65be27845400 302 #define HAL_SD_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */
AnnaBridge 172:65be27845400 303 #define HAL_SD_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */
AnnaBridge 172:65be27845400 304 #define HAL_SD_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */
AnnaBridge 172:65be27845400 305 #define HAL_SD_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */
AnnaBridge 172:65be27845400 306 #define HAL_SD_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out
AnnaBridge 172:65be27845400 307 of erase sequence command was received */
AnnaBridge 172:65be27845400 308 #define HAL_SD_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */
AnnaBridge 172:65be27845400 309 #define HAL_SD_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */
AnnaBridge 172:65be27845400 310 #define HAL_SD_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */
AnnaBridge 172:65be27845400 311 #define HAL_SD_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */
AnnaBridge 172:65be27845400 312 #define HAL_SD_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */
AnnaBridge 172:65be27845400 313 #define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */
AnnaBridge 172:65be27845400 314 #define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */
AnnaBridge 172:65be27845400 315 #define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */
AnnaBridge 172:65be27845400 316 #define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */
AnnaBridge 172:65be27845400 317
AnnaBridge 172:65be27845400 318 /**
AnnaBridge 172:65be27845400 319 * @}
AnnaBridge 172:65be27845400 320 */
AnnaBridge 172:65be27845400 321
AnnaBridge 172:65be27845400 322 /** @defgroup SD_Exported_Constansts_Group2 SD context enumeration
AnnaBridge 172:65be27845400 323 * @{
AnnaBridge 172:65be27845400 324 */
AnnaBridge 172:65be27845400 325 #define SD_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */
AnnaBridge 172:65be27845400 326 #define SD_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */
AnnaBridge 172:65be27845400 327 #define SD_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */
AnnaBridge 172:65be27845400 328 #define SD_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */
AnnaBridge 172:65be27845400 329 #define SD_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */
AnnaBridge 172:65be27845400 330 #define SD_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */
AnnaBridge 172:65be27845400 331 #define SD_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */
AnnaBridge 172:65be27845400 332
AnnaBridge 172:65be27845400 333 /**
AnnaBridge 172:65be27845400 334 * @}
AnnaBridge 172:65be27845400 335 */
AnnaBridge 172:65be27845400 336
AnnaBridge 172:65be27845400 337 /** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards
AnnaBridge 172:65be27845400 338 * @{
AnnaBridge 172:65be27845400 339 */
AnnaBridge 172:65be27845400 340 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
AnnaBridge 172:65be27845400 341 #define CARD_NORMAL_SPEED ((uint32_t)0x00000000U) /*!< Normal Speed Card <12.5Mo/s , Spec Version 1.01 */
AnnaBridge 172:65be27845400 342 #define CARD_HIGH_SPEED ((uint32_t)0x00000100U) /*!< High Speed Card <25Mo/s , Spec version 2.00 */
AnnaBridge 172:65be27845400 343 #define CARD_ULTRA_HIGH_SPEED ((uint32_t)0x00000200U) /*!< UHS-I SD Card <50Mo/s for SDR50, DDR5 Cards
AnnaBridge 172:65be27845400 344 and <104Mo/s for SDR104, Spec version 3.01 */
AnnaBridge 172:65be27845400 345 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
AnnaBridge 172:65be27845400 346
AnnaBridge 172:65be27845400 347 #define CARD_SDSC ((uint32_t)0x00000000U)
AnnaBridge 172:65be27845400 348 #define CARD_SDHC_SDXC ((uint32_t)0x00000001U)
AnnaBridge 172:65be27845400 349 #define CARD_SECURED ((uint32_t)0x00000003U)
AnnaBridge 172:65be27845400 350
AnnaBridge 172:65be27845400 351 /**
AnnaBridge 172:65be27845400 352 * @}
AnnaBridge 172:65be27845400 353 */
AnnaBridge 172:65be27845400 354
AnnaBridge 172:65be27845400 355 /** @defgroup SD_Exported_Constansts_Group4 SD Supported Version
AnnaBridge 172:65be27845400 356 * @{
AnnaBridge 172:65be27845400 357 */
AnnaBridge 172:65be27845400 358 #define CARD_V1_X ((uint32_t)0x00000000U)
AnnaBridge 172:65be27845400 359 #define CARD_V2_X ((uint32_t)0x00000001U)
AnnaBridge 172:65be27845400 360 /**
AnnaBridge 172:65be27845400 361 * @}
AnnaBridge 172:65be27845400 362 */
AnnaBridge 172:65be27845400 363
AnnaBridge 172:65be27845400 364 /**
AnnaBridge 172:65be27845400 365 * @}
AnnaBridge 172:65be27845400 366 */
AnnaBridge 172:65be27845400 367
AnnaBridge 172:65be27845400 368 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 369 /** @defgroup SD_Exported_macros SD Exported Macros
AnnaBridge 172:65be27845400 370 * @brief macros to handle interrupts and specific clock configurations
AnnaBridge 172:65be27845400 371 * @{
AnnaBridge 172:65be27845400 372 */
AnnaBridge 172:65be27845400 373
AnnaBridge 172:65be27845400 374 #if !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
AnnaBridge 172:65be27845400 375 /**
AnnaBridge 172:65be27845400 376 * @brief Enable the SD device.
AnnaBridge 172:65be27845400 377 * @retval None
AnnaBridge 172:65be27845400 378 */
AnnaBridge 172:65be27845400 379 #define __HAL_SD_ENABLE(__HANDLE__) __SDMMC_ENABLE((__HANDLE__)->Instance)
AnnaBridge 172:65be27845400 380
AnnaBridge 172:65be27845400 381 /**
AnnaBridge 172:65be27845400 382 * @brief Disable the SD device.
AnnaBridge 172:65be27845400 383 * @retval None
AnnaBridge 172:65be27845400 384 */
AnnaBridge 172:65be27845400 385 #define __HAL_SD_DISABLE(__HANDLE__) __SDMMC_DISABLE((__HANDLE__)->Instance)
AnnaBridge 172:65be27845400 386
AnnaBridge 172:65be27845400 387 /**
AnnaBridge 172:65be27845400 388 * @brief Enable the SDMMC DMA transfer.
AnnaBridge 172:65be27845400 389 * @retval None
AnnaBridge 172:65be27845400 390 */
AnnaBridge 172:65be27845400 391 #define __HAL_SD_DMA_ENABLE(__HANDLE__) __SDMMC_DMA_ENABLE((__HANDLE__)->Instance)
AnnaBridge 172:65be27845400 392
AnnaBridge 172:65be27845400 393 /**
AnnaBridge 172:65be27845400 394 * @brief Disable the SDMMC DMA transfer.
AnnaBridge 172:65be27845400 395 * @retval None
AnnaBridge 172:65be27845400 396 */
AnnaBridge 172:65be27845400 397 #define __HAL_SD_DMA_DISABLE(__HANDLE__) __SDMMC_DMA_DISABLE((__HANDLE__)->Instance)
AnnaBridge 172:65be27845400 398 #endif /* !STM32L4R5xx && !STM32L4R7xx && !STM32L4R9xx && !STM32L4S5xx && !STM32L4S7xx && !STM32L4S9xx */
AnnaBridge 172:65be27845400 399
AnnaBridge 172:65be27845400 400 /**
AnnaBridge 172:65be27845400 401 * @brief Enable the SD device interrupt.
AnnaBridge 172:65be27845400 402 * @param __HANDLE__: SD Handle
AnnaBridge 172:65be27845400 403 * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled.
AnnaBridge 172:65be27845400 404 * This parameter can be one or a combination of the following values:
AnnaBridge 172:65be27845400 405 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 172:65be27845400 406 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 172:65be27845400 407 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 172:65be27845400 408 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 172:65be27845400 409 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 172:65be27845400 410 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 172:65be27845400 411 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 172:65be27845400 412 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 172:65be27845400 413 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 172:65be27845400 414 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 172:65be27845400 415 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 172:65be27845400 416 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 172:65be27845400 417 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 172:65be27845400 418 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 172:65be27845400 419 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 172:65be27845400 420 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 172:65be27845400 421 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
AnnaBridge 172:65be27845400 422 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
AnnaBridge 172:65be27845400 423 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
AnnaBridge 172:65be27845400 424 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
AnnaBridge 172:65be27845400 425 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
AnnaBridge 172:65be27845400 426 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
AnnaBridge 172:65be27845400 427 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
AnnaBridge 172:65be27845400 428 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
AnnaBridge 172:65be27845400 429 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
AnnaBridge 172:65be27845400 430 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 172:65be27845400 431 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 172:65be27845400 432 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 172:65be27845400 433 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt
AnnaBridge 172:65be27845400 434 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 172:65be27845400 435 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 172:65be27845400 436 * @retval None
AnnaBridge 172:65be27845400 437 */
AnnaBridge 172:65be27845400 438 #define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 172:65be27845400 439
AnnaBridge 172:65be27845400 440 /**
AnnaBridge 172:65be27845400 441 * @brief Disable the SD device interrupt.
AnnaBridge 172:65be27845400 442 * @param __HANDLE__: SD Handle
AnnaBridge 172:65be27845400 443 * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled.
AnnaBridge 172:65be27845400 444 * This parameter can be one or a combination of the following values:
AnnaBridge 172:65be27845400 445 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 172:65be27845400 446 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 172:65be27845400 447 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 172:65be27845400 448 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 172:65be27845400 449 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 172:65be27845400 450 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 172:65be27845400 451 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 172:65be27845400 452 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 172:65be27845400 453 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 172:65be27845400 454 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 172:65be27845400 455 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 172:65be27845400 456 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 172:65be27845400 457 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 172:65be27845400 458 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 172:65be27845400 459 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 172:65be27845400 460 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 172:65be27845400 461 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
AnnaBridge 172:65be27845400 462 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
AnnaBridge 172:65be27845400 463 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
AnnaBridge 172:65be27845400 464 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
AnnaBridge 172:65be27845400 465 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
AnnaBridge 172:65be27845400 466 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
AnnaBridge 172:65be27845400 467 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
AnnaBridge 172:65be27845400 468 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
AnnaBridge 172:65be27845400 469 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
AnnaBridge 172:65be27845400 470 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 172:65be27845400 471 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 172:65be27845400 472 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 172:65be27845400 473 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt
AnnaBridge 172:65be27845400 474 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 172:65be27845400 475 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 172:65be27845400 476 * @retval None
AnnaBridge 172:65be27845400 477 */
AnnaBridge 172:65be27845400 478 #define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 172:65be27845400 479
AnnaBridge 172:65be27845400 480 /**
AnnaBridge 172:65be27845400 481 * @brief Check whether the specified SD flag is set or not.
AnnaBridge 172:65be27845400 482 * @param __HANDLE__: SD Handle
AnnaBridge 172:65be27845400 483 * @param __FLAG__: specifies the flag to check.
AnnaBridge 172:65be27845400 484 * This parameter can be one of the following values:
AnnaBridge 172:65be27845400 485 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
AnnaBridge 172:65be27845400 486 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
AnnaBridge 172:65be27845400 487 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
AnnaBridge 172:65be27845400 488 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
AnnaBridge 172:65be27845400 489 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
AnnaBridge 172:65be27845400 490 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
AnnaBridge 172:65be27845400 491 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
AnnaBridge 172:65be27845400 492 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
AnnaBridge 172:65be27845400 493 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
AnnaBridge 172:65be27845400 494 * @arg SDMMC_FLAG_CMDACT: Command transfer in progress
AnnaBridge 172:65be27845400 495 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty
AnnaBridge 172:65be27845400 496 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full
AnnaBridge 172:65be27845400 497 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full
AnnaBridge 172:65be27845400 498 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full
AnnaBridge 172:65be27845400 499 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty
AnnaBridge 172:65be27845400 500 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty
AnnaBridge 172:65be27845400 501 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
AnnaBridge 172:65be27845400 502 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero)
AnnaBridge 172:65be27845400 503 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold
AnnaBridge 172:65be27845400 504 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12
AnnaBridge 172:65be27845400 505 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active
AnnaBridge 172:65be27845400 506 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active
AnnaBridge 172:65be27845400 507 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy)
AnnaBridge 172:65be27845400 508 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected
AnnaBridge 172:65be27845400 509 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received
AnnaBridge 172:65be27845400 510 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout
AnnaBridge 172:65be27845400 511 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion
AnnaBridge 172:65be27845400 512 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure
AnnaBridge 172:65be27845400 513 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error
AnnaBridge 172:65be27845400 514 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete
AnnaBridge 172:65be27845400 515 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
AnnaBridge 172:65be27845400 516 * @arg SDMMC_FLAG_TXACT: Data transmit in progress
AnnaBridge 172:65be27845400 517 * @arg SDMMC_FLAG_RXACT: Data receive in progress
AnnaBridge 172:65be27845400 518 * @arg SDMMC_FLAG_TXDAVL: Data available in transmit FIFO
AnnaBridge 172:65be27845400 519 * @arg SDMMC_FLAG_RXDAVL: Data available in receive FIFO
AnnaBridge 172:65be27845400 520 * @retval The new state of SD FLAG (SET or RESET).
AnnaBridge 172:65be27845400 521 */
AnnaBridge 172:65be27845400 522 #define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
AnnaBridge 172:65be27845400 523
AnnaBridge 172:65be27845400 524 /**
AnnaBridge 172:65be27845400 525 * @brief Clear the SD's pending flags.
AnnaBridge 172:65be27845400 526 * @param __HANDLE__: SD Handle
AnnaBridge 172:65be27845400 527 * @param __FLAG__: specifies the flag to clear.
AnnaBridge 172:65be27845400 528 * This parameter can be one or a combination of the following values:
AnnaBridge 172:65be27845400 529 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
AnnaBridge 172:65be27845400 530 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
AnnaBridge 172:65be27845400 531 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
AnnaBridge 172:65be27845400 532 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
AnnaBridge 172:65be27845400 533 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
AnnaBridge 172:65be27845400 534 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
AnnaBridge 172:65be27845400 535 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
AnnaBridge 172:65be27845400 536 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
AnnaBridge 172:65be27845400 537 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
AnnaBridge 172:65be27845400 538 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
AnnaBridge 172:65be27845400 539 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero)
AnnaBridge 172:65be27845400 540 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold
AnnaBridge 172:65be27845400 541 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12
AnnaBridge 172:65be27845400 542 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected
AnnaBridge 172:65be27845400 543 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received
AnnaBridge 172:65be27845400 544 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout
AnnaBridge 172:65be27845400 545 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion
AnnaBridge 172:65be27845400 546 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure
AnnaBridge 172:65be27845400 547 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error
AnnaBridge 172:65be27845400 548 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete
AnnaBridge 172:65be27845400 549 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
AnnaBridge 172:65be27845400 550 * @retval None
AnnaBridge 172:65be27845400 551 */
AnnaBridge 172:65be27845400 552 #define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
AnnaBridge 172:65be27845400 553
AnnaBridge 172:65be27845400 554 /**
AnnaBridge 172:65be27845400 555 * @brief Check whether the specified SD interrupt has occurred or not.
AnnaBridge 172:65be27845400 556 * @param __HANDLE__: SD Handle
AnnaBridge 172:65be27845400 557 * @param __INTERRUPT__: specifies the SDMMC interrupt source to check.
AnnaBridge 172:65be27845400 558 * This parameter can be one of the following values:
AnnaBridge 172:65be27845400 559 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 172:65be27845400 560 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 172:65be27845400 561 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 172:65be27845400 562 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 172:65be27845400 563 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 172:65be27845400 564 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 172:65be27845400 565 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 172:65be27845400 566 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 172:65be27845400 567 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 172:65be27845400 568 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 172:65be27845400 569 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 172:65be27845400 570 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 172:65be27845400 571 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 172:65be27845400 572 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 172:65be27845400 573 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 172:65be27845400 574 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 172:65be27845400 575 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 172:65be27845400 576 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
AnnaBridge 172:65be27845400 577 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
AnnaBridge 172:65be27845400 578 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
AnnaBridge 172:65be27845400 579 * @arg SDMMC_IT_DPSMACT: Data path state machine active interrupt
AnnaBridge 172:65be27845400 580 * @arg SDMMC_IT_CPSMACT: Command path state machine active interrupt
AnnaBridge 172:65be27845400 581 * @arg SDMMC_IT_BUSYD0: Inverted value of SDMMC_D0 line (Busy)
AnnaBridge 172:65be27845400 582 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
AnnaBridge 172:65be27845400 583 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
AnnaBridge 172:65be27845400 584 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
AnnaBridge 172:65be27845400 585 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
AnnaBridge 172:65be27845400 586 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
AnnaBridge 172:65be27845400 587 * @arg SDMMC_IT_IDMATE: IDMA transfer error interrupt
AnnaBridge 172:65be27845400 588 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
AnnaBridge 172:65be27845400 589 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 172:65be27845400 590 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 172:65be27845400 591 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt
AnnaBridge 172:65be27845400 592 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 172:65be27845400 593 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 172:65be27845400 594 * @retval The new state of SD IT (SET or RESET).
AnnaBridge 172:65be27845400 595 */
AnnaBridge 172:65be27845400 596 #define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 172:65be27845400 597
AnnaBridge 172:65be27845400 598 /**
AnnaBridge 172:65be27845400 599 * @brief Clear the SD's interrupt pending bits.
AnnaBridge 172:65be27845400 600 * @param __HANDLE__: SD Handle
AnnaBridge 172:65be27845400 601 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
AnnaBridge 172:65be27845400 602 * This parameter can be one or a combination of the following values:
AnnaBridge 172:65be27845400 603 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 172:65be27845400 604 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 172:65be27845400 605 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 172:65be27845400 606 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 172:65be27845400 607 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 172:65be27845400 608 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 172:65be27845400 609 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 172:65be27845400 610 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 172:65be27845400 611 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 172:65be27845400 612 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
AnnaBridge 172:65be27845400 613 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
AnnaBridge 172:65be27845400 614 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 172:65be27845400 615 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
AnnaBridge 172:65be27845400 616 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
AnnaBridge 172:65be27845400 617 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
AnnaBridge 172:65be27845400 618 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
AnnaBridge 172:65be27845400 619 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
AnnaBridge 172:65be27845400 620 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
AnnaBridge 172:65be27845400 621 * @arg SDMMC_IT_IDMATE: IDMA transfer error interrupt
AnnaBridge 172:65be27845400 622 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
AnnaBridge 172:65be27845400 623 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt
AnnaBridge 172:65be27845400 624 * @retval None
AnnaBridge 172:65be27845400 625 */
AnnaBridge 172:65be27845400 626 #define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 172:65be27845400 627
AnnaBridge 172:65be27845400 628 /**
AnnaBridge 172:65be27845400 629 * @}
AnnaBridge 172:65be27845400 630 */
AnnaBridge 172:65be27845400 631
AnnaBridge 172:65be27845400 632 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
AnnaBridge 172:65be27845400 633 /* Include SD HAL Extension module */
AnnaBridge 172:65be27845400 634 #include "stm32l4xx_hal_sd_ex.h"
AnnaBridge 172:65be27845400 635 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
AnnaBridge 172:65be27845400 636 /* Exported functions --------------------------------------------------------*/
AnnaBridge 172:65be27845400 637 /** @defgroup SD_Exported_Functions SD Exported Functions
AnnaBridge 172:65be27845400 638 * @{
AnnaBridge 172:65be27845400 639 */
AnnaBridge 172:65be27845400 640
AnnaBridge 172:65be27845400 641 /** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 172:65be27845400 642 * @{
AnnaBridge 172:65be27845400 643 */
AnnaBridge 172:65be27845400 644 HAL_StatusTypeDef HAL_SD_Init (SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 645 HAL_StatusTypeDef HAL_SD_InitCard (SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 646 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 647 void HAL_SD_MspInit (SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 648 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 649 /**
AnnaBridge 172:65be27845400 650 * @}
AnnaBridge 172:65be27845400 651 */
AnnaBridge 172:65be27845400 652
AnnaBridge 172:65be27845400 653 /** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions
AnnaBridge 172:65be27845400 654 * @{
AnnaBridge 172:65be27845400 655 */
AnnaBridge 172:65be27845400 656 /* Blocking mode: Polling */
AnnaBridge 172:65be27845400 657 HAL_StatusTypeDef HAL_SD_ReadBlocks (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
AnnaBridge 172:65be27845400 658 HAL_StatusTypeDef HAL_SD_WriteBlocks (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
AnnaBridge 172:65be27845400 659 HAL_StatusTypeDef HAL_SD_Erase (SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
AnnaBridge 172:65be27845400 660 /* Non-Blocking mode: IT */
AnnaBridge 172:65be27845400 661 HAL_StatusTypeDef HAL_SD_ReadBlocks_IT (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 172:65be27845400 662 HAL_StatusTypeDef HAL_SD_WriteBlocks_IT (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 172:65be27845400 663 /* Non-Blocking mode: DMA */
AnnaBridge 172:65be27845400 664 HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 172:65be27845400 665 HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 172:65be27845400 666
AnnaBridge 172:65be27845400 667 void HAL_SD_IRQHandler (SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 668
AnnaBridge 172:65be27845400 669 /* Callback in non blocking modes (DMA) */
AnnaBridge 172:65be27845400 670 void HAL_SD_TxCpltCallback (SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 671 void HAL_SD_RxCpltCallback (SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 672 void HAL_SD_ErrorCallback (SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 673 void HAL_SD_AbortCallback (SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 674
AnnaBridge 172:65be27845400 675 /**
AnnaBridge 172:65be27845400 676 * @}
AnnaBridge 172:65be27845400 677 */
AnnaBridge 172:65be27845400 678
AnnaBridge 172:65be27845400 679 /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 172:65be27845400 680 * @{
AnnaBridge 172:65be27845400 681 */
AnnaBridge 172:65be27845400 682 HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode);
AnnaBridge 172:65be27845400 683 /**
AnnaBridge 172:65be27845400 684 * @}
AnnaBridge 172:65be27845400 685 */
AnnaBridge 172:65be27845400 686
AnnaBridge 172:65be27845400 687 /** @defgroup SD_Exported_Functions_Group4 SD card related functions
AnnaBridge 172:65be27845400 688 * @{
AnnaBridge 172:65be27845400 689 */
AnnaBridge 172:65be27845400 690 HAL_StatusTypeDef HAL_SD_SendSDStatus (SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
AnnaBridge 172:65be27845400 691 HAL_SD_CardStateTypedef HAL_SD_GetCardState (SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 692 HAL_StatusTypeDef HAL_SD_GetCardCID (SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypedef *pCID);
AnnaBridge 172:65be27845400 693 HAL_StatusTypeDef HAL_SD_GetCardCSD (SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypedef *pCSD);
AnnaBridge 172:65be27845400 694 HAL_StatusTypeDef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pStatus);
AnnaBridge 172:65be27845400 695 HAL_StatusTypeDef HAL_SD_GetCardInfo (SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo);
AnnaBridge 172:65be27845400 696 /**
AnnaBridge 172:65be27845400 697 * @}
AnnaBridge 172:65be27845400 698 */
AnnaBridge 172:65be27845400 699
AnnaBridge 172:65be27845400 700 /** @defgroup SD_Exported_Functions_Group5 Peripheral State and Errors functions
AnnaBridge 172:65be27845400 701 * @{
AnnaBridge 172:65be27845400 702 */
AnnaBridge 172:65be27845400 703 HAL_SD_StateTypeDef HAL_SD_GetState(SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 704 uint32_t HAL_SD_GetError(SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 705 /**
AnnaBridge 172:65be27845400 706 * @}
AnnaBridge 172:65be27845400 707 */
AnnaBridge 172:65be27845400 708
AnnaBridge 172:65be27845400 709 /** @defgroup SD_Exported_Functions_Group6 Perioheral Abort management
AnnaBridge 172:65be27845400 710 * @{
AnnaBridge 172:65be27845400 711 */
AnnaBridge 172:65be27845400 712 HAL_StatusTypeDef HAL_SD_Abort (SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 713 HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd);
AnnaBridge 172:65be27845400 714 /**
AnnaBridge 172:65be27845400 715 * @}
AnnaBridge 172:65be27845400 716 */
AnnaBridge 172:65be27845400 717
AnnaBridge 172:65be27845400 718 /* Private types -------------------------------------------------------------*/
AnnaBridge 172:65be27845400 719 /** @defgroup SD_Private_Types SD Private Types
AnnaBridge 172:65be27845400 720 * @{
AnnaBridge 172:65be27845400 721 */
AnnaBridge 172:65be27845400 722
AnnaBridge 172:65be27845400 723 /**
AnnaBridge 172:65be27845400 724 * @}
AnnaBridge 172:65be27845400 725 */
AnnaBridge 172:65be27845400 726
AnnaBridge 172:65be27845400 727 /* Private defines -----------------------------------------------------------*/
AnnaBridge 172:65be27845400 728 /** @defgroup SD_Private_Defines SD Private Defines
AnnaBridge 172:65be27845400 729 * @{
AnnaBridge 172:65be27845400 730 */
AnnaBridge 172:65be27845400 731
AnnaBridge 172:65be27845400 732 /**
AnnaBridge 172:65be27845400 733 * @}
AnnaBridge 172:65be27845400 734 */
AnnaBridge 172:65be27845400 735
AnnaBridge 172:65be27845400 736 /* Private variables ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 737 /** @defgroup SD_Private_Variables SD Private Variables
AnnaBridge 172:65be27845400 738 * @{
AnnaBridge 172:65be27845400 739 */
AnnaBridge 172:65be27845400 740
AnnaBridge 172:65be27845400 741 /**
AnnaBridge 172:65be27845400 742 * @}
AnnaBridge 172:65be27845400 743 */
AnnaBridge 172:65be27845400 744
AnnaBridge 172:65be27845400 745 /* Private constants ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 746 /** @defgroup SD_Private_Constants SD Private Constants
AnnaBridge 172:65be27845400 747 * @{
AnnaBridge 172:65be27845400 748 */
AnnaBridge 172:65be27845400 749
AnnaBridge 172:65be27845400 750 /**
AnnaBridge 172:65be27845400 751 * @}
AnnaBridge 172:65be27845400 752 */
AnnaBridge 172:65be27845400 753
AnnaBridge 172:65be27845400 754 /* Private macros ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 755 /** @defgroup SD_Private_Macros SD Private Macros
AnnaBridge 172:65be27845400 756 * @{
AnnaBridge 172:65be27845400 757 */
AnnaBridge 172:65be27845400 758
AnnaBridge 172:65be27845400 759 /**
AnnaBridge 172:65be27845400 760 * @}
AnnaBridge 172:65be27845400 761 */
AnnaBridge 172:65be27845400 762
AnnaBridge 172:65be27845400 763 /* Private functions prototypes ----------------------------------------------*/
AnnaBridge 172:65be27845400 764 /** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes
AnnaBridge 172:65be27845400 765 * @{
AnnaBridge 172:65be27845400 766 */
AnnaBridge 172:65be27845400 767
AnnaBridge 172:65be27845400 768 /**
AnnaBridge 172:65be27845400 769 * @}
AnnaBridge 172:65be27845400 770 */
AnnaBridge 172:65be27845400 771
AnnaBridge 172:65be27845400 772 /* Private functions ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 773 /** @defgroup SD_Private_Functions SD Private Functions
AnnaBridge 172:65be27845400 774 * @{
AnnaBridge 172:65be27845400 775 */
AnnaBridge 172:65be27845400 776
AnnaBridge 172:65be27845400 777 /**
AnnaBridge 172:65be27845400 778 * @}
AnnaBridge 172:65be27845400 779 */
AnnaBridge 172:65be27845400 780
AnnaBridge 172:65be27845400 781
AnnaBridge 172:65be27845400 782 /**
AnnaBridge 172:65be27845400 783 * @}
AnnaBridge 172:65be27845400 784 */
AnnaBridge 172:65be27845400 785
AnnaBridge 172:65be27845400 786 /**
AnnaBridge 172:65be27845400 787 * @}
AnnaBridge 172:65be27845400 788 */
AnnaBridge 172:65be27845400 789
AnnaBridge 172:65be27845400 790 /**
AnnaBridge 172:65be27845400 791 * @}
AnnaBridge 172:65be27845400 792 */
AnnaBridge 172:65be27845400 793
AnnaBridge 172:65be27845400 794 #endif /* SDMMC1 */
AnnaBridge 172:65be27845400 795
AnnaBridge 172:65be27845400 796 #ifdef __cplusplus
AnnaBridge 172:65be27845400 797 }
AnnaBridge 172:65be27845400 798 #endif
AnnaBridge 172:65be27845400 799
AnnaBridge 172:65be27845400 800
AnnaBridge 172:65be27845400 801 #endif /* __STM32L4xx_HAL_SD_H */
AnnaBridge 172:65be27845400 802
AnnaBridge 172:65be27845400 803 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/