mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_L152RE/TOOLCHAIN_GCC_ARM/stm32l1xx_ll_usart.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32l1xx_ll_usart.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief Header file of USART LL module.
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * @attention
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 12 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 14 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 17 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 19 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 20 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 32 *
AnnaBridge 171:3a7713b1edbc 33 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 37 #ifndef __STM32L1xx_LL_USART_H
AnnaBridge 171:3a7713b1edbc 38 #define __STM32L1xx_LL_USART_H
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 41 extern "C" {
AnnaBridge 171:3a7713b1edbc 42 #endif
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 45 #include "stm32l1xx.h"
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /** @addtogroup STM32L1xx_LL_Driver
AnnaBridge 171:3a7713b1edbc 48 * @{
AnnaBridge 171:3a7713b1edbc 49 */
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /** @defgroup USART_LL USART
AnnaBridge 171:3a7713b1edbc 54 * @{
AnnaBridge 171:3a7713b1edbc 55 */
AnnaBridge 171:3a7713b1edbc 56
AnnaBridge 171:3a7713b1edbc 57 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 58 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 59 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 60
AnnaBridge 171:3a7713b1edbc 61 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 62 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 63 /** @defgroup USART_LL_Private_Macros USART Private Macros
AnnaBridge 171:3a7713b1edbc 64 * @{
AnnaBridge 171:3a7713b1edbc 65 */
AnnaBridge 171:3a7713b1edbc 66 /**
AnnaBridge 171:3a7713b1edbc 67 * @}
AnnaBridge 171:3a7713b1edbc 68 */
AnnaBridge 171:3a7713b1edbc 69 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 171:3a7713b1edbc 70
AnnaBridge 171:3a7713b1edbc 71 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 72 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 73 /** @defgroup USART_LL_ES_INIT USART Exported Init structures
AnnaBridge 171:3a7713b1edbc 74 * @{
AnnaBridge 171:3a7713b1edbc 75 */
AnnaBridge 171:3a7713b1edbc 76
AnnaBridge 171:3a7713b1edbc 77 /**
AnnaBridge 171:3a7713b1edbc 78 * @brief LL USART Init Structure definition
AnnaBridge 171:3a7713b1edbc 79 */
AnnaBridge 171:3a7713b1edbc 80 typedef struct
AnnaBridge 171:3a7713b1edbc 81 {
AnnaBridge 171:3a7713b1edbc 82 uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate.
AnnaBridge 171:3a7713b1edbc 83
AnnaBridge 171:3a7713b1edbc 84 This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/
AnnaBridge 171:3a7713b1edbc 85
AnnaBridge 171:3a7713b1edbc 86 uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
AnnaBridge 171:3a7713b1edbc 87 This parameter can be a value of @ref USART_LL_EC_DATAWIDTH.
AnnaBridge 171:3a7713b1edbc 88
AnnaBridge 171:3a7713b1edbc 89 This feature can be modified afterwards using unitary function @ref LL_USART_SetDataWidth().*/
AnnaBridge 171:3a7713b1edbc 90
AnnaBridge 171:3a7713b1edbc 91 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
AnnaBridge 171:3a7713b1edbc 92 This parameter can be a value of @ref USART_LL_EC_STOPBITS.
AnnaBridge 171:3a7713b1edbc 93
AnnaBridge 171:3a7713b1edbc 94 This feature can be modified afterwards using unitary function @ref LL_USART_SetStopBitsLength().*/
AnnaBridge 171:3a7713b1edbc 95
AnnaBridge 171:3a7713b1edbc 96 uint32_t Parity; /*!< Specifies the parity mode.
AnnaBridge 171:3a7713b1edbc 97 This parameter can be a value of @ref USART_LL_EC_PARITY.
AnnaBridge 171:3a7713b1edbc 98
AnnaBridge 171:3a7713b1edbc 99 This feature can be modified afterwards using unitary function @ref LL_USART_SetParity().*/
AnnaBridge 171:3a7713b1edbc 100
AnnaBridge 171:3a7713b1edbc 101 uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 102 This parameter can be a value of @ref USART_LL_EC_DIRECTION.
AnnaBridge 171:3a7713b1edbc 103
AnnaBridge 171:3a7713b1edbc 104 This feature can be modified afterwards using unitary function @ref LL_USART_SetTransferDirection().*/
AnnaBridge 171:3a7713b1edbc 105
AnnaBridge 171:3a7713b1edbc 106 uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 107 This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
AnnaBridge 171:3a7713b1edbc 108
AnnaBridge 171:3a7713b1edbc 109 This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
AnnaBridge 171:3a7713b1edbc 110
AnnaBridge 171:3a7713b1edbc 111 uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.
AnnaBridge 171:3a7713b1edbc 112 This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
AnnaBridge 171:3a7713b1edbc 113
AnnaBridge 171:3a7713b1edbc 114 This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
AnnaBridge 171:3a7713b1edbc 115
AnnaBridge 171:3a7713b1edbc 116 } LL_USART_InitTypeDef;
AnnaBridge 171:3a7713b1edbc 117
AnnaBridge 171:3a7713b1edbc 118 /**
AnnaBridge 171:3a7713b1edbc 119 * @brief LL USART Clock Init Structure definition
AnnaBridge 171:3a7713b1edbc 120 */
AnnaBridge 171:3a7713b1edbc 121 typedef struct
AnnaBridge 171:3a7713b1edbc 122 {
AnnaBridge 171:3a7713b1edbc 123 uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 124 This parameter can be a value of @ref USART_LL_EC_CLOCK.
AnnaBridge 171:3a7713b1edbc 125
AnnaBridge 171:3a7713b1edbc 126 USART HW configuration can be modified afterwards using unitary functions
AnnaBridge 171:3a7713b1edbc 127 @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput().
AnnaBridge 171:3a7713b1edbc 128 For more details, refer to description of this function. */
AnnaBridge 171:3a7713b1edbc 129
AnnaBridge 171:3a7713b1edbc 130 uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock.
AnnaBridge 171:3a7713b1edbc 131 This parameter can be a value of @ref USART_LL_EC_POLARITY.
AnnaBridge 171:3a7713b1edbc 132
AnnaBridge 171:3a7713b1edbc 133 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPolarity().
AnnaBridge 171:3a7713b1edbc 134 For more details, refer to description of this function. */
AnnaBridge 171:3a7713b1edbc 135
AnnaBridge 171:3a7713b1edbc 136 uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made.
AnnaBridge 171:3a7713b1edbc 137 This parameter can be a value of @ref USART_LL_EC_PHASE.
AnnaBridge 171:3a7713b1edbc 138
AnnaBridge 171:3a7713b1edbc 139 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPhase().
AnnaBridge 171:3a7713b1edbc 140 For more details, refer to description of this function. */
AnnaBridge 171:3a7713b1edbc 141
AnnaBridge 171:3a7713b1edbc 142 uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted
AnnaBridge 171:3a7713b1edbc 143 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
AnnaBridge 171:3a7713b1edbc 144 This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE.
AnnaBridge 171:3a7713b1edbc 145
AnnaBridge 171:3a7713b1edbc 146 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetLastClkPulseOutput().
AnnaBridge 171:3a7713b1edbc 147 For more details, refer to description of this function. */
AnnaBridge 171:3a7713b1edbc 148
AnnaBridge 171:3a7713b1edbc 149 } LL_USART_ClockInitTypeDef;
AnnaBridge 171:3a7713b1edbc 150
AnnaBridge 171:3a7713b1edbc 151 /**
AnnaBridge 171:3a7713b1edbc 152 * @}
AnnaBridge 171:3a7713b1edbc 153 */
AnnaBridge 171:3a7713b1edbc 154 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 171:3a7713b1edbc 155
AnnaBridge 171:3a7713b1edbc 156 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 157 /** @defgroup USART_LL_Exported_Constants USART Exported Constants
AnnaBridge 171:3a7713b1edbc 158 * @{
AnnaBridge 171:3a7713b1edbc 159 */
AnnaBridge 171:3a7713b1edbc 160
AnnaBridge 171:3a7713b1edbc 161 /** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge 171:3a7713b1edbc 162 * @brief Flags defines which can be used with LL_USART_ReadReg function
AnnaBridge 171:3a7713b1edbc 163 * @{
AnnaBridge 171:3a7713b1edbc 164 */
AnnaBridge 171:3a7713b1edbc 165 #define LL_USART_SR_PE USART_SR_PE /*!< Parity error flag */
AnnaBridge 171:3a7713b1edbc 166 #define LL_USART_SR_FE USART_SR_FE /*!< Framing error flag */
AnnaBridge 171:3a7713b1edbc 167 #define LL_USART_SR_NE USART_SR_NE /*!< Noise detected flag */
AnnaBridge 171:3a7713b1edbc 168 #define LL_USART_SR_ORE USART_SR_ORE /*!< Overrun error flag */
AnnaBridge 171:3a7713b1edbc 169 #define LL_USART_SR_IDLE USART_SR_IDLE /*!< Idle line detected flag */
AnnaBridge 171:3a7713b1edbc 170 #define LL_USART_SR_RXNE USART_SR_RXNE /*!< Read data register not empty flag */
AnnaBridge 171:3a7713b1edbc 171 #define LL_USART_SR_TC USART_SR_TC /*!< Transmission complete flag */
AnnaBridge 171:3a7713b1edbc 172 #define LL_USART_SR_TXE USART_SR_TXE /*!< Transmit data register empty flag */
AnnaBridge 171:3a7713b1edbc 173 #define LL_USART_SR_LBD USART_SR_LBD /*!< LIN break detection flag */
AnnaBridge 171:3a7713b1edbc 174 #define LL_USART_SR_CTS USART_SR_CTS /*!< CTS flag */
AnnaBridge 171:3a7713b1edbc 175 /**
AnnaBridge 171:3a7713b1edbc 176 * @}
AnnaBridge 171:3a7713b1edbc 177 */
AnnaBridge 171:3a7713b1edbc 178
AnnaBridge 171:3a7713b1edbc 179 /** @defgroup USART_LL_EC_IT IT Defines
AnnaBridge 171:3a7713b1edbc 180 * @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions
AnnaBridge 171:3a7713b1edbc 181 * @{
AnnaBridge 171:3a7713b1edbc 182 */
AnnaBridge 171:3a7713b1edbc 183 #define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
AnnaBridge 171:3a7713b1edbc 184 #define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
AnnaBridge 171:3a7713b1edbc 185 #define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
AnnaBridge 171:3a7713b1edbc 186 #define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
AnnaBridge 171:3a7713b1edbc 187 #define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
AnnaBridge 171:3a7713b1edbc 188 #define LL_USART_CR2_LBDIE USART_CR2_LBDIE /*!< LIN break detection interrupt enable */
AnnaBridge 171:3a7713b1edbc 189 #define LL_USART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
AnnaBridge 171:3a7713b1edbc 190 #define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
AnnaBridge 171:3a7713b1edbc 191 /**
AnnaBridge 171:3a7713b1edbc 192 * @}
AnnaBridge 171:3a7713b1edbc 193 */
AnnaBridge 171:3a7713b1edbc 194
AnnaBridge 171:3a7713b1edbc 195 /** @defgroup USART_LL_EC_DIRECTION Communication Direction
AnnaBridge 171:3a7713b1edbc 196 * @{
AnnaBridge 171:3a7713b1edbc 197 */
AnnaBridge 171:3a7713b1edbc 198 #define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */
AnnaBridge 171:3a7713b1edbc 199 #define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
AnnaBridge 171:3a7713b1edbc 200 #define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
AnnaBridge 171:3a7713b1edbc 201 #define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
AnnaBridge 171:3a7713b1edbc 202 /**
AnnaBridge 171:3a7713b1edbc 203 * @}
AnnaBridge 171:3a7713b1edbc 204 */
AnnaBridge 171:3a7713b1edbc 205
AnnaBridge 171:3a7713b1edbc 206 /** @defgroup USART_LL_EC_PARITY Parity Control
AnnaBridge 171:3a7713b1edbc 207 * @{
AnnaBridge 171:3a7713b1edbc 208 */
AnnaBridge 171:3a7713b1edbc 209 #define LL_USART_PARITY_NONE 0x00000000U /*!< Parity control disabled */
AnnaBridge 171:3a7713b1edbc 210 #define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
AnnaBridge 171:3a7713b1edbc 211 #define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
AnnaBridge 171:3a7713b1edbc 212 /**
AnnaBridge 171:3a7713b1edbc 213 * @}
AnnaBridge 171:3a7713b1edbc 214 */
AnnaBridge 171:3a7713b1edbc 215
AnnaBridge 171:3a7713b1edbc 216 /** @defgroup USART_LL_EC_WAKEUP Wakeup
AnnaBridge 171:3a7713b1edbc 217 * @{
AnnaBridge 171:3a7713b1edbc 218 */
AnnaBridge 171:3a7713b1edbc 219 #define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute mode on Idle Line */
AnnaBridge 171:3a7713b1edbc 220 #define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute mode on Address Mark */
AnnaBridge 171:3a7713b1edbc 221 /**
AnnaBridge 171:3a7713b1edbc 222 * @}
AnnaBridge 171:3a7713b1edbc 223 */
AnnaBridge 171:3a7713b1edbc 224
AnnaBridge 171:3a7713b1edbc 225 /** @defgroup USART_LL_EC_DATAWIDTH Datawidth
AnnaBridge 171:3a7713b1edbc 226 * @{
AnnaBridge 171:3a7713b1edbc 227 */
AnnaBridge 171:3a7713b1edbc 228 #define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
AnnaBridge 171:3a7713b1edbc 229 #define LL_USART_DATAWIDTH_9B USART_CR1_M /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
AnnaBridge 171:3a7713b1edbc 230 /**
AnnaBridge 171:3a7713b1edbc 231 * @}
AnnaBridge 171:3a7713b1edbc 232 */
AnnaBridge 171:3a7713b1edbc 233
AnnaBridge 171:3a7713b1edbc 234 /** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
AnnaBridge 171:3a7713b1edbc 235 * @{
AnnaBridge 171:3a7713b1edbc 236 */
AnnaBridge 171:3a7713b1edbc 237 #define LL_USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
AnnaBridge 171:3a7713b1edbc 238 #define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
AnnaBridge 171:3a7713b1edbc 239 /**
AnnaBridge 171:3a7713b1edbc 240 * @}
AnnaBridge 171:3a7713b1edbc 241 */
AnnaBridge 171:3a7713b1edbc 242
AnnaBridge 171:3a7713b1edbc 243 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 244 /** @defgroup USART_LL_EC_CLOCK Clock Signal
AnnaBridge 171:3a7713b1edbc 245 * @{
AnnaBridge 171:3a7713b1edbc 246 */
AnnaBridge 171:3a7713b1edbc 247
AnnaBridge 171:3a7713b1edbc 248 #define LL_USART_CLOCK_DISABLE 0x00000000U /*!< Clock signal not provided */
AnnaBridge 171:3a7713b1edbc 249 #define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< Clock signal provided */
AnnaBridge 171:3a7713b1edbc 250 /**
AnnaBridge 171:3a7713b1edbc 251 * @}
AnnaBridge 171:3a7713b1edbc 252 */
AnnaBridge 171:3a7713b1edbc 253 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 171:3a7713b1edbc 254
AnnaBridge 171:3a7713b1edbc 255 /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
AnnaBridge 171:3a7713b1edbc 256 * @{
AnnaBridge 171:3a7713b1edbc 257 */
AnnaBridge 171:3a7713b1edbc 258 #define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */
AnnaBridge 171:3a7713b1edbc 259 #define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the last data bit is output to the SCLK pin */
AnnaBridge 171:3a7713b1edbc 260 /**
AnnaBridge 171:3a7713b1edbc 261 * @}
AnnaBridge 171:3a7713b1edbc 262 */
AnnaBridge 171:3a7713b1edbc 263
AnnaBridge 171:3a7713b1edbc 264 /** @defgroup USART_LL_EC_PHASE Clock Phase
AnnaBridge 171:3a7713b1edbc 265 * @{
AnnaBridge 171:3a7713b1edbc 266 */
AnnaBridge 171:3a7713b1edbc 267 #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transition is the first data capture edge */
AnnaBridge 171:3a7713b1edbc 268 #define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transition is the first data capture edge */
AnnaBridge 171:3a7713b1edbc 269 /**
AnnaBridge 171:3a7713b1edbc 270 * @}
AnnaBridge 171:3a7713b1edbc 271 */
AnnaBridge 171:3a7713b1edbc 272
AnnaBridge 171:3a7713b1edbc 273 /** @defgroup USART_LL_EC_POLARITY Clock Polarity
AnnaBridge 171:3a7713b1edbc 274 * @{
AnnaBridge 171:3a7713b1edbc 275 */
AnnaBridge 171:3a7713b1edbc 276 #define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/
AnnaBridge 171:3a7713b1edbc 277 #define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCLK pin outside transmission window */
AnnaBridge 171:3a7713b1edbc 278 /**
AnnaBridge 171:3a7713b1edbc 279 * @}
AnnaBridge 171:3a7713b1edbc 280 */
AnnaBridge 171:3a7713b1edbc 281
AnnaBridge 171:3a7713b1edbc 282 /** @defgroup USART_LL_EC_STOPBITS Stop Bits
AnnaBridge 171:3a7713b1edbc 283 * @{
AnnaBridge 171:3a7713b1edbc 284 */
AnnaBridge 171:3a7713b1edbc 285 #define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 stop bit */
AnnaBridge 171:3a7713b1edbc 286 #define LL_USART_STOPBITS_1 0x00000000U /*!< 1 stop bit */
AnnaBridge 171:3a7713b1edbc 287 #define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 stop bits */
AnnaBridge 171:3a7713b1edbc 288 #define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
AnnaBridge 171:3a7713b1edbc 289 /**
AnnaBridge 171:3a7713b1edbc 290 * @}
AnnaBridge 171:3a7713b1edbc 291 */
AnnaBridge 171:3a7713b1edbc 292
AnnaBridge 171:3a7713b1edbc 293 /** @defgroup USART_LL_EC_HWCONTROL Hardware Control
AnnaBridge 171:3a7713b1edbc 294 * @{
AnnaBridge 171:3a7713b1edbc 295 */
AnnaBridge 171:3a7713b1edbc 296 #define LL_USART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */
AnnaBridge 171:3a7713b1edbc 297 #define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
AnnaBridge 171:3a7713b1edbc 298 #define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
AnnaBridge 171:3a7713b1edbc 299 #define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
AnnaBridge 171:3a7713b1edbc 300 /**
AnnaBridge 171:3a7713b1edbc 301 * @}
AnnaBridge 171:3a7713b1edbc 302 */
AnnaBridge 171:3a7713b1edbc 303
AnnaBridge 171:3a7713b1edbc 304 /** @defgroup USART_LL_EC_IRDA_POWER IrDA Power
AnnaBridge 171:3a7713b1edbc 305 * @{
AnnaBridge 171:3a7713b1edbc 306 */
AnnaBridge 171:3a7713b1edbc 307 #define LL_USART_IRDA_POWER_NORMAL 0x00000000U /*!< IrDA normal power mode */
AnnaBridge 171:3a7713b1edbc 308 #define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP /*!< IrDA low power mode */
AnnaBridge 171:3a7713b1edbc 309 /**
AnnaBridge 171:3a7713b1edbc 310 * @}
AnnaBridge 171:3a7713b1edbc 311 */
AnnaBridge 171:3a7713b1edbc 312
AnnaBridge 171:3a7713b1edbc 313 /** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length
AnnaBridge 171:3a7713b1edbc 314 * @{
AnnaBridge 171:3a7713b1edbc 315 */
AnnaBridge 171:3a7713b1edbc 316 #define LL_USART_LINBREAK_DETECT_10B 0x00000000U /*!< 10-bit break detection method selected */
AnnaBridge 171:3a7713b1edbc 317 #define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL /*!< 11-bit break detection method selected */
AnnaBridge 171:3a7713b1edbc 318 /**
AnnaBridge 171:3a7713b1edbc 319 * @}
AnnaBridge 171:3a7713b1edbc 320 */
AnnaBridge 171:3a7713b1edbc 321
AnnaBridge 171:3a7713b1edbc 322 /**
AnnaBridge 171:3a7713b1edbc 323 * @}
AnnaBridge 171:3a7713b1edbc 324 */
AnnaBridge 171:3a7713b1edbc 325
AnnaBridge 171:3a7713b1edbc 326 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 327 /** @defgroup USART_LL_Exported_Macros USART Exported Macros
AnnaBridge 171:3a7713b1edbc 328 * @{
AnnaBridge 171:3a7713b1edbc 329 */
AnnaBridge 171:3a7713b1edbc 330
AnnaBridge 171:3a7713b1edbc 331 /** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge 171:3a7713b1edbc 332 * @{
AnnaBridge 171:3a7713b1edbc 333 */
AnnaBridge 171:3a7713b1edbc 334
AnnaBridge 171:3a7713b1edbc 335 /**
AnnaBridge 171:3a7713b1edbc 336 * @brief Write a value in USART register
AnnaBridge 171:3a7713b1edbc 337 * @param __INSTANCE__ USART Instance
AnnaBridge 171:3a7713b1edbc 338 * @param __REG__ Register to be written
AnnaBridge 171:3a7713b1edbc 339 * @param __VALUE__ Value to be written in the register
AnnaBridge 171:3a7713b1edbc 340 * @retval None
AnnaBridge 171:3a7713b1edbc 341 */
AnnaBridge 171:3a7713b1edbc 342 #define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge 171:3a7713b1edbc 343
AnnaBridge 171:3a7713b1edbc 344 /**
AnnaBridge 171:3a7713b1edbc 345 * @brief Read a value in USART register
AnnaBridge 171:3a7713b1edbc 346 * @param __INSTANCE__ USART Instance
AnnaBridge 171:3a7713b1edbc 347 * @param __REG__ Register to be read
AnnaBridge 171:3a7713b1edbc 348 * @retval Register value
AnnaBridge 171:3a7713b1edbc 349 */
AnnaBridge 171:3a7713b1edbc 350 #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge 171:3a7713b1edbc 351 /**
AnnaBridge 171:3a7713b1edbc 352 * @}
AnnaBridge 171:3a7713b1edbc 353 */
AnnaBridge 171:3a7713b1edbc 354
AnnaBridge 171:3a7713b1edbc 355 /** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
AnnaBridge 171:3a7713b1edbc 356 * @{
AnnaBridge 171:3a7713b1edbc 357 */
AnnaBridge 171:3a7713b1edbc 358
AnnaBridge 171:3a7713b1edbc 359 /**
AnnaBridge 171:3a7713b1edbc 360 * @brief Compute USARTDIV value according to Peripheral Clock and
AnnaBridge 171:3a7713b1edbc 361 * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned)
AnnaBridge 171:3a7713b1edbc 362 * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
AnnaBridge 171:3a7713b1edbc 363 * @param __BAUDRATE__ Baud rate value to achieve
AnnaBridge 171:3a7713b1edbc 364 * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
AnnaBridge 171:3a7713b1edbc 365 */
AnnaBridge 171:3a7713b1edbc 366 #define __LL_USART_DIV_SAMPLING8_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(2*(__BAUDRATE__)))
AnnaBridge 171:3a7713b1edbc 367 #define __LL_USART_DIVMANT_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__))/100)
AnnaBridge 171:3a7713b1edbc 368 #define __LL_USART_DIVFRAQ_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 8 + 50) / 100)
AnnaBridge 171:3a7713b1edbc 369 /* UART BRR = mantissa + overflow + fraction
AnnaBridge 171:3a7713b1edbc 370 = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */
AnnaBridge 171:3a7713b1edbc 371 #define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
AnnaBridge 171:3a7713b1edbc 372 ((__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0xF8) << 1)) + \
AnnaBridge 171:3a7713b1edbc 373 (__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0x07))
AnnaBridge 171:3a7713b1edbc 374
AnnaBridge 171:3a7713b1edbc 375 /**
AnnaBridge 171:3a7713b1edbc 376 * @brief Compute USARTDIV value according to Peripheral Clock and
AnnaBridge 171:3a7713b1edbc 377 * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned)
AnnaBridge 171:3a7713b1edbc 378 * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
AnnaBridge 171:3a7713b1edbc 379 * @param __BAUDRATE__ Baud rate value to achieve
AnnaBridge 171:3a7713b1edbc 380 * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
AnnaBridge 171:3a7713b1edbc 381 */
AnnaBridge 171:3a7713b1edbc 382 #define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(4*(__BAUDRATE__)))
AnnaBridge 171:3a7713b1edbc 383 #define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)
AnnaBridge 171:3a7713b1edbc 384 #define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16 + 50) / 100)
AnnaBridge 171:3a7713b1edbc 385 /* USART BRR = mantissa + overflow + fraction
AnnaBridge 171:3a7713b1edbc 386 = (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */
AnnaBridge 171:3a7713b1edbc 387 #define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
AnnaBridge 171:3a7713b1edbc 388 (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
AnnaBridge 171:3a7713b1edbc 389 (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))
AnnaBridge 171:3a7713b1edbc 390
AnnaBridge 171:3a7713b1edbc 391 /**
AnnaBridge 171:3a7713b1edbc 392 * @}
AnnaBridge 171:3a7713b1edbc 393 */
AnnaBridge 171:3a7713b1edbc 394
AnnaBridge 171:3a7713b1edbc 395 /**
AnnaBridge 171:3a7713b1edbc 396 * @}
AnnaBridge 171:3a7713b1edbc 397 */
AnnaBridge 171:3a7713b1edbc 398
AnnaBridge 171:3a7713b1edbc 399 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 400
AnnaBridge 171:3a7713b1edbc 401 /** @defgroup USART_LL_Exported_Functions USART Exported Functions
AnnaBridge 171:3a7713b1edbc 402 * @{
AnnaBridge 171:3a7713b1edbc 403 */
AnnaBridge 171:3a7713b1edbc 404
AnnaBridge 171:3a7713b1edbc 405 /** @defgroup USART_LL_EF_Configuration Configuration functions
AnnaBridge 171:3a7713b1edbc 406 * @{
AnnaBridge 171:3a7713b1edbc 407 */
AnnaBridge 171:3a7713b1edbc 408
AnnaBridge 171:3a7713b1edbc 409 /**
AnnaBridge 171:3a7713b1edbc 410 * @brief USART Enable
AnnaBridge 171:3a7713b1edbc 411 * @rmtoll CR1 UE LL_USART_Enable
AnnaBridge 171:3a7713b1edbc 412 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 413 * @retval None
AnnaBridge 171:3a7713b1edbc 414 */
AnnaBridge 171:3a7713b1edbc 415 __STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 416 {
AnnaBridge 171:3a7713b1edbc 417 SET_BIT(USARTx->CR1, USART_CR1_UE);
AnnaBridge 171:3a7713b1edbc 418 }
AnnaBridge 171:3a7713b1edbc 419
AnnaBridge 171:3a7713b1edbc 420 /**
AnnaBridge 171:3a7713b1edbc 421 * @brief USART Disable (all USART prescalers and outputs are disabled)
AnnaBridge 171:3a7713b1edbc 422 * @note When USART is disabled, USART prescalers and outputs are stopped immediately,
AnnaBridge 171:3a7713b1edbc 423 * and current operations are discarded. The configuration of the USART is kept, but all the status
AnnaBridge 171:3a7713b1edbc 424 * flags, in the USARTx_SR are set to their default values.
AnnaBridge 171:3a7713b1edbc 425 * @rmtoll CR1 UE LL_USART_Disable
AnnaBridge 171:3a7713b1edbc 426 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 427 * @retval None
AnnaBridge 171:3a7713b1edbc 428 */
AnnaBridge 171:3a7713b1edbc 429 __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 430 {
AnnaBridge 171:3a7713b1edbc 431 CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
AnnaBridge 171:3a7713b1edbc 432 }
AnnaBridge 171:3a7713b1edbc 433
AnnaBridge 171:3a7713b1edbc 434 /**
AnnaBridge 171:3a7713b1edbc 435 * @brief Indicate if USART is enabled
AnnaBridge 171:3a7713b1edbc 436 * @rmtoll CR1 UE LL_USART_IsEnabled
AnnaBridge 171:3a7713b1edbc 437 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 438 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 439 */
AnnaBridge 171:3a7713b1edbc 440 __STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 441 {
AnnaBridge 171:3a7713b1edbc 442 return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
AnnaBridge 171:3a7713b1edbc 443 }
AnnaBridge 171:3a7713b1edbc 444
AnnaBridge 171:3a7713b1edbc 445 /**
AnnaBridge 171:3a7713b1edbc 446 * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
AnnaBridge 171:3a7713b1edbc 447 * @rmtoll CR1 RE LL_USART_EnableDirectionRx
AnnaBridge 171:3a7713b1edbc 448 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 449 * @retval None
AnnaBridge 171:3a7713b1edbc 450 */
AnnaBridge 171:3a7713b1edbc 451 __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 452 {
AnnaBridge 171:3a7713b1edbc 453 SET_BIT(USARTx->CR1, USART_CR1_RE);
AnnaBridge 171:3a7713b1edbc 454 }
AnnaBridge 171:3a7713b1edbc 455
AnnaBridge 171:3a7713b1edbc 456 /**
AnnaBridge 171:3a7713b1edbc 457 * @brief Receiver Disable
AnnaBridge 171:3a7713b1edbc 458 * @rmtoll CR1 RE LL_USART_DisableDirectionRx
AnnaBridge 171:3a7713b1edbc 459 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 460 * @retval None
AnnaBridge 171:3a7713b1edbc 461 */
AnnaBridge 171:3a7713b1edbc 462 __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 463 {
AnnaBridge 171:3a7713b1edbc 464 CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
AnnaBridge 171:3a7713b1edbc 465 }
AnnaBridge 171:3a7713b1edbc 466
AnnaBridge 171:3a7713b1edbc 467 /**
AnnaBridge 171:3a7713b1edbc 468 * @brief Transmitter Enable
AnnaBridge 171:3a7713b1edbc 469 * @rmtoll CR1 TE LL_USART_EnableDirectionTx
AnnaBridge 171:3a7713b1edbc 470 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 471 * @retval None
AnnaBridge 171:3a7713b1edbc 472 */
AnnaBridge 171:3a7713b1edbc 473 __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 474 {
AnnaBridge 171:3a7713b1edbc 475 SET_BIT(USARTx->CR1, USART_CR1_TE);
AnnaBridge 171:3a7713b1edbc 476 }
AnnaBridge 171:3a7713b1edbc 477
AnnaBridge 171:3a7713b1edbc 478 /**
AnnaBridge 171:3a7713b1edbc 479 * @brief Transmitter Disable
AnnaBridge 171:3a7713b1edbc 480 * @rmtoll CR1 TE LL_USART_DisableDirectionTx
AnnaBridge 171:3a7713b1edbc 481 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 482 * @retval None
AnnaBridge 171:3a7713b1edbc 483 */
AnnaBridge 171:3a7713b1edbc 484 __STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 485 {
AnnaBridge 171:3a7713b1edbc 486 CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
AnnaBridge 171:3a7713b1edbc 487 }
AnnaBridge 171:3a7713b1edbc 488
AnnaBridge 171:3a7713b1edbc 489 /**
AnnaBridge 171:3a7713b1edbc 490 * @brief Configure simultaneously enabled/disabled states
AnnaBridge 171:3a7713b1edbc 491 * of Transmitter and Receiver
AnnaBridge 171:3a7713b1edbc 492 * @rmtoll CR1 RE LL_USART_SetTransferDirection\n
AnnaBridge 171:3a7713b1edbc 493 * CR1 TE LL_USART_SetTransferDirection
AnnaBridge 171:3a7713b1edbc 494 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 495 * @param TransferDirection This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 496 * @arg @ref LL_USART_DIRECTION_NONE
AnnaBridge 171:3a7713b1edbc 497 * @arg @ref LL_USART_DIRECTION_RX
AnnaBridge 171:3a7713b1edbc 498 * @arg @ref LL_USART_DIRECTION_TX
AnnaBridge 171:3a7713b1edbc 499 * @arg @ref LL_USART_DIRECTION_TX_RX
AnnaBridge 171:3a7713b1edbc 500 * @retval None
AnnaBridge 171:3a7713b1edbc 501 */
AnnaBridge 171:3a7713b1edbc 502 __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
AnnaBridge 171:3a7713b1edbc 503 {
AnnaBridge 171:3a7713b1edbc 504 MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
AnnaBridge 171:3a7713b1edbc 505 }
AnnaBridge 171:3a7713b1edbc 506
AnnaBridge 171:3a7713b1edbc 507 /**
AnnaBridge 171:3a7713b1edbc 508 * @brief Return enabled/disabled states of Transmitter and Receiver
AnnaBridge 171:3a7713b1edbc 509 * @rmtoll CR1 RE LL_USART_GetTransferDirection\n
AnnaBridge 171:3a7713b1edbc 510 * CR1 TE LL_USART_GetTransferDirection
AnnaBridge 171:3a7713b1edbc 511 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 512 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 513 * @arg @ref LL_USART_DIRECTION_NONE
AnnaBridge 171:3a7713b1edbc 514 * @arg @ref LL_USART_DIRECTION_RX
AnnaBridge 171:3a7713b1edbc 515 * @arg @ref LL_USART_DIRECTION_TX
AnnaBridge 171:3a7713b1edbc 516 * @arg @ref LL_USART_DIRECTION_TX_RX
AnnaBridge 171:3a7713b1edbc 517 */
AnnaBridge 171:3a7713b1edbc 518 __STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 519 {
AnnaBridge 171:3a7713b1edbc 520 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
AnnaBridge 171:3a7713b1edbc 521 }
AnnaBridge 171:3a7713b1edbc 522
AnnaBridge 171:3a7713b1edbc 523 /**
AnnaBridge 171:3a7713b1edbc 524 * @brief Configure Parity (enabled/disabled and parity mode if enabled).
AnnaBridge 171:3a7713b1edbc 525 * @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 526 * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
AnnaBridge 171:3a7713b1edbc 527 * (9th or 8th bit depending on data width) and parity is checked on the received data.
AnnaBridge 171:3a7713b1edbc 528 * @rmtoll CR1 PS LL_USART_SetParity\n
AnnaBridge 171:3a7713b1edbc 529 * CR1 PCE LL_USART_SetParity
AnnaBridge 171:3a7713b1edbc 530 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 531 * @param Parity This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 532 * @arg @ref LL_USART_PARITY_NONE
AnnaBridge 171:3a7713b1edbc 533 * @arg @ref LL_USART_PARITY_EVEN
AnnaBridge 171:3a7713b1edbc 534 * @arg @ref LL_USART_PARITY_ODD
AnnaBridge 171:3a7713b1edbc 535 * @retval None
AnnaBridge 171:3a7713b1edbc 536 */
AnnaBridge 171:3a7713b1edbc 537 __STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
AnnaBridge 171:3a7713b1edbc 538 {
AnnaBridge 171:3a7713b1edbc 539 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
AnnaBridge 171:3a7713b1edbc 540 }
AnnaBridge 171:3a7713b1edbc 541
AnnaBridge 171:3a7713b1edbc 542 /**
AnnaBridge 171:3a7713b1edbc 543 * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
AnnaBridge 171:3a7713b1edbc 544 * @rmtoll CR1 PS LL_USART_GetParity\n
AnnaBridge 171:3a7713b1edbc 545 * CR1 PCE LL_USART_GetParity
AnnaBridge 171:3a7713b1edbc 546 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 547 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 548 * @arg @ref LL_USART_PARITY_NONE
AnnaBridge 171:3a7713b1edbc 549 * @arg @ref LL_USART_PARITY_EVEN
AnnaBridge 171:3a7713b1edbc 550 * @arg @ref LL_USART_PARITY_ODD
AnnaBridge 171:3a7713b1edbc 551 */
AnnaBridge 171:3a7713b1edbc 552 __STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 553 {
AnnaBridge 171:3a7713b1edbc 554 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
AnnaBridge 171:3a7713b1edbc 555 }
AnnaBridge 171:3a7713b1edbc 556
AnnaBridge 171:3a7713b1edbc 557 /**
AnnaBridge 171:3a7713b1edbc 558 * @brief Set Receiver Wake Up method from Mute mode.
AnnaBridge 171:3a7713b1edbc 559 * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod
AnnaBridge 171:3a7713b1edbc 560 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 561 * @param Method This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 562 * @arg @ref LL_USART_WAKEUP_IDLELINE
AnnaBridge 171:3a7713b1edbc 563 * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
AnnaBridge 171:3a7713b1edbc 564 * @retval None
AnnaBridge 171:3a7713b1edbc 565 */
AnnaBridge 171:3a7713b1edbc 566 __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
AnnaBridge 171:3a7713b1edbc 567 {
AnnaBridge 171:3a7713b1edbc 568 MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
AnnaBridge 171:3a7713b1edbc 569 }
AnnaBridge 171:3a7713b1edbc 570
AnnaBridge 171:3a7713b1edbc 571 /**
AnnaBridge 171:3a7713b1edbc 572 * @brief Return Receiver Wake Up method from Mute mode
AnnaBridge 171:3a7713b1edbc 573 * @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod
AnnaBridge 171:3a7713b1edbc 574 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 575 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 576 * @arg @ref LL_USART_WAKEUP_IDLELINE
AnnaBridge 171:3a7713b1edbc 577 * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
AnnaBridge 171:3a7713b1edbc 578 */
AnnaBridge 171:3a7713b1edbc 579 __STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 580 {
AnnaBridge 171:3a7713b1edbc 581 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
AnnaBridge 171:3a7713b1edbc 582 }
AnnaBridge 171:3a7713b1edbc 583
AnnaBridge 171:3a7713b1edbc 584 /**
AnnaBridge 171:3a7713b1edbc 585 * @brief Set Word length (i.e. nb of data bits, excluding start and stop bits)
AnnaBridge 171:3a7713b1edbc 586 * @rmtoll CR1 M LL_USART_SetDataWidth
AnnaBridge 171:3a7713b1edbc 587 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 588 * @param DataWidth This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 589 * @arg @ref LL_USART_DATAWIDTH_8B
AnnaBridge 171:3a7713b1edbc 590 * @arg @ref LL_USART_DATAWIDTH_9B
AnnaBridge 171:3a7713b1edbc 591 * @retval None
AnnaBridge 171:3a7713b1edbc 592 */
AnnaBridge 171:3a7713b1edbc 593 __STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
AnnaBridge 171:3a7713b1edbc 594 {
AnnaBridge 171:3a7713b1edbc 595 MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
AnnaBridge 171:3a7713b1edbc 596 }
AnnaBridge 171:3a7713b1edbc 597
AnnaBridge 171:3a7713b1edbc 598 /**
AnnaBridge 171:3a7713b1edbc 599 * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
AnnaBridge 171:3a7713b1edbc 600 * @rmtoll CR1 M LL_USART_GetDataWidth
AnnaBridge 171:3a7713b1edbc 601 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 602 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 603 * @arg @ref LL_USART_DATAWIDTH_8B
AnnaBridge 171:3a7713b1edbc 604 * @arg @ref LL_USART_DATAWIDTH_9B
AnnaBridge 171:3a7713b1edbc 605 */
AnnaBridge 171:3a7713b1edbc 606 __STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 607 {
AnnaBridge 171:3a7713b1edbc 608 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
AnnaBridge 171:3a7713b1edbc 609 }
AnnaBridge 171:3a7713b1edbc 610
AnnaBridge 171:3a7713b1edbc 611 /**
AnnaBridge 171:3a7713b1edbc 612 * @brief Set Oversampling to 8-bit or 16-bit mode
AnnaBridge 171:3a7713b1edbc 613 * @rmtoll CR1 OVER8 LL_USART_SetOverSampling
AnnaBridge 171:3a7713b1edbc 614 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 615 * @param OverSampling This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 616 * @arg @ref LL_USART_OVERSAMPLING_16
AnnaBridge 171:3a7713b1edbc 617 * @arg @ref LL_USART_OVERSAMPLING_8
AnnaBridge 171:3a7713b1edbc 618 * @retval None
AnnaBridge 171:3a7713b1edbc 619 */
AnnaBridge 171:3a7713b1edbc 620 __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
AnnaBridge 171:3a7713b1edbc 621 {
AnnaBridge 171:3a7713b1edbc 622 MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
AnnaBridge 171:3a7713b1edbc 623 }
AnnaBridge 171:3a7713b1edbc 624
AnnaBridge 171:3a7713b1edbc 625 /**
AnnaBridge 171:3a7713b1edbc 626 * @brief Return Oversampling mode
AnnaBridge 171:3a7713b1edbc 627 * @rmtoll CR1 OVER8 LL_USART_GetOverSampling
AnnaBridge 171:3a7713b1edbc 628 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 629 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 630 * @arg @ref LL_USART_OVERSAMPLING_16
AnnaBridge 171:3a7713b1edbc 631 * @arg @ref LL_USART_OVERSAMPLING_8
AnnaBridge 171:3a7713b1edbc 632 */
AnnaBridge 171:3a7713b1edbc 633 __STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 634 {
AnnaBridge 171:3a7713b1edbc 635 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
AnnaBridge 171:3a7713b1edbc 636 }
AnnaBridge 171:3a7713b1edbc 637
AnnaBridge 171:3a7713b1edbc 638 /**
AnnaBridge 171:3a7713b1edbc 639 * @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not
AnnaBridge 171:3a7713b1edbc 640 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 641 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 642 * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
AnnaBridge 171:3a7713b1edbc 643 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 644 * @param LastBitClockPulse This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 645 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
AnnaBridge 171:3a7713b1edbc 646 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
AnnaBridge 171:3a7713b1edbc 647 * @retval None
AnnaBridge 171:3a7713b1edbc 648 */
AnnaBridge 171:3a7713b1edbc 649 __STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
AnnaBridge 171:3a7713b1edbc 650 {
AnnaBridge 171:3a7713b1edbc 651 MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
AnnaBridge 171:3a7713b1edbc 652 }
AnnaBridge 171:3a7713b1edbc 653
AnnaBridge 171:3a7713b1edbc 654 /**
AnnaBridge 171:3a7713b1edbc 655 * @brief Retrieve Clock pulse of the last data bit output configuration
AnnaBridge 171:3a7713b1edbc 656 * (Last bit Clock pulse output to the SCLK pin or not)
AnnaBridge 171:3a7713b1edbc 657 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 658 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 659 * @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput
AnnaBridge 171:3a7713b1edbc 660 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 661 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 662 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
AnnaBridge 171:3a7713b1edbc 663 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
AnnaBridge 171:3a7713b1edbc 664 */
AnnaBridge 171:3a7713b1edbc 665 __STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 666 {
AnnaBridge 171:3a7713b1edbc 667 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
AnnaBridge 171:3a7713b1edbc 668 }
AnnaBridge 171:3a7713b1edbc 669
AnnaBridge 171:3a7713b1edbc 670 /**
AnnaBridge 171:3a7713b1edbc 671 * @brief Select the phase of the clock output on the SCLK pin in synchronous mode
AnnaBridge 171:3a7713b1edbc 672 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 673 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 674 * @rmtoll CR2 CPHA LL_USART_SetClockPhase
AnnaBridge 171:3a7713b1edbc 675 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 676 * @param ClockPhase This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 677 * @arg @ref LL_USART_PHASE_1EDGE
AnnaBridge 171:3a7713b1edbc 678 * @arg @ref LL_USART_PHASE_2EDGE
AnnaBridge 171:3a7713b1edbc 679 * @retval None
AnnaBridge 171:3a7713b1edbc 680 */
AnnaBridge 171:3a7713b1edbc 681 __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
AnnaBridge 171:3a7713b1edbc 682 {
AnnaBridge 171:3a7713b1edbc 683 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
AnnaBridge 171:3a7713b1edbc 684 }
AnnaBridge 171:3a7713b1edbc 685
AnnaBridge 171:3a7713b1edbc 686 /**
AnnaBridge 171:3a7713b1edbc 687 * @brief Return phase of the clock output on the SCLK pin in synchronous mode
AnnaBridge 171:3a7713b1edbc 688 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 689 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 690 * @rmtoll CR2 CPHA LL_USART_GetClockPhase
AnnaBridge 171:3a7713b1edbc 691 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 692 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 693 * @arg @ref LL_USART_PHASE_1EDGE
AnnaBridge 171:3a7713b1edbc 694 * @arg @ref LL_USART_PHASE_2EDGE
AnnaBridge 171:3a7713b1edbc 695 */
AnnaBridge 171:3a7713b1edbc 696 __STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 697 {
AnnaBridge 171:3a7713b1edbc 698 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
AnnaBridge 171:3a7713b1edbc 699 }
AnnaBridge 171:3a7713b1edbc 700
AnnaBridge 171:3a7713b1edbc 701 /**
AnnaBridge 171:3a7713b1edbc 702 * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
AnnaBridge 171:3a7713b1edbc 703 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 704 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 705 * @rmtoll CR2 CPOL LL_USART_SetClockPolarity
AnnaBridge 171:3a7713b1edbc 706 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 707 * @param ClockPolarity This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 708 * @arg @ref LL_USART_POLARITY_LOW
AnnaBridge 171:3a7713b1edbc 709 * @arg @ref LL_USART_POLARITY_HIGH
AnnaBridge 171:3a7713b1edbc 710 * @retval None
AnnaBridge 171:3a7713b1edbc 711 */
AnnaBridge 171:3a7713b1edbc 712 __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
AnnaBridge 171:3a7713b1edbc 713 {
AnnaBridge 171:3a7713b1edbc 714 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
AnnaBridge 171:3a7713b1edbc 715 }
AnnaBridge 171:3a7713b1edbc 716
AnnaBridge 171:3a7713b1edbc 717 /**
AnnaBridge 171:3a7713b1edbc 718 * @brief Return polarity of the clock output on the SCLK pin in synchronous mode
AnnaBridge 171:3a7713b1edbc 719 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 720 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 721 * @rmtoll CR2 CPOL LL_USART_GetClockPolarity
AnnaBridge 171:3a7713b1edbc 722 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 723 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 724 * @arg @ref LL_USART_POLARITY_LOW
AnnaBridge 171:3a7713b1edbc 725 * @arg @ref LL_USART_POLARITY_HIGH
AnnaBridge 171:3a7713b1edbc 726 */
AnnaBridge 171:3a7713b1edbc 727 __STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 728 {
AnnaBridge 171:3a7713b1edbc 729 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
AnnaBridge 171:3a7713b1edbc 730 }
AnnaBridge 171:3a7713b1edbc 731
AnnaBridge 171:3a7713b1edbc 732 /**
AnnaBridge 171:3a7713b1edbc 733 * @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
AnnaBridge 171:3a7713b1edbc 734 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 735 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 736 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 737 * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
AnnaBridge 171:3a7713b1edbc 738 * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
AnnaBridge 171:3a7713b1edbc 739 * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function
AnnaBridge 171:3a7713b1edbc 740 * @rmtoll CR2 CPHA LL_USART_ConfigClock\n
AnnaBridge 171:3a7713b1edbc 741 * CR2 CPOL LL_USART_ConfigClock\n
AnnaBridge 171:3a7713b1edbc 742 * CR2 LBCL LL_USART_ConfigClock
AnnaBridge 171:3a7713b1edbc 743 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 744 * @param Phase This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 745 * @arg @ref LL_USART_PHASE_1EDGE
AnnaBridge 171:3a7713b1edbc 746 * @arg @ref LL_USART_PHASE_2EDGE
AnnaBridge 171:3a7713b1edbc 747 * @param Polarity This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 748 * @arg @ref LL_USART_POLARITY_LOW
AnnaBridge 171:3a7713b1edbc 749 * @arg @ref LL_USART_POLARITY_HIGH
AnnaBridge 171:3a7713b1edbc 750 * @param LBCPOutput This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 751 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
AnnaBridge 171:3a7713b1edbc 752 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
AnnaBridge 171:3a7713b1edbc 753 * @retval None
AnnaBridge 171:3a7713b1edbc 754 */
AnnaBridge 171:3a7713b1edbc 755 __STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
AnnaBridge 171:3a7713b1edbc 756 {
AnnaBridge 171:3a7713b1edbc 757 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
AnnaBridge 171:3a7713b1edbc 758 }
AnnaBridge 171:3a7713b1edbc 759
AnnaBridge 171:3a7713b1edbc 760 /**
AnnaBridge 171:3a7713b1edbc 761 * @brief Enable Clock output on SCLK pin
AnnaBridge 171:3a7713b1edbc 762 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 763 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 764 * @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput
AnnaBridge 171:3a7713b1edbc 765 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 766 * @retval None
AnnaBridge 171:3a7713b1edbc 767 */
AnnaBridge 171:3a7713b1edbc 768 __STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 769 {
AnnaBridge 171:3a7713b1edbc 770 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
AnnaBridge 171:3a7713b1edbc 771 }
AnnaBridge 171:3a7713b1edbc 772
AnnaBridge 171:3a7713b1edbc 773 /**
AnnaBridge 171:3a7713b1edbc 774 * @brief Disable Clock output on SCLK pin
AnnaBridge 171:3a7713b1edbc 775 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 776 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 777 * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput
AnnaBridge 171:3a7713b1edbc 778 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 779 * @retval None
AnnaBridge 171:3a7713b1edbc 780 */
AnnaBridge 171:3a7713b1edbc 781 __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 782 {
AnnaBridge 171:3a7713b1edbc 783 CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
AnnaBridge 171:3a7713b1edbc 784 }
AnnaBridge 171:3a7713b1edbc 785
AnnaBridge 171:3a7713b1edbc 786 /**
AnnaBridge 171:3a7713b1edbc 787 * @brief Indicate if Clock output on SCLK pin is enabled
AnnaBridge 171:3a7713b1edbc 788 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 789 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 790 * @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput
AnnaBridge 171:3a7713b1edbc 791 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 792 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 793 */
AnnaBridge 171:3a7713b1edbc 794 __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 795 {
AnnaBridge 171:3a7713b1edbc 796 return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
AnnaBridge 171:3a7713b1edbc 797 }
AnnaBridge 171:3a7713b1edbc 798
AnnaBridge 171:3a7713b1edbc 799 /**
AnnaBridge 171:3a7713b1edbc 800 * @brief Set the length of the stop bits
AnnaBridge 171:3a7713b1edbc 801 * @rmtoll CR2 STOP LL_USART_SetStopBitsLength
AnnaBridge 171:3a7713b1edbc 802 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 803 * @param StopBits This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 804 * @arg @ref LL_USART_STOPBITS_0_5
AnnaBridge 171:3a7713b1edbc 805 * @arg @ref LL_USART_STOPBITS_1
AnnaBridge 171:3a7713b1edbc 806 * @arg @ref LL_USART_STOPBITS_1_5
AnnaBridge 171:3a7713b1edbc 807 * @arg @ref LL_USART_STOPBITS_2
AnnaBridge 171:3a7713b1edbc 808 * @retval None
AnnaBridge 171:3a7713b1edbc 809 */
AnnaBridge 171:3a7713b1edbc 810 __STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
AnnaBridge 171:3a7713b1edbc 811 {
AnnaBridge 171:3a7713b1edbc 812 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
AnnaBridge 171:3a7713b1edbc 813 }
AnnaBridge 171:3a7713b1edbc 814
AnnaBridge 171:3a7713b1edbc 815 /**
AnnaBridge 171:3a7713b1edbc 816 * @brief Retrieve the length of the stop bits
AnnaBridge 171:3a7713b1edbc 817 * @rmtoll CR2 STOP LL_USART_GetStopBitsLength
AnnaBridge 171:3a7713b1edbc 818 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 819 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 820 * @arg @ref LL_USART_STOPBITS_0_5
AnnaBridge 171:3a7713b1edbc 821 * @arg @ref LL_USART_STOPBITS_1
AnnaBridge 171:3a7713b1edbc 822 * @arg @ref LL_USART_STOPBITS_1_5
AnnaBridge 171:3a7713b1edbc 823 * @arg @ref LL_USART_STOPBITS_2
AnnaBridge 171:3a7713b1edbc 824 */
AnnaBridge 171:3a7713b1edbc 825 __STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 826 {
AnnaBridge 171:3a7713b1edbc 827 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
AnnaBridge 171:3a7713b1edbc 828 }
AnnaBridge 171:3a7713b1edbc 829
AnnaBridge 171:3a7713b1edbc 830 /**
AnnaBridge 171:3a7713b1edbc 831 * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
AnnaBridge 171:3a7713b1edbc 832 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 833 * - Data Width configuration using @ref LL_USART_SetDataWidth() function
AnnaBridge 171:3a7713b1edbc 834 * - Parity Control and mode configuration using @ref LL_USART_SetParity() function
AnnaBridge 171:3a7713b1edbc 835 * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function
AnnaBridge 171:3a7713b1edbc 836 * @rmtoll CR1 PS LL_USART_ConfigCharacter\n
AnnaBridge 171:3a7713b1edbc 837 * CR1 PCE LL_USART_ConfigCharacter\n
AnnaBridge 171:3a7713b1edbc 838 * CR1 M LL_USART_ConfigCharacter\n
AnnaBridge 171:3a7713b1edbc 839 * CR2 STOP LL_USART_ConfigCharacter
AnnaBridge 171:3a7713b1edbc 840 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 841 * @param DataWidth This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 842 * @arg @ref LL_USART_DATAWIDTH_8B
AnnaBridge 171:3a7713b1edbc 843 * @arg @ref LL_USART_DATAWIDTH_9B
AnnaBridge 171:3a7713b1edbc 844 * @param Parity This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 845 * @arg @ref LL_USART_PARITY_NONE
AnnaBridge 171:3a7713b1edbc 846 * @arg @ref LL_USART_PARITY_EVEN
AnnaBridge 171:3a7713b1edbc 847 * @arg @ref LL_USART_PARITY_ODD
AnnaBridge 171:3a7713b1edbc 848 * @param StopBits This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 849 * @arg @ref LL_USART_STOPBITS_0_5
AnnaBridge 171:3a7713b1edbc 850 * @arg @ref LL_USART_STOPBITS_1
AnnaBridge 171:3a7713b1edbc 851 * @arg @ref LL_USART_STOPBITS_1_5
AnnaBridge 171:3a7713b1edbc 852 * @arg @ref LL_USART_STOPBITS_2
AnnaBridge 171:3a7713b1edbc 853 * @retval None
AnnaBridge 171:3a7713b1edbc 854 */
AnnaBridge 171:3a7713b1edbc 855 __STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
AnnaBridge 171:3a7713b1edbc 856 uint32_t StopBits)
AnnaBridge 171:3a7713b1edbc 857 {
AnnaBridge 171:3a7713b1edbc 858 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
AnnaBridge 171:3a7713b1edbc 859 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
AnnaBridge 171:3a7713b1edbc 860 }
AnnaBridge 171:3a7713b1edbc 861
AnnaBridge 171:3a7713b1edbc 862 /**
AnnaBridge 171:3a7713b1edbc 863 * @brief Set Address of the USART node.
AnnaBridge 171:3a7713b1edbc 864 * @note This is used in multiprocessor communication during Mute mode or Stop mode,
AnnaBridge 171:3a7713b1edbc 865 * for wake up with address mark detection.
AnnaBridge 171:3a7713b1edbc 866 * @rmtoll CR2 ADD LL_USART_SetNodeAddress
AnnaBridge 171:3a7713b1edbc 867 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 868 * @param NodeAddress 4 bit Address of the USART node.
AnnaBridge 171:3a7713b1edbc 869 * @retval None
AnnaBridge 171:3a7713b1edbc 870 */
AnnaBridge 171:3a7713b1edbc 871 __STATIC_INLINE void LL_USART_SetNodeAddress(USART_TypeDef *USARTx, uint32_t NodeAddress)
AnnaBridge 171:3a7713b1edbc 872 {
AnnaBridge 171:3a7713b1edbc 873 MODIFY_REG(USARTx->CR2, USART_CR2_ADD, (NodeAddress & USART_CR2_ADD));
AnnaBridge 171:3a7713b1edbc 874 }
AnnaBridge 171:3a7713b1edbc 875
AnnaBridge 171:3a7713b1edbc 876 /**
AnnaBridge 171:3a7713b1edbc 877 * @brief Return 4 bit Address of the USART node as set in ADD field of CR2.
AnnaBridge 171:3a7713b1edbc 878 * @note only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
AnnaBridge 171:3a7713b1edbc 879 * @rmtoll CR2 ADD LL_USART_GetNodeAddress
AnnaBridge 171:3a7713b1edbc 880 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 881 * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
AnnaBridge 171:3a7713b1edbc 882 */
AnnaBridge 171:3a7713b1edbc 883 __STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 884 {
AnnaBridge 171:3a7713b1edbc 885 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD));
AnnaBridge 171:3a7713b1edbc 886 }
AnnaBridge 171:3a7713b1edbc 887
AnnaBridge 171:3a7713b1edbc 888 /**
AnnaBridge 171:3a7713b1edbc 889 * @brief Enable RTS HW Flow Control
AnnaBridge 171:3a7713b1edbc 890 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 891 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 892 * @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl
AnnaBridge 171:3a7713b1edbc 893 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 894 * @retval None
AnnaBridge 171:3a7713b1edbc 895 */
AnnaBridge 171:3a7713b1edbc 896 __STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 897 {
AnnaBridge 171:3a7713b1edbc 898 SET_BIT(USARTx->CR3, USART_CR3_RTSE);
AnnaBridge 171:3a7713b1edbc 899 }
AnnaBridge 171:3a7713b1edbc 900
AnnaBridge 171:3a7713b1edbc 901 /**
AnnaBridge 171:3a7713b1edbc 902 * @brief Disable RTS HW Flow Control
AnnaBridge 171:3a7713b1edbc 903 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 904 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 905 * @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl
AnnaBridge 171:3a7713b1edbc 906 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 907 * @retval None
AnnaBridge 171:3a7713b1edbc 908 */
AnnaBridge 171:3a7713b1edbc 909 __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 910 {
AnnaBridge 171:3a7713b1edbc 911 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
AnnaBridge 171:3a7713b1edbc 912 }
AnnaBridge 171:3a7713b1edbc 913
AnnaBridge 171:3a7713b1edbc 914 /**
AnnaBridge 171:3a7713b1edbc 915 * @brief Enable CTS HW Flow Control
AnnaBridge 171:3a7713b1edbc 916 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 917 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 918 * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl
AnnaBridge 171:3a7713b1edbc 919 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 920 * @retval None
AnnaBridge 171:3a7713b1edbc 921 */
AnnaBridge 171:3a7713b1edbc 922 __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 923 {
AnnaBridge 171:3a7713b1edbc 924 SET_BIT(USARTx->CR3, USART_CR3_CTSE);
AnnaBridge 171:3a7713b1edbc 925 }
AnnaBridge 171:3a7713b1edbc 926
AnnaBridge 171:3a7713b1edbc 927 /**
AnnaBridge 171:3a7713b1edbc 928 * @brief Disable CTS HW Flow Control
AnnaBridge 171:3a7713b1edbc 929 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 930 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 931 * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
AnnaBridge 171:3a7713b1edbc 932 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 933 * @retval None
AnnaBridge 171:3a7713b1edbc 934 */
AnnaBridge 171:3a7713b1edbc 935 __STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 936 {
AnnaBridge 171:3a7713b1edbc 937 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
AnnaBridge 171:3a7713b1edbc 938 }
AnnaBridge 171:3a7713b1edbc 939
AnnaBridge 171:3a7713b1edbc 940 /**
AnnaBridge 171:3a7713b1edbc 941 * @brief Configure HW Flow Control mode (both CTS and RTS)
AnnaBridge 171:3a7713b1edbc 942 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 943 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 944 * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n
AnnaBridge 171:3a7713b1edbc 945 * CR3 CTSE LL_USART_SetHWFlowCtrl
AnnaBridge 171:3a7713b1edbc 946 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 947 * @param HardwareFlowControl This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 948 * @arg @ref LL_USART_HWCONTROL_NONE
AnnaBridge 171:3a7713b1edbc 949 * @arg @ref LL_USART_HWCONTROL_RTS
AnnaBridge 171:3a7713b1edbc 950 * @arg @ref LL_USART_HWCONTROL_CTS
AnnaBridge 171:3a7713b1edbc 951 * @arg @ref LL_USART_HWCONTROL_RTS_CTS
AnnaBridge 171:3a7713b1edbc 952 * @retval None
AnnaBridge 171:3a7713b1edbc 953 */
AnnaBridge 171:3a7713b1edbc 954 __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
AnnaBridge 171:3a7713b1edbc 955 {
AnnaBridge 171:3a7713b1edbc 956 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
AnnaBridge 171:3a7713b1edbc 957 }
AnnaBridge 171:3a7713b1edbc 958
AnnaBridge 171:3a7713b1edbc 959 /**
AnnaBridge 171:3a7713b1edbc 960 * @brief Return HW Flow Control configuration (both CTS and RTS)
AnnaBridge 171:3a7713b1edbc 961 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 962 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 963 * @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n
AnnaBridge 171:3a7713b1edbc 964 * CR3 CTSE LL_USART_GetHWFlowCtrl
AnnaBridge 171:3a7713b1edbc 965 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 966 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 967 * @arg @ref LL_USART_HWCONTROL_NONE
AnnaBridge 171:3a7713b1edbc 968 * @arg @ref LL_USART_HWCONTROL_RTS
AnnaBridge 171:3a7713b1edbc 969 * @arg @ref LL_USART_HWCONTROL_CTS
AnnaBridge 171:3a7713b1edbc 970 * @arg @ref LL_USART_HWCONTROL_RTS_CTS
AnnaBridge 171:3a7713b1edbc 971 */
AnnaBridge 171:3a7713b1edbc 972 __STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 973 {
AnnaBridge 171:3a7713b1edbc 974 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
AnnaBridge 171:3a7713b1edbc 975 }
AnnaBridge 171:3a7713b1edbc 976
AnnaBridge 171:3a7713b1edbc 977 /**
AnnaBridge 171:3a7713b1edbc 978 * @brief Enable One bit sampling method
AnnaBridge 171:3a7713b1edbc 979 * @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp
AnnaBridge 171:3a7713b1edbc 980 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 981 * @retval None
AnnaBridge 171:3a7713b1edbc 982 */
AnnaBridge 171:3a7713b1edbc 983 __STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 984 {
AnnaBridge 171:3a7713b1edbc 985 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
AnnaBridge 171:3a7713b1edbc 986 }
AnnaBridge 171:3a7713b1edbc 987
AnnaBridge 171:3a7713b1edbc 988 /**
AnnaBridge 171:3a7713b1edbc 989 * @brief Disable One bit sampling method
AnnaBridge 171:3a7713b1edbc 990 * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp
AnnaBridge 171:3a7713b1edbc 991 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 992 * @retval None
AnnaBridge 171:3a7713b1edbc 993 */
AnnaBridge 171:3a7713b1edbc 994 __STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 995 {
AnnaBridge 171:3a7713b1edbc 996 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
AnnaBridge 171:3a7713b1edbc 997 }
AnnaBridge 171:3a7713b1edbc 998
AnnaBridge 171:3a7713b1edbc 999 /**
AnnaBridge 171:3a7713b1edbc 1000 * @brief Indicate if One bit sampling method is enabled
AnnaBridge 171:3a7713b1edbc 1001 * @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp
AnnaBridge 171:3a7713b1edbc 1002 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1003 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1004 */
AnnaBridge 171:3a7713b1edbc 1005 __STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1006 {
AnnaBridge 171:3a7713b1edbc 1007 return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
AnnaBridge 171:3a7713b1edbc 1008 }
AnnaBridge 171:3a7713b1edbc 1009
AnnaBridge 171:3a7713b1edbc 1010 /**
AnnaBridge 171:3a7713b1edbc 1011 * @brief Configure USART BRR register for achieving expected Baud Rate value.
AnnaBridge 171:3a7713b1edbc 1012 * @note Compute and set USARTDIV value in BRR Register (full BRR content)
AnnaBridge 171:3a7713b1edbc 1013 * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
AnnaBridge 171:3a7713b1edbc 1014 * @note Peripheral clock and Baud rate values provided as function parameters should be valid
AnnaBridge 171:3a7713b1edbc 1015 * (Baud rate value != 0)
AnnaBridge 171:3a7713b1edbc 1016 * @rmtoll BRR BRR LL_USART_SetBaudRate
AnnaBridge 171:3a7713b1edbc 1017 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1018 * @param PeriphClk Peripheral Clock
AnnaBridge 171:3a7713b1edbc 1019 * @param OverSampling This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1020 * @arg @ref LL_USART_OVERSAMPLING_16
AnnaBridge 171:3a7713b1edbc 1021 * @arg @ref LL_USART_OVERSAMPLING_8
AnnaBridge 171:3a7713b1edbc 1022 * @param BaudRate Baud Rate
AnnaBridge 171:3a7713b1edbc 1023 * @retval None
AnnaBridge 171:3a7713b1edbc 1024 */
AnnaBridge 171:3a7713b1edbc 1025 __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
AnnaBridge 171:3a7713b1edbc 1026 uint32_t BaudRate)
AnnaBridge 171:3a7713b1edbc 1027 {
AnnaBridge 171:3a7713b1edbc 1028 if (OverSampling == LL_USART_OVERSAMPLING_8)
AnnaBridge 171:3a7713b1edbc 1029 {
AnnaBridge 171:3a7713b1edbc 1030 USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
AnnaBridge 171:3a7713b1edbc 1031 }
AnnaBridge 171:3a7713b1edbc 1032 else
AnnaBridge 171:3a7713b1edbc 1033 {
AnnaBridge 171:3a7713b1edbc 1034 USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
AnnaBridge 171:3a7713b1edbc 1035 }
AnnaBridge 171:3a7713b1edbc 1036 }
AnnaBridge 171:3a7713b1edbc 1037
AnnaBridge 171:3a7713b1edbc 1038 /**
AnnaBridge 171:3a7713b1edbc 1039 * @brief Return current Baud Rate value, according to USARTDIV present in BRR register
AnnaBridge 171:3a7713b1edbc 1040 * (full BRR content), and to used Peripheral Clock and Oversampling mode values
AnnaBridge 171:3a7713b1edbc 1041 * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
AnnaBridge 171:3a7713b1edbc 1042 * @rmtoll BRR BRR LL_USART_GetBaudRate
AnnaBridge 171:3a7713b1edbc 1043 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1044 * @param PeriphClk Peripheral Clock
AnnaBridge 171:3a7713b1edbc 1045 * @param OverSampling This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1046 * @arg @ref LL_USART_OVERSAMPLING_16
AnnaBridge 171:3a7713b1edbc 1047 * @arg @ref LL_USART_OVERSAMPLING_8
AnnaBridge 171:3a7713b1edbc 1048 * @retval Baud Rate
AnnaBridge 171:3a7713b1edbc 1049 */
AnnaBridge 171:3a7713b1edbc 1050 __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
AnnaBridge 171:3a7713b1edbc 1051 {
AnnaBridge 171:3a7713b1edbc 1052 register uint32_t usartdiv = 0x0U;
AnnaBridge 171:3a7713b1edbc 1053 register uint32_t brrresult = 0x0U;
AnnaBridge 171:3a7713b1edbc 1054
AnnaBridge 171:3a7713b1edbc 1055 usartdiv = USARTx->BRR;
AnnaBridge 171:3a7713b1edbc 1056
AnnaBridge 171:3a7713b1edbc 1057 if (OverSampling == LL_USART_OVERSAMPLING_8)
AnnaBridge 171:3a7713b1edbc 1058 {
AnnaBridge 171:3a7713b1edbc 1059 if ((usartdiv & 0xFFF7U) != 0U)
AnnaBridge 171:3a7713b1edbc 1060 {
AnnaBridge 171:3a7713b1edbc 1061 usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
AnnaBridge 171:3a7713b1edbc 1062 brrresult = (PeriphClk * 2U) / usartdiv;
AnnaBridge 171:3a7713b1edbc 1063 }
AnnaBridge 171:3a7713b1edbc 1064 }
AnnaBridge 171:3a7713b1edbc 1065 else
AnnaBridge 171:3a7713b1edbc 1066 {
AnnaBridge 171:3a7713b1edbc 1067 if ((usartdiv & 0xFFFFU) != 0U)
AnnaBridge 171:3a7713b1edbc 1068 {
AnnaBridge 171:3a7713b1edbc 1069 brrresult = PeriphClk / usartdiv;
AnnaBridge 171:3a7713b1edbc 1070 }
AnnaBridge 171:3a7713b1edbc 1071 }
AnnaBridge 171:3a7713b1edbc 1072 return (brrresult);
AnnaBridge 171:3a7713b1edbc 1073 }
AnnaBridge 171:3a7713b1edbc 1074
AnnaBridge 171:3a7713b1edbc 1075 /**
AnnaBridge 171:3a7713b1edbc 1076 * @}
AnnaBridge 171:3a7713b1edbc 1077 */
AnnaBridge 171:3a7713b1edbc 1078
AnnaBridge 171:3a7713b1edbc 1079 /** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature
AnnaBridge 171:3a7713b1edbc 1080 * @{
AnnaBridge 171:3a7713b1edbc 1081 */
AnnaBridge 171:3a7713b1edbc 1082
AnnaBridge 171:3a7713b1edbc 1083 /**
AnnaBridge 171:3a7713b1edbc 1084 * @brief Enable IrDA mode
AnnaBridge 171:3a7713b1edbc 1085 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1086 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1087 * @rmtoll CR3 IREN LL_USART_EnableIrda
AnnaBridge 171:3a7713b1edbc 1088 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1089 * @retval None
AnnaBridge 171:3a7713b1edbc 1090 */
AnnaBridge 171:3a7713b1edbc 1091 __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1092 {
AnnaBridge 171:3a7713b1edbc 1093 SET_BIT(USARTx->CR3, USART_CR3_IREN);
AnnaBridge 171:3a7713b1edbc 1094 }
AnnaBridge 171:3a7713b1edbc 1095
AnnaBridge 171:3a7713b1edbc 1096 /**
AnnaBridge 171:3a7713b1edbc 1097 * @brief Disable IrDA mode
AnnaBridge 171:3a7713b1edbc 1098 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1099 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1100 * @rmtoll CR3 IREN LL_USART_DisableIrda
AnnaBridge 171:3a7713b1edbc 1101 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1102 * @retval None
AnnaBridge 171:3a7713b1edbc 1103 */
AnnaBridge 171:3a7713b1edbc 1104 __STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1105 {
AnnaBridge 171:3a7713b1edbc 1106 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
AnnaBridge 171:3a7713b1edbc 1107 }
AnnaBridge 171:3a7713b1edbc 1108
AnnaBridge 171:3a7713b1edbc 1109 /**
AnnaBridge 171:3a7713b1edbc 1110 * @brief Indicate if IrDA mode is enabled
AnnaBridge 171:3a7713b1edbc 1111 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1112 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1113 * @rmtoll CR3 IREN LL_USART_IsEnabledIrda
AnnaBridge 171:3a7713b1edbc 1114 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1115 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1116 */
AnnaBridge 171:3a7713b1edbc 1117 __STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1118 {
AnnaBridge 171:3a7713b1edbc 1119 return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN));
AnnaBridge 171:3a7713b1edbc 1120 }
AnnaBridge 171:3a7713b1edbc 1121
AnnaBridge 171:3a7713b1edbc 1122 /**
AnnaBridge 171:3a7713b1edbc 1123 * @brief Configure IrDA Power Mode (Normal or Low Power)
AnnaBridge 171:3a7713b1edbc 1124 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1125 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1126 * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode
AnnaBridge 171:3a7713b1edbc 1127 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1128 * @param PowerMode This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1129 * @arg @ref LL_USART_IRDA_POWER_NORMAL
AnnaBridge 171:3a7713b1edbc 1130 * @arg @ref LL_USART_IRDA_POWER_LOW
AnnaBridge 171:3a7713b1edbc 1131 * @retval None
AnnaBridge 171:3a7713b1edbc 1132 */
AnnaBridge 171:3a7713b1edbc 1133 __STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
AnnaBridge 171:3a7713b1edbc 1134 {
AnnaBridge 171:3a7713b1edbc 1135 MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
AnnaBridge 171:3a7713b1edbc 1136 }
AnnaBridge 171:3a7713b1edbc 1137
AnnaBridge 171:3a7713b1edbc 1138 /**
AnnaBridge 171:3a7713b1edbc 1139 * @brief Retrieve IrDA Power Mode configuration (Normal or Low Power)
AnnaBridge 171:3a7713b1edbc 1140 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1141 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1142 * @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode
AnnaBridge 171:3a7713b1edbc 1143 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1144 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1145 * @arg @ref LL_USART_IRDA_POWER_NORMAL
AnnaBridge 171:3a7713b1edbc 1146 * @arg @ref LL_USART_PHASE_2EDGE
AnnaBridge 171:3a7713b1edbc 1147 */
AnnaBridge 171:3a7713b1edbc 1148 __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1149 {
AnnaBridge 171:3a7713b1edbc 1150 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
AnnaBridge 171:3a7713b1edbc 1151 }
AnnaBridge 171:3a7713b1edbc 1152
AnnaBridge 171:3a7713b1edbc 1153 /**
AnnaBridge 171:3a7713b1edbc 1154 * @brief Set Irda prescaler value, used for dividing the USART clock source
AnnaBridge 171:3a7713b1edbc 1155 * to achieve the Irda Low Power frequency (8 bits value)
AnnaBridge 171:3a7713b1edbc 1156 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1157 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1158 * @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler
AnnaBridge 171:3a7713b1edbc 1159 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1160 * @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 171:3a7713b1edbc 1161 * @retval None
AnnaBridge 171:3a7713b1edbc 1162 */
AnnaBridge 171:3a7713b1edbc 1163 __STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
AnnaBridge 171:3a7713b1edbc 1164 {
AnnaBridge 171:3a7713b1edbc 1165 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
AnnaBridge 171:3a7713b1edbc 1166 }
AnnaBridge 171:3a7713b1edbc 1167
AnnaBridge 171:3a7713b1edbc 1168 /**
AnnaBridge 171:3a7713b1edbc 1169 * @brief Return Irda prescaler value, used for dividing the USART clock source
AnnaBridge 171:3a7713b1edbc 1170 * to achieve the Irda Low Power frequency (8 bits value)
AnnaBridge 171:3a7713b1edbc 1171 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1172 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1173 * @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler
AnnaBridge 171:3a7713b1edbc 1174 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1175 * @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF)
AnnaBridge 171:3a7713b1edbc 1176 */
AnnaBridge 171:3a7713b1edbc 1177 __STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1178 {
AnnaBridge 171:3a7713b1edbc 1179 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
AnnaBridge 171:3a7713b1edbc 1180 }
AnnaBridge 171:3a7713b1edbc 1181
AnnaBridge 171:3a7713b1edbc 1182 /**
AnnaBridge 171:3a7713b1edbc 1183 * @}
AnnaBridge 171:3a7713b1edbc 1184 */
AnnaBridge 171:3a7713b1edbc 1185
AnnaBridge 171:3a7713b1edbc 1186 /** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature
AnnaBridge 171:3a7713b1edbc 1187 * @{
AnnaBridge 171:3a7713b1edbc 1188 */
AnnaBridge 171:3a7713b1edbc 1189
AnnaBridge 171:3a7713b1edbc 1190 /**
AnnaBridge 171:3a7713b1edbc 1191 * @brief Enable Smartcard NACK transmission
AnnaBridge 171:3a7713b1edbc 1192 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1193 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1194 * @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK
AnnaBridge 171:3a7713b1edbc 1195 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1196 * @retval None
AnnaBridge 171:3a7713b1edbc 1197 */
AnnaBridge 171:3a7713b1edbc 1198 __STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1199 {
AnnaBridge 171:3a7713b1edbc 1200 SET_BIT(USARTx->CR3, USART_CR3_NACK);
AnnaBridge 171:3a7713b1edbc 1201 }
AnnaBridge 171:3a7713b1edbc 1202
AnnaBridge 171:3a7713b1edbc 1203 /**
AnnaBridge 171:3a7713b1edbc 1204 * @brief Disable Smartcard NACK transmission
AnnaBridge 171:3a7713b1edbc 1205 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1206 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1207 * @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK
AnnaBridge 171:3a7713b1edbc 1208 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1209 * @retval None
AnnaBridge 171:3a7713b1edbc 1210 */
AnnaBridge 171:3a7713b1edbc 1211 __STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1212 {
AnnaBridge 171:3a7713b1edbc 1213 CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
AnnaBridge 171:3a7713b1edbc 1214 }
AnnaBridge 171:3a7713b1edbc 1215
AnnaBridge 171:3a7713b1edbc 1216 /**
AnnaBridge 171:3a7713b1edbc 1217 * @brief Indicate if Smartcard NACK transmission is enabled
AnnaBridge 171:3a7713b1edbc 1218 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1219 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1220 * @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK
AnnaBridge 171:3a7713b1edbc 1221 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1222 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1223 */
AnnaBridge 171:3a7713b1edbc 1224 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1225 {
AnnaBridge 171:3a7713b1edbc 1226 return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK));
AnnaBridge 171:3a7713b1edbc 1227 }
AnnaBridge 171:3a7713b1edbc 1228
AnnaBridge 171:3a7713b1edbc 1229 /**
AnnaBridge 171:3a7713b1edbc 1230 * @brief Enable Smartcard mode
AnnaBridge 171:3a7713b1edbc 1231 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1232 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1233 * @rmtoll CR3 SCEN LL_USART_EnableSmartcard
AnnaBridge 171:3a7713b1edbc 1234 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1235 * @retval None
AnnaBridge 171:3a7713b1edbc 1236 */
AnnaBridge 171:3a7713b1edbc 1237 __STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1238 {
AnnaBridge 171:3a7713b1edbc 1239 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
AnnaBridge 171:3a7713b1edbc 1240 }
AnnaBridge 171:3a7713b1edbc 1241
AnnaBridge 171:3a7713b1edbc 1242 /**
AnnaBridge 171:3a7713b1edbc 1243 * @brief Disable Smartcard mode
AnnaBridge 171:3a7713b1edbc 1244 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1245 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1246 * @rmtoll CR3 SCEN LL_USART_DisableSmartcard
AnnaBridge 171:3a7713b1edbc 1247 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1248 * @retval None
AnnaBridge 171:3a7713b1edbc 1249 */
AnnaBridge 171:3a7713b1edbc 1250 __STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1251 {
AnnaBridge 171:3a7713b1edbc 1252 CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
AnnaBridge 171:3a7713b1edbc 1253 }
AnnaBridge 171:3a7713b1edbc 1254
AnnaBridge 171:3a7713b1edbc 1255 /**
AnnaBridge 171:3a7713b1edbc 1256 * @brief Indicate if Smartcard mode is enabled
AnnaBridge 171:3a7713b1edbc 1257 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1258 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1259 * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard
AnnaBridge 171:3a7713b1edbc 1260 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1261 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1262 */
AnnaBridge 171:3a7713b1edbc 1263 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1264 {
AnnaBridge 171:3a7713b1edbc 1265 return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN));
AnnaBridge 171:3a7713b1edbc 1266 }
AnnaBridge 171:3a7713b1edbc 1267
AnnaBridge 171:3a7713b1edbc 1268 /**
AnnaBridge 171:3a7713b1edbc 1269 * @brief Set Smartcard prescaler value, used for dividing the USART clock
AnnaBridge 171:3a7713b1edbc 1270 * source to provide the SMARTCARD Clock (5 bits value)
AnnaBridge 171:3a7713b1edbc 1271 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1272 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1273 * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler
AnnaBridge 171:3a7713b1edbc 1274 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1275 * @param PrescalerValue Value between Min_Data=0 and Max_Data=31
AnnaBridge 171:3a7713b1edbc 1276 * @retval None
AnnaBridge 171:3a7713b1edbc 1277 */
AnnaBridge 171:3a7713b1edbc 1278 __STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
AnnaBridge 171:3a7713b1edbc 1279 {
AnnaBridge 171:3a7713b1edbc 1280 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
AnnaBridge 171:3a7713b1edbc 1281 }
AnnaBridge 171:3a7713b1edbc 1282
AnnaBridge 171:3a7713b1edbc 1283 /**
AnnaBridge 171:3a7713b1edbc 1284 * @brief Return Smartcard prescaler value, used for dividing the USART clock
AnnaBridge 171:3a7713b1edbc 1285 * source to provide the SMARTCARD Clock (5 bits value)
AnnaBridge 171:3a7713b1edbc 1286 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1287 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1288 * @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler
AnnaBridge 171:3a7713b1edbc 1289 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1290 * @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31)
AnnaBridge 171:3a7713b1edbc 1291 */
AnnaBridge 171:3a7713b1edbc 1292 __STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1293 {
AnnaBridge 171:3a7713b1edbc 1294 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
AnnaBridge 171:3a7713b1edbc 1295 }
AnnaBridge 171:3a7713b1edbc 1296
AnnaBridge 171:3a7713b1edbc 1297 /**
AnnaBridge 171:3a7713b1edbc 1298 * @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods
AnnaBridge 171:3a7713b1edbc 1299 * (GT[7:0] bits : Guard time value)
AnnaBridge 171:3a7713b1edbc 1300 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1301 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1302 * @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime
AnnaBridge 171:3a7713b1edbc 1303 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1304 * @param GuardTime Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 171:3a7713b1edbc 1305 * @retval None
AnnaBridge 171:3a7713b1edbc 1306 */
AnnaBridge 171:3a7713b1edbc 1307 __STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
AnnaBridge 171:3a7713b1edbc 1308 {
AnnaBridge 171:3a7713b1edbc 1309 MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, GuardTime << USART_GTPR_GT_Pos);
AnnaBridge 171:3a7713b1edbc 1310 }
AnnaBridge 171:3a7713b1edbc 1311
AnnaBridge 171:3a7713b1edbc 1312 /**
AnnaBridge 171:3a7713b1edbc 1313 * @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods
AnnaBridge 171:3a7713b1edbc 1314 * (GT[7:0] bits : Guard time value)
AnnaBridge 171:3a7713b1edbc 1315 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1316 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1317 * @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime
AnnaBridge 171:3a7713b1edbc 1318 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1319 * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
AnnaBridge 171:3a7713b1edbc 1320 */
AnnaBridge 171:3a7713b1edbc 1321 __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1322 {
AnnaBridge 171:3a7713b1edbc 1323 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos);
AnnaBridge 171:3a7713b1edbc 1324 }
AnnaBridge 171:3a7713b1edbc 1325
AnnaBridge 171:3a7713b1edbc 1326 /**
AnnaBridge 171:3a7713b1edbc 1327 * @}
AnnaBridge 171:3a7713b1edbc 1328 */
AnnaBridge 171:3a7713b1edbc 1329
AnnaBridge 171:3a7713b1edbc 1330 /** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
AnnaBridge 171:3a7713b1edbc 1331 * @{
AnnaBridge 171:3a7713b1edbc 1332 */
AnnaBridge 171:3a7713b1edbc 1333
AnnaBridge 171:3a7713b1edbc 1334 /**
AnnaBridge 171:3a7713b1edbc 1335 * @brief Enable Single Wire Half-Duplex mode
AnnaBridge 171:3a7713b1edbc 1336 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1337 * Half-Duplex mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1338 * @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex
AnnaBridge 171:3a7713b1edbc 1339 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1340 * @retval None
AnnaBridge 171:3a7713b1edbc 1341 */
AnnaBridge 171:3a7713b1edbc 1342 __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1343 {
AnnaBridge 171:3a7713b1edbc 1344 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
AnnaBridge 171:3a7713b1edbc 1345 }
AnnaBridge 171:3a7713b1edbc 1346
AnnaBridge 171:3a7713b1edbc 1347 /**
AnnaBridge 171:3a7713b1edbc 1348 * @brief Disable Single Wire Half-Duplex mode
AnnaBridge 171:3a7713b1edbc 1349 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1350 * Half-Duplex mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1351 * @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex
AnnaBridge 171:3a7713b1edbc 1352 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1353 * @retval None
AnnaBridge 171:3a7713b1edbc 1354 */
AnnaBridge 171:3a7713b1edbc 1355 __STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1356 {
AnnaBridge 171:3a7713b1edbc 1357 CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
AnnaBridge 171:3a7713b1edbc 1358 }
AnnaBridge 171:3a7713b1edbc 1359
AnnaBridge 171:3a7713b1edbc 1360 /**
AnnaBridge 171:3a7713b1edbc 1361 * @brief Indicate if Single Wire Half-Duplex mode is enabled
AnnaBridge 171:3a7713b1edbc 1362 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1363 * Half-Duplex mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1364 * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex
AnnaBridge 171:3a7713b1edbc 1365 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1366 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1367 */
AnnaBridge 171:3a7713b1edbc 1368 __STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1369 {
AnnaBridge 171:3a7713b1edbc 1370 return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
AnnaBridge 171:3a7713b1edbc 1371 }
AnnaBridge 171:3a7713b1edbc 1372
AnnaBridge 171:3a7713b1edbc 1373 /**
AnnaBridge 171:3a7713b1edbc 1374 * @}
AnnaBridge 171:3a7713b1edbc 1375 */
AnnaBridge 171:3a7713b1edbc 1376
AnnaBridge 171:3a7713b1edbc 1377 /** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature
AnnaBridge 171:3a7713b1edbc 1378 * @{
AnnaBridge 171:3a7713b1edbc 1379 */
AnnaBridge 171:3a7713b1edbc 1380
AnnaBridge 171:3a7713b1edbc 1381 /**
AnnaBridge 171:3a7713b1edbc 1382 * @brief Set LIN Break Detection Length
AnnaBridge 171:3a7713b1edbc 1383 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1384 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1385 * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen
AnnaBridge 171:3a7713b1edbc 1386 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1387 * @param LINBDLength This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1388 * @arg @ref LL_USART_LINBREAK_DETECT_10B
AnnaBridge 171:3a7713b1edbc 1389 * @arg @ref LL_USART_LINBREAK_DETECT_11B
AnnaBridge 171:3a7713b1edbc 1390 * @retval None
AnnaBridge 171:3a7713b1edbc 1391 */
AnnaBridge 171:3a7713b1edbc 1392 __STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
AnnaBridge 171:3a7713b1edbc 1393 {
AnnaBridge 171:3a7713b1edbc 1394 MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
AnnaBridge 171:3a7713b1edbc 1395 }
AnnaBridge 171:3a7713b1edbc 1396
AnnaBridge 171:3a7713b1edbc 1397 /**
AnnaBridge 171:3a7713b1edbc 1398 * @brief Return LIN Break Detection Length
AnnaBridge 171:3a7713b1edbc 1399 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1400 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1401 * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen
AnnaBridge 171:3a7713b1edbc 1402 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1403 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1404 * @arg @ref LL_USART_LINBREAK_DETECT_10B
AnnaBridge 171:3a7713b1edbc 1405 * @arg @ref LL_USART_LINBREAK_DETECT_11B
AnnaBridge 171:3a7713b1edbc 1406 */
AnnaBridge 171:3a7713b1edbc 1407 __STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1408 {
AnnaBridge 171:3a7713b1edbc 1409 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
AnnaBridge 171:3a7713b1edbc 1410 }
AnnaBridge 171:3a7713b1edbc 1411
AnnaBridge 171:3a7713b1edbc 1412 /**
AnnaBridge 171:3a7713b1edbc 1413 * @brief Enable LIN mode
AnnaBridge 171:3a7713b1edbc 1414 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1415 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1416 * @rmtoll CR2 LINEN LL_USART_EnableLIN
AnnaBridge 171:3a7713b1edbc 1417 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1418 * @retval None
AnnaBridge 171:3a7713b1edbc 1419 */
AnnaBridge 171:3a7713b1edbc 1420 __STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1421 {
AnnaBridge 171:3a7713b1edbc 1422 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
AnnaBridge 171:3a7713b1edbc 1423 }
AnnaBridge 171:3a7713b1edbc 1424
AnnaBridge 171:3a7713b1edbc 1425 /**
AnnaBridge 171:3a7713b1edbc 1426 * @brief Disable LIN mode
AnnaBridge 171:3a7713b1edbc 1427 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1428 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1429 * @rmtoll CR2 LINEN LL_USART_DisableLIN
AnnaBridge 171:3a7713b1edbc 1430 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1431 * @retval None
AnnaBridge 171:3a7713b1edbc 1432 */
AnnaBridge 171:3a7713b1edbc 1433 __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1434 {
AnnaBridge 171:3a7713b1edbc 1435 CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
AnnaBridge 171:3a7713b1edbc 1436 }
AnnaBridge 171:3a7713b1edbc 1437
AnnaBridge 171:3a7713b1edbc 1438 /**
AnnaBridge 171:3a7713b1edbc 1439 * @brief Indicate if LIN mode is enabled
AnnaBridge 171:3a7713b1edbc 1440 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1441 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1442 * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN
AnnaBridge 171:3a7713b1edbc 1443 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1444 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1445 */
AnnaBridge 171:3a7713b1edbc 1446 __STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1447 {
AnnaBridge 171:3a7713b1edbc 1448 return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN));
AnnaBridge 171:3a7713b1edbc 1449 }
AnnaBridge 171:3a7713b1edbc 1450
AnnaBridge 171:3a7713b1edbc 1451 /**
AnnaBridge 171:3a7713b1edbc 1452 * @}
AnnaBridge 171:3a7713b1edbc 1453 */
AnnaBridge 171:3a7713b1edbc 1454
AnnaBridge 171:3a7713b1edbc 1455 /** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services
AnnaBridge 171:3a7713b1edbc 1456 * @{
AnnaBridge 171:3a7713b1edbc 1457 */
AnnaBridge 171:3a7713b1edbc 1458
AnnaBridge 171:3a7713b1edbc 1459 /**
AnnaBridge 171:3a7713b1edbc 1460 * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART)
AnnaBridge 171:3a7713b1edbc 1461 * @note In UART mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1462 * - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1463 * - CLKEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1464 * - SCEN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 1465 * - IREN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 1466 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 171:3a7713b1edbc 1467 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 1468 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 171:3a7713b1edbc 1469 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 1470 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 171:3a7713b1edbc 1471 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 171:3a7713b1edbc 1472 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 1473 * @note Other remaining configurations items related to Asynchronous Mode
AnnaBridge 171:3a7713b1edbc 1474 * (as Baud Rate, Word length, Parity, ...) should be set using
AnnaBridge 171:3a7713b1edbc 1475 * dedicated functions
AnnaBridge 171:3a7713b1edbc 1476 * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n
AnnaBridge 171:3a7713b1edbc 1477 * CR2 CLKEN LL_USART_ConfigAsyncMode\n
AnnaBridge 171:3a7713b1edbc 1478 * CR3 SCEN LL_USART_ConfigAsyncMode\n
AnnaBridge 171:3a7713b1edbc 1479 * CR3 IREN LL_USART_ConfigAsyncMode\n
AnnaBridge 171:3a7713b1edbc 1480 * CR3 HDSEL LL_USART_ConfigAsyncMode
AnnaBridge 171:3a7713b1edbc 1481 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1482 * @retval None
AnnaBridge 171:3a7713b1edbc 1483 */
AnnaBridge 171:3a7713b1edbc 1484 __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1485 {
AnnaBridge 171:3a7713b1edbc 1486 /* In Asynchronous mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1487 - LINEN, CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1488 - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 1489 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
AnnaBridge 171:3a7713b1edbc 1490 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
AnnaBridge 171:3a7713b1edbc 1491 }
AnnaBridge 171:3a7713b1edbc 1492
AnnaBridge 171:3a7713b1edbc 1493 /**
AnnaBridge 171:3a7713b1edbc 1494 * @brief Perform basic configuration of USART for enabling use in Synchronous Mode
AnnaBridge 171:3a7713b1edbc 1495 * @note In Synchronous mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1496 * - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1497 * - SCEN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 1498 * - IREN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 1499 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 171:3a7713b1edbc 1500 * This function also sets the USART in Synchronous mode.
AnnaBridge 171:3a7713b1edbc 1501 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1502 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1503 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 1504 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 171:3a7713b1edbc 1505 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 171:3a7713b1edbc 1506 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 171:3a7713b1edbc 1507 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 1508 * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 1509 * @note Other remaining configurations items related to Synchronous Mode
AnnaBridge 171:3a7713b1edbc 1510 * (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using
AnnaBridge 171:3a7713b1edbc 1511 * dedicated functions
AnnaBridge 171:3a7713b1edbc 1512 * @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n
AnnaBridge 171:3a7713b1edbc 1513 * CR2 CLKEN LL_USART_ConfigSyncMode\n
AnnaBridge 171:3a7713b1edbc 1514 * CR3 SCEN LL_USART_ConfigSyncMode\n
AnnaBridge 171:3a7713b1edbc 1515 * CR3 IREN LL_USART_ConfigSyncMode\n
AnnaBridge 171:3a7713b1edbc 1516 * CR3 HDSEL LL_USART_ConfigSyncMode
AnnaBridge 171:3a7713b1edbc 1517 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1518 * @retval None
AnnaBridge 171:3a7713b1edbc 1519 */
AnnaBridge 171:3a7713b1edbc 1520 __STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1521 {
AnnaBridge 171:3a7713b1edbc 1522 /* In Synchronous mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1523 - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1524 - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 1525 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
AnnaBridge 171:3a7713b1edbc 1526 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
AnnaBridge 171:3a7713b1edbc 1527 /* set the UART/USART in Synchronous mode */
AnnaBridge 171:3a7713b1edbc 1528 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
AnnaBridge 171:3a7713b1edbc 1529 }
AnnaBridge 171:3a7713b1edbc 1530
AnnaBridge 171:3a7713b1edbc 1531 /**
AnnaBridge 171:3a7713b1edbc 1532 * @brief Perform basic configuration of USART for enabling use in LIN Mode
AnnaBridge 171:3a7713b1edbc 1533 * @note In LIN mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1534 * - STOP and CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1535 * - SCEN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 1536 * - IREN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 1537 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 171:3a7713b1edbc 1538 * This function also set the UART/USART in LIN mode.
AnnaBridge 171:3a7713b1edbc 1539 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1540 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1541 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 1542 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 1543 * - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
AnnaBridge 171:3a7713b1edbc 1544 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 171:3a7713b1edbc 1545 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 171:3a7713b1edbc 1546 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 1547 * - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function
AnnaBridge 171:3a7713b1edbc 1548 * @note Other remaining configurations items related to LIN Mode
AnnaBridge 171:3a7713b1edbc 1549 * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
AnnaBridge 171:3a7713b1edbc 1550 * dedicated functions
AnnaBridge 171:3a7713b1edbc 1551 * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n
AnnaBridge 171:3a7713b1edbc 1552 * CR2 STOP LL_USART_ConfigLINMode\n
AnnaBridge 171:3a7713b1edbc 1553 * CR2 LINEN LL_USART_ConfigLINMode\n
AnnaBridge 171:3a7713b1edbc 1554 * CR3 IREN LL_USART_ConfigLINMode\n
AnnaBridge 171:3a7713b1edbc 1555 * CR3 SCEN LL_USART_ConfigLINMode\n
AnnaBridge 171:3a7713b1edbc 1556 * CR3 HDSEL LL_USART_ConfigLINMode
AnnaBridge 171:3a7713b1edbc 1557 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1558 * @retval None
AnnaBridge 171:3a7713b1edbc 1559 */
AnnaBridge 171:3a7713b1edbc 1560 __STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1561 {
AnnaBridge 171:3a7713b1edbc 1562 /* In LIN mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1563 - STOP and CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1564 - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 1565 CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
AnnaBridge 171:3a7713b1edbc 1566 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
AnnaBridge 171:3a7713b1edbc 1567 /* Set the UART/USART in LIN mode */
AnnaBridge 171:3a7713b1edbc 1568 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
AnnaBridge 171:3a7713b1edbc 1569 }
AnnaBridge 171:3a7713b1edbc 1570
AnnaBridge 171:3a7713b1edbc 1571 /**
AnnaBridge 171:3a7713b1edbc 1572 * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode
AnnaBridge 171:3a7713b1edbc 1573 * @note In Half Duplex mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1574 * - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1575 * - CLKEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1576 * - SCEN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 1577 * - IREN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 1578 * This function also sets the UART/USART in Half Duplex mode.
AnnaBridge 171:3a7713b1edbc 1579 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1580 * Half-Duplex mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1581 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 1582 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 171:3a7713b1edbc 1583 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 1584 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 171:3a7713b1edbc 1585 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 171:3a7713b1edbc 1586 * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 1587 * @note Other remaining configurations items related to Half Duplex Mode
AnnaBridge 171:3a7713b1edbc 1588 * (as Baud Rate, Word length, Parity, ...) should be set using
AnnaBridge 171:3a7713b1edbc 1589 * dedicated functions
AnnaBridge 171:3a7713b1edbc 1590 * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n
AnnaBridge 171:3a7713b1edbc 1591 * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n
AnnaBridge 171:3a7713b1edbc 1592 * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n
AnnaBridge 171:3a7713b1edbc 1593 * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n
AnnaBridge 171:3a7713b1edbc 1594 * CR3 IREN LL_USART_ConfigHalfDuplexMode
AnnaBridge 171:3a7713b1edbc 1595 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1596 * @retval None
AnnaBridge 171:3a7713b1edbc 1597 */
AnnaBridge 171:3a7713b1edbc 1598 __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1599 {
AnnaBridge 171:3a7713b1edbc 1600 /* In Half Duplex mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1601 - LINEN and CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1602 - SCEN and IREN bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 1603 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
AnnaBridge 171:3a7713b1edbc 1604 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
AnnaBridge 171:3a7713b1edbc 1605 /* set the UART/USART in Half Duplex mode */
AnnaBridge 171:3a7713b1edbc 1606 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
AnnaBridge 171:3a7713b1edbc 1607 }
AnnaBridge 171:3a7713b1edbc 1608
AnnaBridge 171:3a7713b1edbc 1609 /**
AnnaBridge 171:3a7713b1edbc 1610 * @brief Perform basic configuration of USART for enabling use in Smartcard Mode
AnnaBridge 171:3a7713b1edbc 1611 * @note In Smartcard mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1612 * - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1613 * - IREN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 1614 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 171:3a7713b1edbc 1615 * This function also configures Stop bits to 1.5 bits and
AnnaBridge 171:3a7713b1edbc 1616 * sets the USART in Smartcard mode (SCEN bit).
AnnaBridge 171:3a7713b1edbc 1617 * Clock Output is also enabled (CLKEN).
AnnaBridge 171:3a7713b1edbc 1618 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1619 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1620 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 1621 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 171:3a7713b1edbc 1622 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 171:3a7713b1edbc 1623 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 1624 * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
AnnaBridge 171:3a7713b1edbc 1625 * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 1626 * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function
AnnaBridge 171:3a7713b1edbc 1627 * @note Other remaining configurations items related to Smartcard Mode
AnnaBridge 171:3a7713b1edbc 1628 * (as Baud Rate, Word length, Parity, ...) should be set using
AnnaBridge 171:3a7713b1edbc 1629 * dedicated functions
AnnaBridge 171:3a7713b1edbc 1630 * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n
AnnaBridge 171:3a7713b1edbc 1631 * CR2 STOP LL_USART_ConfigSmartcardMode\n
AnnaBridge 171:3a7713b1edbc 1632 * CR2 CLKEN LL_USART_ConfigSmartcardMode\n
AnnaBridge 171:3a7713b1edbc 1633 * CR3 HDSEL LL_USART_ConfigSmartcardMode\n
AnnaBridge 171:3a7713b1edbc 1634 * CR3 SCEN LL_USART_ConfigSmartcardMode
AnnaBridge 171:3a7713b1edbc 1635 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1636 * @retval None
AnnaBridge 171:3a7713b1edbc 1637 */
AnnaBridge 171:3a7713b1edbc 1638 __STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1639 {
AnnaBridge 171:3a7713b1edbc 1640 /* In Smartcard mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1641 - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1642 - IREN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 1643 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
AnnaBridge 171:3a7713b1edbc 1644 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
AnnaBridge 171:3a7713b1edbc 1645 /* Configure Stop bits to 1.5 bits */
AnnaBridge 171:3a7713b1edbc 1646 /* Synchronous mode is activated by default */
AnnaBridge 171:3a7713b1edbc 1647 SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN));
AnnaBridge 171:3a7713b1edbc 1648 /* set the UART/USART in Smartcard mode */
AnnaBridge 171:3a7713b1edbc 1649 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
AnnaBridge 171:3a7713b1edbc 1650 }
AnnaBridge 171:3a7713b1edbc 1651
AnnaBridge 171:3a7713b1edbc 1652 /**
AnnaBridge 171:3a7713b1edbc 1653 * @brief Perform basic configuration of USART for enabling use in Irda Mode
AnnaBridge 171:3a7713b1edbc 1654 * @note In IRDA mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1655 * - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1656 * - STOP and CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1657 * - SCEN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 1658 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 171:3a7713b1edbc 1659 * This function also sets the UART/USART in IRDA mode (IREN bit).
AnnaBridge 171:3a7713b1edbc 1660 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1661 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1662 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 1663 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 171:3a7713b1edbc 1664 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 1665 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 171:3a7713b1edbc 1666 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 1667 * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
AnnaBridge 171:3a7713b1edbc 1668 * - Set IREN in CR3 using @ref LL_USART_EnableIrda() function
AnnaBridge 171:3a7713b1edbc 1669 * @note Other remaining configurations items related to Irda Mode
AnnaBridge 171:3a7713b1edbc 1670 * (as Baud Rate, Word length, Power mode, ...) should be set using
AnnaBridge 171:3a7713b1edbc 1671 * dedicated functions
AnnaBridge 171:3a7713b1edbc 1672 * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n
AnnaBridge 171:3a7713b1edbc 1673 * CR2 CLKEN LL_USART_ConfigIrdaMode\n
AnnaBridge 171:3a7713b1edbc 1674 * CR2 STOP LL_USART_ConfigIrdaMode\n
AnnaBridge 171:3a7713b1edbc 1675 * CR3 SCEN LL_USART_ConfigIrdaMode\n
AnnaBridge 171:3a7713b1edbc 1676 * CR3 HDSEL LL_USART_ConfigIrdaMode\n
AnnaBridge 171:3a7713b1edbc 1677 * CR3 IREN LL_USART_ConfigIrdaMode
AnnaBridge 171:3a7713b1edbc 1678 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1679 * @retval None
AnnaBridge 171:3a7713b1edbc 1680 */
AnnaBridge 171:3a7713b1edbc 1681 __STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1682 {
AnnaBridge 171:3a7713b1edbc 1683 /* In IRDA mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1684 - LINEN, STOP and CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1685 - SCEN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 1686 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
AnnaBridge 171:3a7713b1edbc 1687 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
AnnaBridge 171:3a7713b1edbc 1688 /* set the UART/USART in IRDA mode */
AnnaBridge 171:3a7713b1edbc 1689 SET_BIT(USARTx->CR3, USART_CR3_IREN);
AnnaBridge 171:3a7713b1edbc 1690 }
AnnaBridge 171:3a7713b1edbc 1691
AnnaBridge 171:3a7713b1edbc 1692 /**
AnnaBridge 171:3a7713b1edbc 1693 * @brief Perform basic configuration of USART for enabling use in Multi processor Mode
AnnaBridge 171:3a7713b1edbc 1694 * (several USARTs connected in a network, one of the USARTs can be the master,
AnnaBridge 171:3a7713b1edbc 1695 * its TX output connected to the RX inputs of the other slaves USARTs).
AnnaBridge 171:3a7713b1edbc 1696 * @note In MultiProcessor mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1697 * - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1698 * - CLKEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1699 * - SCEN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 1700 * - IREN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 1701 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 171:3a7713b1edbc 1702 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 1703 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 171:3a7713b1edbc 1704 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 1705 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 171:3a7713b1edbc 1706 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 171:3a7713b1edbc 1707 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 1708 * @note Other remaining configurations items related to Multi processor Mode
AnnaBridge 171:3a7713b1edbc 1709 * (as Baud Rate, Wake Up Method, Node address, ...) should be set using
AnnaBridge 171:3a7713b1edbc 1710 * dedicated functions
AnnaBridge 171:3a7713b1edbc 1711 * @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n
AnnaBridge 171:3a7713b1edbc 1712 * CR2 CLKEN LL_USART_ConfigMultiProcessMode\n
AnnaBridge 171:3a7713b1edbc 1713 * CR3 SCEN LL_USART_ConfigMultiProcessMode\n
AnnaBridge 171:3a7713b1edbc 1714 * CR3 HDSEL LL_USART_ConfigMultiProcessMode\n
AnnaBridge 171:3a7713b1edbc 1715 * CR3 IREN LL_USART_ConfigMultiProcessMode
AnnaBridge 171:3a7713b1edbc 1716 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1717 * @retval None
AnnaBridge 171:3a7713b1edbc 1718 */
AnnaBridge 171:3a7713b1edbc 1719 __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1720 {
AnnaBridge 171:3a7713b1edbc 1721 /* In Multi Processor mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 1722 - LINEN and CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 1723 - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 1724 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
AnnaBridge 171:3a7713b1edbc 1725 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
AnnaBridge 171:3a7713b1edbc 1726 }
AnnaBridge 171:3a7713b1edbc 1727
AnnaBridge 171:3a7713b1edbc 1728 /**
AnnaBridge 171:3a7713b1edbc 1729 * @}
AnnaBridge 171:3a7713b1edbc 1730 */
AnnaBridge 171:3a7713b1edbc 1731
AnnaBridge 171:3a7713b1edbc 1732 /** @defgroup USART_LL_EF_FLAG_Management FLAG_Management
AnnaBridge 171:3a7713b1edbc 1733 * @{
AnnaBridge 171:3a7713b1edbc 1734 */
AnnaBridge 171:3a7713b1edbc 1735
AnnaBridge 171:3a7713b1edbc 1736 /**
AnnaBridge 171:3a7713b1edbc 1737 * @brief Check if the USART Parity Error Flag is set or not
AnnaBridge 171:3a7713b1edbc 1738 * @rmtoll SR PE LL_USART_IsActiveFlag_PE
AnnaBridge 171:3a7713b1edbc 1739 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1740 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1741 */
AnnaBridge 171:3a7713b1edbc 1742 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1743 {
AnnaBridge 171:3a7713b1edbc 1744 return (READ_BIT(USARTx->SR, USART_SR_PE) == (USART_SR_PE));
AnnaBridge 171:3a7713b1edbc 1745 }
AnnaBridge 171:3a7713b1edbc 1746
AnnaBridge 171:3a7713b1edbc 1747 /**
AnnaBridge 171:3a7713b1edbc 1748 * @brief Check if the USART Framing Error Flag is set or not
AnnaBridge 171:3a7713b1edbc 1749 * @rmtoll SR FE LL_USART_IsActiveFlag_FE
AnnaBridge 171:3a7713b1edbc 1750 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1751 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1752 */
AnnaBridge 171:3a7713b1edbc 1753 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1754 {
AnnaBridge 171:3a7713b1edbc 1755 return (READ_BIT(USARTx->SR, USART_SR_FE) == (USART_SR_FE));
AnnaBridge 171:3a7713b1edbc 1756 }
AnnaBridge 171:3a7713b1edbc 1757
AnnaBridge 171:3a7713b1edbc 1758 /**
AnnaBridge 171:3a7713b1edbc 1759 * @brief Check if the USART Noise error detected Flag is set or not
AnnaBridge 171:3a7713b1edbc 1760 * @rmtoll SR NF LL_USART_IsActiveFlag_NE
AnnaBridge 171:3a7713b1edbc 1761 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1762 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1763 */
AnnaBridge 171:3a7713b1edbc 1764 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1765 {
AnnaBridge 171:3a7713b1edbc 1766 return (READ_BIT(USARTx->SR, USART_SR_NE) == (USART_SR_NE));
AnnaBridge 171:3a7713b1edbc 1767 }
AnnaBridge 171:3a7713b1edbc 1768
AnnaBridge 171:3a7713b1edbc 1769 /**
AnnaBridge 171:3a7713b1edbc 1770 * @brief Check if the USART OverRun Error Flag is set or not
AnnaBridge 171:3a7713b1edbc 1771 * @rmtoll SR ORE LL_USART_IsActiveFlag_ORE
AnnaBridge 171:3a7713b1edbc 1772 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1773 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1774 */
AnnaBridge 171:3a7713b1edbc 1775 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1776 {
AnnaBridge 171:3a7713b1edbc 1777 return (READ_BIT(USARTx->SR, USART_SR_ORE) == (USART_SR_ORE));
AnnaBridge 171:3a7713b1edbc 1778 }
AnnaBridge 171:3a7713b1edbc 1779
AnnaBridge 171:3a7713b1edbc 1780 /**
AnnaBridge 171:3a7713b1edbc 1781 * @brief Check if the USART IDLE line detected Flag is set or not
AnnaBridge 171:3a7713b1edbc 1782 * @rmtoll SR IDLE LL_USART_IsActiveFlag_IDLE
AnnaBridge 171:3a7713b1edbc 1783 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1784 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1785 */
AnnaBridge 171:3a7713b1edbc 1786 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1787 {
AnnaBridge 171:3a7713b1edbc 1788 return (READ_BIT(USARTx->SR, USART_SR_IDLE) == (USART_SR_IDLE));
AnnaBridge 171:3a7713b1edbc 1789 }
AnnaBridge 171:3a7713b1edbc 1790
AnnaBridge 171:3a7713b1edbc 1791 /**
AnnaBridge 171:3a7713b1edbc 1792 * @brief Check if the USART Read Data Register Not Empty Flag is set or not
AnnaBridge 171:3a7713b1edbc 1793 * @rmtoll SR RXNE LL_USART_IsActiveFlag_RXNE
AnnaBridge 171:3a7713b1edbc 1794 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1795 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1796 */
AnnaBridge 171:3a7713b1edbc 1797 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1798 {
AnnaBridge 171:3a7713b1edbc 1799 return (READ_BIT(USARTx->SR, USART_SR_RXNE) == (USART_SR_RXNE));
AnnaBridge 171:3a7713b1edbc 1800 }
AnnaBridge 171:3a7713b1edbc 1801
AnnaBridge 171:3a7713b1edbc 1802 /**
AnnaBridge 171:3a7713b1edbc 1803 * @brief Check if the USART Transmission Complete Flag is set or not
AnnaBridge 171:3a7713b1edbc 1804 * @rmtoll SR TC LL_USART_IsActiveFlag_TC
AnnaBridge 171:3a7713b1edbc 1805 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1806 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1807 */
AnnaBridge 171:3a7713b1edbc 1808 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1809 {
AnnaBridge 171:3a7713b1edbc 1810 return (READ_BIT(USARTx->SR, USART_SR_TC) == (USART_SR_TC));
AnnaBridge 171:3a7713b1edbc 1811 }
AnnaBridge 171:3a7713b1edbc 1812
AnnaBridge 171:3a7713b1edbc 1813 /**
AnnaBridge 171:3a7713b1edbc 1814 * @brief Check if the USART Transmit Data Register Empty Flag is set or not
AnnaBridge 171:3a7713b1edbc 1815 * @rmtoll SR TXE LL_USART_IsActiveFlag_TXE
AnnaBridge 171:3a7713b1edbc 1816 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1817 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1818 */
AnnaBridge 171:3a7713b1edbc 1819 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1820 {
AnnaBridge 171:3a7713b1edbc 1821 return (READ_BIT(USARTx->SR, USART_SR_TXE) == (USART_SR_TXE));
AnnaBridge 171:3a7713b1edbc 1822 }
AnnaBridge 171:3a7713b1edbc 1823
AnnaBridge 171:3a7713b1edbc 1824 /**
AnnaBridge 171:3a7713b1edbc 1825 * @brief Check if the USART LIN Break Detection Flag is set or not
AnnaBridge 171:3a7713b1edbc 1826 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1827 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1828 * @rmtoll SR LBD LL_USART_IsActiveFlag_LBD
AnnaBridge 171:3a7713b1edbc 1829 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1830 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1831 */
AnnaBridge 171:3a7713b1edbc 1832 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1833 {
AnnaBridge 171:3a7713b1edbc 1834 return (READ_BIT(USARTx->SR, USART_SR_LBD) == (USART_SR_LBD));
AnnaBridge 171:3a7713b1edbc 1835 }
AnnaBridge 171:3a7713b1edbc 1836
AnnaBridge 171:3a7713b1edbc 1837 /**
AnnaBridge 171:3a7713b1edbc 1838 * @brief Check if the USART CTS Flag is set or not
AnnaBridge 171:3a7713b1edbc 1839 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1840 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1841 * @rmtoll SR CTS LL_USART_IsActiveFlag_nCTS
AnnaBridge 171:3a7713b1edbc 1842 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1843 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1844 */
AnnaBridge 171:3a7713b1edbc 1845 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1846 {
AnnaBridge 171:3a7713b1edbc 1847 return (READ_BIT(USARTx->SR, USART_SR_CTS) == (USART_SR_CTS));
AnnaBridge 171:3a7713b1edbc 1848 }
AnnaBridge 171:3a7713b1edbc 1849
AnnaBridge 171:3a7713b1edbc 1850 /**
AnnaBridge 171:3a7713b1edbc 1851 * @brief Check if the USART Send Break Flag is set or not
AnnaBridge 171:3a7713b1edbc 1852 * @rmtoll CR1 SBK LL_USART_IsActiveFlag_SBK
AnnaBridge 171:3a7713b1edbc 1853 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1854 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1855 */
AnnaBridge 171:3a7713b1edbc 1856 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1857 {
AnnaBridge 171:3a7713b1edbc 1858 return (READ_BIT(USARTx->CR1, USART_CR1_SBK) == (USART_CR1_SBK));
AnnaBridge 171:3a7713b1edbc 1859 }
AnnaBridge 171:3a7713b1edbc 1860
AnnaBridge 171:3a7713b1edbc 1861 /**
AnnaBridge 171:3a7713b1edbc 1862 * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not
AnnaBridge 171:3a7713b1edbc 1863 * @rmtoll CR1 RWU LL_USART_IsActiveFlag_RWU
AnnaBridge 171:3a7713b1edbc 1864 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1865 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1866 */
AnnaBridge 171:3a7713b1edbc 1867 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1868 {
AnnaBridge 171:3a7713b1edbc 1869 return (READ_BIT(USARTx->CR1, USART_CR1_RWU) == (USART_CR1_RWU));
AnnaBridge 171:3a7713b1edbc 1870 }
AnnaBridge 171:3a7713b1edbc 1871
AnnaBridge 171:3a7713b1edbc 1872 /**
AnnaBridge 171:3a7713b1edbc 1873 * @brief Clear Parity Error Flag
AnnaBridge 171:3a7713b1edbc 1874 * @note Clearing this flag is done by a read access to the USARTx_SR
AnnaBridge 171:3a7713b1edbc 1875 * register followed by a read access to the USARTx_DR register.
AnnaBridge 171:3a7713b1edbc 1876 * @note Please also consider that when clearing this flag, other flags as
AnnaBridge 171:3a7713b1edbc 1877 * NE, FE, ORE, IDLE would also be cleared.
AnnaBridge 171:3a7713b1edbc 1878 * @rmtoll SR PE LL_USART_ClearFlag_PE
AnnaBridge 171:3a7713b1edbc 1879 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1880 * @retval None
AnnaBridge 171:3a7713b1edbc 1881 */
AnnaBridge 171:3a7713b1edbc 1882 __STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1883 {
AnnaBridge 171:3a7713b1edbc 1884 __IO uint32_t tmpreg;
AnnaBridge 171:3a7713b1edbc 1885 tmpreg = USARTx->SR;
AnnaBridge 171:3a7713b1edbc 1886 (void) tmpreg;
AnnaBridge 171:3a7713b1edbc 1887 tmpreg = USARTx->DR;
AnnaBridge 171:3a7713b1edbc 1888 (void) tmpreg;
AnnaBridge 171:3a7713b1edbc 1889 }
AnnaBridge 171:3a7713b1edbc 1890
AnnaBridge 171:3a7713b1edbc 1891 /**
AnnaBridge 171:3a7713b1edbc 1892 * @brief Clear Framing Error Flag
AnnaBridge 171:3a7713b1edbc 1893 * @note Clearing this flag is done by a read access to the USARTx_SR
AnnaBridge 171:3a7713b1edbc 1894 * register followed by a read access to the USARTx_DR register.
AnnaBridge 171:3a7713b1edbc 1895 * @note Please also consider that when clearing this flag, other flags as
AnnaBridge 171:3a7713b1edbc 1896 * PE, NE, ORE, IDLE would also be cleared.
AnnaBridge 171:3a7713b1edbc 1897 * @rmtoll SR FE LL_USART_ClearFlag_FE
AnnaBridge 171:3a7713b1edbc 1898 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1899 * @retval None
AnnaBridge 171:3a7713b1edbc 1900 */
AnnaBridge 171:3a7713b1edbc 1901 __STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1902 {
AnnaBridge 171:3a7713b1edbc 1903 __IO uint32_t tmpreg;
AnnaBridge 171:3a7713b1edbc 1904 tmpreg = USARTx->SR;
AnnaBridge 171:3a7713b1edbc 1905 (void) tmpreg;
AnnaBridge 171:3a7713b1edbc 1906 tmpreg = USARTx->DR;
AnnaBridge 171:3a7713b1edbc 1907 (void) tmpreg;
AnnaBridge 171:3a7713b1edbc 1908 }
AnnaBridge 171:3a7713b1edbc 1909
AnnaBridge 171:3a7713b1edbc 1910 /**
AnnaBridge 171:3a7713b1edbc 1911 * @brief Clear Noise detected Flag
AnnaBridge 171:3a7713b1edbc 1912 * @note Clearing this flag is done by a read access to the USARTx_SR
AnnaBridge 171:3a7713b1edbc 1913 * register followed by a read access to the USARTx_DR register.
AnnaBridge 171:3a7713b1edbc 1914 * @note Please also consider that when clearing this flag, other flags as
AnnaBridge 171:3a7713b1edbc 1915 * PE, FE, ORE, IDLE would also be cleared.
AnnaBridge 171:3a7713b1edbc 1916 * @rmtoll SR NF LL_USART_ClearFlag_NE
AnnaBridge 171:3a7713b1edbc 1917 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1918 * @retval None
AnnaBridge 171:3a7713b1edbc 1919 */
AnnaBridge 171:3a7713b1edbc 1920 __STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1921 {
AnnaBridge 171:3a7713b1edbc 1922 __IO uint32_t tmpreg;
AnnaBridge 171:3a7713b1edbc 1923 tmpreg = USARTx->SR;
AnnaBridge 171:3a7713b1edbc 1924 (void) tmpreg;
AnnaBridge 171:3a7713b1edbc 1925 tmpreg = USARTx->DR;
AnnaBridge 171:3a7713b1edbc 1926 (void) tmpreg;
AnnaBridge 171:3a7713b1edbc 1927 }
AnnaBridge 171:3a7713b1edbc 1928
AnnaBridge 171:3a7713b1edbc 1929 /**
AnnaBridge 171:3a7713b1edbc 1930 * @brief Clear OverRun Error Flag
AnnaBridge 171:3a7713b1edbc 1931 * @note Clearing this flag is done by a read access to the USARTx_SR
AnnaBridge 171:3a7713b1edbc 1932 * register followed by a read access to the USARTx_DR register.
AnnaBridge 171:3a7713b1edbc 1933 * @note Please also consider that when clearing this flag, other flags as
AnnaBridge 171:3a7713b1edbc 1934 * PE, NE, FE, IDLE would also be cleared.
AnnaBridge 171:3a7713b1edbc 1935 * @rmtoll SR ORE LL_USART_ClearFlag_ORE
AnnaBridge 171:3a7713b1edbc 1936 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1937 * @retval None
AnnaBridge 171:3a7713b1edbc 1938 */
AnnaBridge 171:3a7713b1edbc 1939 __STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1940 {
AnnaBridge 171:3a7713b1edbc 1941 __IO uint32_t tmpreg;
AnnaBridge 171:3a7713b1edbc 1942 tmpreg = USARTx->SR;
AnnaBridge 171:3a7713b1edbc 1943 (void) tmpreg;
AnnaBridge 171:3a7713b1edbc 1944 tmpreg = USARTx->DR;
AnnaBridge 171:3a7713b1edbc 1945 (void) tmpreg;
AnnaBridge 171:3a7713b1edbc 1946 }
AnnaBridge 171:3a7713b1edbc 1947
AnnaBridge 171:3a7713b1edbc 1948 /**
AnnaBridge 171:3a7713b1edbc 1949 * @brief Clear IDLE line detected Flag
AnnaBridge 171:3a7713b1edbc 1950 * @note Clearing this flag is done by a read access to the USARTx_SR
AnnaBridge 171:3a7713b1edbc 1951 * register followed by a read access to the USARTx_DR register.
AnnaBridge 171:3a7713b1edbc 1952 * @note Please also consider that when clearing this flag, other flags as
AnnaBridge 171:3a7713b1edbc 1953 * PE, NE, FE, ORE would also be cleared.
AnnaBridge 171:3a7713b1edbc 1954 * @rmtoll SR IDLE LL_USART_ClearFlag_IDLE
AnnaBridge 171:3a7713b1edbc 1955 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1956 * @retval None
AnnaBridge 171:3a7713b1edbc 1957 */
AnnaBridge 171:3a7713b1edbc 1958 __STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1959 {
AnnaBridge 171:3a7713b1edbc 1960 __IO uint32_t tmpreg;
AnnaBridge 171:3a7713b1edbc 1961 tmpreg = USARTx->SR;
AnnaBridge 171:3a7713b1edbc 1962 (void) tmpreg;
AnnaBridge 171:3a7713b1edbc 1963 tmpreg = USARTx->DR;
AnnaBridge 171:3a7713b1edbc 1964 (void) tmpreg;
AnnaBridge 171:3a7713b1edbc 1965 }
AnnaBridge 171:3a7713b1edbc 1966
AnnaBridge 171:3a7713b1edbc 1967 /**
AnnaBridge 171:3a7713b1edbc 1968 * @brief Clear Transmission Complete Flag
AnnaBridge 171:3a7713b1edbc 1969 * @rmtoll SR TC LL_USART_ClearFlag_TC
AnnaBridge 171:3a7713b1edbc 1970 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1971 * @retval None
AnnaBridge 171:3a7713b1edbc 1972 */
AnnaBridge 171:3a7713b1edbc 1973 __STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1974 {
AnnaBridge 171:3a7713b1edbc 1975 WRITE_REG(USARTx->SR , ~(USART_SR_TC));
AnnaBridge 171:3a7713b1edbc 1976 }
AnnaBridge 171:3a7713b1edbc 1977
AnnaBridge 171:3a7713b1edbc 1978 /**
AnnaBridge 171:3a7713b1edbc 1979 * @brief Clear RX Not Empty Flag
AnnaBridge 171:3a7713b1edbc 1980 * @rmtoll SR RXNE LL_USART_ClearFlag_RXNE
AnnaBridge 171:3a7713b1edbc 1981 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1982 * @retval None
AnnaBridge 171:3a7713b1edbc 1983 */
AnnaBridge 171:3a7713b1edbc 1984 __STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1985 {
AnnaBridge 171:3a7713b1edbc 1986 WRITE_REG(USARTx->SR , ~(USART_SR_RXNE));
AnnaBridge 171:3a7713b1edbc 1987 }
AnnaBridge 171:3a7713b1edbc 1988
AnnaBridge 171:3a7713b1edbc 1989 /**
AnnaBridge 171:3a7713b1edbc 1990 * @brief Clear LIN Break Detection Flag
AnnaBridge 171:3a7713b1edbc 1991 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1992 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1993 * @rmtoll SR LBD LL_USART_ClearFlag_LBD
AnnaBridge 171:3a7713b1edbc 1994 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1995 * @retval None
AnnaBridge 171:3a7713b1edbc 1996 */
AnnaBridge 171:3a7713b1edbc 1997 __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1998 {
AnnaBridge 171:3a7713b1edbc 1999 WRITE_REG(USARTx->SR , ~(USART_SR_LBD));
AnnaBridge 171:3a7713b1edbc 2000 }
AnnaBridge 171:3a7713b1edbc 2001
AnnaBridge 171:3a7713b1edbc 2002 /**
AnnaBridge 171:3a7713b1edbc 2003 * @brief Clear CTS Interrupt Flag
AnnaBridge 171:3a7713b1edbc 2004 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2005 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2006 * @rmtoll SR CTS LL_USART_ClearFlag_nCTS
AnnaBridge 171:3a7713b1edbc 2007 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2008 * @retval None
AnnaBridge 171:3a7713b1edbc 2009 */
AnnaBridge 171:3a7713b1edbc 2010 __STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2011 {
AnnaBridge 171:3a7713b1edbc 2012 WRITE_REG(USARTx->SR , ~(USART_SR_CTS));
AnnaBridge 171:3a7713b1edbc 2013 }
AnnaBridge 171:3a7713b1edbc 2014
AnnaBridge 171:3a7713b1edbc 2015 /**
AnnaBridge 171:3a7713b1edbc 2016 * @}
AnnaBridge 171:3a7713b1edbc 2017 */
AnnaBridge 171:3a7713b1edbc 2018
AnnaBridge 171:3a7713b1edbc 2019 /** @defgroup USART_LL_EF_IT_Management IT_Management
AnnaBridge 171:3a7713b1edbc 2020 * @{
AnnaBridge 171:3a7713b1edbc 2021 */
AnnaBridge 171:3a7713b1edbc 2022
AnnaBridge 171:3a7713b1edbc 2023 /**
AnnaBridge 171:3a7713b1edbc 2024 * @brief Enable IDLE Interrupt
AnnaBridge 171:3a7713b1edbc 2025 * @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE
AnnaBridge 171:3a7713b1edbc 2026 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2027 * @retval None
AnnaBridge 171:3a7713b1edbc 2028 */
AnnaBridge 171:3a7713b1edbc 2029 __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2030 {
AnnaBridge 171:3a7713b1edbc 2031 SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
AnnaBridge 171:3a7713b1edbc 2032 }
AnnaBridge 171:3a7713b1edbc 2033
AnnaBridge 171:3a7713b1edbc 2034 /**
AnnaBridge 171:3a7713b1edbc 2035 * @brief Enable RX Not Empty Interrupt
AnnaBridge 171:3a7713b1edbc 2036 * @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE
AnnaBridge 171:3a7713b1edbc 2037 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2038 * @retval None
AnnaBridge 171:3a7713b1edbc 2039 */
AnnaBridge 171:3a7713b1edbc 2040 __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2041 {
AnnaBridge 171:3a7713b1edbc 2042 SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
AnnaBridge 171:3a7713b1edbc 2043 }
AnnaBridge 171:3a7713b1edbc 2044
AnnaBridge 171:3a7713b1edbc 2045 /**
AnnaBridge 171:3a7713b1edbc 2046 * @brief Enable Transmission Complete Interrupt
AnnaBridge 171:3a7713b1edbc 2047 * @rmtoll CR1 TCIE LL_USART_EnableIT_TC
AnnaBridge 171:3a7713b1edbc 2048 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2049 * @retval None
AnnaBridge 171:3a7713b1edbc 2050 */
AnnaBridge 171:3a7713b1edbc 2051 __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2052 {
AnnaBridge 171:3a7713b1edbc 2053 SET_BIT(USARTx->CR1, USART_CR1_TCIE);
AnnaBridge 171:3a7713b1edbc 2054 }
AnnaBridge 171:3a7713b1edbc 2055
AnnaBridge 171:3a7713b1edbc 2056 /**
AnnaBridge 171:3a7713b1edbc 2057 * @brief Enable TX Empty Interrupt
AnnaBridge 171:3a7713b1edbc 2058 * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE
AnnaBridge 171:3a7713b1edbc 2059 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2060 * @retval None
AnnaBridge 171:3a7713b1edbc 2061 */
AnnaBridge 171:3a7713b1edbc 2062 __STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2063 {
AnnaBridge 171:3a7713b1edbc 2064 SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
AnnaBridge 171:3a7713b1edbc 2065 }
AnnaBridge 171:3a7713b1edbc 2066
AnnaBridge 171:3a7713b1edbc 2067 /**
AnnaBridge 171:3a7713b1edbc 2068 * @brief Enable Parity Error Interrupt
AnnaBridge 171:3a7713b1edbc 2069 * @rmtoll CR1 PEIE LL_USART_EnableIT_PE
AnnaBridge 171:3a7713b1edbc 2070 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2071 * @retval None
AnnaBridge 171:3a7713b1edbc 2072 */
AnnaBridge 171:3a7713b1edbc 2073 __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2074 {
AnnaBridge 171:3a7713b1edbc 2075 SET_BIT(USARTx->CR1, USART_CR1_PEIE);
AnnaBridge 171:3a7713b1edbc 2076 }
AnnaBridge 171:3a7713b1edbc 2077
AnnaBridge 171:3a7713b1edbc 2078 /**
AnnaBridge 171:3a7713b1edbc 2079 * @brief Enable LIN Break Detection Interrupt
AnnaBridge 171:3a7713b1edbc 2080 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2081 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2082 * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD
AnnaBridge 171:3a7713b1edbc 2083 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2084 * @retval None
AnnaBridge 171:3a7713b1edbc 2085 */
AnnaBridge 171:3a7713b1edbc 2086 __STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2087 {
AnnaBridge 171:3a7713b1edbc 2088 SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
AnnaBridge 171:3a7713b1edbc 2089 }
AnnaBridge 171:3a7713b1edbc 2090
AnnaBridge 171:3a7713b1edbc 2091 /**
AnnaBridge 171:3a7713b1edbc 2092 * @brief Enable Error Interrupt
AnnaBridge 171:3a7713b1edbc 2093 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
AnnaBridge 171:3a7713b1edbc 2094 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
AnnaBridge 171:3a7713b1edbc 2095 * 0: Interrupt is inhibited
AnnaBridge 171:3a7713b1edbc 2096 * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
AnnaBridge 171:3a7713b1edbc 2097 * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR
AnnaBridge 171:3a7713b1edbc 2098 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2099 * @retval None
AnnaBridge 171:3a7713b1edbc 2100 */
AnnaBridge 171:3a7713b1edbc 2101 __STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2102 {
AnnaBridge 171:3a7713b1edbc 2103 SET_BIT(USARTx->CR3, USART_CR3_EIE);
AnnaBridge 171:3a7713b1edbc 2104 }
AnnaBridge 171:3a7713b1edbc 2105
AnnaBridge 171:3a7713b1edbc 2106 /**
AnnaBridge 171:3a7713b1edbc 2107 * @brief Enable CTS Interrupt
AnnaBridge 171:3a7713b1edbc 2108 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2109 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2110 * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
AnnaBridge 171:3a7713b1edbc 2111 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2112 * @retval None
AnnaBridge 171:3a7713b1edbc 2113 */
AnnaBridge 171:3a7713b1edbc 2114 __STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2115 {
AnnaBridge 171:3a7713b1edbc 2116 SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
AnnaBridge 171:3a7713b1edbc 2117 }
AnnaBridge 171:3a7713b1edbc 2118
AnnaBridge 171:3a7713b1edbc 2119 /**
AnnaBridge 171:3a7713b1edbc 2120 * @brief Disable IDLE Interrupt
AnnaBridge 171:3a7713b1edbc 2121 * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE
AnnaBridge 171:3a7713b1edbc 2122 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2123 * @retval None
AnnaBridge 171:3a7713b1edbc 2124 */
AnnaBridge 171:3a7713b1edbc 2125 __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2126 {
AnnaBridge 171:3a7713b1edbc 2127 CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
AnnaBridge 171:3a7713b1edbc 2128 }
AnnaBridge 171:3a7713b1edbc 2129
AnnaBridge 171:3a7713b1edbc 2130 /**
AnnaBridge 171:3a7713b1edbc 2131 * @brief Disable RX Not Empty Interrupt
AnnaBridge 171:3a7713b1edbc 2132 * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE
AnnaBridge 171:3a7713b1edbc 2133 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2134 * @retval None
AnnaBridge 171:3a7713b1edbc 2135 */
AnnaBridge 171:3a7713b1edbc 2136 __STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2137 {
AnnaBridge 171:3a7713b1edbc 2138 CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
AnnaBridge 171:3a7713b1edbc 2139 }
AnnaBridge 171:3a7713b1edbc 2140
AnnaBridge 171:3a7713b1edbc 2141 /**
AnnaBridge 171:3a7713b1edbc 2142 * @brief Disable Transmission Complete Interrupt
AnnaBridge 171:3a7713b1edbc 2143 * @rmtoll CR1 TCIE LL_USART_DisableIT_TC
AnnaBridge 171:3a7713b1edbc 2144 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2145 * @retval None
AnnaBridge 171:3a7713b1edbc 2146 */
AnnaBridge 171:3a7713b1edbc 2147 __STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2148 {
AnnaBridge 171:3a7713b1edbc 2149 CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
AnnaBridge 171:3a7713b1edbc 2150 }
AnnaBridge 171:3a7713b1edbc 2151
AnnaBridge 171:3a7713b1edbc 2152 /**
AnnaBridge 171:3a7713b1edbc 2153 * @brief Disable TX Empty Interrupt
AnnaBridge 171:3a7713b1edbc 2154 * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE
AnnaBridge 171:3a7713b1edbc 2155 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2156 * @retval None
AnnaBridge 171:3a7713b1edbc 2157 */
AnnaBridge 171:3a7713b1edbc 2158 __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2159 {
AnnaBridge 171:3a7713b1edbc 2160 CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
AnnaBridge 171:3a7713b1edbc 2161 }
AnnaBridge 171:3a7713b1edbc 2162
AnnaBridge 171:3a7713b1edbc 2163 /**
AnnaBridge 171:3a7713b1edbc 2164 * @brief Disable Parity Error Interrupt
AnnaBridge 171:3a7713b1edbc 2165 * @rmtoll CR1 PEIE LL_USART_DisableIT_PE
AnnaBridge 171:3a7713b1edbc 2166 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2167 * @retval None
AnnaBridge 171:3a7713b1edbc 2168 */
AnnaBridge 171:3a7713b1edbc 2169 __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2170 {
AnnaBridge 171:3a7713b1edbc 2171 CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
AnnaBridge 171:3a7713b1edbc 2172 }
AnnaBridge 171:3a7713b1edbc 2173
AnnaBridge 171:3a7713b1edbc 2174 /**
AnnaBridge 171:3a7713b1edbc 2175 * @brief Disable LIN Break Detection Interrupt
AnnaBridge 171:3a7713b1edbc 2176 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2177 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2178 * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD
AnnaBridge 171:3a7713b1edbc 2179 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2180 * @retval None
AnnaBridge 171:3a7713b1edbc 2181 */
AnnaBridge 171:3a7713b1edbc 2182 __STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2183 {
AnnaBridge 171:3a7713b1edbc 2184 CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
AnnaBridge 171:3a7713b1edbc 2185 }
AnnaBridge 171:3a7713b1edbc 2186
AnnaBridge 171:3a7713b1edbc 2187 /**
AnnaBridge 171:3a7713b1edbc 2188 * @brief Disable Error Interrupt
AnnaBridge 171:3a7713b1edbc 2189 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
AnnaBridge 171:3a7713b1edbc 2190 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
AnnaBridge 171:3a7713b1edbc 2191 * 0: Interrupt is inhibited
AnnaBridge 171:3a7713b1edbc 2192 * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
AnnaBridge 171:3a7713b1edbc 2193 * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR
AnnaBridge 171:3a7713b1edbc 2194 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2195 * @retval None
AnnaBridge 171:3a7713b1edbc 2196 */
AnnaBridge 171:3a7713b1edbc 2197 __STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2198 {
AnnaBridge 171:3a7713b1edbc 2199 CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
AnnaBridge 171:3a7713b1edbc 2200 }
AnnaBridge 171:3a7713b1edbc 2201
AnnaBridge 171:3a7713b1edbc 2202 /**
AnnaBridge 171:3a7713b1edbc 2203 * @brief Disable CTS Interrupt
AnnaBridge 171:3a7713b1edbc 2204 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2205 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2206 * @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
AnnaBridge 171:3a7713b1edbc 2207 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2208 * @retval None
AnnaBridge 171:3a7713b1edbc 2209 */
AnnaBridge 171:3a7713b1edbc 2210 __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2211 {
AnnaBridge 171:3a7713b1edbc 2212 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
AnnaBridge 171:3a7713b1edbc 2213 }
AnnaBridge 171:3a7713b1edbc 2214
AnnaBridge 171:3a7713b1edbc 2215 /**
AnnaBridge 171:3a7713b1edbc 2216 * @brief Check if the USART IDLE Interrupt source is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 2217 * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE
AnnaBridge 171:3a7713b1edbc 2218 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2219 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2220 */
AnnaBridge 171:3a7713b1edbc 2221 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2222 {
AnnaBridge 171:3a7713b1edbc 2223 return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
AnnaBridge 171:3a7713b1edbc 2224 }
AnnaBridge 171:3a7713b1edbc 2225
AnnaBridge 171:3a7713b1edbc 2226 /**
AnnaBridge 171:3a7713b1edbc 2227 * @brief Check if the USART RX Not Empty Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 2228 * @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE
AnnaBridge 171:3a7713b1edbc 2229 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2230 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2231 */
AnnaBridge 171:3a7713b1edbc 2232 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2233 {
AnnaBridge 171:3a7713b1edbc 2234 return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
AnnaBridge 171:3a7713b1edbc 2235 }
AnnaBridge 171:3a7713b1edbc 2236
AnnaBridge 171:3a7713b1edbc 2237 /**
AnnaBridge 171:3a7713b1edbc 2238 * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 2239 * @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC
AnnaBridge 171:3a7713b1edbc 2240 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2241 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2242 */
AnnaBridge 171:3a7713b1edbc 2243 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2244 {
AnnaBridge 171:3a7713b1edbc 2245 return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
AnnaBridge 171:3a7713b1edbc 2246 }
AnnaBridge 171:3a7713b1edbc 2247
AnnaBridge 171:3a7713b1edbc 2248 /**
AnnaBridge 171:3a7713b1edbc 2249 * @brief Check if the USART TX Empty Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 2250 * @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE
AnnaBridge 171:3a7713b1edbc 2251 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2252 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2253 */
AnnaBridge 171:3a7713b1edbc 2254 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2255 {
AnnaBridge 171:3a7713b1edbc 2256 return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
AnnaBridge 171:3a7713b1edbc 2257 }
AnnaBridge 171:3a7713b1edbc 2258
AnnaBridge 171:3a7713b1edbc 2259 /**
AnnaBridge 171:3a7713b1edbc 2260 * @brief Check if the USART Parity Error Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 2261 * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE
AnnaBridge 171:3a7713b1edbc 2262 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2263 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2264 */
AnnaBridge 171:3a7713b1edbc 2265 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2266 {
AnnaBridge 171:3a7713b1edbc 2267 return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
AnnaBridge 171:3a7713b1edbc 2268 }
AnnaBridge 171:3a7713b1edbc 2269
AnnaBridge 171:3a7713b1edbc 2270 /**
AnnaBridge 171:3a7713b1edbc 2271 * @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 2272 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2273 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2274 * @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD
AnnaBridge 171:3a7713b1edbc 2275 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2276 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2277 */
AnnaBridge 171:3a7713b1edbc 2278 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2279 {
AnnaBridge 171:3a7713b1edbc 2280 return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE));
AnnaBridge 171:3a7713b1edbc 2281 }
AnnaBridge 171:3a7713b1edbc 2282
AnnaBridge 171:3a7713b1edbc 2283 /**
AnnaBridge 171:3a7713b1edbc 2284 * @brief Check if the USART Error Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 2285 * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR
AnnaBridge 171:3a7713b1edbc 2286 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2287 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2288 */
AnnaBridge 171:3a7713b1edbc 2289 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2290 {
AnnaBridge 171:3a7713b1edbc 2291 return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
AnnaBridge 171:3a7713b1edbc 2292 }
AnnaBridge 171:3a7713b1edbc 2293
AnnaBridge 171:3a7713b1edbc 2294 /**
AnnaBridge 171:3a7713b1edbc 2295 * @brief Check if the USART CTS Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 2296 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2297 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2298 * @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
AnnaBridge 171:3a7713b1edbc 2299 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2300 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2301 */
AnnaBridge 171:3a7713b1edbc 2302 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2303 {
AnnaBridge 171:3a7713b1edbc 2304 return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
AnnaBridge 171:3a7713b1edbc 2305 }
AnnaBridge 171:3a7713b1edbc 2306
AnnaBridge 171:3a7713b1edbc 2307 /**
AnnaBridge 171:3a7713b1edbc 2308 * @}
AnnaBridge 171:3a7713b1edbc 2309 */
AnnaBridge 171:3a7713b1edbc 2310
AnnaBridge 171:3a7713b1edbc 2311 /** @defgroup USART_LL_EF_DMA_Management DMA_Management
AnnaBridge 171:3a7713b1edbc 2312 * @{
AnnaBridge 171:3a7713b1edbc 2313 */
AnnaBridge 171:3a7713b1edbc 2314
AnnaBridge 171:3a7713b1edbc 2315 /**
AnnaBridge 171:3a7713b1edbc 2316 * @brief Enable DMA Mode for reception
AnnaBridge 171:3a7713b1edbc 2317 * @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX
AnnaBridge 171:3a7713b1edbc 2318 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2319 * @retval None
AnnaBridge 171:3a7713b1edbc 2320 */
AnnaBridge 171:3a7713b1edbc 2321 __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2322 {
AnnaBridge 171:3a7713b1edbc 2323 SET_BIT(USARTx->CR3, USART_CR3_DMAR);
AnnaBridge 171:3a7713b1edbc 2324 }
AnnaBridge 171:3a7713b1edbc 2325
AnnaBridge 171:3a7713b1edbc 2326 /**
AnnaBridge 171:3a7713b1edbc 2327 * @brief Disable DMA Mode for reception
AnnaBridge 171:3a7713b1edbc 2328 * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX
AnnaBridge 171:3a7713b1edbc 2329 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2330 * @retval None
AnnaBridge 171:3a7713b1edbc 2331 */
AnnaBridge 171:3a7713b1edbc 2332 __STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2333 {
AnnaBridge 171:3a7713b1edbc 2334 CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
AnnaBridge 171:3a7713b1edbc 2335 }
AnnaBridge 171:3a7713b1edbc 2336
AnnaBridge 171:3a7713b1edbc 2337 /**
AnnaBridge 171:3a7713b1edbc 2338 * @brief Check if DMA Mode is enabled for reception
AnnaBridge 171:3a7713b1edbc 2339 * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX
AnnaBridge 171:3a7713b1edbc 2340 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2341 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2342 */
AnnaBridge 171:3a7713b1edbc 2343 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2344 {
AnnaBridge 171:3a7713b1edbc 2345 return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
AnnaBridge 171:3a7713b1edbc 2346 }
AnnaBridge 171:3a7713b1edbc 2347
AnnaBridge 171:3a7713b1edbc 2348 /**
AnnaBridge 171:3a7713b1edbc 2349 * @brief Enable DMA Mode for transmission
AnnaBridge 171:3a7713b1edbc 2350 * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX
AnnaBridge 171:3a7713b1edbc 2351 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2352 * @retval None
AnnaBridge 171:3a7713b1edbc 2353 */
AnnaBridge 171:3a7713b1edbc 2354 __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2355 {
AnnaBridge 171:3a7713b1edbc 2356 SET_BIT(USARTx->CR3, USART_CR3_DMAT);
AnnaBridge 171:3a7713b1edbc 2357 }
AnnaBridge 171:3a7713b1edbc 2358
AnnaBridge 171:3a7713b1edbc 2359 /**
AnnaBridge 171:3a7713b1edbc 2360 * @brief Disable DMA Mode for transmission
AnnaBridge 171:3a7713b1edbc 2361 * @rmtoll CR3 DMAT LL_USART_DisableDMAReq_TX
AnnaBridge 171:3a7713b1edbc 2362 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2363 * @retval None
AnnaBridge 171:3a7713b1edbc 2364 */
AnnaBridge 171:3a7713b1edbc 2365 __STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2366 {
AnnaBridge 171:3a7713b1edbc 2367 CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
AnnaBridge 171:3a7713b1edbc 2368 }
AnnaBridge 171:3a7713b1edbc 2369
AnnaBridge 171:3a7713b1edbc 2370 /**
AnnaBridge 171:3a7713b1edbc 2371 * @brief Check if DMA Mode is enabled for transmission
AnnaBridge 171:3a7713b1edbc 2372 * @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX
AnnaBridge 171:3a7713b1edbc 2373 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2374 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2375 */
AnnaBridge 171:3a7713b1edbc 2376 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2377 {
AnnaBridge 171:3a7713b1edbc 2378 return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
AnnaBridge 171:3a7713b1edbc 2379 }
AnnaBridge 171:3a7713b1edbc 2380
AnnaBridge 171:3a7713b1edbc 2381 /**
AnnaBridge 171:3a7713b1edbc 2382 * @brief Get the data register address used for DMA transfer
AnnaBridge 171:3a7713b1edbc 2383 * @rmtoll DR DR LL_USART_DMA_GetRegAddr
AnnaBridge 171:3a7713b1edbc 2384 * @note Address of Data Register is valid for both Transmit and Receive transfers.
AnnaBridge 171:3a7713b1edbc 2385 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2386 * @retval Address of data register
AnnaBridge 171:3a7713b1edbc 2387 */
AnnaBridge 171:3a7713b1edbc 2388 __STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2389 {
AnnaBridge 171:3a7713b1edbc 2390 /* return address of DR register */
AnnaBridge 171:3a7713b1edbc 2391 return ((uint32_t) &(USARTx->DR));
AnnaBridge 171:3a7713b1edbc 2392 }
AnnaBridge 171:3a7713b1edbc 2393
AnnaBridge 171:3a7713b1edbc 2394 /**
AnnaBridge 171:3a7713b1edbc 2395 * @}
AnnaBridge 171:3a7713b1edbc 2396 */
AnnaBridge 171:3a7713b1edbc 2397
AnnaBridge 171:3a7713b1edbc 2398 /** @defgroup USART_LL_EF_Data_Management Data_Management
AnnaBridge 171:3a7713b1edbc 2399 * @{
AnnaBridge 171:3a7713b1edbc 2400 */
AnnaBridge 171:3a7713b1edbc 2401
AnnaBridge 171:3a7713b1edbc 2402 /**
AnnaBridge 171:3a7713b1edbc 2403 * @brief Read Receiver Data register (Receive Data value, 8 bits)
AnnaBridge 171:3a7713b1edbc 2404 * @rmtoll DR DR LL_USART_ReceiveData8
AnnaBridge 171:3a7713b1edbc 2405 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2406 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 171:3a7713b1edbc 2407 */
AnnaBridge 171:3a7713b1edbc 2408 __STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2409 {
AnnaBridge 171:3a7713b1edbc 2410 return (uint8_t)(READ_BIT(USARTx->DR, USART_DR_DR));
AnnaBridge 171:3a7713b1edbc 2411 }
AnnaBridge 171:3a7713b1edbc 2412
AnnaBridge 171:3a7713b1edbc 2413 /**
AnnaBridge 171:3a7713b1edbc 2414 * @brief Read Receiver Data register (Receive Data value, 9 bits)
AnnaBridge 171:3a7713b1edbc 2415 * @rmtoll DR DR LL_USART_ReceiveData9
AnnaBridge 171:3a7713b1edbc 2416 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2417 * @retval Value between Min_Data=0x00 and Max_Data=0x1FF
AnnaBridge 171:3a7713b1edbc 2418 */
AnnaBridge 171:3a7713b1edbc 2419 __STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2420 {
AnnaBridge 171:3a7713b1edbc 2421 return (uint16_t)(READ_BIT(USARTx->DR, USART_DR_DR));
AnnaBridge 171:3a7713b1edbc 2422 }
AnnaBridge 171:3a7713b1edbc 2423
AnnaBridge 171:3a7713b1edbc 2424 /**
AnnaBridge 171:3a7713b1edbc 2425 * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
AnnaBridge 171:3a7713b1edbc 2426 * @rmtoll DR DR LL_USART_TransmitData8
AnnaBridge 171:3a7713b1edbc 2427 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2428 * @param Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 171:3a7713b1edbc 2429 * @retval None
AnnaBridge 171:3a7713b1edbc 2430 */
AnnaBridge 171:3a7713b1edbc 2431 __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
AnnaBridge 171:3a7713b1edbc 2432 {
AnnaBridge 171:3a7713b1edbc 2433 USARTx->DR = Value;
AnnaBridge 171:3a7713b1edbc 2434 }
AnnaBridge 171:3a7713b1edbc 2435
AnnaBridge 171:3a7713b1edbc 2436 /**
AnnaBridge 171:3a7713b1edbc 2437 * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
AnnaBridge 171:3a7713b1edbc 2438 * @rmtoll DR DR LL_USART_TransmitData9
AnnaBridge 171:3a7713b1edbc 2439 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2440 * @param Value between Min_Data=0x00 and Max_Data=0x1FF
AnnaBridge 171:3a7713b1edbc 2441 * @retval None
AnnaBridge 171:3a7713b1edbc 2442 */
AnnaBridge 171:3a7713b1edbc 2443 __STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
AnnaBridge 171:3a7713b1edbc 2444 {
AnnaBridge 171:3a7713b1edbc 2445 USARTx->DR = Value & 0x1FFU;
AnnaBridge 171:3a7713b1edbc 2446 }
AnnaBridge 171:3a7713b1edbc 2447
AnnaBridge 171:3a7713b1edbc 2448 /**
AnnaBridge 171:3a7713b1edbc 2449 * @}
AnnaBridge 171:3a7713b1edbc 2450 */
AnnaBridge 171:3a7713b1edbc 2451
AnnaBridge 171:3a7713b1edbc 2452 /** @defgroup USART_LL_EF_Execution Execution
AnnaBridge 171:3a7713b1edbc 2453 * @{
AnnaBridge 171:3a7713b1edbc 2454 */
AnnaBridge 171:3a7713b1edbc 2455
AnnaBridge 171:3a7713b1edbc 2456 /**
AnnaBridge 171:3a7713b1edbc 2457 * @brief Request Break sending
AnnaBridge 171:3a7713b1edbc 2458 * @rmtoll CR1 SBK LL_USART_RequestBreakSending
AnnaBridge 171:3a7713b1edbc 2459 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2460 * @retval None
AnnaBridge 171:3a7713b1edbc 2461 */
AnnaBridge 171:3a7713b1edbc 2462 __STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2463 {
AnnaBridge 171:3a7713b1edbc 2464 SET_BIT(USARTx->CR1, USART_CR1_SBK);
AnnaBridge 171:3a7713b1edbc 2465 }
AnnaBridge 171:3a7713b1edbc 2466
AnnaBridge 171:3a7713b1edbc 2467 /**
AnnaBridge 171:3a7713b1edbc 2468 * @brief Put USART in Mute mode
AnnaBridge 171:3a7713b1edbc 2469 * @rmtoll CR1 RWU LL_USART_RequestEnterMuteMode
AnnaBridge 171:3a7713b1edbc 2470 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2471 * @retval None
AnnaBridge 171:3a7713b1edbc 2472 */
AnnaBridge 171:3a7713b1edbc 2473 __STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2474 {
AnnaBridge 171:3a7713b1edbc 2475 SET_BIT(USARTx->CR1, USART_CR1_RWU);
AnnaBridge 171:3a7713b1edbc 2476 }
AnnaBridge 171:3a7713b1edbc 2477
AnnaBridge 171:3a7713b1edbc 2478 /**
AnnaBridge 171:3a7713b1edbc 2479 * @brief Put USART in Active mode
AnnaBridge 171:3a7713b1edbc 2480 * @rmtoll CR1 RWU LL_USART_RequestExitMuteMode
AnnaBridge 171:3a7713b1edbc 2481 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2482 * @retval None
AnnaBridge 171:3a7713b1edbc 2483 */
AnnaBridge 171:3a7713b1edbc 2484 __STATIC_INLINE void LL_USART_RequestExitMuteMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2485 {
AnnaBridge 171:3a7713b1edbc 2486 CLEAR_BIT(USARTx->CR1, USART_CR1_RWU);
AnnaBridge 171:3a7713b1edbc 2487 }
AnnaBridge 171:3a7713b1edbc 2488
AnnaBridge 171:3a7713b1edbc 2489 /**
AnnaBridge 171:3a7713b1edbc 2490 * @}
AnnaBridge 171:3a7713b1edbc 2491 */
AnnaBridge 171:3a7713b1edbc 2492
AnnaBridge 171:3a7713b1edbc 2493 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 2494 /** @defgroup USART_LL_EF_Init Initialization and de-initialization functions
AnnaBridge 171:3a7713b1edbc 2495 * @{
AnnaBridge 171:3a7713b1edbc 2496 */
AnnaBridge 171:3a7713b1edbc 2497 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx);
AnnaBridge 171:3a7713b1edbc 2498 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct);
AnnaBridge 171:3a7713b1edbc 2499 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
AnnaBridge 171:3a7713b1edbc 2500 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
AnnaBridge 171:3a7713b1edbc 2501 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
AnnaBridge 171:3a7713b1edbc 2502 /**
AnnaBridge 171:3a7713b1edbc 2503 * @}
AnnaBridge 171:3a7713b1edbc 2504 */
AnnaBridge 171:3a7713b1edbc 2505 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 171:3a7713b1edbc 2506
AnnaBridge 171:3a7713b1edbc 2507 /**
AnnaBridge 171:3a7713b1edbc 2508 * @}
AnnaBridge 171:3a7713b1edbc 2509 */
AnnaBridge 171:3a7713b1edbc 2510
AnnaBridge 171:3a7713b1edbc 2511 /**
AnnaBridge 171:3a7713b1edbc 2512 * @}
AnnaBridge 171:3a7713b1edbc 2513 */
AnnaBridge 171:3a7713b1edbc 2514
AnnaBridge 171:3a7713b1edbc 2515 #endif /* USART1 || USART2|| USART3 || UART4 || UART5 */
AnnaBridge 171:3a7713b1edbc 2516
AnnaBridge 171:3a7713b1edbc 2517 /**
AnnaBridge 171:3a7713b1edbc 2518 * @}
AnnaBridge 171:3a7713b1edbc 2519 */
AnnaBridge 171:3a7713b1edbc 2520
AnnaBridge 171:3a7713b1edbc 2521 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 2522 }
AnnaBridge 171:3a7713b1edbc 2523 #endif
AnnaBridge 171:3a7713b1edbc 2524
AnnaBridge 171:3a7713b1edbc 2525 #endif /* __STM32L1xx_LL_USART_H */
AnnaBridge 171:3a7713b1edbc 2526
AnnaBridge 171:3a7713b1edbc 2527 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/