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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_STD/stm32h7xx_ll_lpuart.h@172:65be27845400, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 20:53:29 2019 +0000
Revision:: 172:65be27845400

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	172:65be27845400	1	/**
AnnaBridge	172:65be27845400	2	******************************************************************************
AnnaBridge	172:65be27845400	3	* @file stm32h7xx_ll_lpuart.h
AnnaBridge	172:65be27845400	4	* @author MCD Application Team
AnnaBridge	172:65be27845400	5	* @brief Header file of LPUART LL module.
AnnaBridge	172:65be27845400	6	******************************************************************************
AnnaBridge	172:65be27845400	7	* @attention
AnnaBridge	172:65be27845400	8	*
AnnaBridge	172:65be27845400	9	* <h2><center>© Copyright (c) 2017 STMicroelectronics.
AnnaBridge	172:65be27845400	10	* All rights reserved.</center></h2>
AnnaBridge	172:65be27845400	11	*
AnnaBridge	172:65be27845400	12	* This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge	172:65be27845400	13	* the "License"; You may not use this file except in compliance with the
AnnaBridge	172:65be27845400	14	* License. You may obtain a copy of the License at:
AnnaBridge	172:65be27845400	15	* opensource.org/licenses/BSD-3-Clause
AnnaBridge	172:65be27845400	16	*
AnnaBridge	172:65be27845400	17	******************************************************************************
AnnaBridge	172:65be27845400	18	*/
AnnaBridge	172:65be27845400	19
AnnaBridge	172:65be27845400	20	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	172:65be27845400	21	#ifndef STM32H7xx_LL_LPUART_H
AnnaBridge	172:65be27845400	22	#define STM32H7xx_LL_LPUART_H
AnnaBridge	172:65be27845400	23
AnnaBridge	172:65be27845400	24	#ifdef __cplusplus
AnnaBridge	172:65be27845400	25	extern "C" {
AnnaBridge	172:65be27845400	26	#endif
AnnaBridge	172:65be27845400	27
AnnaBridge	172:65be27845400	28	/* Includes ------------------------------------------------------------------*/
AnnaBridge	172:65be27845400	29	#include "stm32h7xx.h"
AnnaBridge	172:65be27845400	30
AnnaBridge	172:65be27845400	31	/** @addtogroup STM32H7xx_LL_Driver
AnnaBridge	172:65be27845400	32	* @{
AnnaBridge	172:65be27845400	33	*/
AnnaBridge	172:65be27845400	34
AnnaBridge	172:65be27845400	35	#if defined (LPUART1)
AnnaBridge	172:65be27845400	36
AnnaBridge	172:65be27845400	37	/** @defgroup LPUART_LL LPUART
AnnaBridge	172:65be27845400	38	* @{
AnnaBridge	172:65be27845400	39	*/
AnnaBridge	172:65be27845400	40
AnnaBridge	172:65be27845400	41	/* Private types -------------------------------------------------------------*/
AnnaBridge	172:65be27845400	42	/* Private variables ---------------------------------------------------------*/
AnnaBridge	172:65be27845400	43	/** @defgroup LPUART_LL_Private_Variables LPUART Private Variables
AnnaBridge	172:65be27845400	44	* @{
AnnaBridge	172:65be27845400	45	*/
AnnaBridge	172:65be27845400	46	/* Array used to get the LPUART prescaler division decimal values versus @ref LPUART_LL_EC_PRESCALER values */
AnnaBridge	172:65be27845400	47	static const uint16_t LPUART_PRESCALER_TAB[] =
AnnaBridge	172:65be27845400	48	{
AnnaBridge	172:65be27845400	49	(uint16_t)1,
AnnaBridge	172:65be27845400	50	(uint16_t)2,
AnnaBridge	172:65be27845400	51	(uint16_t)4,
AnnaBridge	172:65be27845400	52	(uint16_t)6,
AnnaBridge	172:65be27845400	53	(uint16_t)8,
AnnaBridge	172:65be27845400	54	(uint16_t)10,
AnnaBridge	172:65be27845400	55	(uint16_t)12,
AnnaBridge	172:65be27845400	56	(uint16_t)16,
AnnaBridge	172:65be27845400	57	(uint16_t)32,
AnnaBridge	172:65be27845400	58	(uint16_t)64,
AnnaBridge	172:65be27845400	59	(uint16_t)128,
AnnaBridge	172:65be27845400	60	(uint16_t)256
AnnaBridge	172:65be27845400	61	};
AnnaBridge	172:65be27845400	62	/**
AnnaBridge	172:65be27845400	63	* @}
AnnaBridge	172:65be27845400	64	*/
AnnaBridge	172:65be27845400	65
AnnaBridge	172:65be27845400	66	/* Private constants ---------------------------------------------------------*/
AnnaBridge	172:65be27845400	67	/** @defgroup LPUART_LL_Private_Constants LPUART Private Constants
AnnaBridge	172:65be27845400	68	* @{
AnnaBridge	172:65be27845400	69	*/
AnnaBridge	172:65be27845400	70	/* Defines used in Baud Rate related macros and corresponding register setting computation */
AnnaBridge	172:65be27845400	71	#define LPUART_LPUARTDIV_FREQ_MUL 256U
AnnaBridge	172:65be27845400	72	#define LPUART_BRR_MASK 0x000FFFFFU
AnnaBridge	172:65be27845400	73	#define LPUART_BRR_MIN_VALUE 0x00000300U
AnnaBridge	172:65be27845400	74	/**
AnnaBridge	172:65be27845400	75	* @}
AnnaBridge	172:65be27845400	76	*/
AnnaBridge	172:65be27845400	77
AnnaBridge	172:65be27845400	78
AnnaBridge	172:65be27845400	79	/* Private macros ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	80	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	81	/** @defgroup LPUART_LL_Private_Macros LPUART Private Macros
AnnaBridge	172:65be27845400	82	* @{
AnnaBridge	172:65be27845400	83	*/
AnnaBridge	172:65be27845400	84	/**
AnnaBridge	172:65be27845400	85	* @}
AnnaBridge	172:65be27845400	86	*/
AnnaBridge	172:65be27845400	87	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	172:65be27845400	88
AnnaBridge	172:65be27845400	89	/* Exported types ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	90	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	91	/** @defgroup LPUART_LL_ES_INIT LPUART Exported Init structures
AnnaBridge	172:65be27845400	92	* @{
AnnaBridge	172:65be27845400	93	*/
AnnaBridge	172:65be27845400	94
AnnaBridge	172:65be27845400	95	/**
AnnaBridge	172:65be27845400	96	* @brief LL LPUART Init Structure definition
AnnaBridge	172:65be27845400	97	*/
AnnaBridge	172:65be27845400	98	typedef struct
AnnaBridge	172:65be27845400	99	{
AnnaBridge	172:65be27845400	100	uint32_t PrescalerValue; /*!< Specifies the Prescaler to compute the communication baud rate.
AnnaBridge	172:65be27845400	101	This parameter can be a value of @ref LPUART_LL_EC_PRESCALER.
AnnaBridge	172:65be27845400	102
AnnaBridge	172:65be27845400	103	This feature can be modified afterwards using unitary function @ref LL_LPUART_SetPrescaler().*/
AnnaBridge	172:65be27845400	104
AnnaBridge	172:65be27845400	105	uint32_t BaudRate; /*!< This field defines expected LPUART communication baud rate.
AnnaBridge	172:65be27845400	106
AnnaBridge	172:65be27845400	107	This feature can be modified afterwards using unitary function @ref LL_LPUART_SetBaudRate().*/
AnnaBridge	172:65be27845400	108
AnnaBridge	172:65be27845400	109	uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
AnnaBridge	172:65be27845400	110	This parameter can be a value of @ref LPUART_LL_EC_DATAWIDTH.
AnnaBridge	172:65be27845400	111
AnnaBridge	172:65be27845400	112	This feature can be modified afterwards using unitary function @ref LL_LPUART_SetDataWidth().*/
AnnaBridge	172:65be27845400	113
AnnaBridge	172:65be27845400	114	uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
AnnaBridge	172:65be27845400	115	This parameter can be a value of @ref LPUART_LL_EC_STOPBITS.
AnnaBridge	172:65be27845400	116
AnnaBridge	172:65be27845400	117	This feature can be modified afterwards using unitary function @ref LL_LPUART_SetStopBitsLength().*/
AnnaBridge	172:65be27845400	118
AnnaBridge	172:65be27845400	119	uint32_t Parity; /*!< Specifies the parity mode.
AnnaBridge	172:65be27845400	120	This parameter can be a value of @ref LPUART_LL_EC_PARITY.
AnnaBridge	172:65be27845400	121
AnnaBridge	172:65be27845400	122	This feature can be modified afterwards using unitary function @ref LL_LPUART_SetParity().*/
AnnaBridge	172:65be27845400	123
AnnaBridge	172:65be27845400	124	uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
AnnaBridge	172:65be27845400	125	This parameter can be a value of @ref LPUART_LL_EC_DIRECTION.
AnnaBridge	172:65be27845400	126
AnnaBridge	172:65be27845400	127	This feature can be modified afterwards using unitary function @ref LL_LPUART_SetTransferDirection().*/
AnnaBridge	172:65be27845400	128
AnnaBridge	172:65be27845400	129	uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
AnnaBridge	172:65be27845400	130	This parameter can be a value of @ref LPUART_LL_EC_HWCONTROL.
AnnaBridge	172:65be27845400	131
AnnaBridge	172:65be27845400	132	This feature can be modified afterwards using unitary function @ref LL_LPUART_SetHWFlowCtrl().*/
AnnaBridge	172:65be27845400	133
AnnaBridge	172:65be27845400	134	} LL_LPUART_InitTypeDef;
AnnaBridge	172:65be27845400	135
AnnaBridge	172:65be27845400	136	/**
AnnaBridge	172:65be27845400	137	* @}
AnnaBridge	172:65be27845400	138	*/
AnnaBridge	172:65be27845400	139	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	172:65be27845400	140
AnnaBridge	172:65be27845400	141	/* Exported constants --------------------------------------------------------*/
AnnaBridge	172:65be27845400	142	/** @defgroup LPUART_LL_Exported_Constants LPUART Exported Constants
AnnaBridge	172:65be27845400	143	* @{
AnnaBridge	172:65be27845400	144	*/
AnnaBridge	172:65be27845400	145
AnnaBridge	172:65be27845400	146	/** @defgroup LPUART_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge	172:65be27845400	147	* @brief Flags defines which can be used with LL_LPUART_WriteReg function
AnnaBridge	172:65be27845400	148	* @{
AnnaBridge	172:65be27845400	149	*/
AnnaBridge	172:65be27845400	150	#define LL_LPUART_ICR_PECF USART_ICR_PECF /!< Parity error flag /
AnnaBridge	172:65be27845400	151	#define LL_LPUART_ICR_FECF USART_ICR_FECF /!< Framing error flag /
AnnaBridge	172:65be27845400	152	#define LL_LPUART_ICR_NCF USART_ICR_NECF /!< Noise error detected flag /
AnnaBridge	172:65be27845400	153	#define LL_LPUART_ICR_ORECF USART_ICR_ORECF /!< Overrun error flag /
AnnaBridge	172:65be27845400	154	#define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF /!< Idle line detected flag /
AnnaBridge	172:65be27845400	155	#define LL_LPUART_ICR_TXFECF USART_ICR_TXFECF /!< TX FIFO Empty Clear flag /
AnnaBridge	172:65be27845400	156	#define LL_LPUART_ICR_TCCF USART_ICR_TCCF /!< Transmission complete flag /
AnnaBridge	172:65be27845400	157	#define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF /!< CTS flag /
AnnaBridge	172:65be27845400	158	#define LL_LPUART_ICR_CMCF USART_ICR_CMCF /!< Character match flag /
AnnaBridge	172:65be27845400	159	#define LL_LPUART_ICR_WUCF USART_ICR_WUCF /!< Wakeup from Stop mode flag /
AnnaBridge	172:65be27845400	160	/**
AnnaBridge	172:65be27845400	161	* @}
AnnaBridge	172:65be27845400	162	*/
AnnaBridge	172:65be27845400	163
AnnaBridge	172:65be27845400	164	/** @defgroup LPUART_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge	172:65be27845400	165	* @brief Flags defines which can be used with LL_LPUART_ReadReg function
AnnaBridge	172:65be27845400	166	* @{
AnnaBridge	172:65be27845400	167	*/
AnnaBridge	172:65be27845400	168	#define LL_LPUART_ISR_PE USART_ISR_PE /!< Parity error flag /
AnnaBridge	172:65be27845400	169	#define LL_LPUART_ISR_FE USART_ISR_FE /!< Framing error flag /
AnnaBridge	172:65be27845400	170	#define LL_LPUART_ISR_NE USART_ISR_NE /!< Noise detected flag /
AnnaBridge	172:65be27845400	171	#define LL_LPUART_ISR_ORE USART_ISR_ORE /!< Overrun error flag /
AnnaBridge	172:65be27845400	172	#define LL_LPUART_ISR_IDLE USART_ISR_IDLE /!< Idle line detected flag /
AnnaBridge	172:65be27845400	173	#define LL_LPUART_ISR_RXNE_RXFNE USART_ISR_RXNE_RXFNE /!< Read data register or RX FIFO not empty flag /
AnnaBridge	172:65be27845400	174	#define LL_LPUART_ISR_TC USART_ISR_TC /!< Transmission complete flag /
AnnaBridge	172:65be27845400	175	#define LL_LPUART_ISR_TXE_TXFNF USART_ISR_TXE_TXFNF /!< Transmit data register empty or TX FIFO Not Full flag/
AnnaBridge	172:65be27845400	176	#define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF /!< CTS interrupt flag /
AnnaBridge	172:65be27845400	177	#define LL_LPUART_ISR_CTS USART_ISR_CTS /!< CTS flag /
AnnaBridge	172:65be27845400	178	#define LL_LPUART_ISR_BUSY USART_ISR_BUSY /!< Busy flag /
AnnaBridge	172:65be27845400	179	#define LL_LPUART_ISR_CMF USART_ISR_CMF /!< Character match flag /
AnnaBridge	172:65be27845400	180	#define LL_LPUART_ISR_SBKF USART_ISR_SBKF /!< Send break flag /
AnnaBridge	172:65be27845400	181	#define LL_LPUART_ISR_RWU USART_ISR_RWU /!< Receiver wakeup from Mute mode flag /
AnnaBridge	172:65be27845400	182	#define LL_LPUART_ISR_WUF USART_ISR_WUF /!< Wakeup from Stop mode flag /
AnnaBridge	172:65be27845400	183	#define LL_LPUART_ISR_TEACK USART_ISR_TEACK /!< Transmit enable acknowledge flag /
AnnaBridge	172:65be27845400	184	#define LL_LPUART_ISR_REACK USART_ISR_REACK /!< Receive enable acknowledge flag /
AnnaBridge	172:65be27845400	185	#define LL_LPUART_ISR_TXFE USART_ISR_TXFE /!< TX FIFO empty flag /
AnnaBridge	172:65be27845400	186	#define LL_LPUART_ISR_RXFF USART_ISR_RXFF /!< RX FIFO full flag /
AnnaBridge	172:65be27845400	187	#define LL_LPUART_ISR_RXFT USART_ISR_RXFT /!< RX FIFO threshold flag /
AnnaBridge	172:65be27845400	188	#define LL_LPUART_ISR_TXFT USART_ISR_TXFT /!< TX FIFO threshold flag /
AnnaBridge	172:65be27845400	189	/**
AnnaBridge	172:65be27845400	190	* @}
AnnaBridge	172:65be27845400	191	*/
AnnaBridge	172:65be27845400	192
AnnaBridge	172:65be27845400	193	/** @defgroup LPUART_LL_EC_IT IT Defines
AnnaBridge	172:65be27845400	194	* @brief IT defines which can be used with LL_LPUART_ReadReg and LL_LPUART_WriteReg functions
AnnaBridge	172:65be27845400	195	* @{
AnnaBridge	172:65be27845400	196	*/
AnnaBridge	172:65be27845400	197	#define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE /!< IDLE interrupt enable /
AnnaBridge	172:65be27845400	198	#define LL_LPUART_CR1_RXNEIE_RXFNEIE USART_CR1_RXNEIE_RXFNEIE /!< Read data register and RXFIFO not empty interrupt enable /
AnnaBridge	172:65be27845400	199	#define LL_LPUART_CR1_TCIE USART_CR1_TCIE /!< Transmission complete interrupt enable /
AnnaBridge	172:65be27845400	200	#define LL_LPUART_CR1_TXEIE_TXFNFIE USART_CR1_TXEIE_TXFNFIE /!< Transmit data register empty and TX FIFO not full interrupt enable /
AnnaBridge	172:65be27845400	201	#define LL_LPUART_CR1_PEIE USART_CR1_PEIE /!< Parity error /
AnnaBridge	172:65be27845400	202	#define LL_LPUART_CR1_CMIE USART_CR1_CMIE /!< Character match interrupt enable /
AnnaBridge	172:65be27845400	203	#define LL_LPUART_CR1_TXFEIE USART_CR1_TXFEIE /!< TX FIFO empty interrupt enable /
AnnaBridge	172:65be27845400	204	#define LL_LPUART_CR1_RXFFIE USART_CR1_RXFFIE /!< RX FIFO full interrupt enable /
AnnaBridge	172:65be27845400	205	#define LL_LPUART_CR3_EIE USART_CR3_EIE /!< Error interrupt enable /
AnnaBridge	172:65be27845400	206	#define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE /!< CTS interrupt enable /
AnnaBridge	172:65be27845400	207	#define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE /!< Wakeup from Stop mode interrupt enable /
AnnaBridge	172:65be27845400	208	#define LL_LPUART_CR3_TXFTIE USART_CR3_TXFTIE /!< TX FIFO threshold interrupt enable /
AnnaBridge	172:65be27845400	209	#define LL_LPUART_CR3_RXFTIE USART_CR3_RXFTIE /!< RX FIFO threshold interrupt enable /
AnnaBridge	172:65be27845400	210	/**
AnnaBridge	172:65be27845400	211	* @}
AnnaBridge	172:65be27845400	212	*/
AnnaBridge	172:65be27845400	213
AnnaBridge	172:65be27845400	214	/** @defgroup LPUART_LL_EC_FIFOTHRESHOLD FIFO Threshold
AnnaBridge	172:65be27845400	215	* @{
AnnaBridge	172:65be27845400	216	*/
AnnaBridge	172:65be27845400	217	#define LL_LPUART_FIFOTHRESHOLD_1_8 0x00000000U /!< FIFO reaches 1/8 of its depth /
AnnaBridge	172:65be27845400	218	#define LL_LPUART_FIFOTHRESHOLD_1_4 0x00000001U /!< FIFO reaches 1/4 of its depth /
AnnaBridge	172:65be27845400	219	#define LL_LPUART_FIFOTHRESHOLD_1_2 0x00000002U /!< FIFO reaches 1/2 of its depth /
AnnaBridge	172:65be27845400	220	#define LL_LPUART_FIFOTHRESHOLD_3_4 0x00000003U /!< FIFO reaches 3/4 of its depth /
AnnaBridge	172:65be27845400	221	#define LL_LPUART_FIFOTHRESHOLD_7_8 0x00000004U /!< FIFO reaches 7/8 of its depth /
AnnaBridge	172:65be27845400	222	#define LL_LPUART_FIFOTHRESHOLD_8_8 0x00000005U /!< FIFO becomes empty for TX and full for RX /
AnnaBridge	172:65be27845400	223	/**
AnnaBridge	172:65be27845400	224	* @}
AnnaBridge	172:65be27845400	225	*/
AnnaBridge	172:65be27845400	226
AnnaBridge	172:65be27845400	227	/** @defgroup LPUART_LL_EC_DIRECTION Direction
AnnaBridge	172:65be27845400	228	* @{
AnnaBridge	172:65be27845400	229	*/
AnnaBridge	172:65be27845400	230	#define LL_LPUART_DIRECTION_NONE 0x00000000U /!< Transmitter and Receiver are disabled /
AnnaBridge	172:65be27845400	231	#define LL_LPUART_DIRECTION_RX USART_CR1_RE /!< Transmitter is disabled and Receiver is enabled /
AnnaBridge	172:65be27845400	232	#define LL_LPUART_DIRECTION_TX USART_CR1_TE /!< Transmitter is enabled and Receiver is disabled /
AnnaBridge	172:65be27845400	233	#define LL_LPUART_DIRECTION_TX_RX (USART_CR1_TE \|USART_CR1_RE) /!< Transmitter and Receiver are enabled /
AnnaBridge	172:65be27845400	234	/**
AnnaBridge	172:65be27845400	235	* @}
AnnaBridge	172:65be27845400	236	*/
AnnaBridge	172:65be27845400	237
AnnaBridge	172:65be27845400	238	/** @defgroup LPUART_LL_EC_PARITY Parity Control
AnnaBridge	172:65be27845400	239	* @{
AnnaBridge	172:65be27845400	240	*/
AnnaBridge	172:65be27845400	241	#define LL_LPUART_PARITY_NONE 0x00000000U /!< Parity control disabled /
AnnaBridge	172:65be27845400	242	#define LL_LPUART_PARITY_EVEN USART_CR1_PCE /!< Parity control enabled and Even Parity is selected /
AnnaBridge	172:65be27845400	243	#define LL_LPUART_PARITY_ODD (USART_CR1_PCE \| USART_CR1_PS) /!< Parity control enabled and Odd Parity is selected /
AnnaBridge	172:65be27845400	244	/**
AnnaBridge	172:65be27845400	245	* @}
AnnaBridge	172:65be27845400	246	*/
AnnaBridge	172:65be27845400	247
AnnaBridge	172:65be27845400	248	/** @defgroup LPUART_LL_EC_WAKEUP Wakeup
AnnaBridge	172:65be27845400	249	* @{
AnnaBridge	172:65be27845400	250	*/
AnnaBridge	172:65be27845400	251	#define LL_LPUART_WAKEUP_IDLELINE 0x00000000U /!< LPUART wake up from Mute mode on Idle Line /
AnnaBridge	172:65be27845400	252	#define LL_LPUART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /!< LPUART wake up from Mute mode on Address Mark /
AnnaBridge	172:65be27845400	253	/**
AnnaBridge	172:65be27845400	254	* @}
AnnaBridge	172:65be27845400	255	*/
AnnaBridge	172:65be27845400	256
AnnaBridge	172:65be27845400	257	/** @defgroup LPUART_LL_EC_DATAWIDTH Datawidth
AnnaBridge	172:65be27845400	258	* @{
AnnaBridge	172:65be27845400	259	*/
AnnaBridge	172:65be27845400	260	#define LL_LPUART_DATAWIDTH_7B USART_CR1_M1 /!< 7 bits word length : Start bit, 7 data bits, n stop bits /
AnnaBridge	172:65be27845400	261	#define LL_LPUART_DATAWIDTH_8B 0x00000000U /!< 8 bits word length : Start bit, 8 data bits, n stop bits /
AnnaBridge	172:65be27845400	262	#define LL_LPUART_DATAWIDTH_9B USART_CR1_M0 /!< 9 bits word length : Start bit, 9 data bits, n stop bits /
AnnaBridge	172:65be27845400	263	/**
AnnaBridge	172:65be27845400	264	* @}
AnnaBridge	172:65be27845400	265	*/
AnnaBridge	172:65be27845400	266
AnnaBridge	172:65be27845400	267	/** @defgroup LPUART_LL_EC_PRESCALER Clock Source Prescaler
AnnaBridge	172:65be27845400	268	* @{
AnnaBridge	172:65be27845400	269	*/
AnnaBridge	172:65be27845400	270	#define LL_LPUART_PRESCALER_DIV1 0x00000000U /!< Input clock not devided /
AnnaBridge	172:65be27845400	271	#define LL_LPUART_PRESCALER_DIV2 (USART_PRESC_PRESCALER_0) /!< Input clock devided by 2 /
AnnaBridge	172:65be27845400	272	#define LL_LPUART_PRESCALER_DIV4 (USART_PRESC_PRESCALER_1) /!< Input clock devided by 4 /
AnnaBridge	172:65be27845400	273	#define LL_LPUART_PRESCALER_DIV6 (USART_PRESC_PRESCALER_1 \| USART_PRESC_PRESCALER_0) /!< Input clock devided by 6 /
AnnaBridge	172:65be27845400	274	#define LL_LPUART_PRESCALER_DIV8 (USART_PRESC_PRESCALER_2) /!< Input clock devided by 8 /
AnnaBridge	172:65be27845400	275	#define LL_LPUART_PRESCALER_DIV10 (USART_PRESC_PRESCALER_2 \| USART_PRESC_PRESCALER_0) /!< Input clock devided by 10 /
AnnaBridge	172:65be27845400	276	#define LL_LPUART_PRESCALER_DIV12 (USART_PRESC_PRESCALER_2 \| USART_PRESC_PRESCALER_1) /!< Input clock devided by 12 /
AnnaBridge	172:65be27845400	277	#define LL_LPUART_PRESCALER_DIV16 (USART_PRESC_PRESCALER_2 \| USART_PRESC_PRESCALER_1 \| USART_PRESC_PRESCALER_0) /!< Input clock devided by 16 /
AnnaBridge	172:65be27845400	278	#define LL_LPUART_PRESCALER_DIV32 (USART_PRESC_PRESCALER_3) /!< Input clock devided by 32 /
AnnaBridge	172:65be27845400	279	#define LL_LPUART_PRESCALER_DIV64 (USART_PRESC_PRESCALER_3 \| USART_PRESC_PRESCALER_0) /!< Input clock devided by 64 /
AnnaBridge	172:65be27845400	280	#define LL_LPUART_PRESCALER_DIV128 (USART_PRESC_PRESCALER_3 \| USART_PRESC_PRESCALER_1) /!< Input clock devided by 128 /
AnnaBridge	172:65be27845400	281	#define LL_LPUART_PRESCALER_DIV256 (USART_PRESC_PRESCALER_3 \| USART_PRESC_PRESCALER_1 \| USART_PRESC_PRESCALER_0) /!< Input clock devided by 256 /
AnnaBridge	172:65be27845400	282	/**
AnnaBridge	172:65be27845400	283	* @}
AnnaBridge	172:65be27845400	284	*/
AnnaBridge	172:65be27845400	285
AnnaBridge	172:65be27845400	286	/** @defgroup LPUART_LL_EC_STOPBITS Stop Bits
AnnaBridge	172:65be27845400	287	* @{
AnnaBridge	172:65be27845400	288	*/
AnnaBridge	172:65be27845400	289	#define LL_LPUART_STOPBITS_1 0x00000000U /!< 1 stop bit /
AnnaBridge	172:65be27845400	290	#define LL_LPUART_STOPBITS_2 USART_CR2_STOP_1 /!< 2 stop bits /
AnnaBridge	172:65be27845400	291	/**
AnnaBridge	172:65be27845400	292	* @}
AnnaBridge	172:65be27845400	293	*/
AnnaBridge	172:65be27845400	294
AnnaBridge	172:65be27845400	295	/** @defgroup LPUART_LL_EC_TXRX TX RX Pins Swap
AnnaBridge	172:65be27845400	296	* @{
AnnaBridge	172:65be27845400	297	*/
AnnaBridge	172:65be27845400	298	#define LL_LPUART_TXRX_STANDARD 0x00000000U /!< TX/RX pins are used as defined in standard pinout /
AnnaBridge	172:65be27845400	299	#define LL_LPUART_TXRX_SWAPPED (USART_CR2_SWAP) /!< TX and RX pins functions are swapped. /
AnnaBridge	172:65be27845400	300	/**
AnnaBridge	172:65be27845400	301	* @}
AnnaBridge	172:65be27845400	302	*/
AnnaBridge	172:65be27845400	303
AnnaBridge	172:65be27845400	304	/** @defgroup LPUART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion
AnnaBridge	172:65be27845400	305	* @{
AnnaBridge	172:65be27845400	306	*/
AnnaBridge	172:65be27845400	307	#define LL_LPUART_RXPIN_LEVEL_STANDARD 0x00000000U /!< RX pin signal works using the standard logic levels /
AnnaBridge	172:65be27845400	308	#define LL_LPUART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /!< RX pin signal values are inverted. /
AnnaBridge	172:65be27845400	309	/**
AnnaBridge	172:65be27845400	310	* @}
AnnaBridge	172:65be27845400	311	*/
AnnaBridge	172:65be27845400	312
AnnaBridge	172:65be27845400	313	/** @defgroup LPUART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
AnnaBridge	172:65be27845400	314	* @{
AnnaBridge	172:65be27845400	315	*/
AnnaBridge	172:65be27845400	316	#define LL_LPUART_TXPIN_LEVEL_STANDARD 0x00000000U /!< TX pin signal works using the standard logic levels /
AnnaBridge	172:65be27845400	317	#define LL_LPUART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /!< TX pin signal values are inverted. /
AnnaBridge	172:65be27845400	318	/**
AnnaBridge	172:65be27845400	319	* @}
AnnaBridge	172:65be27845400	320	*/
AnnaBridge	172:65be27845400	321
AnnaBridge	172:65be27845400	322	/** @defgroup LPUART_LL_EC_BINARY_LOGIC Binary Data Inversion
AnnaBridge	172:65be27845400	323	* @{
AnnaBridge	172:65be27845400	324	*/
AnnaBridge	172:65be27845400	325	#define LL_LPUART_BINARY_LOGIC_POSITIVE 0x00000000U /!< Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) /
AnnaBridge	172:65be27845400	326	#define LL_LPUART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /!< Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. /
AnnaBridge	172:65be27845400	327	/**
AnnaBridge	172:65be27845400	328	* @}
AnnaBridge	172:65be27845400	329	*/
AnnaBridge	172:65be27845400	330
AnnaBridge	172:65be27845400	331	/** @defgroup LPUART_LL_EC_BITORDER Bit Order
AnnaBridge	172:65be27845400	332	* @{
AnnaBridge	172:65be27845400	333	*/
AnnaBridge	172:65be27845400	334	#define LL_LPUART_BITORDER_LSBFIRST 0x00000000U /!< data is transmitted/received with data bit 0 first, following the start bit /
AnnaBridge	172:65be27845400	335	#define LL_LPUART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /!< data is transmitted/received with the MSB first, following the start bit /
AnnaBridge	172:65be27845400	336	/**
AnnaBridge	172:65be27845400	337	* @}
AnnaBridge	172:65be27845400	338	*/
AnnaBridge	172:65be27845400	339
AnnaBridge	172:65be27845400	340	/** @defgroup LPUART_LL_EC_ADDRESS_DETECT Address Length Detection
AnnaBridge	172:65be27845400	341	* @{
AnnaBridge	172:65be27845400	342	*/
AnnaBridge	172:65be27845400	343	#define LL_LPUART_ADDRESS_DETECT_4B 0x00000000U /!< 4-bit address detection method selected /
AnnaBridge	172:65be27845400	344	#define LL_LPUART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /!< 7-bit address detection (in 8-bit data mode) method selected /
AnnaBridge	172:65be27845400	345	/**
AnnaBridge	172:65be27845400	346	* @}
AnnaBridge	172:65be27845400	347	*/
AnnaBridge	172:65be27845400	348
AnnaBridge	172:65be27845400	349	/** @defgroup LPUART_LL_EC_HWCONTROL Hardware Control
AnnaBridge	172:65be27845400	350	* @{
AnnaBridge	172:65be27845400	351	*/
AnnaBridge	172:65be27845400	352	#define LL_LPUART_HWCONTROL_NONE 0x00000000U /!< CTS and RTS hardware flow control disabled /
AnnaBridge	172:65be27845400	353	#define LL_LPUART_HWCONTROL_RTS USART_CR3_RTSE /!< RTS output enabled, data is only requested when there is space in the receive buffer /
AnnaBridge	172:65be27845400	354	#define LL_LPUART_HWCONTROL_CTS USART_CR3_CTSE /!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) /
AnnaBridge	172:65be27845400	355	#define LL_LPUART_HWCONTROL_RTS_CTS (USART_CR3_RTSE \| USART_CR3_CTSE) /!< CTS and RTS hardware flow control enabled /
AnnaBridge	172:65be27845400	356	/**
AnnaBridge	172:65be27845400	357	* @}
AnnaBridge	172:65be27845400	358	*/
AnnaBridge	172:65be27845400	359
AnnaBridge	172:65be27845400	360	/** @defgroup LPUART_LL_EC_WAKEUP_ON Wakeup Activation
AnnaBridge	172:65be27845400	361	* @{
AnnaBridge	172:65be27845400	362	*/
AnnaBridge	172:65be27845400	363	#define LL_LPUART_WAKEUP_ON_ADDRESS 0x00000000U /!< Wake up active on address match /
AnnaBridge	172:65be27845400	364	#define LL_LPUART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /!< Wake up active on Start bit detection /
AnnaBridge	172:65be27845400	365	#define LL_LPUART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 \| USART_CR3_WUS_1) /!< Wake up active on RXNE /
AnnaBridge	172:65be27845400	366	/**
AnnaBridge	172:65be27845400	367	* @}
AnnaBridge	172:65be27845400	368	*/
AnnaBridge	172:65be27845400	369
AnnaBridge	172:65be27845400	370	/** @defgroup LPUART_LL_EC_DE_POLARITY Driver Enable Polarity
AnnaBridge	172:65be27845400	371	* @{
AnnaBridge	172:65be27845400	372	*/
AnnaBridge	172:65be27845400	373	#define LL_LPUART_DE_POLARITY_HIGH 0x00000000U /!< DE signal is active high /
AnnaBridge	172:65be27845400	374	#define LL_LPUART_DE_POLARITY_LOW USART_CR3_DEP /!< DE signal is active low /
AnnaBridge	172:65be27845400	375	/**
AnnaBridge	172:65be27845400	376	* @}
AnnaBridge	172:65be27845400	377	*/
AnnaBridge	172:65be27845400	378
AnnaBridge	172:65be27845400	379	/** @defgroup LPUART_LL_EC_DMA_REG_DATA DMA Register Data
AnnaBridge	172:65be27845400	380	* @{
AnnaBridge	172:65be27845400	381	*/
AnnaBridge	172:65be27845400	382	#define LL_LPUART_DMA_REG_DATA_TRANSMIT 0x00000000U /!< Get address of data register used for transmission /
AnnaBridge	172:65be27845400	383	#define LL_LPUART_DMA_REG_DATA_RECEIVE 0x00000001U /!< Get address of data register used for reception /
AnnaBridge	172:65be27845400	384	/**
AnnaBridge	172:65be27845400	385	* @}
AnnaBridge	172:65be27845400	386	*/
AnnaBridge	172:65be27845400	387
AnnaBridge	172:65be27845400	388	/**
AnnaBridge	172:65be27845400	389	* @}
AnnaBridge	172:65be27845400	390	*/
AnnaBridge	172:65be27845400	391
AnnaBridge	172:65be27845400	392	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	393	/** @defgroup LPUART_LL_Exported_Macros LPUART Exported Macros
AnnaBridge	172:65be27845400	394	* @{
AnnaBridge	172:65be27845400	395	*/
AnnaBridge	172:65be27845400	396
AnnaBridge	172:65be27845400	397	/** @defgroup LPUART_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge	172:65be27845400	398	* @{
AnnaBridge	172:65be27845400	399	*/
AnnaBridge	172:65be27845400	400
AnnaBridge	172:65be27845400	401	/**
AnnaBridge	172:65be27845400	402	* @brief Write a value in LPUART register
AnnaBridge	172:65be27845400	403	* @param __INSTANCE__ LPUART Instance
AnnaBridge	172:65be27845400	404	* @param __REG__ Register to be written
AnnaBridge	172:65be27845400	405	* @param __VALUE__ Value to be written in the register
AnnaBridge	172:65be27845400	406	* @retval None
AnnaBridge	172:65be27845400	407	*/
AnnaBridge	172:65be27845400	408	#define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	172:65be27845400	409
AnnaBridge	172:65be27845400	410	/**
AnnaBridge	172:65be27845400	411	* @brief Read a value in LPUART register
AnnaBridge	172:65be27845400	412	* @param __INSTANCE__ LPUART Instance
AnnaBridge	172:65be27845400	413	* @param __REG__ Register to be read
AnnaBridge	172:65be27845400	414	* @retval Register value
AnnaBridge	172:65be27845400	415	*/
AnnaBridge	172:65be27845400	416	#define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	172:65be27845400	417	/**
AnnaBridge	172:65be27845400	418	* @}
AnnaBridge	172:65be27845400	419	*/
AnnaBridge	172:65be27845400	420
AnnaBridge	172:65be27845400	421	/** @defgroup LPUART_LL_EM_Exported_Macros_Helper Helper Macros
AnnaBridge	172:65be27845400	422	* @{
AnnaBridge	172:65be27845400	423	*/
AnnaBridge	172:65be27845400	424
AnnaBridge	172:65be27845400	425	/**
AnnaBridge	172:65be27845400	426	* @brief Compute LPUARTDIV value according to Peripheral Clock and
AnnaBridge	172:65be27845400	427	* expected Baud Rate (20-bit value of LPUARTDIV is returned)
AnnaBridge	172:65be27845400	428	* @param __PERIPHCLK__ Peripheral Clock frequency used for LPUART Instance
AnnaBridge	172:65be27845400	429	* @param __PRESCALER__ This parameter can be one of the following values:
AnnaBridge	172:65be27845400	430	* @arg @ref LL_LPUART_PRESCALER_DIV1
AnnaBridge	172:65be27845400	431	* @arg @ref LL_LPUART_PRESCALER_DIV2
AnnaBridge	172:65be27845400	432	* @arg @ref LL_LPUART_PRESCALER_DIV4
AnnaBridge	172:65be27845400	433	* @arg @ref LL_LPUART_PRESCALER_DIV6
AnnaBridge	172:65be27845400	434	* @arg @ref LL_LPUART_PRESCALER_DIV8
AnnaBridge	172:65be27845400	435	* @arg @ref LL_LPUART_PRESCALER_DIV10
AnnaBridge	172:65be27845400	436	* @arg @ref LL_LPUART_PRESCALER_DIV12
AnnaBridge	172:65be27845400	437	* @arg @ref LL_LPUART_PRESCALER_DIV16
AnnaBridge	172:65be27845400	438	* @arg @ref LL_LPUART_PRESCALER_DIV32
AnnaBridge	172:65be27845400	439	* @arg @ref LL_LPUART_PRESCALER_DIV64
AnnaBridge	172:65be27845400	440	* @arg @ref LL_LPUART_PRESCALER_DIV128
AnnaBridge	172:65be27845400	441	* @arg @ref LL_LPUART_PRESCALER_DIV256
AnnaBridge	172:65be27845400	442	* @param __BAUDRATE__ Baud Rate value to achieve
AnnaBridge	172:65be27845400	443	* @retval LPUARTDIV value to be used for BRR register filling
AnnaBridge	172:65be27845400	444	*/
AnnaBridge	172:65be27845400	445	#define __LL_LPUART_DIV(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) (uint32_t)((((((uint64_t)(__PERIPHCLK__)/(uint64_t)(LPUART_PRESCALER_TAB[(uint16_t)(__PRESCALER__)])) * LPUART_LPUARTDIV_FREQ_MUL) + (uint32_t)((__BAUDRATE__)/2U))/(__BAUDRATE__)) & LPUART_BRR_MASK)
AnnaBridge	172:65be27845400	446
AnnaBridge	172:65be27845400	447	/**
AnnaBridge	172:65be27845400	448	* @}
AnnaBridge	172:65be27845400	449	*/
AnnaBridge	172:65be27845400	450
AnnaBridge	172:65be27845400	451	/**
AnnaBridge	172:65be27845400	452	* @}
AnnaBridge	172:65be27845400	453	*/
AnnaBridge	172:65be27845400	454
AnnaBridge	172:65be27845400	455	/* Exported functions --------------------------------------------------------*/
AnnaBridge	172:65be27845400	456	/** @defgroup LPUART_LL_Exported_Functions LPUART Exported Functions
AnnaBridge	172:65be27845400	457	* @{
AnnaBridge	172:65be27845400	458	*/
AnnaBridge	172:65be27845400	459
AnnaBridge	172:65be27845400	460	/** @defgroup LPUART_LL_EF_Configuration Configuration functions
AnnaBridge	172:65be27845400	461	* @{
AnnaBridge	172:65be27845400	462	*/
AnnaBridge	172:65be27845400	463
AnnaBridge	172:65be27845400	464	/**
AnnaBridge	172:65be27845400	465	* @brief LPUART Enable
AnnaBridge	172:65be27845400	466	* @rmtoll CR1 UE LL_LPUART_Enable
AnnaBridge	172:65be27845400	467	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	468	* @retval None
AnnaBridge	172:65be27845400	469	*/
AnnaBridge	172:65be27845400	470	__STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	471	{
AnnaBridge	172:65be27845400	472	SET_BIT(LPUARTx->CR1, USART_CR1_UE);
AnnaBridge	172:65be27845400	473	}
AnnaBridge	172:65be27845400	474
AnnaBridge	172:65be27845400	475	/**
AnnaBridge	172:65be27845400	476	* @brief LPUART Disable
AnnaBridge	172:65be27845400	477	* @note When LPUART is disabled, LPUART prescalers and outputs are stopped immediately,
AnnaBridge	172:65be27845400	478	* and current operations are discarded. The configuration of the LPUART is kept, but all the status
AnnaBridge	172:65be27845400	479	* flags, in the LPUARTx_ISR are set to their default values.
AnnaBridge	172:65be27845400	480	* @note In order to go into low-power mode without generating errors on the line,
AnnaBridge	172:65be27845400	481	* the TE bit must be reset before and the software must wait
AnnaBridge	172:65be27845400	482	* for the TC bit in the LPUART_ISR to be set before resetting the UE bit.
AnnaBridge	172:65be27845400	483	* The DMA requests are also reset when UE = 0 so the DMA channel must
AnnaBridge	172:65be27845400	484	* be disabled before resetting the UE bit.
AnnaBridge	172:65be27845400	485	* @rmtoll CR1 UE LL_LPUART_Disable
AnnaBridge	172:65be27845400	486	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	487	* @retval None
AnnaBridge	172:65be27845400	488	*/
AnnaBridge	172:65be27845400	489	__STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	490	{
AnnaBridge	172:65be27845400	491	CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE);
AnnaBridge	172:65be27845400	492	}
AnnaBridge	172:65be27845400	493
AnnaBridge	172:65be27845400	494	/**
AnnaBridge	172:65be27845400	495	* @brief Indicate if LPUART is enabled
AnnaBridge	172:65be27845400	496	* @rmtoll CR1 UE LL_LPUART_IsEnabled
AnnaBridge	172:65be27845400	497	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	498	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	499	*/
AnnaBridge	172:65be27845400	500	__STATIC_INLINE uint32_t LL_LPUART_IsEnabled(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	501	{
AnnaBridge	172:65be27845400	502	return ((READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	503	}
AnnaBridge	172:65be27845400	504
AnnaBridge	172:65be27845400	505	/**
AnnaBridge	172:65be27845400	506	* @brief FIFO Mode Enable
AnnaBridge	172:65be27845400	507	* @rmtoll CR1 FIFOEN LL_LPUART_EnableFIFO
AnnaBridge	172:65be27845400	508	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	509	* @retval None
AnnaBridge	172:65be27845400	510	*/
AnnaBridge	172:65be27845400	511	__STATIC_INLINE void LL_LPUART_EnableFIFO(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	512	{
AnnaBridge	172:65be27845400	513	SET_BIT(LPUARTx->CR1, USART_CR1_FIFOEN);
AnnaBridge	172:65be27845400	514	}
AnnaBridge	172:65be27845400	515
AnnaBridge	172:65be27845400	516	/**
AnnaBridge	172:65be27845400	517	* @brief FIFO Mode Disable
AnnaBridge	172:65be27845400	518	* @rmtoll CR1 FIFOEN LL_LPUART_DisableFIFO
AnnaBridge	172:65be27845400	519	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	520	* @retval None
AnnaBridge	172:65be27845400	521	*/
AnnaBridge	172:65be27845400	522	__STATIC_INLINE void LL_LPUART_DisableFIFO(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	523	{
AnnaBridge	172:65be27845400	524	CLEAR_BIT(LPUARTx->CR1, USART_CR1_FIFOEN);
AnnaBridge	172:65be27845400	525	}
AnnaBridge	172:65be27845400	526
AnnaBridge	172:65be27845400	527	/**
AnnaBridge	172:65be27845400	528	* @brief Indicate if FIFO Mode is enabled
AnnaBridge	172:65be27845400	529	* @rmtoll CR1 FIFOEN LL_LPUART_IsEnabledFIFO
AnnaBridge	172:65be27845400	530	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	531	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	532	*/
AnnaBridge	172:65be27845400	533	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledFIFO(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	534	{
AnnaBridge	172:65be27845400	535	return ((READ_BIT(LPUARTx->CR1, USART_CR1_FIFOEN) == (USART_CR1_FIFOEN)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	536	}
AnnaBridge	172:65be27845400	537
AnnaBridge	172:65be27845400	538	/**
AnnaBridge	172:65be27845400	539	* @brief Configure TX FIFO Threshold
AnnaBridge	172:65be27845400	540	* @rmtoll CR3 TXFTCFG LL_LPUART_SetTXFIFOThreshold
AnnaBridge	172:65be27845400	541	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	542	* @param Threshold This parameter can be one of the following values:
AnnaBridge	172:65be27845400	543	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
AnnaBridge	172:65be27845400	544	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
AnnaBridge	172:65be27845400	545	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
AnnaBridge	172:65be27845400	546	* @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
AnnaBridge	172:65be27845400	547	* @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
AnnaBridge	172:65be27845400	548	* @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
AnnaBridge	172:65be27845400	549	* @retval None
AnnaBridge	172:65be27845400	550	*/
AnnaBridge	172:65be27845400	551	__STATIC_INLINE void LL_LPUART_SetTXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
AnnaBridge	172:65be27845400	552	{
AnnaBridge	172:65be27845400	553	MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);
AnnaBridge	172:65be27845400	554	}
AnnaBridge	172:65be27845400	555
AnnaBridge	172:65be27845400	556	/**
AnnaBridge	172:65be27845400	557	* @brief Return TX FIFO Threshold Configuration
AnnaBridge	172:65be27845400	558	* @rmtoll CR3 TXFTCFG LL_LPUART_GetTXFIFOThreshold
AnnaBridge	172:65be27845400	559	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	560	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	561	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
AnnaBridge	172:65be27845400	562	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
AnnaBridge	172:65be27845400	563	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
AnnaBridge	172:65be27845400	564	* @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
AnnaBridge	172:65be27845400	565	* @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
AnnaBridge	172:65be27845400	566	* @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
AnnaBridge	172:65be27845400	567	*/
AnnaBridge	172:65be27845400	568	__STATIC_INLINE uint32_t LL_LPUART_GetTXFIFOThreshold(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	569	{
AnnaBridge	172:65be27845400	570	return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
AnnaBridge	172:65be27845400	571	}
AnnaBridge	172:65be27845400	572
AnnaBridge	172:65be27845400	573	/**
AnnaBridge	172:65be27845400	574	* @brief Configure RX FIFO Threshold
AnnaBridge	172:65be27845400	575	* @rmtoll CR3 RXFTCFG LL_LPUART_SetRXFIFOThreshold
AnnaBridge	172:65be27845400	576	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	577	* @param Threshold This parameter can be one of the following values:
AnnaBridge	172:65be27845400	578	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
AnnaBridge	172:65be27845400	579	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
AnnaBridge	172:65be27845400	580	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
AnnaBridge	172:65be27845400	581	* @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
AnnaBridge	172:65be27845400	582	* @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
AnnaBridge	172:65be27845400	583	* @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
AnnaBridge	172:65be27845400	584	* @retval None
AnnaBridge	172:65be27845400	585	*/
AnnaBridge	172:65be27845400	586	__STATIC_INLINE void LL_LPUART_SetRXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
AnnaBridge	172:65be27845400	587	{
AnnaBridge	172:65be27845400	588	MODIFY_REG(LPUARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);
AnnaBridge	172:65be27845400	589	}
AnnaBridge	172:65be27845400	590
AnnaBridge	172:65be27845400	591	/**
AnnaBridge	172:65be27845400	592	* @brief Return RX FIFO Threshold Configuration
AnnaBridge	172:65be27845400	593	* @rmtoll CR3 RXFTCFG LL_LPUART_GetRXFIFOThreshold
AnnaBridge	172:65be27845400	594	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	595	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	596	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
AnnaBridge	172:65be27845400	597	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
AnnaBridge	172:65be27845400	598	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
AnnaBridge	172:65be27845400	599	* @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
AnnaBridge	172:65be27845400	600	* @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
AnnaBridge	172:65be27845400	601	* @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
AnnaBridge	172:65be27845400	602	*/
AnnaBridge	172:65be27845400	603	__STATIC_INLINE uint32_t LL_LPUART_GetRXFIFOThreshold(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	604	{
AnnaBridge	172:65be27845400	605	return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
AnnaBridge	172:65be27845400	606	}
AnnaBridge	172:65be27845400	607
AnnaBridge	172:65be27845400	608	/**
AnnaBridge	172:65be27845400	609	* @brief Configure TX and RX FIFOs Threshold
AnnaBridge	172:65be27845400	610	* @rmtoll CR3 TXFTCFG LL_LPUART_ConfigFIFOsThreshold\n
AnnaBridge	172:65be27845400	611	* CR3 RXFTCFG LL_LPUART_ConfigFIFOsThreshold
AnnaBridge	172:65be27845400	612	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	613	* @param TXThreshold This parameter can be one of the following values:
AnnaBridge	172:65be27845400	614	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
AnnaBridge	172:65be27845400	615	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
AnnaBridge	172:65be27845400	616	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
AnnaBridge	172:65be27845400	617	* @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
AnnaBridge	172:65be27845400	618	* @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
AnnaBridge	172:65be27845400	619	* @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
AnnaBridge	172:65be27845400	620	* @param RXThreshold This parameter can be one of the following values:
AnnaBridge	172:65be27845400	621	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
AnnaBridge	172:65be27845400	622	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
AnnaBridge	172:65be27845400	623	* @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
AnnaBridge	172:65be27845400	624	* @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
AnnaBridge	172:65be27845400	625	* @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
AnnaBridge	172:65be27845400	626	* @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
AnnaBridge	172:65be27845400	627	* @retval None
AnnaBridge	172:65be27845400	628	*/
AnnaBridge	172:65be27845400	629	__STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint32_t TXThreshold, uint32_t RXThreshold)
AnnaBridge	172:65be27845400	630	{
AnnaBridge	172:65be27845400	631	MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG \| USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) \| (RXThreshold << USART_CR3_RXFTCFG_Pos));
AnnaBridge	172:65be27845400	632	}
AnnaBridge	172:65be27845400	633
AnnaBridge	172:65be27845400	634	/**
AnnaBridge	172:65be27845400	635	* @brief LPUART enabled in STOP Mode
AnnaBridge	172:65be27845400	636	* @note When this function is enabled, LPUART is able to wake up the MCU from Stop mode, provided that
AnnaBridge	172:65be27845400	637	* LPUART clock selection is HSI or LSE in RCC.
AnnaBridge	172:65be27845400	638	* @rmtoll CR1 UESM LL_LPUART_EnableInStopMode
AnnaBridge	172:65be27845400	639	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	640	* @retval None
AnnaBridge	172:65be27845400	641	*/
AnnaBridge	172:65be27845400	642	__STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	643	{
AnnaBridge	172:65be27845400	644	SET_BIT(LPUARTx->CR1, USART_CR1_UESM);
AnnaBridge	172:65be27845400	645	}
AnnaBridge	172:65be27845400	646
AnnaBridge	172:65be27845400	647	/**
AnnaBridge	172:65be27845400	648	* @brief LPUART disabled in STOP Mode
AnnaBridge	172:65be27845400	649	* @note When this function is disabled, LPUART is not able to wake up the MCU from Stop mode
AnnaBridge	172:65be27845400	650	* @rmtoll CR1 UESM LL_LPUART_DisableInStopMode
AnnaBridge	172:65be27845400	651	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	652	* @retval None
AnnaBridge	172:65be27845400	653	*/
AnnaBridge	172:65be27845400	654	__STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	655	{
AnnaBridge	172:65be27845400	656	CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM);
AnnaBridge	172:65be27845400	657	}
AnnaBridge	172:65be27845400	658
AnnaBridge	172:65be27845400	659	/**
AnnaBridge	172:65be27845400	660	* @brief Indicate if LPUART is enabled in STOP Mode
AnnaBridge	172:65be27845400	661	* (able to wake up MCU from Stop mode or not)
AnnaBridge	172:65be27845400	662	* @rmtoll CR1 UESM LL_LPUART_IsEnabledInStopMode
AnnaBridge	172:65be27845400	663	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	664	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	665	*/
AnnaBridge	172:65be27845400	666	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	667	{
AnnaBridge	172:65be27845400	668	return ((READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	669	}
AnnaBridge	172:65be27845400	670
AnnaBridge	172:65be27845400	671	/**
AnnaBridge	172:65be27845400	672	* @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
AnnaBridge	172:65be27845400	673	* @rmtoll CR1 RE LL_LPUART_EnableDirectionRx
AnnaBridge	172:65be27845400	674	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	675	* @retval None
AnnaBridge	172:65be27845400	676	*/
AnnaBridge	172:65be27845400	677	__STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	678	{
AnnaBridge	172:65be27845400	679	SET_BIT(LPUARTx->CR1, USART_CR1_RE);
AnnaBridge	172:65be27845400	680	}
AnnaBridge	172:65be27845400	681
AnnaBridge	172:65be27845400	682	/**
AnnaBridge	172:65be27845400	683	* @brief Receiver Disable
AnnaBridge	172:65be27845400	684	* @rmtoll CR1 RE LL_LPUART_DisableDirectionRx
AnnaBridge	172:65be27845400	685	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	686	* @retval None
AnnaBridge	172:65be27845400	687	*/
AnnaBridge	172:65be27845400	688	__STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	689	{
AnnaBridge	172:65be27845400	690	CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE);
AnnaBridge	172:65be27845400	691	}
AnnaBridge	172:65be27845400	692
AnnaBridge	172:65be27845400	693	/**
AnnaBridge	172:65be27845400	694	* @brief Transmitter Enable
AnnaBridge	172:65be27845400	695	* @rmtoll CR1 TE LL_LPUART_EnableDirectionTx
AnnaBridge	172:65be27845400	696	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	697	* @retval None
AnnaBridge	172:65be27845400	698	*/
AnnaBridge	172:65be27845400	699	__STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	700	{
AnnaBridge	172:65be27845400	701	SET_BIT(LPUARTx->CR1, USART_CR1_TE);
AnnaBridge	172:65be27845400	702	}
AnnaBridge	172:65be27845400	703
AnnaBridge	172:65be27845400	704	/**
AnnaBridge	172:65be27845400	705	* @brief Transmitter Disable
AnnaBridge	172:65be27845400	706	* @rmtoll CR1 TE LL_LPUART_DisableDirectionTx
AnnaBridge	172:65be27845400	707	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	708	* @retval None
AnnaBridge	172:65be27845400	709	*/
AnnaBridge	172:65be27845400	710	__STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	711	{
AnnaBridge	172:65be27845400	712	CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE);
AnnaBridge	172:65be27845400	713	}
AnnaBridge	172:65be27845400	714
AnnaBridge	172:65be27845400	715	/**
AnnaBridge	172:65be27845400	716	* @brief Configure simultaneously enabled/disabled states
AnnaBridge	172:65be27845400	717	* of Transmitter and Receiver
AnnaBridge	172:65be27845400	718	* @rmtoll CR1 RE LL_LPUART_SetTransferDirection\n
AnnaBridge	172:65be27845400	719	* CR1 TE LL_LPUART_SetTransferDirection
AnnaBridge	172:65be27845400	720	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	721	* @param TransferDirection This parameter can be one of the following values:
AnnaBridge	172:65be27845400	722	* @arg @ref LL_LPUART_DIRECTION_NONE
AnnaBridge	172:65be27845400	723	* @arg @ref LL_LPUART_DIRECTION_RX
AnnaBridge	172:65be27845400	724	* @arg @ref LL_LPUART_DIRECTION_TX
AnnaBridge	172:65be27845400	725	* @arg @ref LL_LPUART_DIRECTION_TX_RX
AnnaBridge	172:65be27845400	726	* @retval None
AnnaBridge	172:65be27845400	727	*/
AnnaBridge	172:65be27845400	728	__STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection)
AnnaBridge	172:65be27845400	729	{
AnnaBridge	172:65be27845400	730	MODIFY_REG(LPUARTx->CR1, USART_CR1_RE \| USART_CR1_TE, TransferDirection);
AnnaBridge	172:65be27845400	731	}
AnnaBridge	172:65be27845400	732
AnnaBridge	172:65be27845400	733	/**
AnnaBridge	172:65be27845400	734	* @brief Return enabled/disabled states of Transmitter and Receiver
AnnaBridge	172:65be27845400	735	* @rmtoll CR1 RE LL_LPUART_GetTransferDirection\n
AnnaBridge	172:65be27845400	736	* CR1 TE LL_LPUART_GetTransferDirection
AnnaBridge	172:65be27845400	737	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	738	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	739	* @arg @ref LL_LPUART_DIRECTION_NONE
AnnaBridge	172:65be27845400	740	* @arg @ref LL_LPUART_DIRECTION_RX
AnnaBridge	172:65be27845400	741	* @arg @ref LL_LPUART_DIRECTION_TX
AnnaBridge	172:65be27845400	742	* @arg @ref LL_LPUART_DIRECTION_TX_RX
AnnaBridge	172:65be27845400	743	*/
AnnaBridge	172:65be27845400	744	__STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	745	{
AnnaBridge	172:65be27845400	746	return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE \| USART_CR1_TE));
AnnaBridge	172:65be27845400	747	}
AnnaBridge	172:65be27845400	748
AnnaBridge	172:65be27845400	749	/**
AnnaBridge	172:65be27845400	750	* @brief Configure Parity (enabled/disabled and parity mode if enabled)
AnnaBridge	172:65be27845400	751	* @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
AnnaBridge	172:65be27845400	752	* When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
AnnaBridge	172:65be27845400	753	* (depending on data width) and parity is checked on the received data.
AnnaBridge	172:65be27845400	754	* @rmtoll CR1 PS LL_LPUART_SetParity\n
AnnaBridge	172:65be27845400	755	* CR1 PCE LL_LPUART_SetParity
AnnaBridge	172:65be27845400	756	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	757	* @param Parity This parameter can be one of the following values:
AnnaBridge	172:65be27845400	758	* @arg @ref LL_LPUART_PARITY_NONE
AnnaBridge	172:65be27845400	759	* @arg @ref LL_LPUART_PARITY_EVEN
AnnaBridge	172:65be27845400	760	* @arg @ref LL_LPUART_PARITY_ODD
AnnaBridge	172:65be27845400	761	* @retval None
AnnaBridge	172:65be27845400	762	*/
AnnaBridge	172:65be27845400	763	__STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity)
AnnaBridge	172:65be27845400	764	{
AnnaBridge	172:65be27845400	765	MODIFY_REG(LPUARTx->CR1, USART_CR1_PS \| USART_CR1_PCE, Parity);
AnnaBridge	172:65be27845400	766	}
AnnaBridge	172:65be27845400	767
AnnaBridge	172:65be27845400	768	/**
AnnaBridge	172:65be27845400	769	* @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
AnnaBridge	172:65be27845400	770	* @rmtoll CR1 PS LL_LPUART_GetParity\n
AnnaBridge	172:65be27845400	771	* CR1 PCE LL_LPUART_GetParity
AnnaBridge	172:65be27845400	772	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	773	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	774	* @arg @ref LL_LPUART_PARITY_NONE
AnnaBridge	172:65be27845400	775	* @arg @ref LL_LPUART_PARITY_EVEN
AnnaBridge	172:65be27845400	776	* @arg @ref LL_LPUART_PARITY_ODD
AnnaBridge	172:65be27845400	777	*/
AnnaBridge	172:65be27845400	778	__STATIC_INLINE uint32_t LL_LPUART_GetParity(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	779	{
AnnaBridge	172:65be27845400	780	return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS \| USART_CR1_PCE));
AnnaBridge	172:65be27845400	781	}
AnnaBridge	172:65be27845400	782
AnnaBridge	172:65be27845400	783	/**
AnnaBridge	172:65be27845400	784	* @brief Set Receiver Wake Up method from Mute mode.
AnnaBridge	172:65be27845400	785	* @rmtoll CR1 WAKE LL_LPUART_SetWakeUpMethod
AnnaBridge	172:65be27845400	786	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	787	* @param Method This parameter can be one of the following values:
AnnaBridge	172:65be27845400	788	* @arg @ref LL_LPUART_WAKEUP_IDLELINE
AnnaBridge	172:65be27845400	789	* @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
AnnaBridge	172:65be27845400	790	* @retval None
AnnaBridge	172:65be27845400	791	*/
AnnaBridge	172:65be27845400	792	__STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method)
AnnaBridge	172:65be27845400	793	{
AnnaBridge	172:65be27845400	794	MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method);
AnnaBridge	172:65be27845400	795	}
AnnaBridge	172:65be27845400	796
AnnaBridge	172:65be27845400	797	/**
AnnaBridge	172:65be27845400	798	* @brief Return Receiver Wake Up method from Mute mode
AnnaBridge	172:65be27845400	799	* @rmtoll CR1 WAKE LL_LPUART_GetWakeUpMethod
AnnaBridge	172:65be27845400	800	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	801	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	802	* @arg @ref LL_LPUART_WAKEUP_IDLELINE
AnnaBridge	172:65be27845400	803	* @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
AnnaBridge	172:65be27845400	804	*/
AnnaBridge	172:65be27845400	805	__STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	806	{
AnnaBridge	172:65be27845400	807	return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE));
AnnaBridge	172:65be27845400	808	}
AnnaBridge	172:65be27845400	809
AnnaBridge	172:65be27845400	810	/**
AnnaBridge	172:65be27845400	811	* @brief Set Word length (nb of data bits, excluding start and stop bits)
AnnaBridge	172:65be27845400	812	* @rmtoll CR1 M LL_LPUART_SetDataWidth
AnnaBridge	172:65be27845400	813	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	814	* @param DataWidth This parameter can be one of the following values:
AnnaBridge	172:65be27845400	815	* @arg @ref LL_LPUART_DATAWIDTH_7B
AnnaBridge	172:65be27845400	816	* @arg @ref LL_LPUART_DATAWIDTH_8B
AnnaBridge	172:65be27845400	817	* @arg @ref LL_LPUART_DATAWIDTH_9B
AnnaBridge	172:65be27845400	818	* @retval None
AnnaBridge	172:65be27845400	819	*/
AnnaBridge	172:65be27845400	820	__STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth)
AnnaBridge	172:65be27845400	821	{
AnnaBridge	172:65be27845400	822	MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth);
AnnaBridge	172:65be27845400	823	}
AnnaBridge	172:65be27845400	824
AnnaBridge	172:65be27845400	825	/**
AnnaBridge	172:65be27845400	826	* @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
AnnaBridge	172:65be27845400	827	* @rmtoll CR1 M LL_LPUART_GetDataWidth
AnnaBridge	172:65be27845400	828	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	829	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	830	* @arg @ref LL_LPUART_DATAWIDTH_7B
AnnaBridge	172:65be27845400	831	* @arg @ref LL_LPUART_DATAWIDTH_8B
AnnaBridge	172:65be27845400	832	* @arg @ref LL_LPUART_DATAWIDTH_9B
AnnaBridge	172:65be27845400	833	*/
AnnaBridge	172:65be27845400	834	__STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	835	{
AnnaBridge	172:65be27845400	836	return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M));
AnnaBridge	172:65be27845400	837	}
AnnaBridge	172:65be27845400	838
AnnaBridge	172:65be27845400	839	/**
AnnaBridge	172:65be27845400	840	* @brief Allow switch between Mute Mode and Active mode
AnnaBridge	172:65be27845400	841	* @rmtoll CR1 MME LL_LPUART_EnableMuteMode
AnnaBridge	172:65be27845400	842	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	843	* @retval None
AnnaBridge	172:65be27845400	844	*/
AnnaBridge	172:65be27845400	845	__STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	846	{
AnnaBridge	172:65be27845400	847	SET_BIT(LPUARTx->CR1, USART_CR1_MME);
AnnaBridge	172:65be27845400	848	}
AnnaBridge	172:65be27845400	849
AnnaBridge	172:65be27845400	850	/**
AnnaBridge	172:65be27845400	851	* @brief Prevent Mute Mode use. Set Receiver in active mode permanently.
AnnaBridge	172:65be27845400	852	* @rmtoll CR1 MME LL_LPUART_DisableMuteMode
AnnaBridge	172:65be27845400	853	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	854	* @retval None
AnnaBridge	172:65be27845400	855	*/
AnnaBridge	172:65be27845400	856	__STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	857	{
AnnaBridge	172:65be27845400	858	CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME);
AnnaBridge	172:65be27845400	859	}
AnnaBridge	172:65be27845400	860
AnnaBridge	172:65be27845400	861	/**
AnnaBridge	172:65be27845400	862	* @brief Indicate if switch between Mute Mode and Active mode is allowed
AnnaBridge	172:65be27845400	863	* @rmtoll CR1 MME LL_LPUART_IsEnabledMuteMode
AnnaBridge	172:65be27845400	864	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	865	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	866	*/
AnnaBridge	172:65be27845400	867	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	868	{
AnnaBridge	172:65be27845400	869	return ((READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	870	}
AnnaBridge	172:65be27845400	871
AnnaBridge	172:65be27845400	872	/**
AnnaBridge	172:65be27845400	873	* @brief Configure Clock source prescaler for baudrate generator and oversampling
AnnaBridge	172:65be27845400	874	* @rmtoll PRESC PRESCALER LL_LPUART_SetPrescaler
AnnaBridge	172:65be27845400	875	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	876	* @param PrescalerValue This parameter can be one of the following values:
AnnaBridge	172:65be27845400	877	* @arg @ref LL_LPUART_PRESCALER_DIV1
AnnaBridge	172:65be27845400	878	* @arg @ref LL_LPUART_PRESCALER_DIV2
AnnaBridge	172:65be27845400	879	* @arg @ref LL_LPUART_PRESCALER_DIV4
AnnaBridge	172:65be27845400	880	* @arg @ref LL_LPUART_PRESCALER_DIV6
AnnaBridge	172:65be27845400	881	* @arg @ref LL_LPUART_PRESCALER_DIV8
AnnaBridge	172:65be27845400	882	* @arg @ref LL_LPUART_PRESCALER_DIV10
AnnaBridge	172:65be27845400	883	* @arg @ref LL_LPUART_PRESCALER_DIV12
AnnaBridge	172:65be27845400	884	* @arg @ref LL_LPUART_PRESCALER_DIV16
AnnaBridge	172:65be27845400	885	* @arg @ref LL_LPUART_PRESCALER_DIV32
AnnaBridge	172:65be27845400	886	* @arg @ref LL_LPUART_PRESCALER_DIV64
AnnaBridge	172:65be27845400	887	* @arg @ref LL_LPUART_PRESCALER_DIV128
AnnaBridge	172:65be27845400	888	* @arg @ref LL_LPUART_PRESCALER_DIV256
AnnaBridge	172:65be27845400	889	* @retval None
AnnaBridge	172:65be27845400	890	*/
AnnaBridge	172:65be27845400	891	__STATIC_INLINE void LL_LPUART_SetPrescaler(USART_TypeDef *LPUARTx, uint32_t PrescalerValue)
AnnaBridge	172:65be27845400	892	{
AnnaBridge	172:65be27845400	893	MODIFY_REG(LPUARTx->PRESC, USART_PRESC_PRESCALER, (uint16_t)PrescalerValue);
AnnaBridge	172:65be27845400	894	}
AnnaBridge	172:65be27845400	895
AnnaBridge	172:65be27845400	896	/**
AnnaBridge	172:65be27845400	897	* @brief Retrieve the Clock source prescaler for baudrate generator and oversampling
AnnaBridge	172:65be27845400	898	* @rmtoll PRESC PRESCALER LL_LPUART_GetPrescaler
AnnaBridge	172:65be27845400	899	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	900	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	901	* @arg @ref LL_LPUART_PRESCALER_DIV1
AnnaBridge	172:65be27845400	902	* @arg @ref LL_LPUART_PRESCALER_DIV2
AnnaBridge	172:65be27845400	903	* @arg @ref LL_LPUART_PRESCALER_DIV4
AnnaBridge	172:65be27845400	904	* @arg @ref LL_LPUART_PRESCALER_DIV6
AnnaBridge	172:65be27845400	905	* @arg @ref LL_LPUART_PRESCALER_DIV8
AnnaBridge	172:65be27845400	906	* @arg @ref LL_LPUART_PRESCALER_DIV10
AnnaBridge	172:65be27845400	907	* @arg @ref LL_LPUART_PRESCALER_DIV12
AnnaBridge	172:65be27845400	908	* @arg @ref LL_LPUART_PRESCALER_DIV16
AnnaBridge	172:65be27845400	909	* @arg @ref LL_LPUART_PRESCALER_DIV32
AnnaBridge	172:65be27845400	910	* @arg @ref LL_LPUART_PRESCALER_DIV64
AnnaBridge	172:65be27845400	911	* @arg @ref LL_LPUART_PRESCALER_DIV128
AnnaBridge	172:65be27845400	912	* @arg @ref LL_LPUART_PRESCALER_DIV256
AnnaBridge	172:65be27845400	913	*/
AnnaBridge	172:65be27845400	914	__STATIC_INLINE uint32_t LL_LPUART_GetPrescaler(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	915	{
AnnaBridge	172:65be27845400	916	return (uint32_t)(READ_BIT(LPUARTx->PRESC, USART_PRESC_PRESCALER));
AnnaBridge	172:65be27845400	917	}
AnnaBridge	172:65be27845400	918
AnnaBridge	172:65be27845400	919	/**
AnnaBridge	172:65be27845400	920	* @brief Set the length of the stop bits
AnnaBridge	172:65be27845400	921	* @rmtoll CR2 STOP LL_LPUART_SetStopBitsLength
AnnaBridge	172:65be27845400	922	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	923	* @param StopBits This parameter can be one of the following values:
AnnaBridge	172:65be27845400	924	* @arg @ref LL_LPUART_STOPBITS_1
AnnaBridge	172:65be27845400	925	* @arg @ref LL_LPUART_STOPBITS_2
AnnaBridge	172:65be27845400	926	* @retval None
AnnaBridge	172:65be27845400	927	*/
AnnaBridge	172:65be27845400	928	__STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits)
AnnaBridge	172:65be27845400	929	{
AnnaBridge	172:65be27845400	930	MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
AnnaBridge	172:65be27845400	931	}
AnnaBridge	172:65be27845400	932
AnnaBridge	172:65be27845400	933	/**
AnnaBridge	172:65be27845400	934	* @brief Retrieve the length of the stop bits
AnnaBridge	172:65be27845400	935	* @rmtoll CR2 STOP LL_LPUART_GetStopBitsLength
AnnaBridge	172:65be27845400	936	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	937	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	938	* @arg @ref LL_LPUART_STOPBITS_1
AnnaBridge	172:65be27845400	939	* @arg @ref LL_LPUART_STOPBITS_2
AnnaBridge	172:65be27845400	940	*/
AnnaBridge	172:65be27845400	941	__STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	942	{
AnnaBridge	172:65be27845400	943	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP));
AnnaBridge	172:65be27845400	944	}
AnnaBridge	172:65be27845400	945
AnnaBridge	172:65be27845400	946	/**
AnnaBridge	172:65be27845400	947	* @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
AnnaBridge	172:65be27845400	948	* @note Call of this function is equivalent to following function call sequence :
AnnaBridge	172:65be27845400	949	* - Data Width configuration using @ref LL_LPUART_SetDataWidth() function
AnnaBridge	172:65be27845400	950	* - Parity Control and mode configuration using @ref LL_LPUART_SetParity() function
AnnaBridge	172:65be27845400	951	* - Stop bits configuration using @ref LL_LPUART_SetStopBitsLength() function
AnnaBridge	172:65be27845400	952	* @rmtoll CR1 PS LL_LPUART_ConfigCharacter\n
AnnaBridge	172:65be27845400	953	* CR1 PCE LL_LPUART_ConfigCharacter\n
AnnaBridge	172:65be27845400	954	* CR1 M LL_LPUART_ConfigCharacter\n
AnnaBridge	172:65be27845400	955	* CR2 STOP LL_LPUART_ConfigCharacter
AnnaBridge	172:65be27845400	956	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	957	* @param DataWidth This parameter can be one of the following values:
AnnaBridge	172:65be27845400	958	* @arg @ref LL_LPUART_DATAWIDTH_7B
AnnaBridge	172:65be27845400	959	* @arg @ref LL_LPUART_DATAWIDTH_8B
AnnaBridge	172:65be27845400	960	* @arg @ref LL_LPUART_DATAWIDTH_9B
AnnaBridge	172:65be27845400	961	* @param Parity This parameter can be one of the following values:
AnnaBridge	172:65be27845400	962	* @arg @ref LL_LPUART_PARITY_NONE
AnnaBridge	172:65be27845400	963	* @arg @ref LL_LPUART_PARITY_EVEN
AnnaBridge	172:65be27845400	964	* @arg @ref LL_LPUART_PARITY_ODD
AnnaBridge	172:65be27845400	965	* @param StopBits This parameter can be one of the following values:
AnnaBridge	172:65be27845400	966	* @arg @ref LL_LPUART_STOPBITS_1
AnnaBridge	172:65be27845400	967	* @arg @ref LL_LPUART_STOPBITS_2
AnnaBridge	172:65be27845400	968	* @retval None
AnnaBridge	172:65be27845400	969	*/
AnnaBridge	172:65be27845400	970	__STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t Parity,
AnnaBridge	172:65be27845400	971	uint32_t StopBits)
AnnaBridge	172:65be27845400	972	{
AnnaBridge	172:65be27845400	973	MODIFY_REG(LPUARTx->CR1, USART_CR1_PS \| USART_CR1_PCE \| USART_CR1_M, Parity \| DataWidth);
AnnaBridge	172:65be27845400	974	MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
AnnaBridge	172:65be27845400	975	}
AnnaBridge	172:65be27845400	976
AnnaBridge	172:65be27845400	977	/**
AnnaBridge	172:65be27845400	978	* @brief Configure TX/RX pins swapping setting.
AnnaBridge	172:65be27845400	979	* @rmtoll CR2 SWAP LL_LPUART_SetTXRXSwap
AnnaBridge	172:65be27845400	980	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	981	* @param SwapConfig This parameter can be one of the following values:
AnnaBridge	172:65be27845400	982	* @arg @ref LL_LPUART_TXRX_STANDARD
AnnaBridge	172:65be27845400	983	* @arg @ref LL_LPUART_TXRX_SWAPPED
AnnaBridge	172:65be27845400	984	* @retval None
AnnaBridge	172:65be27845400	985	*/
AnnaBridge	172:65be27845400	986	__STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig)
AnnaBridge	172:65be27845400	987	{
AnnaBridge	172:65be27845400	988	MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig);
AnnaBridge	172:65be27845400	989	}
AnnaBridge	172:65be27845400	990
AnnaBridge	172:65be27845400	991	/**
AnnaBridge	172:65be27845400	992	* @brief Retrieve TX/RX pins swapping configuration.
AnnaBridge	172:65be27845400	993	* @rmtoll CR2 SWAP LL_LPUART_GetTXRXSwap
AnnaBridge	172:65be27845400	994	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	995	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	996	* @arg @ref LL_LPUART_TXRX_STANDARD
AnnaBridge	172:65be27845400	997	* @arg @ref LL_LPUART_TXRX_SWAPPED
AnnaBridge	172:65be27845400	998	*/
AnnaBridge	172:65be27845400	999	__STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1000	{
AnnaBridge	172:65be27845400	1001	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP));
AnnaBridge	172:65be27845400	1002	}
AnnaBridge	172:65be27845400	1003
AnnaBridge	172:65be27845400	1004	/**
AnnaBridge	172:65be27845400	1005	* @brief Configure RX pin active level logic
AnnaBridge	172:65be27845400	1006	* @rmtoll CR2 RXINV LL_LPUART_SetRXPinLevel
AnnaBridge	172:65be27845400	1007	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1008	* @param PinInvMethod This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1009	* @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
AnnaBridge	172:65be27845400	1010	* @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
AnnaBridge	172:65be27845400	1011	* @retval None
AnnaBridge	172:65be27845400	1012	*/
AnnaBridge	172:65be27845400	1013	__STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
AnnaBridge	172:65be27845400	1014	{
AnnaBridge	172:65be27845400	1015	MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod);
AnnaBridge	172:65be27845400	1016	}
AnnaBridge	172:65be27845400	1017
AnnaBridge	172:65be27845400	1018	/**
AnnaBridge	172:65be27845400	1019	* @brief Retrieve RX pin active level logic configuration
AnnaBridge	172:65be27845400	1020	* @rmtoll CR2 RXINV LL_LPUART_GetRXPinLevel
AnnaBridge	172:65be27845400	1021	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1022	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1023	* @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
AnnaBridge	172:65be27845400	1024	* @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
AnnaBridge	172:65be27845400	1025	*/
AnnaBridge	172:65be27845400	1026	__STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1027	{
AnnaBridge	172:65be27845400	1028	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV));
AnnaBridge	172:65be27845400	1029	}
AnnaBridge	172:65be27845400	1030
AnnaBridge	172:65be27845400	1031	/**
AnnaBridge	172:65be27845400	1032	* @brief Configure TX pin active level logic
AnnaBridge	172:65be27845400	1033	* @rmtoll CR2 TXINV LL_LPUART_SetTXPinLevel
AnnaBridge	172:65be27845400	1034	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1035	* @param PinInvMethod This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1036	* @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
AnnaBridge	172:65be27845400	1037	* @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
AnnaBridge	172:65be27845400	1038	* @retval None
AnnaBridge	172:65be27845400	1039	*/
AnnaBridge	172:65be27845400	1040	__STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
AnnaBridge	172:65be27845400	1041	{
AnnaBridge	172:65be27845400	1042	MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod);
AnnaBridge	172:65be27845400	1043	}
AnnaBridge	172:65be27845400	1044
AnnaBridge	172:65be27845400	1045	/**
AnnaBridge	172:65be27845400	1046	* @brief Retrieve TX pin active level logic configuration
AnnaBridge	172:65be27845400	1047	* @rmtoll CR2 TXINV LL_LPUART_GetTXPinLevel
AnnaBridge	172:65be27845400	1048	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1049	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1050	* @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
AnnaBridge	172:65be27845400	1051	* @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
AnnaBridge	172:65be27845400	1052	*/
AnnaBridge	172:65be27845400	1053	__STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1054	{
AnnaBridge	172:65be27845400	1055	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV));
AnnaBridge	172:65be27845400	1056	}
AnnaBridge	172:65be27845400	1057
AnnaBridge	172:65be27845400	1058	/**
AnnaBridge	172:65be27845400	1059	* @brief Configure Binary data logic.
AnnaBridge	172:65be27845400	1060	*
AnnaBridge	172:65be27845400	1061	* @note Allow to define how Logical data from the data register are send/received :
AnnaBridge	172:65be27845400	1062	* either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H)
AnnaBridge	172:65be27845400	1063	* @rmtoll CR2 DATAINV LL_LPUART_SetBinaryDataLogic
AnnaBridge	172:65be27845400	1064	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1065	* @param DataLogic This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1066	* @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
AnnaBridge	172:65be27845400	1067	* @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
AnnaBridge	172:65be27845400	1068	* @retval None
AnnaBridge	172:65be27845400	1069	*/
AnnaBridge	172:65be27845400	1070	__STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic)
AnnaBridge	172:65be27845400	1071	{
AnnaBridge	172:65be27845400	1072	MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic);
AnnaBridge	172:65be27845400	1073	}
AnnaBridge	172:65be27845400	1074
AnnaBridge	172:65be27845400	1075	/**
AnnaBridge	172:65be27845400	1076	* @brief Retrieve Binary data configuration
AnnaBridge	172:65be27845400	1077	* @rmtoll CR2 DATAINV LL_LPUART_GetBinaryDataLogic
AnnaBridge	172:65be27845400	1078	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1079	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1080	* @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
AnnaBridge	172:65be27845400	1081	* @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
AnnaBridge	172:65be27845400	1082	*/
AnnaBridge	172:65be27845400	1083	__STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1084	{
AnnaBridge	172:65be27845400	1085	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV));
AnnaBridge	172:65be27845400	1086	}
AnnaBridge	172:65be27845400	1087
AnnaBridge	172:65be27845400	1088	/**
AnnaBridge	172:65be27845400	1089	* @brief Configure transfer bit order (either Less or Most Significant Bit First)
AnnaBridge	172:65be27845400	1090	* @note MSB First means data is transmitted/received with the MSB first, following the start bit.
AnnaBridge	172:65be27845400	1091	* LSB First means data is transmitted/received with data bit 0 first, following the start bit.
AnnaBridge	172:65be27845400	1092	* @rmtoll CR2 MSBFIRST LL_LPUART_SetTransferBitOrder
AnnaBridge	172:65be27845400	1093	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1094	* @param BitOrder This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1095	* @arg @ref LL_LPUART_BITORDER_LSBFIRST
AnnaBridge	172:65be27845400	1096	* @arg @ref LL_LPUART_BITORDER_MSBFIRST
AnnaBridge	172:65be27845400	1097	* @retval None
AnnaBridge	172:65be27845400	1098	*/
AnnaBridge	172:65be27845400	1099	__STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder)
AnnaBridge	172:65be27845400	1100	{
AnnaBridge	172:65be27845400	1101	MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
AnnaBridge	172:65be27845400	1102	}
AnnaBridge	172:65be27845400	1103
AnnaBridge	172:65be27845400	1104	/**
AnnaBridge	172:65be27845400	1105	* @brief Return transfer bit order (either Less or Most Significant Bit First)
AnnaBridge	172:65be27845400	1106	* @note MSB First means data is transmitted/received with the MSB first, following the start bit.
AnnaBridge	172:65be27845400	1107	* LSB First means data is transmitted/received with data bit 0 first, following the start bit.
AnnaBridge	172:65be27845400	1108	* @rmtoll CR2 MSBFIRST LL_LPUART_GetTransferBitOrder
AnnaBridge	172:65be27845400	1109	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1110	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1111	* @arg @ref LL_LPUART_BITORDER_LSBFIRST
AnnaBridge	172:65be27845400	1112	* @arg @ref LL_LPUART_BITORDER_MSBFIRST
AnnaBridge	172:65be27845400	1113	*/
AnnaBridge	172:65be27845400	1114	__STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1115	{
AnnaBridge	172:65be27845400	1116	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST));
AnnaBridge	172:65be27845400	1117	}
AnnaBridge	172:65be27845400	1118
AnnaBridge	172:65be27845400	1119	/**
AnnaBridge	172:65be27845400	1120	* @brief Set Address of the LPUART node.
AnnaBridge	172:65be27845400	1121	* @note This is used in multiprocessor communication during Mute mode or Stop mode,
AnnaBridge	172:65be27845400	1122	* for wake up with address mark detection.
AnnaBridge	172:65be27845400	1123	* @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7.
AnnaBridge	172:65be27845400	1124	* (b7-b4 should be set to 0)
AnnaBridge	172:65be27845400	1125	* 8bits address node is used when 7-bit Address Detection is selected in ADDM7.
AnnaBridge	172:65be27845400	1126	* (This is used in multiprocessor communication during Mute mode or Stop mode,
AnnaBridge	172:65be27845400	1127	* for wake up with 7-bit address mark detection.
AnnaBridge	172:65be27845400	1128	* The MSB of the character sent by the transmitter should be equal to 1.
AnnaBridge	172:65be27845400	1129	* It may also be used for character detection during normal reception,
AnnaBridge	172:65be27845400	1130	* Mute mode inactive (for example, end of block detection in ModBus protocol).
AnnaBridge	172:65be27845400	1131	* In this case, the whole received character (8-bit) is compared to the ADD[7:0]
AnnaBridge	172:65be27845400	1132	* value and CMF flag is set on match)
AnnaBridge	172:65be27845400	1133	* @rmtoll CR2 ADD LL_LPUART_ConfigNodeAddress\n
AnnaBridge	172:65be27845400	1134	* CR2 ADDM7 LL_LPUART_ConfigNodeAddress
AnnaBridge	172:65be27845400	1135	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1136	* @param AddressLen This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1137	* @arg @ref LL_LPUART_ADDRESS_DETECT_4B
AnnaBridge	172:65be27845400	1138	* @arg @ref LL_LPUART_ADDRESS_DETECT_7B
AnnaBridge	172:65be27845400	1139	* @param NodeAddress 4 or 7 bit Address of the LPUART node.
AnnaBridge	172:65be27845400	1140	* @retval None
AnnaBridge	172:65be27845400	1141	*/
AnnaBridge	172:65be27845400	1142	__STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress)
AnnaBridge	172:65be27845400	1143	{
AnnaBridge	172:65be27845400	1144	MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD \| USART_CR2_ADDM7,
AnnaBridge	172:65be27845400	1145	(uint32_t)(AddressLen \| (NodeAddress << USART_CR2_ADD_Pos)));
AnnaBridge	172:65be27845400	1146	}
AnnaBridge	172:65be27845400	1147
AnnaBridge	172:65be27845400	1148	/**
AnnaBridge	172:65be27845400	1149	* @brief Return 8 bit Address of the LPUART node as set in ADD field of CR2.
AnnaBridge	172:65be27845400	1150	* @note If 4-bit Address Detection is selected in ADDM7,
AnnaBridge	172:65be27845400	1151	* only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
AnnaBridge	172:65be27845400	1152	* If 7-bit Address Detection is selected in ADDM7,
AnnaBridge	172:65be27845400	1153	* only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
AnnaBridge	172:65be27845400	1154	* @rmtoll CR2 ADD LL_LPUART_GetNodeAddress
AnnaBridge	172:65be27845400	1155	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1156	* @retval Address of the LPUART node (Value between Min_Data=0 and Max_Data=255)
AnnaBridge	172:65be27845400	1157	*/
AnnaBridge	172:65be27845400	1158	__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1159	{
AnnaBridge	172:65be27845400	1160	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos);
AnnaBridge	172:65be27845400	1161	}
AnnaBridge	172:65be27845400	1162
AnnaBridge	172:65be27845400	1163	/**
AnnaBridge	172:65be27845400	1164	* @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
AnnaBridge	172:65be27845400	1165	* @rmtoll CR2 ADDM7 LL_LPUART_GetNodeAddressLen
AnnaBridge	172:65be27845400	1166	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1167	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1168	* @arg @ref LL_LPUART_ADDRESS_DETECT_4B
AnnaBridge	172:65be27845400	1169	* @arg @ref LL_LPUART_ADDRESS_DETECT_7B
AnnaBridge	172:65be27845400	1170	*/
AnnaBridge	172:65be27845400	1171	__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1172	{
AnnaBridge	172:65be27845400	1173	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7));
AnnaBridge	172:65be27845400	1174	}
AnnaBridge	172:65be27845400	1175
AnnaBridge	172:65be27845400	1176	/**
AnnaBridge	172:65be27845400	1177	* @brief Enable RTS HW Flow Control
AnnaBridge	172:65be27845400	1178	* @rmtoll CR3 RTSE LL_LPUART_EnableRTSHWFlowCtrl
AnnaBridge	172:65be27845400	1179	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1180	* @retval None
AnnaBridge	172:65be27845400	1181	*/
AnnaBridge	172:65be27845400	1182	__STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1183	{
AnnaBridge	172:65be27845400	1184	SET_BIT(LPUARTx->CR3, USART_CR3_RTSE);
AnnaBridge	172:65be27845400	1185	}
AnnaBridge	172:65be27845400	1186
AnnaBridge	172:65be27845400	1187	/**
AnnaBridge	172:65be27845400	1188	* @brief Disable RTS HW Flow Control
AnnaBridge	172:65be27845400	1189	* @rmtoll CR3 RTSE LL_LPUART_DisableRTSHWFlowCtrl
AnnaBridge	172:65be27845400	1190	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1191	* @retval None
AnnaBridge	172:65be27845400	1192	*/
AnnaBridge	172:65be27845400	1193	__STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1194	{
AnnaBridge	172:65be27845400	1195	CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE);
AnnaBridge	172:65be27845400	1196	}
AnnaBridge	172:65be27845400	1197
AnnaBridge	172:65be27845400	1198	/**
AnnaBridge	172:65be27845400	1199	* @brief Enable CTS HW Flow Control
AnnaBridge	172:65be27845400	1200	* @rmtoll CR3 CTSE LL_LPUART_EnableCTSHWFlowCtrl
AnnaBridge	172:65be27845400	1201	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1202	* @retval None
AnnaBridge	172:65be27845400	1203	*/
AnnaBridge	172:65be27845400	1204	__STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1205	{
AnnaBridge	172:65be27845400	1206	SET_BIT(LPUARTx->CR3, USART_CR3_CTSE);
AnnaBridge	172:65be27845400	1207	}
AnnaBridge	172:65be27845400	1208
AnnaBridge	172:65be27845400	1209	/**
AnnaBridge	172:65be27845400	1210	* @brief Disable CTS HW Flow Control
AnnaBridge	172:65be27845400	1211	* @rmtoll CR3 CTSE LL_LPUART_DisableCTSHWFlowCtrl
AnnaBridge	172:65be27845400	1212	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1213	* @retval None
AnnaBridge	172:65be27845400	1214	*/
AnnaBridge	172:65be27845400	1215	__STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1216	{
AnnaBridge	172:65be27845400	1217	CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE);
AnnaBridge	172:65be27845400	1218	}
AnnaBridge	172:65be27845400	1219
AnnaBridge	172:65be27845400	1220	/**
AnnaBridge	172:65be27845400	1221	* @brief Configure HW Flow Control mode (both CTS and RTS)
AnnaBridge	172:65be27845400	1222	* @rmtoll CR3 RTSE LL_LPUART_SetHWFlowCtrl\n
AnnaBridge	172:65be27845400	1223	* CR3 CTSE LL_LPUART_SetHWFlowCtrl
AnnaBridge	172:65be27845400	1224	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1225	* @param HardwareFlowControl This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1226	* @arg @ref LL_LPUART_HWCONTROL_NONE
AnnaBridge	172:65be27845400	1227	* @arg @ref LL_LPUART_HWCONTROL_RTS
AnnaBridge	172:65be27845400	1228	* @arg @ref LL_LPUART_HWCONTROL_CTS
AnnaBridge	172:65be27845400	1229	* @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
AnnaBridge	172:65be27845400	1230	* @retval None
AnnaBridge	172:65be27845400	1231	*/
AnnaBridge	172:65be27845400	1232	__STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl)
AnnaBridge	172:65be27845400	1233	{
AnnaBridge	172:65be27845400	1234	MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE \| USART_CR3_CTSE, HardwareFlowControl);
AnnaBridge	172:65be27845400	1235	}
AnnaBridge	172:65be27845400	1236
AnnaBridge	172:65be27845400	1237	/**
AnnaBridge	172:65be27845400	1238	* @brief Return HW Flow Control configuration (both CTS and RTS)
AnnaBridge	172:65be27845400	1239	* @rmtoll CR3 RTSE LL_LPUART_GetHWFlowCtrl\n
AnnaBridge	172:65be27845400	1240	* CR3 CTSE LL_LPUART_GetHWFlowCtrl
AnnaBridge	172:65be27845400	1241	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1242	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1243	* @arg @ref LL_LPUART_HWCONTROL_NONE
AnnaBridge	172:65be27845400	1244	* @arg @ref LL_LPUART_HWCONTROL_RTS
AnnaBridge	172:65be27845400	1245	* @arg @ref LL_LPUART_HWCONTROL_CTS
AnnaBridge	172:65be27845400	1246	* @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
AnnaBridge	172:65be27845400	1247	*/
AnnaBridge	172:65be27845400	1248	__STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1249	{
AnnaBridge	172:65be27845400	1250	return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE \| USART_CR3_CTSE));
AnnaBridge	172:65be27845400	1251	}
AnnaBridge	172:65be27845400	1252
AnnaBridge	172:65be27845400	1253	/**
AnnaBridge	172:65be27845400	1254	* @brief Enable Overrun detection
AnnaBridge	172:65be27845400	1255	* @rmtoll CR3 OVRDIS LL_LPUART_EnableOverrunDetect
AnnaBridge	172:65be27845400	1256	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1257	* @retval None
AnnaBridge	172:65be27845400	1258	*/
AnnaBridge	172:65be27845400	1259	__STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1260	{
AnnaBridge	172:65be27845400	1261	CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
AnnaBridge	172:65be27845400	1262	}
AnnaBridge	172:65be27845400	1263
AnnaBridge	172:65be27845400	1264	/**
AnnaBridge	172:65be27845400	1265	* @brief Disable Overrun detection
AnnaBridge	172:65be27845400	1266	* @rmtoll CR3 OVRDIS LL_LPUART_DisableOverrunDetect
AnnaBridge	172:65be27845400	1267	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1268	* @retval None
AnnaBridge	172:65be27845400	1269	*/
AnnaBridge	172:65be27845400	1270	__STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1271	{
AnnaBridge	172:65be27845400	1272	SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
AnnaBridge	172:65be27845400	1273	}
AnnaBridge	172:65be27845400	1274
AnnaBridge	172:65be27845400	1275	/**
AnnaBridge	172:65be27845400	1276	* @brief Indicate if Overrun detection is enabled
AnnaBridge	172:65be27845400	1277	* @rmtoll CR3 OVRDIS LL_LPUART_IsEnabledOverrunDetect
AnnaBridge	172:65be27845400	1278	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1279	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1280	*/
AnnaBridge	172:65be27845400	1281	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1282	{
AnnaBridge	172:65be27845400	1283	return ((READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1284	}
AnnaBridge	172:65be27845400	1285
AnnaBridge	172:65be27845400	1286	/**
AnnaBridge	172:65be27845400	1287	* @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
AnnaBridge	172:65be27845400	1288	* @rmtoll CR3 WUS LL_LPUART_SetWKUPType
AnnaBridge	172:65be27845400	1289	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1290	* @param Type This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1291	* @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
AnnaBridge	172:65be27845400	1292	* @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
AnnaBridge	172:65be27845400	1293	* @arg @ref LL_LPUART_WAKEUP_ON_RXNE
AnnaBridge	172:65be27845400	1294	* @retval None
AnnaBridge	172:65be27845400	1295	*/
AnnaBridge	172:65be27845400	1296	__STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type)
AnnaBridge	172:65be27845400	1297	{
AnnaBridge	172:65be27845400	1298	MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type);
AnnaBridge	172:65be27845400	1299	}
AnnaBridge	172:65be27845400	1300
AnnaBridge	172:65be27845400	1301	/**
AnnaBridge	172:65be27845400	1302	* @brief Return event type for Wake UP Interrupt Flag (WUS[1:0] bits)
AnnaBridge	172:65be27845400	1303	* @rmtoll CR3 WUS LL_LPUART_GetWKUPType
AnnaBridge	172:65be27845400	1304	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1305	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1306	* @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
AnnaBridge	172:65be27845400	1307	* @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
AnnaBridge	172:65be27845400	1308	* @arg @ref LL_LPUART_WAKEUP_ON_RXNE
AnnaBridge	172:65be27845400	1309	*/
AnnaBridge	172:65be27845400	1310	__STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1311	{
AnnaBridge	172:65be27845400	1312	return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS));
AnnaBridge	172:65be27845400	1313	}
AnnaBridge	172:65be27845400	1314
AnnaBridge	172:65be27845400	1315	/**
AnnaBridge	172:65be27845400	1316	* @brief Configure LPUART BRR register for achieving expected Baud Rate value.
AnnaBridge	172:65be27845400	1317	*
AnnaBridge	172:65be27845400	1318	* @note Compute and set LPUARTDIV value in BRR Register (full BRR content)
AnnaBridge	172:65be27845400	1319	* according to used Peripheral Clock and expected Baud Rate values
AnnaBridge	172:65be27845400	1320	* @note Peripheral clock and Baud Rate values provided as function parameters should be valid
AnnaBridge	172:65be27845400	1321	* (Baud rate value != 0).
AnnaBridge	172:65be27845400	1322	* @note Provided that LPUARTx_BRR must be > = 0x300 and LPUART_BRR is 20-bit,
AnnaBridge	172:65be27845400	1323	* a care should be taken when generating high baud rates using high PeriphClk
AnnaBridge	172:65be27845400	1324	* values. PeriphClk must be in the range [3 x BaudRate, 4096 x BaudRate].
AnnaBridge	172:65be27845400	1325	* @rmtoll BRR BRR LL_LPUART_SetBaudRate
AnnaBridge	172:65be27845400	1326	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1327	* @param PeriphClk Peripheral Clock
AnnaBridge	172:65be27845400	1328	* @param PrescalerValue This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1329	* @arg @ref LL_LPUART_PRESCALER_DIV1
AnnaBridge	172:65be27845400	1330	* @arg @ref LL_LPUART_PRESCALER_DIV2
AnnaBridge	172:65be27845400	1331	* @arg @ref LL_LPUART_PRESCALER_DIV4
AnnaBridge	172:65be27845400	1332	* @arg @ref LL_LPUART_PRESCALER_DIV6
AnnaBridge	172:65be27845400	1333	* @arg @ref LL_LPUART_PRESCALER_DIV8
AnnaBridge	172:65be27845400	1334	* @arg @ref LL_LPUART_PRESCALER_DIV10
AnnaBridge	172:65be27845400	1335	* @arg @ref LL_LPUART_PRESCALER_DIV12
AnnaBridge	172:65be27845400	1336	* @arg @ref LL_LPUART_PRESCALER_DIV16
AnnaBridge	172:65be27845400	1337	* @arg @ref LL_LPUART_PRESCALER_DIV32
AnnaBridge	172:65be27845400	1338	* @arg @ref LL_LPUART_PRESCALER_DIV64
AnnaBridge	172:65be27845400	1339	* @arg @ref LL_LPUART_PRESCALER_DIV128
AnnaBridge	172:65be27845400	1340	* @arg @ref LL_LPUART_PRESCALER_DIV256
AnnaBridge	172:65be27845400	1341	* @param BaudRate Baud Rate
AnnaBridge	172:65be27845400	1342	* @retval None
AnnaBridge	172:65be27845400	1343	*/
AnnaBridge	172:65be27845400	1344	__STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue, uint32_t BaudRate)
AnnaBridge	172:65be27845400	1345	{
AnnaBridge	172:65be27845400	1346	LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, PrescalerValue, BaudRate);
AnnaBridge	172:65be27845400	1347	}
AnnaBridge	172:65be27845400	1348
AnnaBridge	172:65be27845400	1349	/**
AnnaBridge	172:65be27845400	1350	* @brief Return current Baud Rate value, according to LPUARTDIV present in BRR register
AnnaBridge	172:65be27845400	1351	* (full BRR content), and to used Peripheral Clock values
AnnaBridge	172:65be27845400	1352	* @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
AnnaBridge	172:65be27845400	1353	* @rmtoll BRR BRR LL_LPUART_GetBaudRate
AnnaBridge	172:65be27845400	1354	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1355	* @param PeriphClk Peripheral Clock
AnnaBridge	172:65be27845400	1356	* @param PrescalerValue This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1357	* @arg @ref LL_LPUART_PRESCALER_DIV1
AnnaBridge	172:65be27845400	1358	* @arg @ref LL_LPUART_PRESCALER_DIV2
AnnaBridge	172:65be27845400	1359	* @arg @ref LL_LPUART_PRESCALER_DIV4
AnnaBridge	172:65be27845400	1360	* @arg @ref LL_LPUART_PRESCALER_DIV6
AnnaBridge	172:65be27845400	1361	* @arg @ref LL_LPUART_PRESCALER_DIV8
AnnaBridge	172:65be27845400	1362	* @arg @ref LL_LPUART_PRESCALER_DIV10
AnnaBridge	172:65be27845400	1363	* @arg @ref LL_LPUART_PRESCALER_DIV12
AnnaBridge	172:65be27845400	1364	* @arg @ref LL_LPUART_PRESCALER_DIV16
AnnaBridge	172:65be27845400	1365	* @arg @ref LL_LPUART_PRESCALER_DIV32
AnnaBridge	172:65be27845400	1366	* @arg @ref LL_LPUART_PRESCALER_DIV64
AnnaBridge	172:65be27845400	1367	* @arg @ref LL_LPUART_PRESCALER_DIV128
AnnaBridge	172:65be27845400	1368	* @arg @ref LL_LPUART_PRESCALER_DIV256
AnnaBridge	172:65be27845400	1369	* @retval Baud Rate
AnnaBridge	172:65be27845400	1370	*/
AnnaBridge	172:65be27845400	1371	__STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue)
AnnaBridge	172:65be27845400	1372	{
AnnaBridge	172:65be27845400	1373	register uint32_t lpuartdiv;
AnnaBridge	172:65be27845400	1374	register uint32_t brrresult;
AnnaBridge	172:65be27845400	1375	register uint32_t periphclkpresc = (uint32_t)(PeriphClk / (LPUART_PRESCALER_TAB[(uint16_t)PrescalerValue]));
AnnaBridge	172:65be27845400	1376
AnnaBridge	172:65be27845400	1377	lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK;
AnnaBridge	172:65be27845400	1378
AnnaBridge	172:65be27845400	1379	if (lpuartdiv >= LPUART_BRR_MIN_VALUE)
AnnaBridge	172:65be27845400	1380	{
AnnaBridge	172:65be27845400	1381	brrresult = (uint32_t)(((uint64_t)(periphclkpresc) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv);
AnnaBridge	172:65be27845400	1382	}
AnnaBridge	172:65be27845400	1383
AnnaBridge	172:65be27845400	1384	return (brrresult);
AnnaBridge	172:65be27845400	1385	}
AnnaBridge	172:65be27845400	1386
AnnaBridge	172:65be27845400	1387	/**
AnnaBridge	172:65be27845400	1388	* @}
AnnaBridge	172:65be27845400	1389	*/
AnnaBridge	172:65be27845400	1390
AnnaBridge	172:65be27845400	1391	/** @defgroup LPUART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
AnnaBridge	172:65be27845400	1392	* @{
AnnaBridge	172:65be27845400	1393	*/
AnnaBridge	172:65be27845400	1394
AnnaBridge	172:65be27845400	1395	/**
AnnaBridge	172:65be27845400	1396	* @brief Enable Single Wire Half-Duplex mode
AnnaBridge	172:65be27845400	1397	* @rmtoll CR3 HDSEL LL_LPUART_EnableHalfDuplex
AnnaBridge	172:65be27845400	1398	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1399	* @retval None
AnnaBridge	172:65be27845400	1400	*/
AnnaBridge	172:65be27845400	1401	__STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1402	{
AnnaBridge	172:65be27845400	1403	SET_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
AnnaBridge	172:65be27845400	1404	}
AnnaBridge	172:65be27845400	1405
AnnaBridge	172:65be27845400	1406	/**
AnnaBridge	172:65be27845400	1407	* @brief Disable Single Wire Half-Duplex mode
AnnaBridge	172:65be27845400	1408	* @rmtoll CR3 HDSEL LL_LPUART_DisableHalfDuplex
AnnaBridge	172:65be27845400	1409	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1410	* @retval None
AnnaBridge	172:65be27845400	1411	*/
AnnaBridge	172:65be27845400	1412	__STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1413	{
AnnaBridge	172:65be27845400	1414	CLEAR_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
AnnaBridge	172:65be27845400	1415	}
AnnaBridge	172:65be27845400	1416
AnnaBridge	172:65be27845400	1417	/**
AnnaBridge	172:65be27845400	1418	* @brief Indicate if Single Wire Half-Duplex mode is enabled
AnnaBridge	172:65be27845400	1419	* @rmtoll CR3 HDSEL LL_LPUART_IsEnabledHalfDuplex
AnnaBridge	172:65be27845400	1420	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1421	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1422	*/
AnnaBridge	172:65be27845400	1423	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1424	{
AnnaBridge	172:65be27845400	1425	return ((READ_BIT(LPUARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1426	}
AnnaBridge	172:65be27845400	1427
AnnaBridge	172:65be27845400	1428	/**
AnnaBridge	172:65be27845400	1429	* @}
AnnaBridge	172:65be27845400	1430	*/
AnnaBridge	172:65be27845400	1431
AnnaBridge	172:65be27845400	1432	/** @defgroup LPUART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature
AnnaBridge	172:65be27845400	1433	* @{
AnnaBridge	172:65be27845400	1434	*/
AnnaBridge	172:65be27845400	1435
AnnaBridge	172:65be27845400	1436	/**
AnnaBridge	172:65be27845400	1437	* @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits).
AnnaBridge	172:65be27845400	1438	* @rmtoll CR1 DEDT LL_LPUART_SetDEDeassertionTime
AnnaBridge	172:65be27845400	1439	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1440	* @param Time Value between Min_Data=0 and Max_Data=31
AnnaBridge	172:65be27845400	1441	* @retval None
AnnaBridge	172:65be27845400	1442	*/
AnnaBridge	172:65be27845400	1443	__STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
AnnaBridge	172:65be27845400	1444	{
AnnaBridge	172:65be27845400	1445	MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
AnnaBridge	172:65be27845400	1446	}
AnnaBridge	172:65be27845400	1447
AnnaBridge	172:65be27845400	1448	/**
AnnaBridge	172:65be27845400	1449	* @brief Return DEDT (Driver Enable De-Assertion Time)
AnnaBridge	172:65be27845400	1450	* @rmtoll CR1 DEDT LL_LPUART_GetDEDeassertionTime
AnnaBridge	172:65be27845400	1451	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1452	* @retval Time value expressed on 5 bits ([4:0] bits) : c
AnnaBridge	172:65be27845400	1453	*/
AnnaBridge	172:65be27845400	1454	__STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1455	{
AnnaBridge	172:65be27845400	1456	return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos);
AnnaBridge	172:65be27845400	1457	}
AnnaBridge	172:65be27845400	1458
AnnaBridge	172:65be27845400	1459	/**
AnnaBridge	172:65be27845400	1460	* @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits).
AnnaBridge	172:65be27845400	1461	* @rmtoll CR1 DEAT LL_LPUART_SetDEAssertionTime
AnnaBridge	172:65be27845400	1462	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1463	* @param Time Value between Min_Data=0 and Max_Data=31
AnnaBridge	172:65be27845400	1464	* @retval None
AnnaBridge	172:65be27845400	1465	*/
AnnaBridge	172:65be27845400	1466	__STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
AnnaBridge	172:65be27845400	1467	{
AnnaBridge	172:65be27845400	1468	MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
AnnaBridge	172:65be27845400	1469	}
AnnaBridge	172:65be27845400	1470
AnnaBridge	172:65be27845400	1471	/**
AnnaBridge	172:65be27845400	1472	* @brief Return DEAT (Driver Enable Assertion Time)
AnnaBridge	172:65be27845400	1473	* @rmtoll CR1 DEAT LL_LPUART_GetDEAssertionTime
AnnaBridge	172:65be27845400	1474	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1475	* @retval Time value expressed on 5 bits ([4:0] bits) : Time Value between Min_Data=0 and Max_Data=31
AnnaBridge	172:65be27845400	1476	*/
AnnaBridge	172:65be27845400	1477	__STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1478	{
AnnaBridge	172:65be27845400	1479	return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos);
AnnaBridge	172:65be27845400	1480	}
AnnaBridge	172:65be27845400	1481
AnnaBridge	172:65be27845400	1482	/**
AnnaBridge	172:65be27845400	1483	* @brief Enable Driver Enable (DE) Mode
AnnaBridge	172:65be27845400	1484	* @rmtoll CR3 DEM LL_LPUART_EnableDEMode
AnnaBridge	172:65be27845400	1485	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1486	* @retval None
AnnaBridge	172:65be27845400	1487	*/
AnnaBridge	172:65be27845400	1488	__STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1489	{
AnnaBridge	172:65be27845400	1490	SET_BIT(LPUARTx->CR3, USART_CR3_DEM);
AnnaBridge	172:65be27845400	1491	}
AnnaBridge	172:65be27845400	1492
AnnaBridge	172:65be27845400	1493	/**
AnnaBridge	172:65be27845400	1494	* @brief Disable Driver Enable (DE) Mode
AnnaBridge	172:65be27845400	1495	* @rmtoll CR3 DEM LL_LPUART_DisableDEMode
AnnaBridge	172:65be27845400	1496	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1497	* @retval None
AnnaBridge	172:65be27845400	1498	*/
AnnaBridge	172:65be27845400	1499	__STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1500	{
AnnaBridge	172:65be27845400	1501	CLEAR_BIT(LPUARTx->CR3, USART_CR3_DEM);
AnnaBridge	172:65be27845400	1502	}
AnnaBridge	172:65be27845400	1503
AnnaBridge	172:65be27845400	1504	/**
AnnaBridge	172:65be27845400	1505	* @brief Indicate if Driver Enable (DE) Mode is enabled
AnnaBridge	172:65be27845400	1506	* @rmtoll CR3 DEM LL_LPUART_IsEnabledDEMode
AnnaBridge	172:65be27845400	1507	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1508	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1509	*/
AnnaBridge	172:65be27845400	1510	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1511	{
AnnaBridge	172:65be27845400	1512	return ((READ_BIT(LPUARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1513	}
AnnaBridge	172:65be27845400	1514
AnnaBridge	172:65be27845400	1515	/**
AnnaBridge	172:65be27845400	1516	* @brief Select Driver Enable Polarity
AnnaBridge	172:65be27845400	1517	* @rmtoll CR3 DEP LL_LPUART_SetDESignalPolarity
AnnaBridge	172:65be27845400	1518	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1519	* @param Polarity This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1520	* @arg @ref LL_LPUART_DE_POLARITY_HIGH
AnnaBridge	172:65be27845400	1521	* @arg @ref LL_LPUART_DE_POLARITY_LOW
AnnaBridge	172:65be27845400	1522	* @retval None
AnnaBridge	172:65be27845400	1523	*/
AnnaBridge	172:65be27845400	1524	__STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
AnnaBridge	172:65be27845400	1525	{
AnnaBridge	172:65be27845400	1526	MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity);
AnnaBridge	172:65be27845400	1527	}
AnnaBridge	172:65be27845400	1528
AnnaBridge	172:65be27845400	1529	/**
AnnaBridge	172:65be27845400	1530	* @brief Return Driver Enable Polarity
AnnaBridge	172:65be27845400	1531	* @rmtoll CR3 DEP LL_LPUART_GetDESignalPolarity
AnnaBridge	172:65be27845400	1532	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1533	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1534	* @arg @ref LL_LPUART_DE_POLARITY_HIGH
AnnaBridge	172:65be27845400	1535	* @arg @ref LL_LPUART_DE_POLARITY_LOW
AnnaBridge	172:65be27845400	1536	*/
AnnaBridge	172:65be27845400	1537	__STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1538	{
AnnaBridge	172:65be27845400	1539	return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_DEP));
AnnaBridge	172:65be27845400	1540	}
AnnaBridge	172:65be27845400	1541
AnnaBridge	172:65be27845400	1542	/**
AnnaBridge	172:65be27845400	1543	* @}
AnnaBridge	172:65be27845400	1544	*/
AnnaBridge	172:65be27845400	1545
AnnaBridge	172:65be27845400	1546	/** @defgroup LPUART_LL_EF_FLAG_Management FLAG_Management
AnnaBridge	172:65be27845400	1547	* @{
AnnaBridge	172:65be27845400	1548	*/
AnnaBridge	172:65be27845400	1549
AnnaBridge	172:65be27845400	1550	/**
AnnaBridge	172:65be27845400	1551	* @brief Check if the LPUART Parity Error Flag is set or not
AnnaBridge	172:65be27845400	1552	* @rmtoll ISR PE LL_LPUART_IsActiveFlag_PE
AnnaBridge	172:65be27845400	1553	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1554	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1555	*/
AnnaBridge	172:65be27845400	1556	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1557	{
AnnaBridge	172:65be27845400	1558	return ((READ_BIT(LPUARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1559	}
AnnaBridge	172:65be27845400	1560
AnnaBridge	172:65be27845400	1561	/**
AnnaBridge	172:65be27845400	1562	* @brief Check if the LPUART Framing Error Flag is set or not
AnnaBridge	172:65be27845400	1563	* @rmtoll ISR FE LL_LPUART_IsActiveFlag_FE
AnnaBridge	172:65be27845400	1564	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1565	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1566	*/
AnnaBridge	172:65be27845400	1567	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1568	{
AnnaBridge	172:65be27845400	1569	return ((READ_BIT(LPUARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1570	}
AnnaBridge	172:65be27845400	1571
AnnaBridge	172:65be27845400	1572	/**
AnnaBridge	172:65be27845400	1573	* @brief Check if the LPUART Noise error detected Flag is set or not
AnnaBridge	172:65be27845400	1574	* @rmtoll ISR NE LL_LPUART_IsActiveFlag_NE
AnnaBridge	172:65be27845400	1575	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1576	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1577	*/
AnnaBridge	172:65be27845400	1578	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1579	{
AnnaBridge	172:65be27845400	1580	return ((READ_BIT(LPUARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1581	}
AnnaBridge	172:65be27845400	1582
AnnaBridge	172:65be27845400	1583	/**
AnnaBridge	172:65be27845400	1584	* @brief Check if the LPUART OverRun Error Flag is set or not
AnnaBridge	172:65be27845400	1585	* @rmtoll ISR ORE LL_LPUART_IsActiveFlag_ORE
AnnaBridge	172:65be27845400	1586	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1587	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1588	*/
AnnaBridge	172:65be27845400	1589	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1590	{
AnnaBridge	172:65be27845400	1591	return ((READ_BIT(LPUARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1592	}
AnnaBridge	172:65be27845400	1593
AnnaBridge	172:65be27845400	1594	/**
AnnaBridge	172:65be27845400	1595	* @brief Check if the LPUART IDLE line detected Flag is set or not
AnnaBridge	172:65be27845400	1596	* @rmtoll ISR IDLE LL_LPUART_IsActiveFlag_IDLE
AnnaBridge	172:65be27845400	1597	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1598	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1599	*/
AnnaBridge	172:65be27845400	1600	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1601	{
AnnaBridge	172:65be27845400	1602	return ((READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1603	}
AnnaBridge	172:65be27845400	1604
AnnaBridge	172:65be27845400	1605	/* Legacy define */
AnnaBridge	172:65be27845400	1606	#define LL_LPUART_IsActiveFlag_RXNE LL_LPUART_IsActiveFlag_RXNE_RXFNE
AnnaBridge	172:65be27845400	1607
AnnaBridge	172:65be27845400	1608	/**
AnnaBridge	172:65be27845400	1609	* @brief Check if the LPUART Read Data Register or LPUART RX FIFO Not Empty Flag is set or not
AnnaBridge	172:65be27845400	1610	* @rmtoll ISR RXNE_RXFNE LL_LPUART_IsActiveFlag_RXNE_RXFNE
AnnaBridge	172:65be27845400	1611	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1612	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1613	*/
AnnaBridge	172:65be27845400	1614	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE_RXFNE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1615	{
AnnaBridge	172:65be27845400	1616	return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXNE_RXFNE) == (USART_ISR_RXNE_RXFNE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1617	}
AnnaBridge	172:65be27845400	1618
AnnaBridge	172:65be27845400	1619	/**
AnnaBridge	172:65be27845400	1620	* @brief Check if the LPUART Transmission Complete Flag is set or not
AnnaBridge	172:65be27845400	1621	* @rmtoll ISR TC LL_LPUART_IsActiveFlag_TC
AnnaBridge	172:65be27845400	1622	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1623	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1624	*/
AnnaBridge	172:65be27845400	1625	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1626	{
AnnaBridge	172:65be27845400	1627	return ((READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1628	}
AnnaBridge	172:65be27845400	1629
AnnaBridge	172:65be27845400	1630	/* Legacy define */
AnnaBridge	172:65be27845400	1631	#define LL_LPUART_IsActiveFlag_TXE LL_LPUART_IsActiveFlag_TXE_TXFNF
AnnaBridge	172:65be27845400	1632
AnnaBridge	172:65be27845400	1633	/**
AnnaBridge	172:65be27845400	1634	* @brief Check if the LPUART Transmit Data Register Empty or LPUART TX FIFO Not Full Flag is set or not
AnnaBridge	172:65be27845400	1635	* @rmtoll ISR TXE_TXFNF LL_LPUART_IsActiveFlag_TXE_TXFNF
AnnaBridge	172:65be27845400	1636	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1637	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1638	*/
AnnaBridge	172:65be27845400	1639	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE_TXFNF(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1640	{
AnnaBridge	172:65be27845400	1641	return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXE_TXFNF) == (USART_ISR_TXE_TXFNF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1642	}
AnnaBridge	172:65be27845400	1643
AnnaBridge	172:65be27845400	1644	/**
AnnaBridge	172:65be27845400	1645	* @brief Check if the LPUART CTS interrupt Flag is set or not
AnnaBridge	172:65be27845400	1646	* @rmtoll ISR CTSIF LL_LPUART_IsActiveFlag_nCTS
AnnaBridge	172:65be27845400	1647	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1648	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1649	*/
AnnaBridge	172:65be27845400	1650	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1651	{
AnnaBridge	172:65be27845400	1652	return ((READ_BIT(LPUARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1653	}
AnnaBridge	172:65be27845400	1654
AnnaBridge	172:65be27845400	1655	/**
AnnaBridge	172:65be27845400	1656	* @brief Check if the LPUART CTS Flag is set or not
AnnaBridge	172:65be27845400	1657	* @rmtoll ISR CTS LL_LPUART_IsActiveFlag_CTS
AnnaBridge	172:65be27845400	1658	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1659	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1660	*/
AnnaBridge	172:65be27845400	1661	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1662	{
AnnaBridge	172:65be27845400	1663	return ((READ_BIT(LPUARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1664	}
AnnaBridge	172:65be27845400	1665
AnnaBridge	172:65be27845400	1666	/**
AnnaBridge	172:65be27845400	1667	* @brief Check if the LPUART Busy Flag is set or not
AnnaBridge	172:65be27845400	1668	* @rmtoll ISR BUSY LL_LPUART_IsActiveFlag_BUSY
AnnaBridge	172:65be27845400	1669	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1670	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1671	*/
AnnaBridge	172:65be27845400	1672	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1673	{
AnnaBridge	172:65be27845400	1674	return ((READ_BIT(LPUARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1675	}
AnnaBridge	172:65be27845400	1676
AnnaBridge	172:65be27845400	1677	/**
AnnaBridge	172:65be27845400	1678	* @brief Check if the LPUART Character Match Flag is set or not
AnnaBridge	172:65be27845400	1679	* @rmtoll ISR CMF LL_LPUART_IsActiveFlag_CM
AnnaBridge	172:65be27845400	1680	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1681	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1682	*/
AnnaBridge	172:65be27845400	1683	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1684	{
AnnaBridge	172:65be27845400	1685	return ((READ_BIT(LPUARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1686	}
AnnaBridge	172:65be27845400	1687
AnnaBridge	172:65be27845400	1688	/**
AnnaBridge	172:65be27845400	1689	* @brief Check if the LPUART Send Break Flag is set or not
AnnaBridge	172:65be27845400	1690	* @rmtoll ISR SBKF LL_LPUART_IsActiveFlag_SBK
AnnaBridge	172:65be27845400	1691	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1692	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1693	*/
AnnaBridge	172:65be27845400	1694	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1695	{
AnnaBridge	172:65be27845400	1696	return ((READ_BIT(LPUARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1697	}
AnnaBridge	172:65be27845400	1698
AnnaBridge	172:65be27845400	1699	/**
AnnaBridge	172:65be27845400	1700	* @brief Check if the LPUART Receive Wake Up from mute mode Flag is set or not
AnnaBridge	172:65be27845400	1701	* @rmtoll ISR RWU LL_LPUART_IsActiveFlag_RWU
AnnaBridge	172:65be27845400	1702	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1703	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1704	*/
AnnaBridge	172:65be27845400	1705	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1706	{
AnnaBridge	172:65be27845400	1707	return ((READ_BIT(LPUARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1708	}
AnnaBridge	172:65be27845400	1709
AnnaBridge	172:65be27845400	1710	/**
AnnaBridge	172:65be27845400	1711	* @brief Check if the LPUART Wake Up from stop mode Flag is set or not
AnnaBridge	172:65be27845400	1712	* @rmtoll ISR WUF LL_LPUART_IsActiveFlag_WKUP
AnnaBridge	172:65be27845400	1713	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1714	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1715	*/
AnnaBridge	172:65be27845400	1716	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1717	{
AnnaBridge	172:65be27845400	1718	return ((READ_BIT(LPUARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1719	}
AnnaBridge	172:65be27845400	1720
AnnaBridge	172:65be27845400	1721	/**
AnnaBridge	172:65be27845400	1722	* @brief Check if the LPUART Transmit Enable Acknowledge Flag is set or not
AnnaBridge	172:65be27845400	1723	* @rmtoll ISR TEACK LL_LPUART_IsActiveFlag_TEACK
AnnaBridge	172:65be27845400	1724	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1725	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1726	*/
AnnaBridge	172:65be27845400	1727	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1728	{
AnnaBridge	172:65be27845400	1729	return ((READ_BIT(LPUARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1730	}
AnnaBridge	172:65be27845400	1731
AnnaBridge	172:65be27845400	1732	/**
AnnaBridge	172:65be27845400	1733	* @brief Check if the LPUART Receive Enable Acknowledge Flag is set or not
AnnaBridge	172:65be27845400	1734	* @rmtoll ISR REACK LL_LPUART_IsActiveFlag_REACK
AnnaBridge	172:65be27845400	1735	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1736	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1737	*/
AnnaBridge	172:65be27845400	1738	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1739	{
AnnaBridge	172:65be27845400	1740	return ((READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1741	}
AnnaBridge	172:65be27845400	1742
AnnaBridge	172:65be27845400	1743	/**
AnnaBridge	172:65be27845400	1744	* @brief Check if the LPUART TX FIFO Empty Flag is set or not
AnnaBridge	172:65be27845400	1745	* @rmtoll ISR TXFE LL_LPUART_IsActiveFlag_TXFE
AnnaBridge	172:65be27845400	1746	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1747	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1748	*/
AnnaBridge	172:65be27845400	1749	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1750	{
AnnaBridge	172:65be27845400	1751	return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXFE) == (USART_ISR_TXFE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1752	}
AnnaBridge	172:65be27845400	1753
AnnaBridge	172:65be27845400	1754	/**
AnnaBridge	172:65be27845400	1755	* @brief Check if the LPUART RX FIFO Full Flag is set or not
AnnaBridge	172:65be27845400	1756	* @rmtoll ISR RXFF LL_LPUART_IsActiveFlag_RXFF
AnnaBridge	172:65be27845400	1757	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1758	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1759	*/
AnnaBridge	172:65be27845400	1760	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFF(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1761	{
AnnaBridge	172:65be27845400	1762	return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXFF) == (USART_ISR_RXFF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1763	}
AnnaBridge	172:65be27845400	1764
AnnaBridge	172:65be27845400	1765	/**
AnnaBridge	172:65be27845400	1766	* @brief Check if the LPUART TX FIFO Threshold Flag is set or not
AnnaBridge	172:65be27845400	1767	* @rmtoll ISR TXFT LL_LPUART_IsActiveFlag_TXFT
AnnaBridge	172:65be27845400	1768	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1769	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1770	*/
AnnaBridge	172:65be27845400	1771	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFT(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1772	{
AnnaBridge	172:65be27845400	1773	return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXFT) == (USART_ISR_TXFT)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1774	}
AnnaBridge	172:65be27845400	1775
AnnaBridge	172:65be27845400	1776	/**
AnnaBridge	172:65be27845400	1777	* @brief Check if the LPUART RX FIFO Threshold Flag is set or not
AnnaBridge	172:65be27845400	1778	* @rmtoll ISR RXFT LL_LPUART_IsActiveFlag_RXFT
AnnaBridge	172:65be27845400	1779	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1780	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1781	*/
AnnaBridge	172:65be27845400	1782	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFT(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1783	{
AnnaBridge	172:65be27845400	1784	return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXFT) == (USART_ISR_RXFT)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1785	}
AnnaBridge	172:65be27845400	1786
AnnaBridge	172:65be27845400	1787	/**
AnnaBridge	172:65be27845400	1788	* @brief Clear Parity Error Flag
AnnaBridge	172:65be27845400	1789	* @rmtoll ICR PECF LL_LPUART_ClearFlag_PE
AnnaBridge	172:65be27845400	1790	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1791	* @retval None
AnnaBridge	172:65be27845400	1792	*/
AnnaBridge	172:65be27845400	1793	__STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1794	{
AnnaBridge	172:65be27845400	1795	WRITE_REG(LPUARTx->ICR, USART_ICR_PECF);
AnnaBridge	172:65be27845400	1796	}
AnnaBridge	172:65be27845400	1797
AnnaBridge	172:65be27845400	1798	/**
AnnaBridge	172:65be27845400	1799	* @brief Clear Framing Error Flag
AnnaBridge	172:65be27845400	1800	* @rmtoll ICR FECF LL_LPUART_ClearFlag_FE
AnnaBridge	172:65be27845400	1801	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1802	* @retval None
AnnaBridge	172:65be27845400	1803	*/
AnnaBridge	172:65be27845400	1804	__STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1805	{
AnnaBridge	172:65be27845400	1806	WRITE_REG(LPUARTx->ICR, USART_ICR_FECF);
AnnaBridge	172:65be27845400	1807	}
AnnaBridge	172:65be27845400	1808
AnnaBridge	172:65be27845400	1809	/**
AnnaBridge	172:65be27845400	1810	* @brief Clear Noise detected Flag
AnnaBridge	172:65be27845400	1811	* @rmtoll ICR NECF LL_LPUART_ClearFlag_NE
AnnaBridge	172:65be27845400	1812	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1813	* @retval None
AnnaBridge	172:65be27845400	1814	*/
AnnaBridge	172:65be27845400	1815	__STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1816	{
AnnaBridge	172:65be27845400	1817	WRITE_REG(LPUARTx->ICR, USART_ICR_NECF);
AnnaBridge	172:65be27845400	1818	}
AnnaBridge	172:65be27845400	1819
AnnaBridge	172:65be27845400	1820	/**
AnnaBridge	172:65be27845400	1821	* @brief Clear OverRun Error Flag
AnnaBridge	172:65be27845400	1822	* @rmtoll ICR ORECF LL_LPUART_ClearFlag_ORE
AnnaBridge	172:65be27845400	1823	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1824	* @retval None
AnnaBridge	172:65be27845400	1825	*/
AnnaBridge	172:65be27845400	1826	__STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1827	{
AnnaBridge	172:65be27845400	1828	WRITE_REG(LPUARTx->ICR, USART_ICR_ORECF);
AnnaBridge	172:65be27845400	1829	}
AnnaBridge	172:65be27845400	1830
AnnaBridge	172:65be27845400	1831	/**
AnnaBridge	172:65be27845400	1832	* @brief Clear IDLE line detected Flag
AnnaBridge	172:65be27845400	1833	* @rmtoll ICR IDLECF LL_LPUART_ClearFlag_IDLE
AnnaBridge	172:65be27845400	1834	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1835	* @retval None
AnnaBridge	172:65be27845400	1836	*/
AnnaBridge	172:65be27845400	1837	__STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1838	{
AnnaBridge	172:65be27845400	1839	WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF);
AnnaBridge	172:65be27845400	1840	}
AnnaBridge	172:65be27845400	1841
AnnaBridge	172:65be27845400	1842	/**
AnnaBridge	172:65be27845400	1843	* @brief Clear TX FIFO Empty Flag
AnnaBridge	172:65be27845400	1844	* @rmtoll ICR TXFECF LL_LPUART_ClearFlag_TXFE
AnnaBridge	172:65be27845400	1845	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1846	* @retval None
AnnaBridge	172:65be27845400	1847	*/
AnnaBridge	172:65be27845400	1848	__STATIC_INLINE void LL_LPUART_ClearFlag_TXFE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1849	{
AnnaBridge	172:65be27845400	1850	WRITE_REG(LPUARTx->ICR, USART_ICR_TXFECF);
AnnaBridge	172:65be27845400	1851	}
AnnaBridge	172:65be27845400	1852
AnnaBridge	172:65be27845400	1853	/**
AnnaBridge	172:65be27845400	1854	* @brief Clear Transmission Complete Flag
AnnaBridge	172:65be27845400	1855	* @rmtoll ICR TCCF LL_LPUART_ClearFlag_TC
AnnaBridge	172:65be27845400	1856	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1857	* @retval None
AnnaBridge	172:65be27845400	1858	*/
AnnaBridge	172:65be27845400	1859	__STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1860	{
AnnaBridge	172:65be27845400	1861	WRITE_REG(LPUARTx->ICR, USART_ICR_TCCF);
AnnaBridge	172:65be27845400	1862	}
AnnaBridge	172:65be27845400	1863
AnnaBridge	172:65be27845400	1864	/**
AnnaBridge	172:65be27845400	1865	* @brief Clear CTS Interrupt Flag
AnnaBridge	172:65be27845400	1866	* @rmtoll ICR CTSCF LL_LPUART_ClearFlag_nCTS
AnnaBridge	172:65be27845400	1867	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1868	* @retval None
AnnaBridge	172:65be27845400	1869	*/
AnnaBridge	172:65be27845400	1870	__STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1871	{
AnnaBridge	172:65be27845400	1872	WRITE_REG(LPUARTx->ICR, USART_ICR_CTSCF);
AnnaBridge	172:65be27845400	1873	}
AnnaBridge	172:65be27845400	1874
AnnaBridge	172:65be27845400	1875	/**
AnnaBridge	172:65be27845400	1876	* @brief Clear Character Match Flag
AnnaBridge	172:65be27845400	1877	* @rmtoll ICR CMCF LL_LPUART_ClearFlag_CM
AnnaBridge	172:65be27845400	1878	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1879	* @retval None
AnnaBridge	172:65be27845400	1880	*/
AnnaBridge	172:65be27845400	1881	__STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1882	{
AnnaBridge	172:65be27845400	1883	WRITE_REG(LPUARTx->ICR, USART_ICR_CMCF);
AnnaBridge	172:65be27845400	1884	}
AnnaBridge	172:65be27845400	1885
AnnaBridge	172:65be27845400	1886	/**
AnnaBridge	172:65be27845400	1887	* @brief Clear Wake Up from stop mode Flag
AnnaBridge	172:65be27845400	1888	* @rmtoll ICR WUCF LL_LPUART_ClearFlag_WKUP
AnnaBridge	172:65be27845400	1889	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1890	* @retval None
AnnaBridge	172:65be27845400	1891	*/
AnnaBridge	172:65be27845400	1892	__STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1893	{
AnnaBridge	172:65be27845400	1894	WRITE_REG(LPUARTx->ICR, USART_ICR_WUCF);
AnnaBridge	172:65be27845400	1895	}
AnnaBridge	172:65be27845400	1896
AnnaBridge	172:65be27845400	1897	/**
AnnaBridge	172:65be27845400	1898	* @}
AnnaBridge	172:65be27845400	1899	*/
AnnaBridge	172:65be27845400	1900
AnnaBridge	172:65be27845400	1901	/** @defgroup LPUART_LL_EF_IT_Management IT_Management
AnnaBridge	172:65be27845400	1902	* @{
AnnaBridge	172:65be27845400	1903	*/
AnnaBridge	172:65be27845400	1904
AnnaBridge	172:65be27845400	1905	/**
AnnaBridge	172:65be27845400	1906	* @brief Enable IDLE Interrupt
AnnaBridge	172:65be27845400	1907	* @rmtoll CR1 IDLEIE LL_LPUART_EnableIT_IDLE
AnnaBridge	172:65be27845400	1908	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1909	* @retval None
AnnaBridge	172:65be27845400	1910	*/
AnnaBridge	172:65be27845400	1911	__STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1912	{
AnnaBridge	172:65be27845400	1913	SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
AnnaBridge	172:65be27845400	1914	}
AnnaBridge	172:65be27845400	1915
AnnaBridge	172:65be27845400	1916	/* Legacy define */
AnnaBridge	172:65be27845400	1917	#define LL_LPUART_EnableIT_RXNE LL_LPUART_EnableIT_RXNE_RXFNE
AnnaBridge	172:65be27845400	1918
AnnaBridge	172:65be27845400	1919	/**
AnnaBridge	172:65be27845400	1920	* @brief Enable RX Not Empty and RX FIFO Not Empty Interrupt
AnnaBridge	172:65be27845400	1921	* @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_EnableIT_RXNE_RXFNE
AnnaBridge	172:65be27845400	1922	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1923	* @retval None
AnnaBridge	172:65be27845400	1924	*/
AnnaBridge	172:65be27845400	1925	__STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1926	{
AnnaBridge	172:65be27845400	1927	SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
AnnaBridge	172:65be27845400	1928	}
AnnaBridge	172:65be27845400	1929
AnnaBridge	172:65be27845400	1930	/**
AnnaBridge	172:65be27845400	1931	* @brief Enable Transmission Complete Interrupt
AnnaBridge	172:65be27845400	1932	* @rmtoll CR1 TCIE LL_LPUART_EnableIT_TC
AnnaBridge	172:65be27845400	1933	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1934	* @retval None
AnnaBridge	172:65be27845400	1935	*/
AnnaBridge	172:65be27845400	1936	__STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1937	{
AnnaBridge	172:65be27845400	1938	SET_BIT(LPUARTx->CR1, USART_CR1_TCIE);
AnnaBridge	172:65be27845400	1939	}
AnnaBridge	172:65be27845400	1940
AnnaBridge	172:65be27845400	1941	/* Legacy define */
AnnaBridge	172:65be27845400	1942	#define LL_LPUART_EnableIT_TXE LL_LPUART_EnableIT_TXE_TXFNF
AnnaBridge	172:65be27845400	1943
AnnaBridge	172:65be27845400	1944	/**
AnnaBridge	172:65be27845400	1945	* @brief Enable TX Empty and TX FIFO Not Full Interrupt
AnnaBridge	172:65be27845400	1946	* @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_EnableIT_TXE_TXFNF
AnnaBridge	172:65be27845400	1947	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1948	* @retval None
AnnaBridge	172:65be27845400	1949	*/
AnnaBridge	172:65be27845400	1950	__STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1951	{
AnnaBridge	172:65be27845400	1952	SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
AnnaBridge	172:65be27845400	1953	}
AnnaBridge	172:65be27845400	1954
AnnaBridge	172:65be27845400	1955	/**
AnnaBridge	172:65be27845400	1956	* @brief Enable Parity Error Interrupt
AnnaBridge	172:65be27845400	1957	* @rmtoll CR1 PEIE LL_LPUART_EnableIT_PE
AnnaBridge	172:65be27845400	1958	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1959	* @retval None
AnnaBridge	172:65be27845400	1960	*/
AnnaBridge	172:65be27845400	1961	__STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1962	{
AnnaBridge	172:65be27845400	1963	SET_BIT(LPUARTx->CR1, USART_CR1_PEIE);
AnnaBridge	172:65be27845400	1964	}
AnnaBridge	172:65be27845400	1965
AnnaBridge	172:65be27845400	1966	/**
AnnaBridge	172:65be27845400	1967	* @brief Enable Character Match Interrupt
AnnaBridge	172:65be27845400	1968	* @rmtoll CR1 CMIE LL_LPUART_EnableIT_CM
AnnaBridge	172:65be27845400	1969	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1970	* @retval None
AnnaBridge	172:65be27845400	1971	*/
AnnaBridge	172:65be27845400	1972	__STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1973	{
AnnaBridge	172:65be27845400	1974	SET_BIT(LPUARTx->CR1, USART_CR1_CMIE);
AnnaBridge	172:65be27845400	1975	}
AnnaBridge	172:65be27845400	1976
AnnaBridge	172:65be27845400	1977	/**
AnnaBridge	172:65be27845400	1978	* @brief Enable TX FIFO Empty Interrupt
AnnaBridge	172:65be27845400	1979	* @rmtoll CR1 TXFEIE LL_LPUART_EnableIT_TXFE
AnnaBridge	172:65be27845400	1980	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1981	* @retval None
AnnaBridge	172:65be27845400	1982	*/
AnnaBridge	172:65be27845400	1983	__STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1984	{
AnnaBridge	172:65be27845400	1985	SET_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
AnnaBridge	172:65be27845400	1986	}
AnnaBridge	172:65be27845400	1987
AnnaBridge	172:65be27845400	1988	/**
AnnaBridge	172:65be27845400	1989	* @brief Enable RX FIFO Full Interrupt
AnnaBridge	172:65be27845400	1990	* @rmtoll CR1 RXFFIE LL_LPUART_EnableIT_RXFF
AnnaBridge	172:65be27845400	1991	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	1992	* @retval None
AnnaBridge	172:65be27845400	1993	*/
AnnaBridge	172:65be27845400	1994	__STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	1995	{
AnnaBridge	172:65be27845400	1996	SET_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
AnnaBridge	172:65be27845400	1997	}
AnnaBridge	172:65be27845400	1998
AnnaBridge	172:65be27845400	1999	/**
AnnaBridge	172:65be27845400	2000	* @brief Enable Error Interrupt
AnnaBridge	172:65be27845400	2001	* @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
AnnaBridge	172:65be27845400	2002	* error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
AnnaBridge	172:65be27845400	2003	* - 0: Interrupt is inhibited
AnnaBridge	172:65be27845400	2004	* - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
AnnaBridge	172:65be27845400	2005	* @rmtoll CR3 EIE LL_LPUART_EnableIT_ERROR
AnnaBridge	172:65be27845400	2006	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2007	* @retval None
AnnaBridge	172:65be27845400	2008	*/
AnnaBridge	172:65be27845400	2009	__STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2010	{
AnnaBridge	172:65be27845400	2011	SET_BIT(LPUARTx->CR3, USART_CR3_EIE);
AnnaBridge	172:65be27845400	2012	}
AnnaBridge	172:65be27845400	2013
AnnaBridge	172:65be27845400	2014	/**
AnnaBridge	172:65be27845400	2015	* @brief Enable CTS Interrupt
AnnaBridge	172:65be27845400	2016	* @rmtoll CR3 CTSIE LL_LPUART_EnableIT_CTS
AnnaBridge	172:65be27845400	2017	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2018	* @retval None
AnnaBridge	172:65be27845400	2019	*/
AnnaBridge	172:65be27845400	2020	__STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2021	{
AnnaBridge	172:65be27845400	2022	SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
AnnaBridge	172:65be27845400	2023	}
AnnaBridge	172:65be27845400	2024
AnnaBridge	172:65be27845400	2025	/**
AnnaBridge	172:65be27845400	2026	* @brief Enable Wake Up from Stop Mode Interrupt
AnnaBridge	172:65be27845400	2027	* @rmtoll CR3 WUFIE LL_LPUART_EnableIT_WKUP
AnnaBridge	172:65be27845400	2028	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2029	* @retval None
AnnaBridge	172:65be27845400	2030	*/
AnnaBridge	172:65be27845400	2031	__STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2032	{
AnnaBridge	172:65be27845400	2033	SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
AnnaBridge	172:65be27845400	2034	}
AnnaBridge	172:65be27845400	2035
AnnaBridge	172:65be27845400	2036	/**
AnnaBridge	172:65be27845400	2037	* @brief Enable TX FIFO Threshold Interrupt
AnnaBridge	172:65be27845400	2038	* @rmtoll CR3 TXFTIE LL_LPUART_EnableIT_TXFT
AnnaBridge	172:65be27845400	2039	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2040	* @retval None
AnnaBridge	172:65be27845400	2041	*/
AnnaBridge	172:65be27845400	2042	__STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2043	{
AnnaBridge	172:65be27845400	2044	SET_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
AnnaBridge	172:65be27845400	2045	}
AnnaBridge	172:65be27845400	2046
AnnaBridge	172:65be27845400	2047	/**
AnnaBridge	172:65be27845400	2048	* @brief Enable RX FIFO Threshold Interrupt
AnnaBridge	172:65be27845400	2049	* @rmtoll CR3 RXFTIE LL_LPUART_EnableIT_RXFT
AnnaBridge	172:65be27845400	2050	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2051	* @retval None
AnnaBridge	172:65be27845400	2052	*/
AnnaBridge	172:65be27845400	2053	__STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2054	{
AnnaBridge	172:65be27845400	2055	SET_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
AnnaBridge	172:65be27845400	2056	}
AnnaBridge	172:65be27845400	2057
AnnaBridge	172:65be27845400	2058	/**
AnnaBridge	172:65be27845400	2059	* @brief Disable IDLE Interrupt
AnnaBridge	172:65be27845400	2060	* @rmtoll CR1 IDLEIE LL_LPUART_DisableIT_IDLE
AnnaBridge	172:65be27845400	2061	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2062	* @retval None
AnnaBridge	172:65be27845400	2063	*/
AnnaBridge	172:65be27845400	2064	__STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2065	{
AnnaBridge	172:65be27845400	2066	CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
AnnaBridge	172:65be27845400	2067	}
AnnaBridge	172:65be27845400	2068
AnnaBridge	172:65be27845400	2069	/* Legacy define */
AnnaBridge	172:65be27845400	2070	#define LL_LPUART_DisableIT_RXNE LL_LPUART_DisableIT_RXNE_RXFNE
AnnaBridge	172:65be27845400	2071
AnnaBridge	172:65be27845400	2072	/**
AnnaBridge	172:65be27845400	2073	* @brief Disable RX Not Empty and RX FIFO Not Empty Interrupt
AnnaBridge	172:65be27845400	2074	* @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_DisableIT_RXNE_RXFNE
AnnaBridge	172:65be27845400	2075	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2076	* @retval None
AnnaBridge	172:65be27845400	2077	*/
AnnaBridge	172:65be27845400	2078	__STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2079	{
AnnaBridge	172:65be27845400	2080	CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
AnnaBridge	172:65be27845400	2081	}
AnnaBridge	172:65be27845400	2082
AnnaBridge	172:65be27845400	2083	/**
AnnaBridge	172:65be27845400	2084	* @brief Disable Transmission Complete Interrupt
AnnaBridge	172:65be27845400	2085	* @rmtoll CR1 TCIE LL_LPUART_DisableIT_TC
AnnaBridge	172:65be27845400	2086	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2087	* @retval None
AnnaBridge	172:65be27845400	2088	*/
AnnaBridge	172:65be27845400	2089	__STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2090	{
AnnaBridge	172:65be27845400	2091	CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE);
AnnaBridge	172:65be27845400	2092	}
AnnaBridge	172:65be27845400	2093
AnnaBridge	172:65be27845400	2094	/* Legacy define */
AnnaBridge	172:65be27845400	2095	#define LL_LPUART_DisableIT_TXE LL_LPUART_DisableIT_TXE_TXFNF
AnnaBridge	172:65be27845400	2096
AnnaBridge	172:65be27845400	2097	/**
AnnaBridge	172:65be27845400	2098	* @brief Disable TX Empty and TX FIFO Not Full Interrupt
AnnaBridge	172:65be27845400	2099	* @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_DisableIT_TXE_TXFNF
AnnaBridge	172:65be27845400	2100	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2101	* @retval None
AnnaBridge	172:65be27845400	2102	*/
AnnaBridge	172:65be27845400	2103	__STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2104	{
AnnaBridge	172:65be27845400	2105	CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
AnnaBridge	172:65be27845400	2106	}
AnnaBridge	172:65be27845400	2107
AnnaBridge	172:65be27845400	2108	/**
AnnaBridge	172:65be27845400	2109	* @brief Disable Parity Error Interrupt
AnnaBridge	172:65be27845400	2110	* @rmtoll CR1 PEIE LL_LPUART_DisableIT_PE
AnnaBridge	172:65be27845400	2111	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2112	* @retval None
AnnaBridge	172:65be27845400	2113	*/
AnnaBridge	172:65be27845400	2114	__STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2115	{
AnnaBridge	172:65be27845400	2116	CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE);
AnnaBridge	172:65be27845400	2117	}
AnnaBridge	172:65be27845400	2118
AnnaBridge	172:65be27845400	2119	/**
AnnaBridge	172:65be27845400	2120	* @brief Disable Character Match Interrupt
AnnaBridge	172:65be27845400	2121	* @rmtoll CR1 CMIE LL_LPUART_DisableIT_CM
AnnaBridge	172:65be27845400	2122	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2123	* @retval None
AnnaBridge	172:65be27845400	2124	*/
AnnaBridge	172:65be27845400	2125	__STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2126	{
AnnaBridge	172:65be27845400	2127	CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE);
AnnaBridge	172:65be27845400	2128	}
AnnaBridge	172:65be27845400	2129
AnnaBridge	172:65be27845400	2130	/**
AnnaBridge	172:65be27845400	2131	* @brief Disable TX FIFO Empty Interrupt
AnnaBridge	172:65be27845400	2132	* @rmtoll CR1 TXFEIE LL_LPUART_DisableIT_TXFE
AnnaBridge	172:65be27845400	2133	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2134	* @retval None
AnnaBridge	172:65be27845400	2135	*/
AnnaBridge	172:65be27845400	2136	__STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2137	{
AnnaBridge	172:65be27845400	2138	CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
AnnaBridge	172:65be27845400	2139	}
AnnaBridge	172:65be27845400	2140
AnnaBridge	172:65be27845400	2141	/**
AnnaBridge	172:65be27845400	2142	* @brief Disable RX FIFO Full Interrupt
AnnaBridge	172:65be27845400	2143	* @rmtoll CR1 RXFFIE LL_LPUART_DisableIT_RXFF
AnnaBridge	172:65be27845400	2144	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2145	* @retval None
AnnaBridge	172:65be27845400	2146	*/
AnnaBridge	172:65be27845400	2147	__STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2148	{
AnnaBridge	172:65be27845400	2149	CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
AnnaBridge	172:65be27845400	2150	}
AnnaBridge	172:65be27845400	2151
AnnaBridge	172:65be27845400	2152	/**
AnnaBridge	172:65be27845400	2153	* @brief Disable Error Interrupt
AnnaBridge	172:65be27845400	2154	* @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
AnnaBridge	172:65be27845400	2155	* error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
AnnaBridge	172:65be27845400	2156	* - 0: Interrupt is inhibited
AnnaBridge	172:65be27845400	2157	* - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
AnnaBridge	172:65be27845400	2158	* @rmtoll CR3 EIE LL_LPUART_DisableIT_ERROR
AnnaBridge	172:65be27845400	2159	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2160	* @retval None
AnnaBridge	172:65be27845400	2161	*/
AnnaBridge	172:65be27845400	2162	__STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2163	{
AnnaBridge	172:65be27845400	2164	CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE);
AnnaBridge	172:65be27845400	2165	}
AnnaBridge	172:65be27845400	2166
AnnaBridge	172:65be27845400	2167	/**
AnnaBridge	172:65be27845400	2168	* @brief Disable CTS Interrupt
AnnaBridge	172:65be27845400	2169	* @rmtoll CR3 CTSIE LL_LPUART_DisableIT_CTS
AnnaBridge	172:65be27845400	2170	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2171	* @retval None
AnnaBridge	172:65be27845400	2172	*/
AnnaBridge	172:65be27845400	2173	__STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2174	{
AnnaBridge	172:65be27845400	2175	CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
AnnaBridge	172:65be27845400	2176	}
AnnaBridge	172:65be27845400	2177
AnnaBridge	172:65be27845400	2178	/**
AnnaBridge	172:65be27845400	2179	* @brief Disable Wake Up from Stop Mode Interrupt
AnnaBridge	172:65be27845400	2180	* @rmtoll CR3 WUFIE LL_LPUART_DisableIT_WKUP
AnnaBridge	172:65be27845400	2181	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2182	* @retval None
AnnaBridge	172:65be27845400	2183	*/
AnnaBridge	172:65be27845400	2184	__STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2185	{
AnnaBridge	172:65be27845400	2186	CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
AnnaBridge	172:65be27845400	2187	}
AnnaBridge	172:65be27845400	2188
AnnaBridge	172:65be27845400	2189	/**
AnnaBridge	172:65be27845400	2190	* @brief Disable TX FIFO Threshold Interrupt
AnnaBridge	172:65be27845400	2191	* @rmtoll CR3 TXFTIE LL_LPUART_DisableIT_TXFT
AnnaBridge	172:65be27845400	2192	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2193	* @retval None
AnnaBridge	172:65be27845400	2194	*/
AnnaBridge	172:65be27845400	2195	__STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2196	{
AnnaBridge	172:65be27845400	2197	CLEAR_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
AnnaBridge	172:65be27845400	2198	}
AnnaBridge	172:65be27845400	2199
AnnaBridge	172:65be27845400	2200	/**
AnnaBridge	172:65be27845400	2201	* @brief Disable RX FIFO Threshold Interrupt
AnnaBridge	172:65be27845400	2202	* @rmtoll CR3 RXFTIE LL_LPUART_DisableIT_RXFT
AnnaBridge	172:65be27845400	2203	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2204	* @retval None
AnnaBridge	172:65be27845400	2205	*/
AnnaBridge	172:65be27845400	2206	__STATIC_INLINE void LL_LPUART_DisableIT_RXFT(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2207	{
AnnaBridge	172:65be27845400	2208	CLEAR_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
AnnaBridge	172:65be27845400	2209	}
AnnaBridge	172:65be27845400	2210
AnnaBridge	172:65be27845400	2211	/**
AnnaBridge	172:65be27845400	2212	* @brief Check if the LPUART IDLE Interrupt source is enabled or disabled.
AnnaBridge	172:65be27845400	2213	* @rmtoll CR1 IDLEIE LL_LPUART_IsEnabledIT_IDLE
AnnaBridge	172:65be27845400	2214	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2215	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2216	*/
AnnaBridge	172:65be27845400	2217	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2218	{
AnnaBridge	172:65be27845400	2219	return ((READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2220	}
AnnaBridge	172:65be27845400	2221
AnnaBridge	172:65be27845400	2222	/* Legacy define */
AnnaBridge	172:65be27845400	2223	#define LL_LPUART_IsEnabledIT_RXNE LL_LPUART_IsEnabledIT_RXNE_RXFNE
AnnaBridge	172:65be27845400	2224
AnnaBridge	172:65be27845400	2225	/**
AnnaBridge	172:65be27845400	2226	* @brief Check if the LPUART RX Not Empty and LPUART RX FIFO Not Empty Interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	2227	* @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_IsEnabledIT_RXNE_RXFNE
AnnaBridge	172:65be27845400	2228	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2229	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2230	*/
AnnaBridge	172:65be27845400	2231	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2232	{
AnnaBridge	172:65be27845400	2233	return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE) == (USART_CR1_RXNEIE_RXFNEIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2234	}
AnnaBridge	172:65be27845400	2235
AnnaBridge	172:65be27845400	2236	/**
AnnaBridge	172:65be27845400	2237	* @brief Check if the LPUART Transmission Complete Interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	2238	* @rmtoll CR1 TCIE LL_LPUART_IsEnabledIT_TC
AnnaBridge	172:65be27845400	2239	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2240	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2241	*/
AnnaBridge	172:65be27845400	2242	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2243	{
AnnaBridge	172:65be27845400	2244	return ((READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2245	}
AnnaBridge	172:65be27845400	2246
AnnaBridge	172:65be27845400	2247	/* Legacy define */
AnnaBridge	172:65be27845400	2248	#define LL_LPUART_IsEnabledIT_TXE LL_LPUART_IsEnabledIT_TXE_TXFNF
AnnaBridge	172:65be27845400	2249
AnnaBridge	172:65be27845400	2250	/**
AnnaBridge	172:65be27845400	2251	* @brief Check if the LPUART TX Empty and LPUART TX FIFO Not Full Interrupt is enabled or disabled
AnnaBridge	172:65be27845400	2252	* @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_IsEnabledIT_TXE_TXFNF
AnnaBridge	172:65be27845400	2253	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2254	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2255	*/
AnnaBridge	172:65be27845400	2256	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2257	{
AnnaBridge	172:65be27845400	2258	return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE) == (USART_CR1_TXEIE_TXFNFIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2259	}
AnnaBridge	172:65be27845400	2260
AnnaBridge	172:65be27845400	2261	/**
AnnaBridge	172:65be27845400	2262	* @brief Check if the LPUART Parity Error Interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	2263	* @rmtoll CR1 PEIE LL_LPUART_IsEnabledIT_PE
AnnaBridge	172:65be27845400	2264	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2265	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2266	*/
AnnaBridge	172:65be27845400	2267	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2268	{
AnnaBridge	172:65be27845400	2269	return ((READ_BIT(LPUARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2270	}
AnnaBridge	172:65be27845400	2271
AnnaBridge	172:65be27845400	2272	/**
AnnaBridge	172:65be27845400	2273	* @brief Check if the LPUART Character Match Interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	2274	* @rmtoll CR1 CMIE LL_LPUART_IsEnabledIT_CM
AnnaBridge	172:65be27845400	2275	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2276	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2277	*/
AnnaBridge	172:65be27845400	2278	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2279	{
AnnaBridge	172:65be27845400	2280	return ((READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2281	}
AnnaBridge	172:65be27845400	2282
AnnaBridge	172:65be27845400	2283	/**
AnnaBridge	172:65be27845400	2284	* @brief Check if the LPUART TX FIFO Empty Interrupt is enabled or disabled
AnnaBridge	172:65be27845400	2285	* @rmtoll CR1 TXFEIE LL_LPUART_IsEnabledIT_TXFE
AnnaBridge	172:65be27845400	2286	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2287	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2288	*/
AnnaBridge	172:65be27845400	2289	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFE(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2290	{
AnnaBridge	172:65be27845400	2291	return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXFEIE) == (USART_CR1_TXFEIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2292	}
AnnaBridge	172:65be27845400	2293
AnnaBridge	172:65be27845400	2294	/**
AnnaBridge	172:65be27845400	2295	* @brief Check if the LPUART RX FIFO Full Interrupt is enabled or disabled
AnnaBridge	172:65be27845400	2296	* @rmtoll CR1 RXFFIE LL_LPUART_IsEnabledIT_RXFF
AnnaBridge	172:65be27845400	2297	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2298	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2299	*/
AnnaBridge	172:65be27845400	2300	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFF(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2301	{
AnnaBridge	172:65be27845400	2302	return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXFFIE) == (USART_CR1_RXFFIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2303	}
AnnaBridge	172:65be27845400	2304
AnnaBridge	172:65be27845400	2305	/**
AnnaBridge	172:65be27845400	2306	* @brief Check if the LPUART Error Interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	2307	* @rmtoll CR3 EIE LL_LPUART_IsEnabledIT_ERROR
AnnaBridge	172:65be27845400	2308	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2309	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2310	*/
AnnaBridge	172:65be27845400	2311	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2312	{
AnnaBridge	172:65be27845400	2313	return ((READ_BIT(LPUARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2314	}
AnnaBridge	172:65be27845400	2315
AnnaBridge	172:65be27845400	2316	/**
AnnaBridge	172:65be27845400	2317	* @brief Check if the LPUART CTS Interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	2318	* @rmtoll CR3 CTSIE LL_LPUART_IsEnabledIT_CTS
AnnaBridge	172:65be27845400	2319	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2320	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2321	*/
AnnaBridge	172:65be27845400	2322	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2323	{
AnnaBridge	172:65be27845400	2324	return ((READ_BIT(LPUARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2325	}
AnnaBridge	172:65be27845400	2326
AnnaBridge	172:65be27845400	2327	/**
AnnaBridge	172:65be27845400	2328	* @brief Check if the LPUART Wake Up from Stop Mode Interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	2329	* @rmtoll CR3 WUFIE LL_LPUART_IsEnabledIT_WKUP
AnnaBridge	172:65be27845400	2330	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2331	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2332	*/
AnnaBridge	172:65be27845400	2333	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2334	{
AnnaBridge	172:65be27845400	2335	return ((READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2336	}
AnnaBridge	172:65be27845400	2337
AnnaBridge	172:65be27845400	2338	/**
AnnaBridge	172:65be27845400	2339	* @brief Check if LPUART TX FIFO Threshold Interrupt is enabled or disabled
AnnaBridge	172:65be27845400	2340	* @rmtoll CR3 TXFTIE LL_LPUART_IsEnabledIT_TXFT
AnnaBridge	172:65be27845400	2341	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2342	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2343	*/
AnnaBridge	172:65be27845400	2344	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFT(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2345	{
AnnaBridge	172:65be27845400	2346	return ((READ_BIT(LPUARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2347	}
AnnaBridge	172:65be27845400	2348
AnnaBridge	172:65be27845400	2349	/**
AnnaBridge	172:65be27845400	2350	* @brief Check if LPUART RX FIFO Threshold Interrupt is enabled or disabled
AnnaBridge	172:65be27845400	2351	* @rmtoll CR3 RXFTIE LL_LPUART_IsEnabledIT_RXFT
AnnaBridge	172:65be27845400	2352	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2353	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2354	*/
AnnaBridge	172:65be27845400	2355	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFT(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2356	{
AnnaBridge	172:65be27845400	2357	return ((READ_BIT(LPUARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2358	}
AnnaBridge	172:65be27845400	2359
AnnaBridge	172:65be27845400	2360	/**
AnnaBridge	172:65be27845400	2361	* @}
AnnaBridge	172:65be27845400	2362	*/
AnnaBridge	172:65be27845400	2363
AnnaBridge	172:65be27845400	2364	/** @defgroup LPUART_LL_EF_DMA_Management DMA_Management
AnnaBridge	172:65be27845400	2365	* @{
AnnaBridge	172:65be27845400	2366	*/
AnnaBridge	172:65be27845400	2367
AnnaBridge	172:65be27845400	2368	/**
AnnaBridge	172:65be27845400	2369	* @brief Enable DMA Mode for reception
AnnaBridge	172:65be27845400	2370	* @rmtoll CR3 DMAR LL_LPUART_EnableDMAReq_RX
AnnaBridge	172:65be27845400	2371	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2372	* @retval None
AnnaBridge	172:65be27845400	2373	*/
AnnaBridge	172:65be27845400	2374	__STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2375	{
AnnaBridge	172:65be27845400	2376	SET_BIT(LPUARTx->CR3, USART_CR3_DMAR);
AnnaBridge	172:65be27845400	2377	}
AnnaBridge	172:65be27845400	2378
AnnaBridge	172:65be27845400	2379	/**
AnnaBridge	172:65be27845400	2380	* @brief Disable DMA Mode for reception
AnnaBridge	172:65be27845400	2381	* @rmtoll CR3 DMAR LL_LPUART_DisableDMAReq_RX
AnnaBridge	172:65be27845400	2382	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2383	* @retval None
AnnaBridge	172:65be27845400	2384	*/
AnnaBridge	172:65be27845400	2385	__STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2386	{
AnnaBridge	172:65be27845400	2387	CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR);
AnnaBridge	172:65be27845400	2388	}
AnnaBridge	172:65be27845400	2389
AnnaBridge	172:65be27845400	2390	/**
AnnaBridge	172:65be27845400	2391	* @brief Check if DMA Mode is enabled for reception
AnnaBridge	172:65be27845400	2392	* @rmtoll CR3 DMAR LL_LPUART_IsEnabledDMAReq_RX
AnnaBridge	172:65be27845400	2393	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2394	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2395	*/
AnnaBridge	172:65be27845400	2396	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2397	{
AnnaBridge	172:65be27845400	2398	return ((READ_BIT(LPUARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2399	}
AnnaBridge	172:65be27845400	2400
AnnaBridge	172:65be27845400	2401	/**
AnnaBridge	172:65be27845400	2402	* @brief Enable DMA Mode for transmission
AnnaBridge	172:65be27845400	2403	* @rmtoll CR3 DMAT LL_LPUART_EnableDMAReq_TX
AnnaBridge	172:65be27845400	2404	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2405	* @retval None
AnnaBridge	172:65be27845400	2406	*/
AnnaBridge	172:65be27845400	2407	__STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2408	{
AnnaBridge	172:65be27845400	2409	SET_BIT(LPUARTx->CR3, USART_CR3_DMAT);
AnnaBridge	172:65be27845400	2410	}
AnnaBridge	172:65be27845400	2411
AnnaBridge	172:65be27845400	2412	/**
AnnaBridge	172:65be27845400	2413	* @brief Disable DMA Mode for transmission
AnnaBridge	172:65be27845400	2414	* @rmtoll CR3 DMAT LL_LPUART_DisableDMAReq_TX
AnnaBridge	172:65be27845400	2415	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2416	* @retval None
AnnaBridge	172:65be27845400	2417	*/
AnnaBridge	172:65be27845400	2418	__STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2419	{
AnnaBridge	172:65be27845400	2420	CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT);
AnnaBridge	172:65be27845400	2421	}
AnnaBridge	172:65be27845400	2422
AnnaBridge	172:65be27845400	2423	/**
AnnaBridge	172:65be27845400	2424	* @brief Check if DMA Mode is enabled for transmission
AnnaBridge	172:65be27845400	2425	* @rmtoll CR3 DMAT LL_LPUART_IsEnabledDMAReq_TX
AnnaBridge	172:65be27845400	2426	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2427	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2428	*/
AnnaBridge	172:65be27845400	2429	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2430	{
AnnaBridge	172:65be27845400	2431	return ((READ_BIT(LPUARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2432	}
AnnaBridge	172:65be27845400	2433
AnnaBridge	172:65be27845400	2434	/**
AnnaBridge	172:65be27845400	2435	* @brief Enable DMA Disabling on Reception Error
AnnaBridge	172:65be27845400	2436	* @rmtoll CR3 DDRE LL_LPUART_EnableDMADeactOnRxErr
AnnaBridge	172:65be27845400	2437	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2438	* @retval None
AnnaBridge	172:65be27845400	2439	*/
AnnaBridge	172:65be27845400	2440	__STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2441	{
AnnaBridge	172:65be27845400	2442	SET_BIT(LPUARTx->CR3, USART_CR3_DDRE);
AnnaBridge	172:65be27845400	2443	}
AnnaBridge	172:65be27845400	2444
AnnaBridge	172:65be27845400	2445	/**
AnnaBridge	172:65be27845400	2446	* @brief Disable DMA Disabling on Reception Error
AnnaBridge	172:65be27845400	2447	* @rmtoll CR3 DDRE LL_LPUART_DisableDMADeactOnRxErr
AnnaBridge	172:65be27845400	2448	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2449	* @retval None
AnnaBridge	172:65be27845400	2450	*/
AnnaBridge	172:65be27845400	2451	__STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2452	{
AnnaBridge	172:65be27845400	2453	CLEAR_BIT(LPUARTx->CR3, USART_CR3_DDRE);
AnnaBridge	172:65be27845400	2454	}
AnnaBridge	172:65be27845400	2455
AnnaBridge	172:65be27845400	2456	/**
AnnaBridge	172:65be27845400	2457	* @brief Indicate if DMA Disabling on Reception Error is disabled
AnnaBridge	172:65be27845400	2458	* @rmtoll CR3 DDRE LL_LPUART_IsEnabledDMADeactOnRxErr
AnnaBridge	172:65be27845400	2459	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2460	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2461	*/
AnnaBridge	172:65be27845400	2462	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2463	{
AnnaBridge	172:65be27845400	2464	return ((READ_BIT(LPUARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2465	}
AnnaBridge	172:65be27845400	2466
AnnaBridge	172:65be27845400	2467	/**
AnnaBridge	172:65be27845400	2468	* @brief Get the LPUART data register address used for DMA transfer
AnnaBridge	172:65be27845400	2469	* @rmtoll RDR RDR LL_LPUART_DMA_GetRegAddr\n
AnnaBridge	172:65be27845400	2470	* @rmtoll TDR TDR LL_LPUART_DMA_GetRegAddr
AnnaBridge	172:65be27845400	2471	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2472	* @param Direction This parameter can be one of the following values:
AnnaBridge	172:65be27845400	2473	* @arg @ref LL_LPUART_DMA_REG_DATA_TRANSMIT
AnnaBridge	172:65be27845400	2474	* @arg @ref LL_LPUART_DMA_REG_DATA_RECEIVE
AnnaBridge	172:65be27845400	2475	* @retval Address of data register
AnnaBridge	172:65be27845400	2476	*/
AnnaBridge	172:65be27845400	2477	__STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(USART_TypeDef *LPUARTx, uint32_t Direction)
AnnaBridge	172:65be27845400	2478	{
AnnaBridge	172:65be27845400	2479	register uint32_t data_reg_addr;
AnnaBridge	172:65be27845400	2480
AnnaBridge	172:65be27845400	2481	if (Direction == LL_LPUART_DMA_REG_DATA_TRANSMIT)
AnnaBridge	172:65be27845400	2482	{
AnnaBridge	172:65be27845400	2483	/* return address of TDR register */
AnnaBridge	172:65be27845400	2484	data_reg_addr = (uint32_t) & (LPUARTx->TDR);
AnnaBridge	172:65be27845400	2485	}
AnnaBridge	172:65be27845400	2486	else
AnnaBridge	172:65be27845400	2487	{
AnnaBridge	172:65be27845400	2488	/* return address of RDR register */
AnnaBridge	172:65be27845400	2489	data_reg_addr = (uint32_t) & (LPUARTx->RDR);
AnnaBridge	172:65be27845400	2490	}
AnnaBridge	172:65be27845400	2491
AnnaBridge	172:65be27845400	2492	return data_reg_addr;
AnnaBridge	172:65be27845400	2493	}
AnnaBridge	172:65be27845400	2494
AnnaBridge	172:65be27845400	2495	/**
AnnaBridge	172:65be27845400	2496	* @}
AnnaBridge	172:65be27845400	2497	*/
AnnaBridge	172:65be27845400	2498
AnnaBridge	172:65be27845400	2499	/** @defgroup LPUART_LL_EF_Data_Management Data_Management
AnnaBridge	172:65be27845400	2500	* @{
AnnaBridge	172:65be27845400	2501	*/
AnnaBridge	172:65be27845400	2502
AnnaBridge	172:65be27845400	2503	/**
AnnaBridge	172:65be27845400	2504	* @brief Read Receiver Data register (Receive Data value, 8 bits)
AnnaBridge	172:65be27845400	2505	* @rmtoll RDR RDR LL_LPUART_ReceiveData8
AnnaBridge	172:65be27845400	2506	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2507	* @retval Time Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	172:65be27845400	2508	*/
AnnaBridge	172:65be27845400	2509	__STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2510	{
AnnaBridge	172:65be27845400	2511	return (uint8_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
AnnaBridge	172:65be27845400	2512	}
AnnaBridge	172:65be27845400	2513
AnnaBridge	172:65be27845400	2514	/**
AnnaBridge	172:65be27845400	2515	* @brief Read Receiver Data register (Receive Data value, 9 bits)
AnnaBridge	172:65be27845400	2516	* @rmtoll RDR RDR LL_LPUART_ReceiveData9
AnnaBridge	172:65be27845400	2517	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2518	* @retval Time Value between Min_Data=0x00 and Max_Data=0x1FF
AnnaBridge	172:65be27845400	2519	*/
AnnaBridge	172:65be27845400	2520	__STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2521	{
AnnaBridge	172:65be27845400	2522	return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
AnnaBridge	172:65be27845400	2523	}
AnnaBridge	172:65be27845400	2524
AnnaBridge	172:65be27845400	2525	/**
AnnaBridge	172:65be27845400	2526	* @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
AnnaBridge	172:65be27845400	2527	* @rmtoll TDR TDR LL_LPUART_TransmitData8
AnnaBridge	172:65be27845400	2528	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2529	* @param Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	172:65be27845400	2530	* @retval None
AnnaBridge	172:65be27845400	2531	*/
AnnaBridge	172:65be27845400	2532	__STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value)
AnnaBridge	172:65be27845400	2533	{
AnnaBridge	172:65be27845400	2534	LPUARTx->TDR = Value;
AnnaBridge	172:65be27845400	2535	}
AnnaBridge	172:65be27845400	2536
AnnaBridge	172:65be27845400	2537	/**
AnnaBridge	172:65be27845400	2538	* @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
AnnaBridge	172:65be27845400	2539	* @rmtoll TDR TDR LL_LPUART_TransmitData9
AnnaBridge	172:65be27845400	2540	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2541	* @param Value between Min_Data=0x00 and Max_Data=0x1FF
AnnaBridge	172:65be27845400	2542	* @retval None
AnnaBridge	172:65be27845400	2543	*/
AnnaBridge	172:65be27845400	2544	__STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value)
AnnaBridge	172:65be27845400	2545	{
AnnaBridge	172:65be27845400	2546	LPUARTx->TDR = Value & 0x1FFUL;
AnnaBridge	172:65be27845400	2547	}
AnnaBridge	172:65be27845400	2548
AnnaBridge	172:65be27845400	2549	/**
AnnaBridge	172:65be27845400	2550	* @}
AnnaBridge	172:65be27845400	2551	*/
AnnaBridge	172:65be27845400	2552
AnnaBridge	172:65be27845400	2553	/** @defgroup LPUART_LL_EF_Execution Execution
AnnaBridge	172:65be27845400	2554	* @{
AnnaBridge	172:65be27845400	2555	*/
AnnaBridge	172:65be27845400	2556
AnnaBridge	172:65be27845400	2557	/**
AnnaBridge	172:65be27845400	2558	* @brief Request Break sending
AnnaBridge	172:65be27845400	2559	* @rmtoll RQR SBKRQ LL_LPUART_RequestBreakSending
AnnaBridge	172:65be27845400	2560	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2561	* @retval None
AnnaBridge	172:65be27845400	2562	*/
AnnaBridge	172:65be27845400	2563	__STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2564	{
AnnaBridge	172:65be27845400	2565	SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_SBKRQ);
AnnaBridge	172:65be27845400	2566	}
AnnaBridge	172:65be27845400	2567
AnnaBridge	172:65be27845400	2568	/**
AnnaBridge	172:65be27845400	2569	* @brief Put LPUART in mute mode and set the RWU flag
AnnaBridge	172:65be27845400	2570	* @rmtoll RQR MMRQ LL_LPUART_RequestEnterMuteMode
AnnaBridge	172:65be27845400	2571	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2572	* @retval None
AnnaBridge	172:65be27845400	2573	*/
AnnaBridge	172:65be27845400	2574	__STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2575	{
AnnaBridge	172:65be27845400	2576	SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_MMRQ);
AnnaBridge	172:65be27845400	2577	}
AnnaBridge	172:65be27845400	2578
AnnaBridge	172:65be27845400	2579	/**
AnnaBridge	172:65be27845400	2580	* @brief Request a Receive Data and FIFO flush
AnnaBridge	172:65be27845400	2581	* @note Allows to discard the received data without reading them, and avoid an overrun
AnnaBridge	172:65be27845400	2582	* condition.
AnnaBridge	172:65be27845400	2583	* @rmtoll RQR RXFRQ LL_LPUART_RequestRxDataFlush
AnnaBridge	172:65be27845400	2584	* @param LPUARTx LPUART Instance
AnnaBridge	172:65be27845400	2585	* @retval None
AnnaBridge	172:65be27845400	2586	*/
AnnaBridge	172:65be27845400	2587	__STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx)
AnnaBridge	172:65be27845400	2588	{
AnnaBridge	172:65be27845400	2589	SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_RXFRQ);
AnnaBridge	172:65be27845400	2590	}
AnnaBridge	172:65be27845400	2591
AnnaBridge	172:65be27845400	2592	/**
AnnaBridge	172:65be27845400	2593	* @}
AnnaBridge	172:65be27845400	2594	*/
AnnaBridge	172:65be27845400	2595
AnnaBridge	172:65be27845400	2596	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	2597	/** @defgroup LPUART_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	172:65be27845400	2598	* @{
AnnaBridge	172:65be27845400	2599	*/
AnnaBridge	172:65be27845400	2600	ErrorStatus LL_LPUART_DeInit(USART_TypeDef *LPUARTx);
AnnaBridge	172:65be27845400	2601	ErrorStatus LL_LPUART_Init(USART_TypeDef LPUARTx, LL_LPUART_InitTypeDef LPUART_InitStruct);
AnnaBridge	172:65be27845400	2602	void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct);
AnnaBridge	172:65be27845400	2603	/**
AnnaBridge	172:65be27845400	2604	* @}
AnnaBridge	172:65be27845400	2605	*/
AnnaBridge	172:65be27845400	2606	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	172:65be27845400	2607
AnnaBridge	172:65be27845400	2608	/**
AnnaBridge	172:65be27845400	2609	* @}
AnnaBridge	172:65be27845400	2610	*/
AnnaBridge	172:65be27845400	2611
AnnaBridge	172:65be27845400	2612	/**
AnnaBridge	172:65be27845400	2613	* @}
AnnaBridge	172:65be27845400	2614	*/
AnnaBridge	172:65be27845400	2615
AnnaBridge	172:65be27845400	2616	#endif /* LPUART1 */
AnnaBridge	172:65be27845400	2617
AnnaBridge	172:65be27845400	2618	/**
AnnaBridge	172:65be27845400	2619	* @}
AnnaBridge	172:65be27845400	2620	*/
AnnaBridge	172:65be27845400	2621
AnnaBridge	172:65be27845400	2622	#ifdef __cplusplus
AnnaBridge	172:65be27845400	2623	}
AnnaBridge	172:65be27845400	2624	#endif
AnnaBridge	172:65be27845400	2625
AnnaBridge	172:65be27845400	2626	#endif /* STM32H7xx_LL_LPUART_H */
AnnaBridge	172:65be27845400	2627
AnnaBridge	172:65be27845400	2628	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/