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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_STD/stm32h7xx_ll_bdma.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 172:65be27845400 | 1 | /** |
AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_ll_bdma.h |
AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
AnnaBridge | 172:65be27845400 | 5 | * @brief Header file of BDMA LL module. |
AnnaBridge | 172:65be27845400 | 6 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 7 | * @attention |
AnnaBridge | 172:65be27845400 | 8 | * |
AnnaBridge | 172:65be27845400 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics. |
AnnaBridge | 172:65be27845400 | 10 | * All rights reserved.</center></h2> |
AnnaBridge | 172:65be27845400 | 11 | * |
AnnaBridge | 172:65be27845400 | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
AnnaBridge | 172:65be27845400 | 13 | * the "License"; You may not use this file except in compliance with the |
AnnaBridge | 172:65be27845400 | 14 | * License. You may obtain a copy of the License at: |
AnnaBridge | 172:65be27845400 | 15 | * opensource.org/licenses/BSD-3-Clause |
AnnaBridge | 172:65be27845400 | 16 | * |
AnnaBridge | 172:65be27845400 | 17 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 18 | */ |
AnnaBridge | 172:65be27845400 | 19 | |
AnnaBridge | 172:65be27845400 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 21 | #ifndef STM32H7xx_LL_BDMA_H |
AnnaBridge | 172:65be27845400 | 22 | #define STM32H7xx_LL_BDMA_H |
AnnaBridge | 172:65be27845400 | 23 | |
AnnaBridge | 172:65be27845400 | 24 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 25 | extern "C" { |
AnnaBridge | 172:65be27845400 | 26 | #endif |
AnnaBridge | 172:65be27845400 | 27 | |
AnnaBridge | 172:65be27845400 | 28 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 29 | #include "stm32h7xx.h" |
AnnaBridge | 172:65be27845400 | 30 | #include "stm32h7xx_ll_dmamux.h" |
AnnaBridge | 172:65be27845400 | 31 | |
AnnaBridge | 172:65be27845400 | 32 | /** @addtogroup STM32H7xx_LL_Driver |
AnnaBridge | 172:65be27845400 | 33 | * @{ |
AnnaBridge | 172:65be27845400 | 34 | */ |
AnnaBridge | 172:65be27845400 | 35 | |
AnnaBridge | 172:65be27845400 | 36 | #if defined (BDMA) |
AnnaBridge | 172:65be27845400 | 37 | |
AnnaBridge | 172:65be27845400 | 38 | /** @defgroup BDMA_LL BDMA |
AnnaBridge | 172:65be27845400 | 39 | * @{ |
AnnaBridge | 172:65be27845400 | 40 | */ |
AnnaBridge | 172:65be27845400 | 41 | |
AnnaBridge | 172:65be27845400 | 42 | /* Private types -------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 43 | /* Private variables ---------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 44 | /** @defgroup BDMA_LL_Private_Variables BDMA Private Variables |
AnnaBridge | 172:65be27845400 | 45 | * @{ |
AnnaBridge | 172:65be27845400 | 46 | */ |
AnnaBridge | 172:65be27845400 | 47 | /* Array used to get the BDMA channel register offset versus channel index LL_BDMA_CHANNEL_x */ |
AnnaBridge | 172:65be27845400 | 48 | static const uint8_t LL_BDMA_CH_OFFSET_TAB[] = |
AnnaBridge | 172:65be27845400 | 49 | { |
AnnaBridge | 172:65be27845400 | 50 | (uint8_t)(BDMA_Channel0_BASE - BDMA_BASE), |
AnnaBridge | 172:65be27845400 | 51 | (uint8_t)(BDMA_Channel1_BASE - BDMA_BASE), |
AnnaBridge | 172:65be27845400 | 52 | (uint8_t)(BDMA_Channel2_BASE - BDMA_BASE), |
AnnaBridge | 172:65be27845400 | 53 | (uint8_t)(BDMA_Channel3_BASE - BDMA_BASE), |
AnnaBridge | 172:65be27845400 | 54 | (uint8_t)(BDMA_Channel4_BASE - BDMA_BASE), |
AnnaBridge | 172:65be27845400 | 55 | (uint8_t)(BDMA_Channel5_BASE - BDMA_BASE), |
AnnaBridge | 172:65be27845400 | 56 | (uint8_t)(BDMA_Channel6_BASE - BDMA_BASE), |
AnnaBridge | 172:65be27845400 | 57 | (uint8_t)(BDMA_Channel7_BASE - BDMA_BASE) |
AnnaBridge | 172:65be27845400 | 58 | }; |
AnnaBridge | 172:65be27845400 | 59 | /** |
AnnaBridge | 172:65be27845400 | 60 | * @} |
AnnaBridge | 172:65be27845400 | 61 | */ |
AnnaBridge | 172:65be27845400 | 62 | |
AnnaBridge | 172:65be27845400 | 63 | /* Private constants ---------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 64 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 65 | #if !defined(UNUSED) |
AnnaBridge | 172:65be27845400 | 66 | #define UNUSED(x) ((void)(x)) |
AnnaBridge | 172:65be27845400 | 67 | #endif |
AnnaBridge | 172:65be27845400 | 68 | |
AnnaBridge | 172:65be27845400 | 69 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 70 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 172:65be27845400 | 71 | /** @defgroup BDMA_LL_ES_INIT BDMA Exported Init structure |
AnnaBridge | 172:65be27845400 | 72 | * @{ |
AnnaBridge | 172:65be27845400 | 73 | */ |
AnnaBridge | 172:65be27845400 | 74 | typedef struct |
AnnaBridge | 172:65be27845400 | 75 | { |
AnnaBridge | 172:65be27845400 | 76 | uint32_t PeriphOrM2MSrcAddress; /*!< Specifies the peripheral base address for BDMA transfer |
AnnaBridge | 172:65be27845400 | 77 | or as Source base address in case of memory to memory transfer direction. |
AnnaBridge | 172:65be27845400 | 78 | |
AnnaBridge | 172:65be27845400 | 79 | This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */ |
AnnaBridge | 172:65be27845400 | 80 | |
AnnaBridge | 172:65be27845400 | 81 | uint32_t MemoryOrM2MDstAddress; /*!< Specifies the memory base address for DMA transfer |
AnnaBridge | 172:65be27845400 | 82 | or as Destination base address in case of memory to memory transfer direction. |
AnnaBridge | 172:65be27845400 | 83 | |
AnnaBridge | 172:65be27845400 | 84 | This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */ |
AnnaBridge | 172:65be27845400 | 85 | |
AnnaBridge | 172:65be27845400 | 86 | uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral, |
AnnaBridge | 172:65be27845400 | 87 | from memory to memory or from peripheral to memory. |
AnnaBridge | 172:65be27845400 | 88 | This parameter can be a value of @ref BDMA_LL_EC_DIRECTION |
AnnaBridge | 172:65be27845400 | 89 | |
AnnaBridge | 172:65be27845400 | 90 | This feature can be modified afterwards using unitary function @ref LL_BDMA_SetDataTransferDirection(). */ |
AnnaBridge | 172:65be27845400 | 91 | |
AnnaBridge | 172:65be27845400 | 92 | uint32_t Mode; /*!< Specifies the normal or circular operation mode. |
AnnaBridge | 172:65be27845400 | 93 | This parameter can be a value of @ref BDMA_LL_EC_MODE |
AnnaBridge | 172:65be27845400 | 94 | @note: The circular buffer mode cannot be used if the memory to memory |
AnnaBridge | 172:65be27845400 | 95 | data transfer direction is configured on the selected Channel |
AnnaBridge | 172:65be27845400 | 96 | |
AnnaBridge | 172:65be27845400 | 97 | This feature can be modified afterwards using unitary function @ref LL_BDMA_SetMode(). */ |
AnnaBridge | 172:65be27845400 | 98 | |
AnnaBridge | 172:65be27845400 | 99 | uint32_t PeriphOrM2MSrcIncMode; /*!< Specifies whether the Peripheral address or Source address in case of memory to memory transfer direction |
AnnaBridge | 172:65be27845400 | 100 | is incremented or not. |
AnnaBridge | 172:65be27845400 | 101 | This parameter can be a value of @ref BDMA_LL_EC_PERIPH |
AnnaBridge | 172:65be27845400 | 102 | |
AnnaBridge | 172:65be27845400 | 103 | This feature can be modified afterwards using unitary function @ref LL_BDMA_SetPeriphIncMode(). */ |
AnnaBridge | 172:65be27845400 | 104 | |
AnnaBridge | 172:65be27845400 | 105 | uint32_t MemoryOrM2MDstIncMode; /*!< Specifies whether the Memory address or Destination address in case of memory to memory transfer direction |
AnnaBridge | 172:65be27845400 | 106 | is incremented or not. |
AnnaBridge | 172:65be27845400 | 107 | This parameter can be a value of @ref BDMA_LL_EC_MEMORY |
AnnaBridge | 172:65be27845400 | 108 | |
AnnaBridge | 172:65be27845400 | 109 | This feature can be modified afterwards using unitary function @ref LL_BDMA_SetMemoryIncMode(). */ |
AnnaBridge | 172:65be27845400 | 110 | |
AnnaBridge | 172:65be27845400 | 111 | uint32_t PeriphOrM2MSrcDataSize; /*!< Specifies the Peripheral data size alignment or Source data size alignment (byte, half word, word) |
AnnaBridge | 172:65be27845400 | 112 | in case of memory to memory transfer direction. |
AnnaBridge | 172:65be27845400 | 113 | This parameter can be a value of @ref BDMA_LL_EC_PDATAALIGN |
AnnaBridge | 172:65be27845400 | 114 | |
AnnaBridge | 172:65be27845400 | 115 | This feature can be modified afterwards using unitary function @ref LL_BDMA_SetPeriphSize(). */ |
AnnaBridge | 172:65be27845400 | 116 | |
AnnaBridge | 172:65be27845400 | 117 | uint32_t MemoryOrM2MDstDataSize; /*!< Specifies the Memory data size alignment or Destination data size alignment (byte, half word, word) |
AnnaBridge | 172:65be27845400 | 118 | in case of memory to memory transfer direction. |
AnnaBridge | 172:65be27845400 | 119 | This parameter can be a value of @ref BDMA_LL_EC_MDATAALIGN |
AnnaBridge | 172:65be27845400 | 120 | |
AnnaBridge | 172:65be27845400 | 121 | This feature can be modified afterwards using unitary function @ref LL_BDMA_SetMemorySize(). */ |
AnnaBridge | 172:65be27845400 | 122 | |
AnnaBridge | 172:65be27845400 | 123 | uint32_t NbData; /*!< Specifies the number of data to transfer, in data unit. |
AnnaBridge | 172:65be27845400 | 124 | The data unit is equal to the source buffer configuration set in PeripheralSize |
AnnaBridge | 172:65be27845400 | 125 | or MemorySize parameters depending in the transfer direction. |
AnnaBridge | 172:65be27845400 | 126 | This parameter must be a value between Min_Data = 0 and Max_Data = 0x0000FFFF |
AnnaBridge | 172:65be27845400 | 127 | |
AnnaBridge | 172:65be27845400 | 128 | This feature can be modified afterwards using unitary function @ref LL_BDMA_SetDataLength(). */ |
AnnaBridge | 172:65be27845400 | 129 | |
AnnaBridge | 172:65be27845400 | 130 | uint32_t PeriphRequest; /*!< Specifies the peripheral request. |
AnnaBridge | 172:65be27845400 | 131 | This parameter can be a value of @ref DMAMUX_LL_EC_REQUEST |
AnnaBridge | 172:65be27845400 | 132 | |
AnnaBridge | 172:65be27845400 | 133 | This feature can be modified afterwards using unitary function @ref LL_BDMA_SetPeriphRequest(). */ |
AnnaBridge | 172:65be27845400 | 134 | |
AnnaBridge | 172:65be27845400 | 135 | uint32_t Priority; /*!< Specifies the channel priority level. |
AnnaBridge | 172:65be27845400 | 136 | This parameter can be a value of @ref BDMA_LL_EC_PRIORITY |
AnnaBridge | 172:65be27845400 | 137 | |
AnnaBridge | 172:65be27845400 | 138 | This feature can be modified afterwards using unitary function @ref LL_BDMA_SetChannelPriorityLevel(). */ |
AnnaBridge | 172:65be27845400 | 139 | |
AnnaBridge | 172:65be27845400 | 140 | } LL_BDMA_InitTypeDef; |
AnnaBridge | 172:65be27845400 | 141 | /** |
AnnaBridge | 172:65be27845400 | 142 | * @} |
AnnaBridge | 172:65be27845400 | 143 | */ |
AnnaBridge | 172:65be27845400 | 144 | #endif /*USE_FULL_LL_DRIVER*/ |
AnnaBridge | 172:65be27845400 | 145 | |
AnnaBridge | 172:65be27845400 | 146 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 147 | /** @defgroup BDMA_LL_Exported_Constants BDMA Exported Constants |
AnnaBridge | 172:65be27845400 | 148 | * @{ |
AnnaBridge | 172:65be27845400 | 149 | */ |
AnnaBridge | 172:65be27845400 | 150 | /** @defgroup BDMA_LL_EC_CLEAR_FLAG Clear Flags Defines |
AnnaBridge | 172:65be27845400 | 151 | * @brief Flags defines which can be used with LL_BDMA_WriteReg function |
AnnaBridge | 172:65be27845400 | 152 | * @{ |
AnnaBridge | 172:65be27845400 | 153 | */ |
AnnaBridge | 172:65be27845400 | 154 | #define LL_BDMA_IFCR_CGIF1 BDMA_IFCR_CGIF1 /*!< Channel 1 global flag */ |
AnnaBridge | 172:65be27845400 | 155 | #define LL_BDMA_IFCR_CTCIF1 BDMA_IFCR_CTCIF1 /*!< Channel 1 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 156 | #define LL_BDMA_IFCR_CHTIF1 BDMA_IFCR_CHTIF1 /*!< Channel 1 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 157 | #define LL_BDMA_IFCR_CTEIF1 BDMA_IFCR_CTEIF1 /*!< Channel 1 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 158 | #define LL_BDMA_IFCR_CGIF2 BDMA_IFCR_CGIF2 /*!< Channel 2 global flag */ |
AnnaBridge | 172:65be27845400 | 159 | #define LL_BDMA_IFCR_CTCIF2 BDMA_IFCR_CTCIF2 /*!< Channel 2 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 160 | #define LL_BDMA_IFCR_CHTIF2 BDMA_IFCR_CHTIF2 /*!< Channel 2 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 161 | #define LL_BDMA_IFCR_CTEIF2 BDMA_IFCR_CTEIF2 /*!< Channel 2 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 162 | #define LL_BDMA_IFCR_CGIF3 BDMA_IFCR_CGIF3 /*!< Channel 3 global flag */ |
AnnaBridge | 172:65be27845400 | 163 | #define LL_BDMA_IFCR_CTCIF3 BDMA_IFCR_CTCIF3 /*!< Channel 3 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 164 | #define LL_BDMA_IFCR_CHTIF3 BDMA_IFCR_CHTIF3 /*!< Channel 3 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 165 | #define LL_BDMA_IFCR_CTEIF3 BDMA_IFCR_CTEIF3 /*!< Channel 3 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 166 | #define LL_BDMA_IFCR_CGIF4 BDMA_IFCR_CGIF4 /*!< Channel 4 global flag */ |
AnnaBridge | 172:65be27845400 | 167 | #define LL_BDMA_IFCR_CTCIF4 BDMA_IFCR_CTCIF4 /*!< Channel 4 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 168 | #define LL_BDMA_IFCR_CHTIF4 BDMA_IFCR_CHTIF4 /*!< Channel 4 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 169 | #define LL_BDMA_IFCR_CTEIF4 BDMA_IFCR_CTEIF4 /*!< Channel 4 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 170 | #define LL_BDMA_IFCR_CGIF5 BDMA_IFCR_CGIF5 /*!< Channel 5 global flag */ |
AnnaBridge | 172:65be27845400 | 171 | #define LL_BDMA_IFCR_CTCIF5 BDMA_IFCR_CTCIF5 /*!< Channel 5 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 172 | #define LL_BDMA_IFCR_CHTIF5 BDMA_IFCR_CHTIF5 /*!< Channel 5 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 173 | #define LL_BDMA_IFCR_CTEIF5 BDMA_IFCR_CTEIF5 /*!< Channel 5 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 174 | #define LL_BDMA_IFCR_CGIF6 BDMA_IFCR_CGIF6 /*!< Channel 6 global flag */ |
AnnaBridge | 172:65be27845400 | 175 | #define LL_BDMA_IFCR_CTCIF6 BDMA_IFCR_CTCIF6 /*!< Channel 6 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 176 | #define LL_BDMA_IFCR_CHTIF6 BDMA_IFCR_CHTIF6 /*!< Channel 6 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 177 | #define LL_BDMA_IFCR_CTEIF6 BDMA_IFCR_CTEIF6 /*!< Channel 6 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 178 | #define LL_BDMA_IFCR_CGIF7 BDMA_IFCR_CGIF7 /*!< Channel 7 global flag */ |
AnnaBridge | 172:65be27845400 | 179 | #define LL_BDMA_IFCR_CTCIF7 BDMA_IFCR_CTCIF7 /*!< Channel 7 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 180 | #define LL_BDMA_IFCR_CHTIF7 BDMA_IFCR_CHTIF7 /*!< Channel 7 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 181 | #define LL_BDMA_IFCR_CTEIF7 BDMA_IFCR_CTEIF7 /*!< Channel 7 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 182 | /** |
AnnaBridge | 172:65be27845400 | 183 | * @} |
AnnaBridge | 172:65be27845400 | 184 | */ |
AnnaBridge | 172:65be27845400 | 185 | |
AnnaBridge | 172:65be27845400 | 186 | /** @defgroup BDMA_LL_EC_GET_FLAG Get Flags Defines |
AnnaBridge | 172:65be27845400 | 187 | * @brief Flags defines which can be used with LL_BDMA_ReadReg function |
AnnaBridge | 172:65be27845400 | 188 | * @{ |
AnnaBridge | 172:65be27845400 | 189 | */ |
AnnaBridge | 172:65be27845400 | 190 | #define LL_BDMA_ISR_GIF0 BDMA_ISR_GIF0 /*!< Channel 1 global flag */ |
AnnaBridge | 172:65be27845400 | 191 | #define LL_BDMA_ISR_TCIF0 BDMA_ISR_TCIF0 /*!< Channel 1 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 192 | #define LL_BDMA_ISR_HTIF0 BDMA_ISR_HTIF0 /*!< Channel 1 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 193 | #define LL_BDMA_ISR_TEIF0 BDMA_ISR_TEIF0 /*!< Channel 1 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 194 | #define LL_BDMA_ISR_GIF1 BDMA_ISR_GIF1 /*!< Channel 1 global flag */ |
AnnaBridge | 172:65be27845400 | 195 | #define LL_BDMA_ISR_TCIF1 BDMA_ISR_TCIF1 /*!< Channel 1 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 196 | #define LL_BDMA_ISR_HTIF1 BDMA_ISR_HTIF1 /*!< Channel 1 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 197 | #define LL_BDMA_ISR_TEIF1 BDMA_ISR_TEIF1 /*!< Channel 1 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 198 | #define LL_BDMA_ISR_GIF2 BDMA_ISR_GIF2 /*!< Channel 2 global flag */ |
AnnaBridge | 172:65be27845400 | 199 | #define LL_BDMA_ISR_TCIF2 BDMA_ISR_TCIF2 /*!< Channel 2 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 200 | #define LL_BDMA_ISR_HTIF2 BDMA_ISR_HTIF2 /*!< Channel 2 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 201 | #define LL_BDMA_ISR_TEIF2 BDMA_ISR_TEIF2 /*!< Channel 2 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 202 | #define LL_BDMA_ISR_GIF3 BDMA_ISR_GIF3 /*!< Channel 3 global flag */ |
AnnaBridge | 172:65be27845400 | 203 | #define LL_BDMA_ISR_TCIF3 BDMA_ISR_TCIF3 /*!< Channel 3 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 204 | #define LL_BDMA_ISR_HTIF3 BDMA_ISR_HTIF3 /*!< Channel 3 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 205 | #define LL_BDMA_ISR_TEIF3 BDMA_ISR_TEIF3 /*!< Channel 3 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 206 | #define LL_BDMA_ISR_GIF4 BDMA_ISR_GIF4 /*!< Channel 4 global flag */ |
AnnaBridge | 172:65be27845400 | 207 | #define LL_BDMA_ISR_TCIF4 BDMA_ISR_TCIF4 /*!< Channel 4 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 208 | #define LL_BDMA_ISR_HTIF4 BDMA_ISR_HTIF4 /*!< Channel 4 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 209 | #define LL_BDMA_ISR_TEIF4 BDMA_ISR_TEIF4 /*!< Channel 4 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 210 | #define LL_BDMA_ISR_GIF5 BDMA_ISR_GIF5 /*!< Channel 5 global flag */ |
AnnaBridge | 172:65be27845400 | 211 | #define LL_BDMA_ISR_TCIF5 BDMA_ISR_TCIF5 /*!< Channel 5 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 212 | #define LL_BDMA_ISR_HTIF5 BDMA_ISR_HTIF5 /*!< Channel 5 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 213 | #define LL_BDMA_ISR_TEIF5 BDMA_ISR_TEIF5 /*!< Channel 5 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 214 | #define LL_BDMA_ISR_GIF6 BDMA_ISR_GIF6 /*!< Channel 6 global flag */ |
AnnaBridge | 172:65be27845400 | 215 | #define LL_BDMA_ISR_TCIF6 BDMA_ISR_TCIF6 /*!< Channel 6 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 216 | #define LL_BDMA_ISR_HTIF6 BDMA_ISR_HTIF6 /*!< Channel 6 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 217 | #define LL_BDMA_ISR_TEIF6 BDMA_ISR_TEIF6 /*!< Channel 6 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 218 | #define LL_BDMA_ISR_GIF7 BDMA_ISR_GIF7 /*!< Channel 7 global flag */ |
AnnaBridge | 172:65be27845400 | 219 | #define LL_BDMA_ISR_TCIF7 BDMA_ISR_TCIF7 /*!< Channel 7 transfer complete flag */ |
AnnaBridge | 172:65be27845400 | 220 | #define LL_BDMA_ISR_HTIF7 BDMA_ISR_HTIF7 /*!< Channel 7 half transfer flag */ |
AnnaBridge | 172:65be27845400 | 221 | #define LL_BDMA_ISR_TEIF7 BDMA_ISR_TEIF7 /*!< Channel 7 transfer error flag */ |
AnnaBridge | 172:65be27845400 | 222 | /** |
AnnaBridge | 172:65be27845400 | 223 | * @} |
AnnaBridge | 172:65be27845400 | 224 | */ |
AnnaBridge | 172:65be27845400 | 225 | |
AnnaBridge | 172:65be27845400 | 226 | /** @defgroup BDMA_LL_EC_IT IT Defines |
AnnaBridge | 172:65be27845400 | 227 | * @brief IT defines which can be used with LL_BDMA_ReadReg and LL_BDMA_WriteReg functions |
AnnaBridge | 172:65be27845400 | 228 | * @{ |
AnnaBridge | 172:65be27845400 | 229 | */ |
AnnaBridge | 172:65be27845400 | 230 | #define LL_BDMA_CCR_TCIE BDMA_CCR_TCIE /*!< Transfer complete interrupt */ |
AnnaBridge | 172:65be27845400 | 231 | #define LL_BDMA_CCR_HTIE BDMA_CCR_HTIE /*!< Half Transfer interrupt */ |
AnnaBridge | 172:65be27845400 | 232 | #define LL_BDMA_CCR_TEIE BDMA_CCR_TEIE /*!< Transfer error interrupt */ |
AnnaBridge | 172:65be27845400 | 233 | /** |
AnnaBridge | 172:65be27845400 | 234 | * @} |
AnnaBridge | 172:65be27845400 | 235 | */ |
AnnaBridge | 172:65be27845400 | 236 | |
AnnaBridge | 172:65be27845400 | 237 | /** @defgroup BDMA_LL_EC_CHANNEL CHANNEL |
AnnaBridge | 172:65be27845400 | 238 | * @{ |
AnnaBridge | 172:65be27845400 | 239 | */ |
AnnaBridge | 172:65be27845400 | 240 | #define LL_BDMA_CHANNEL_0 0x00000000U /*!< DMA Channel 0 */ |
AnnaBridge | 172:65be27845400 | 241 | #define LL_BDMA_CHANNEL_1 0x00000001U /*!< BDMA Channel 1 */ |
AnnaBridge | 172:65be27845400 | 242 | #define LL_BDMA_CHANNEL_2 0x00000002U /*!< BDMA Channel 2 */ |
AnnaBridge | 172:65be27845400 | 243 | #define LL_BDMA_CHANNEL_3 0x00000003U /*!< BDMA Channel 3 */ |
AnnaBridge | 172:65be27845400 | 244 | #define LL_BDMA_CHANNEL_4 0x00000004U /*!< BDMA Channel 4 */ |
AnnaBridge | 172:65be27845400 | 245 | #define LL_BDMA_CHANNEL_5 0x00000005U /*!< BDMA Channel 5 */ |
AnnaBridge | 172:65be27845400 | 246 | #define LL_BDMA_CHANNEL_6 0x00000006U /*!< BDMA Channel 6 */ |
AnnaBridge | 172:65be27845400 | 247 | #define LL_BDMA_CHANNEL_7 0x00000007U /*!< BDMA Channel 7 */ |
AnnaBridge | 172:65be27845400 | 248 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 172:65be27845400 | 249 | #define LL_BDMA_CHANNEL_ALL 0xFFFF0000U /*!< BDMA Channel all (used only for function @ref LL_BDMA_DeInit(). */ |
AnnaBridge | 172:65be27845400 | 250 | #endif /*USE_FULL_LL_DRIVER*/ |
AnnaBridge | 172:65be27845400 | 251 | /** |
AnnaBridge | 172:65be27845400 | 252 | * @} |
AnnaBridge | 172:65be27845400 | 253 | */ |
AnnaBridge | 172:65be27845400 | 254 | |
AnnaBridge | 172:65be27845400 | 255 | /** @defgroup BDMA_LL_EC_DIRECTION Transfer Direction |
AnnaBridge | 172:65be27845400 | 256 | * @{ |
AnnaBridge | 172:65be27845400 | 257 | */ |
AnnaBridge | 172:65be27845400 | 258 | #define LL_BDMA_DIRECTION_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direction */ |
AnnaBridge | 172:65be27845400 | 259 | #define LL_BDMA_DIRECTION_MEMORY_TO_PERIPH BDMA_CCR_DIR /*!< Memory to peripheral direction */ |
AnnaBridge | 172:65be27845400 | 260 | #define LL_BDMA_DIRECTION_MEMORY_TO_MEMORY BDMA_CCR_MEM2MEM /*!< Memory to memory direction */ |
AnnaBridge | 172:65be27845400 | 261 | /** |
AnnaBridge | 172:65be27845400 | 262 | * @} |
AnnaBridge | 172:65be27845400 | 263 | */ |
AnnaBridge | 172:65be27845400 | 264 | |
AnnaBridge | 172:65be27845400 | 265 | /** @defgroup BDMA_LL_EC_MODE Transfer mode |
AnnaBridge | 172:65be27845400 | 266 | * @{ |
AnnaBridge | 172:65be27845400 | 267 | */ |
AnnaBridge | 172:65be27845400 | 268 | #define LL_BDMA_MODE_NORMAL 0x00000000U /*!< Normal Mode */ |
AnnaBridge | 172:65be27845400 | 269 | #define LL_BDMA_MODE_CIRCULAR BDMA_CCR_CIRC /*!< Circular Mode */ |
AnnaBridge | 172:65be27845400 | 270 | /** |
AnnaBridge | 172:65be27845400 | 271 | * @} |
AnnaBridge | 172:65be27845400 | 272 | */ |
AnnaBridge | 172:65be27845400 | 273 | |
AnnaBridge | 172:65be27845400 | 274 | /** @defgroup DMA_LL_EC_DOUBLEBUFFER_MODE DOUBLE BUFFER MODE |
AnnaBridge | 172:65be27845400 | 275 | * @{ |
AnnaBridge | 172:65be27845400 | 276 | */ |
AnnaBridge | 172:65be27845400 | 277 | #define LL_BDMA_DOUBLEBUFFER_MODE_DISABLE 0x00000000U /*!< Disable double buffering mode */ |
AnnaBridge | 172:65be27845400 | 278 | #define LL_BDMA_DOUBLEBUFFER_MODE_ENABLE BDMA_CCR_DBM /*!< Enable double buffering mode */ |
AnnaBridge | 172:65be27845400 | 279 | /** |
AnnaBridge | 172:65be27845400 | 280 | * @} |
AnnaBridge | 172:65be27845400 | 281 | */ |
AnnaBridge | 172:65be27845400 | 282 | |
AnnaBridge | 172:65be27845400 | 283 | /** @defgroup BDMA_LL_EC_PERIPH Peripheral increment mode |
AnnaBridge | 172:65be27845400 | 284 | * @{ |
AnnaBridge | 172:65be27845400 | 285 | */ |
AnnaBridge | 172:65be27845400 | 286 | #define LL_BDMA_PERIPH_INCREMENT BDMA_CCR_PINC /*!< Peripheral increment mode Enable */ |
AnnaBridge | 172:65be27845400 | 287 | #define LL_BDMA_PERIPH_NOINCREMENT 0x00000000U /*!< Peripheral increment mode Disable */ |
AnnaBridge | 172:65be27845400 | 288 | /** |
AnnaBridge | 172:65be27845400 | 289 | * @} |
AnnaBridge | 172:65be27845400 | 290 | */ |
AnnaBridge | 172:65be27845400 | 291 | |
AnnaBridge | 172:65be27845400 | 292 | /** @defgroup BDMA_LL_EC_MEMORY Memory increment mode |
AnnaBridge | 172:65be27845400 | 293 | * @{ |
AnnaBridge | 172:65be27845400 | 294 | */ |
AnnaBridge | 172:65be27845400 | 295 | #define LL_BDMA_MEMORY_INCREMENT BDMA_CCR_MINC /*!< Memory increment mode Enable */ |
AnnaBridge | 172:65be27845400 | 296 | #define LL_BDMA_MEMORY_NOINCREMENT 0x00000000U /*!< Memory increment mode Disable */ |
AnnaBridge | 172:65be27845400 | 297 | /** |
AnnaBridge | 172:65be27845400 | 298 | * @} |
AnnaBridge | 172:65be27845400 | 299 | */ |
AnnaBridge | 172:65be27845400 | 300 | |
AnnaBridge | 172:65be27845400 | 301 | /** @defgroup BDMA_LL_EC_PDATAALIGN Peripheral data alignment |
AnnaBridge | 172:65be27845400 | 302 | * @{ |
AnnaBridge | 172:65be27845400 | 303 | */ |
AnnaBridge | 172:65be27845400 | 304 | #define LL_BDMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment : Byte */ |
AnnaBridge | 172:65be27845400 | 305 | #define LL_BDMA_PDATAALIGN_HALFWORD BDMA_CCR_PSIZE_0 /*!< Peripheral data alignment : HalfWord */ |
AnnaBridge | 172:65be27845400 | 306 | #define LL_BDMA_PDATAALIGN_WORD BDMA_CCR_PSIZE_1 /*!< Peripheral data alignment : Word */ |
AnnaBridge | 172:65be27845400 | 307 | /** |
AnnaBridge | 172:65be27845400 | 308 | * @} |
AnnaBridge | 172:65be27845400 | 309 | */ |
AnnaBridge | 172:65be27845400 | 310 | |
AnnaBridge | 172:65be27845400 | 311 | /** @defgroup BDMA_LL_EC_MDATAALIGN Memory data alignment |
AnnaBridge | 172:65be27845400 | 312 | * @{ |
AnnaBridge | 172:65be27845400 | 313 | */ |
AnnaBridge | 172:65be27845400 | 314 | #define LL_BDMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment : Byte */ |
AnnaBridge | 172:65be27845400 | 315 | #define LL_BDMA_MDATAALIGN_HALFWORD BDMA_CCR_MSIZE_0 /*!< Memory data alignment : HalfWord */ |
AnnaBridge | 172:65be27845400 | 316 | #define LL_BDMA_MDATAALIGN_WORD BDMA_CCR_MSIZE_1 /*!< Memory data alignment : Word */ |
AnnaBridge | 172:65be27845400 | 317 | /** |
AnnaBridge | 172:65be27845400 | 318 | * @} |
AnnaBridge | 172:65be27845400 | 319 | */ |
AnnaBridge | 172:65be27845400 | 320 | |
AnnaBridge | 172:65be27845400 | 321 | /** @defgroup BDMA_LL_EC_PRIORITY Transfer Priority level |
AnnaBridge | 172:65be27845400 | 322 | * @{ |
AnnaBridge | 172:65be27845400 | 323 | */ |
AnnaBridge | 172:65be27845400 | 324 | #define LL_BDMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low */ |
AnnaBridge | 172:65be27845400 | 325 | #define LL_BDMA_PRIORITY_MEDIUM BDMA_CCR_PL_0 /*!< Priority level : Medium */ |
AnnaBridge | 172:65be27845400 | 326 | #define LL_BDMA_PRIORITY_HIGH BDMA_CCR_PL_1 /*!< Priority level : High */ |
AnnaBridge | 172:65be27845400 | 327 | #define LL_BDMA_PRIORITY_VERYHIGH BDMA_CCR_PL /*!< Priority level : Very_High */ |
AnnaBridge | 172:65be27845400 | 328 | /** |
AnnaBridge | 172:65be27845400 | 329 | * @} |
AnnaBridge | 172:65be27845400 | 330 | */ |
AnnaBridge | 172:65be27845400 | 331 | |
AnnaBridge | 172:65be27845400 | 332 | /** @defgroup DMA_LL_EC_CURRENTTARGETMEM CURRENTTARGETMEM |
AnnaBridge | 172:65be27845400 | 333 | * @{ |
AnnaBridge | 172:65be27845400 | 334 | */ |
AnnaBridge | 172:65be27845400 | 335 | #define LL_BDMA_CURRENTTARGETMEM0 0x00000000U /*!< Set CurrentTarget Memory to Memory 0 */ |
AnnaBridge | 172:65be27845400 | 336 | #define LL_BDMA_CURRENTTARGETMEM1 BDMA_CCR_CT /*!< Set CurrentTarget Memory to Memory 1 */ |
AnnaBridge | 172:65be27845400 | 337 | /** |
AnnaBridge | 172:65be27845400 | 338 | * @} |
AnnaBridge | 172:65be27845400 | 339 | */ |
AnnaBridge | 172:65be27845400 | 340 | |
AnnaBridge | 172:65be27845400 | 341 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 342 | /** @defgroup BDMA_LL_Exported_Macros BDMA Exported Macros |
AnnaBridge | 172:65be27845400 | 343 | * @{ |
AnnaBridge | 172:65be27845400 | 344 | */ |
AnnaBridge | 172:65be27845400 | 345 | |
AnnaBridge | 172:65be27845400 | 346 | /** @defgroup BDMA_LL_EM_WRITE_READ Common Write and read registers macros |
AnnaBridge | 172:65be27845400 | 347 | * @{ |
AnnaBridge | 172:65be27845400 | 348 | */ |
AnnaBridge | 172:65be27845400 | 349 | /** |
AnnaBridge | 172:65be27845400 | 350 | * @brief Write a value in BDMA register |
AnnaBridge | 172:65be27845400 | 351 | * @param __INSTANCE__ BDMA Instance |
AnnaBridge | 172:65be27845400 | 352 | * @param __REG__ Register to be written |
AnnaBridge | 172:65be27845400 | 353 | * @param __VALUE__ Value to be written in the register |
AnnaBridge | 172:65be27845400 | 354 | * @retval None |
AnnaBridge | 172:65be27845400 | 355 | */ |
AnnaBridge | 172:65be27845400 | 356 | #define LL_BDMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__)) |
AnnaBridge | 172:65be27845400 | 357 | |
AnnaBridge | 172:65be27845400 | 358 | /** |
AnnaBridge | 172:65be27845400 | 359 | * @brief Read a value in BDMA register |
AnnaBridge | 172:65be27845400 | 360 | * @param __INSTANCE__ BDMA Instance |
AnnaBridge | 172:65be27845400 | 361 | * @param __REG__ Register to be read |
AnnaBridge | 172:65be27845400 | 362 | * @retval Register value |
AnnaBridge | 172:65be27845400 | 363 | */ |
AnnaBridge | 172:65be27845400 | 364 | #define LL_BDMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
AnnaBridge | 172:65be27845400 | 365 | /** |
AnnaBridge | 172:65be27845400 | 366 | * @} |
AnnaBridge | 172:65be27845400 | 367 | */ |
AnnaBridge | 172:65be27845400 | 368 | |
AnnaBridge | 172:65be27845400 | 369 | /** @defgroup BDMA_LL_EM_CONVERT_DMAxCHANNELy Convert BDMAxChannely |
AnnaBridge | 172:65be27845400 | 370 | * @{ |
AnnaBridge | 172:65be27845400 | 371 | */ |
AnnaBridge | 172:65be27845400 | 372 | /** |
AnnaBridge | 172:65be27845400 | 373 | * @brief Convert BDMAx_Channely into BDMAx |
AnnaBridge | 172:65be27845400 | 374 | * @param __CHANNEL_INSTANCE__ BDMAx_Channely |
AnnaBridge | 172:65be27845400 | 375 | * @retval BDMAx |
AnnaBridge | 172:65be27845400 | 376 | */ |
AnnaBridge | 172:65be27845400 | 377 | #define __LL_BDMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (BDMA) |
AnnaBridge | 172:65be27845400 | 378 | |
AnnaBridge | 172:65be27845400 | 379 | /** |
AnnaBridge | 172:65be27845400 | 380 | * @brief Convert BDMAx_Channely into LL_BDMA_CHANNEL_y |
AnnaBridge | 172:65be27845400 | 381 | * @param __CHANNEL_INSTANCE__ BDMAx_Channely |
AnnaBridge | 172:65be27845400 | 382 | * @retval LL_BDMA_CHANNEL_y |
AnnaBridge | 172:65be27845400 | 383 | */ |
AnnaBridge | 172:65be27845400 | 384 | #define __LL_BDMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \ |
AnnaBridge | 172:65be27845400 | 385 | (((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)BDMA_Channel0)) ? LL_BDMA_CHANNEL_0 : \ |
AnnaBridge | 172:65be27845400 | 386 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)BDMA_Channel1)) ? LL_BDMA_CHANNEL_1 : \ |
AnnaBridge | 172:65be27845400 | 387 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)BDMA_Channel2)) ? LL_BDMA_CHANNEL_2 : \ |
AnnaBridge | 172:65be27845400 | 388 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)BDMA_Channel3)) ? LL_BDMA_CHANNEL_3 : \ |
AnnaBridge | 172:65be27845400 | 389 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)BDMA_Channel4)) ? LL_BDMA_CHANNEL_4 : \ |
AnnaBridge | 172:65be27845400 | 390 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)BDMA_Channel5)) ? LL_BDMA_CHANNEL_5 : \ |
AnnaBridge | 172:65be27845400 | 391 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)BDMA_Channel6)) ? LL_BDMA_CHANNEL_6 : \ |
AnnaBridge | 172:65be27845400 | 392 | LL_BDMA_CHANNEL_7) |
AnnaBridge | 172:65be27845400 | 393 | |
AnnaBridge | 172:65be27845400 | 394 | /** |
AnnaBridge | 172:65be27845400 | 395 | * @brief Convert BDMA Instance BDMAx and LL_BDMA_CHANNEL_y into BDMAx_Channely |
AnnaBridge | 172:65be27845400 | 396 | * @param __BDMA_INSTANCE__ BDMAx |
AnnaBridge | 172:65be27845400 | 397 | * @param __CHANNEL__ LL_BDMA_CHANNEL_y |
AnnaBridge | 172:65be27845400 | 398 | * @retval BDMAx_Channely |
AnnaBridge | 172:65be27845400 | 399 | */ |
AnnaBridge | 172:65be27845400 | 400 | #define __LL_BDMA_GET_CHANNEL_INSTANCE(__BDMA_INSTANCE__, __CHANNEL__) \ |
AnnaBridge | 172:65be27845400 | 401 | ((((uint32_t)(__BDMA_INSTANCE__) == ((uint32_t)BDMA)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_BDMA_CHANNEL_0))) ? BDMA_Channel0 : \ |
AnnaBridge | 172:65be27845400 | 402 | (((uint32_t)(__BDMA_INSTANCE__) == ((uint32_t)BDMA)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_BDMA_CHANNEL_1))) ? BDMA_Channel1 : \ |
AnnaBridge | 172:65be27845400 | 403 | (((uint32_t)(__BDMA_INSTANCE__) == ((uint32_t)BDMA)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_BDMA_CHANNEL_2))) ? BDMA_Channel2 : \ |
AnnaBridge | 172:65be27845400 | 404 | (((uint32_t)(__BDMA_INSTANCE__) == ((uint32_t)BDMA)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_BDMA_CHANNEL_3))) ? BDMA_Channel3 : \ |
AnnaBridge | 172:65be27845400 | 405 | (((uint32_t)(__BDMA_INSTANCE__) == ((uint32_t)BDMA)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_BDMA_CHANNEL_4))) ? BDMA_Channel4 : \ |
AnnaBridge | 172:65be27845400 | 406 | (((uint32_t)(__BDMA_INSTANCE__) == ((uint32_t)BDMA)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_BDMA_CHANNEL_5))) ? BDMA_Channel5 : \ |
AnnaBridge | 172:65be27845400 | 407 | (((uint32_t)(__BDMA_INSTANCE__) == ((uint32_t)BDMA)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_BDMA_CHANNEL_6))) ? BDMA_Channel6 : \ |
AnnaBridge | 172:65be27845400 | 408 | BDMA_Channel7) |
AnnaBridge | 172:65be27845400 | 409 | |
AnnaBridge | 172:65be27845400 | 410 | |
AnnaBridge | 172:65be27845400 | 411 | /** |
AnnaBridge | 172:65be27845400 | 412 | * @} |
AnnaBridge | 172:65be27845400 | 413 | */ |
AnnaBridge | 172:65be27845400 | 414 | |
AnnaBridge | 172:65be27845400 | 415 | /** |
AnnaBridge | 172:65be27845400 | 416 | * @} |
AnnaBridge | 172:65be27845400 | 417 | */ |
AnnaBridge | 172:65be27845400 | 418 | |
AnnaBridge | 172:65be27845400 | 419 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 420 | /** @defgroup BDMA_LL_Exported_Functions BDMA Exported Functions |
AnnaBridge | 172:65be27845400 | 421 | * @{ |
AnnaBridge | 172:65be27845400 | 422 | */ |
AnnaBridge | 172:65be27845400 | 423 | |
AnnaBridge | 172:65be27845400 | 424 | /** @defgroup BDMA_LL_EF_Configuration Configuration |
AnnaBridge | 172:65be27845400 | 425 | * @{ |
AnnaBridge | 172:65be27845400 | 426 | */ |
AnnaBridge | 172:65be27845400 | 427 | /** |
AnnaBridge | 172:65be27845400 | 428 | * @brief Enable BDMA channel. |
AnnaBridge | 172:65be27845400 | 429 | * @rmtoll CCR EN LL_BDMA_EnableChannel |
AnnaBridge | 172:65be27845400 | 430 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 431 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 432 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 433 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 434 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 435 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 436 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 437 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 438 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 439 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 440 | * @retval None |
AnnaBridge | 172:65be27845400 | 441 | */ |
AnnaBridge | 172:65be27845400 | 442 | __STATIC_INLINE void LL_BDMA_EnableChannel(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 443 | { |
AnnaBridge | 172:65be27845400 | 444 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 445 | |
AnnaBridge | 172:65be27845400 | 446 | SET_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_EN); |
AnnaBridge | 172:65be27845400 | 447 | } |
AnnaBridge | 172:65be27845400 | 448 | |
AnnaBridge | 172:65be27845400 | 449 | /** |
AnnaBridge | 172:65be27845400 | 450 | * @brief Disable BDMA channel. |
AnnaBridge | 172:65be27845400 | 451 | * @rmtoll CCR EN LL_BDMA_DisableChannel |
AnnaBridge | 172:65be27845400 | 452 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 453 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 454 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 455 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 456 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 457 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 458 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 459 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 460 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 461 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 462 | * @retval None |
AnnaBridge | 172:65be27845400 | 463 | */ |
AnnaBridge | 172:65be27845400 | 464 | __STATIC_INLINE void LL_BDMA_DisableChannel(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 465 | { |
AnnaBridge | 172:65be27845400 | 466 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 467 | |
AnnaBridge | 172:65be27845400 | 468 | CLEAR_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_EN); |
AnnaBridge | 172:65be27845400 | 469 | } |
AnnaBridge | 172:65be27845400 | 470 | |
AnnaBridge | 172:65be27845400 | 471 | /** |
AnnaBridge | 172:65be27845400 | 472 | * @brief Check if BDMA channel is enabled or disabled. |
AnnaBridge | 172:65be27845400 | 473 | * @rmtoll CCR EN LL_BDMA_IsEnabledChannel |
AnnaBridge | 172:65be27845400 | 474 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 475 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 476 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 477 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 478 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 479 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 480 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 481 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 482 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 483 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 484 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 485 | */ |
AnnaBridge | 172:65be27845400 | 486 | __STATIC_INLINE uint32_t LL_BDMA_IsEnabledChannel(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 487 | { |
AnnaBridge | 172:65be27845400 | 488 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 489 | |
AnnaBridge | 172:65be27845400 | 490 | return ((READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_EN) == (BDMA_CCR_EN)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 491 | } |
AnnaBridge | 172:65be27845400 | 492 | |
AnnaBridge | 172:65be27845400 | 493 | /** |
AnnaBridge | 172:65be27845400 | 494 | * @brief Configure all parameters link to BDMA transfer. |
AnnaBridge | 172:65be27845400 | 495 | * @rmtoll CCR DIR LL_BDMA_ConfigTransfer\n |
AnnaBridge | 172:65be27845400 | 496 | * CCR MEM2MEM LL_BDMA_ConfigTransfer\n |
AnnaBridge | 172:65be27845400 | 497 | * CCR CIRC LL_BDMA_ConfigTransfer\n |
AnnaBridge | 172:65be27845400 | 498 | * CCR PINC LL_BDMA_ConfigTransfer\n |
AnnaBridge | 172:65be27845400 | 499 | * CCR MINC LL_BDMA_ConfigTransfer\n |
AnnaBridge | 172:65be27845400 | 500 | * CCR PSIZE LL_BDMA_ConfigTransfer\n |
AnnaBridge | 172:65be27845400 | 501 | * CCR MSIZE LL_BDMA_ConfigTransfer\n |
AnnaBridge | 172:65be27845400 | 502 | * CCR PL LL_BDMA_ConfigTransfer |
AnnaBridge | 172:65be27845400 | 503 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 504 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 505 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 506 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 507 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 508 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 509 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 510 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 511 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 512 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 513 | * @param Configuration This parameter must be a combination of all the following values: |
AnnaBridge | 172:65be27845400 | 514 | * @arg @ref LL_BDMA_DIRECTION_PERIPH_TO_MEMORY or @ref LL_BDMA_DIRECTION_MEMORY_TO_PERIPH or @ref LL_BDMA_DIRECTION_MEMORY_TO_MEMORY |
AnnaBridge | 172:65be27845400 | 515 | * @arg @ref LL_BDMA_MODE_NORMAL or @ref LL_BDMA_MODE_CIRCULAR |
AnnaBridge | 172:65be27845400 | 516 | * @arg @ref LL_BDMA_PERIPH_INCREMENT or @ref LL_BDMA_PERIPH_NOINCREMENT |
AnnaBridge | 172:65be27845400 | 517 | * @arg @ref LL_BDMA_MEMORY_INCREMENT or @ref LL_BDMA_MEMORY_NOINCREMENT |
AnnaBridge | 172:65be27845400 | 518 | * @arg @ref LL_BDMA_PDATAALIGN_BYTE or @ref LL_BDMA_PDATAALIGN_HALFWORD or @ref LL_BDMA_PDATAALIGN_WORD |
AnnaBridge | 172:65be27845400 | 519 | * @arg @ref LL_BDMA_MDATAALIGN_BYTE or @ref LL_BDMA_MDATAALIGN_HALFWORD or @ref LL_BDMA_MDATAALIGN_WORD |
AnnaBridge | 172:65be27845400 | 520 | * @arg @ref LL_BDMA_PRIORITY_LOW or @ref LL_BDMA_PRIORITY_MEDIUM or @ref LL_BDMA_PRIORITY_HIGH or @ref LL_BDMA_PRIORITY_VERYHIGH |
AnnaBridge | 172:65be27845400 | 521 | * @retval None |
AnnaBridge | 172:65be27845400 | 522 | */ |
AnnaBridge | 172:65be27845400 | 523 | __STATIC_INLINE void LL_BDMA_ConfigTransfer(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t Configuration) |
AnnaBridge | 172:65be27845400 | 524 | { |
AnnaBridge | 172:65be27845400 | 525 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 526 | |
AnnaBridge | 172:65be27845400 | 527 | MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, |
AnnaBridge | 172:65be27845400 | 528 | BDMA_CCR_DIR | BDMA_CCR_MEM2MEM | BDMA_CCR_CIRC | BDMA_CCR_PINC | BDMA_CCR_MINC | BDMA_CCR_PSIZE | BDMA_CCR_MSIZE | BDMA_CCR_PL, |
AnnaBridge | 172:65be27845400 | 529 | Configuration); |
AnnaBridge | 172:65be27845400 | 530 | } |
AnnaBridge | 172:65be27845400 | 531 | |
AnnaBridge | 172:65be27845400 | 532 | /** |
AnnaBridge | 172:65be27845400 | 533 | * @brief Set Data transfer direction (read from peripheral or from memory). |
AnnaBridge | 172:65be27845400 | 534 | * @rmtoll CCR DIR LL_BDMA_SetDataTransferDirection\n |
AnnaBridge | 172:65be27845400 | 535 | * CCR MEM2MEM LL_BDMA_SetDataTransferDirection |
AnnaBridge | 172:65be27845400 | 536 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 537 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 538 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 539 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 540 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 541 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 542 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 543 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 544 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 545 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 546 | * @param Direction This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 547 | * @arg @ref LL_BDMA_DIRECTION_PERIPH_TO_MEMORY |
AnnaBridge | 172:65be27845400 | 548 | * @arg @ref LL_BDMA_DIRECTION_MEMORY_TO_PERIPH |
AnnaBridge | 172:65be27845400 | 549 | * @arg @ref LL_BDMA_DIRECTION_MEMORY_TO_MEMORY |
AnnaBridge | 172:65be27845400 | 550 | * @retval None |
AnnaBridge | 172:65be27845400 | 551 | */ |
AnnaBridge | 172:65be27845400 | 552 | __STATIC_INLINE void LL_BDMA_SetDataTransferDirection(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t Direction) |
AnnaBridge | 172:65be27845400 | 553 | { |
AnnaBridge | 172:65be27845400 | 554 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 555 | |
AnnaBridge | 172:65be27845400 | 556 | MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, |
AnnaBridge | 172:65be27845400 | 557 | BDMA_CCR_DIR | BDMA_CCR_MEM2MEM, Direction); |
AnnaBridge | 172:65be27845400 | 558 | } |
AnnaBridge | 172:65be27845400 | 559 | |
AnnaBridge | 172:65be27845400 | 560 | /** |
AnnaBridge | 172:65be27845400 | 561 | * @brief Get Data transfer direction (read from peripheral or from memory). |
AnnaBridge | 172:65be27845400 | 562 | * @rmtoll CCR DIR LL_BDMA_GetDataTransferDirection\n |
AnnaBridge | 172:65be27845400 | 563 | * CCR MEM2MEM LL_BDMA_GetDataTransferDirection |
AnnaBridge | 172:65be27845400 | 564 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 565 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 566 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 567 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 568 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 569 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 570 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 571 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 572 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 573 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 574 | * @retval Returned value can be one of the following values: |
AnnaBridge | 172:65be27845400 | 575 | * @arg @ref LL_BDMA_DIRECTION_PERIPH_TO_MEMORY |
AnnaBridge | 172:65be27845400 | 576 | * @arg @ref LL_BDMA_DIRECTION_MEMORY_TO_PERIPH |
AnnaBridge | 172:65be27845400 | 577 | * @arg @ref LL_BDMA_DIRECTION_MEMORY_TO_MEMORY |
AnnaBridge | 172:65be27845400 | 578 | */ |
AnnaBridge | 172:65be27845400 | 579 | __STATIC_INLINE uint32_t LL_BDMA_GetDataTransferDirection(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 580 | { |
AnnaBridge | 172:65be27845400 | 581 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 582 | |
AnnaBridge | 172:65be27845400 | 583 | return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, |
AnnaBridge | 172:65be27845400 | 584 | BDMA_CCR_DIR | BDMA_CCR_MEM2MEM)); |
AnnaBridge | 172:65be27845400 | 585 | } |
AnnaBridge | 172:65be27845400 | 586 | |
AnnaBridge | 172:65be27845400 | 587 | /** |
AnnaBridge | 172:65be27845400 | 588 | * @brief Set BDMA mode circular or normal. |
AnnaBridge | 172:65be27845400 | 589 | * @note The circular buffer mode cannot be used if the memory-to-memory |
AnnaBridge | 172:65be27845400 | 590 | * data transfer is configured on the selected Channel. |
AnnaBridge | 172:65be27845400 | 591 | * @rmtoll CCR CIRC LL_BDMA_SetMode |
AnnaBridge | 172:65be27845400 | 592 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 593 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 594 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 595 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 596 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 597 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 598 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 599 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 600 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 601 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 602 | * @param Mode This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 603 | * @arg @ref LL_BDMA_MODE_NORMAL |
AnnaBridge | 172:65be27845400 | 604 | * @arg @ref LL_BDMA_MODE_CIRCULAR |
AnnaBridge | 172:65be27845400 | 605 | * @retval None |
AnnaBridge | 172:65be27845400 | 606 | */ |
AnnaBridge | 172:65be27845400 | 607 | __STATIC_INLINE void LL_BDMA_SetMode(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t Mode) |
AnnaBridge | 172:65be27845400 | 608 | { |
AnnaBridge | 172:65be27845400 | 609 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 610 | |
AnnaBridge | 172:65be27845400 | 611 | MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_CIRC, |
AnnaBridge | 172:65be27845400 | 612 | Mode); |
AnnaBridge | 172:65be27845400 | 613 | } |
AnnaBridge | 172:65be27845400 | 614 | |
AnnaBridge | 172:65be27845400 | 615 | /** |
AnnaBridge | 172:65be27845400 | 616 | * @brief Get BDMA mode circular or normal. |
AnnaBridge | 172:65be27845400 | 617 | * @rmtoll CCR CIRC LL_BDMA_GetMode |
AnnaBridge | 172:65be27845400 | 618 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 619 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 620 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 621 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 622 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 623 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 624 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 625 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 626 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 627 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 628 | * @retval Returned value can be one of the following values: |
AnnaBridge | 172:65be27845400 | 629 | * @arg @ref LL_BDMA_MODE_NORMAL |
AnnaBridge | 172:65be27845400 | 630 | * @arg @ref LL_BDMA_MODE_CIRCULAR |
AnnaBridge | 172:65be27845400 | 631 | */ |
AnnaBridge | 172:65be27845400 | 632 | __STATIC_INLINE uint32_t LL_BDMA_GetMode(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 633 | { |
AnnaBridge | 172:65be27845400 | 634 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 635 | |
AnnaBridge | 172:65be27845400 | 636 | return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, |
AnnaBridge | 172:65be27845400 | 637 | BDMA_CCR_CIRC)); |
AnnaBridge | 172:65be27845400 | 638 | } |
AnnaBridge | 172:65be27845400 | 639 | |
AnnaBridge | 172:65be27845400 | 640 | /** |
AnnaBridge | 172:65be27845400 | 641 | * @brief Set Peripheral increment mode. |
AnnaBridge | 172:65be27845400 | 642 | * @rmtoll CCR PINC LL_BDMA_SetPeriphIncMode |
AnnaBridge | 172:65be27845400 | 643 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 644 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 645 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 646 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 647 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 648 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 649 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 650 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 651 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 652 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 653 | * @param PeriphOrM2MSrcIncMode This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 654 | * @arg @ref LL_BDMA_PERIPH_INCREMENT |
AnnaBridge | 172:65be27845400 | 655 | * @arg @ref LL_BDMA_PERIPH_NOINCREMENT |
AnnaBridge | 172:65be27845400 | 656 | * @retval None |
AnnaBridge | 172:65be27845400 | 657 | */ |
AnnaBridge | 172:65be27845400 | 658 | __STATIC_INLINE void LL_BDMA_SetPeriphIncMode(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode) |
AnnaBridge | 172:65be27845400 | 659 | { |
AnnaBridge | 172:65be27845400 | 660 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 661 | |
AnnaBridge | 172:65be27845400 | 662 | MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_PINC, |
AnnaBridge | 172:65be27845400 | 663 | PeriphOrM2MSrcIncMode); |
AnnaBridge | 172:65be27845400 | 664 | } |
AnnaBridge | 172:65be27845400 | 665 | |
AnnaBridge | 172:65be27845400 | 666 | /** |
AnnaBridge | 172:65be27845400 | 667 | * @brief Get Peripheral increment mode. |
AnnaBridge | 172:65be27845400 | 668 | * @rmtoll CCR PINC LL_BDMA_GetPeriphIncMode |
AnnaBridge | 172:65be27845400 | 669 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 670 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 671 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 672 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 673 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 674 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 675 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 676 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 677 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 678 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 679 | * @retval Returned value can be one of the following values: |
AnnaBridge | 172:65be27845400 | 680 | * @arg @ref LL_BDMA_PERIPH_INCREMENT |
AnnaBridge | 172:65be27845400 | 681 | * @arg @ref LL_BDMA_PERIPH_NOINCREMENT |
AnnaBridge | 172:65be27845400 | 682 | */ |
AnnaBridge | 172:65be27845400 | 683 | __STATIC_INLINE uint32_t LL_BDMA_GetPeriphIncMode(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 684 | { |
AnnaBridge | 172:65be27845400 | 685 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 686 | |
AnnaBridge | 172:65be27845400 | 687 | return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, |
AnnaBridge | 172:65be27845400 | 688 | BDMA_CCR_PINC)); |
AnnaBridge | 172:65be27845400 | 689 | } |
AnnaBridge | 172:65be27845400 | 690 | |
AnnaBridge | 172:65be27845400 | 691 | /** |
AnnaBridge | 172:65be27845400 | 692 | * @brief Set Memory increment mode. |
AnnaBridge | 172:65be27845400 | 693 | * @rmtoll CCR MINC LL_BDMA_SetMemoryIncMode |
AnnaBridge | 172:65be27845400 | 694 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 695 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 696 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 697 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 698 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 699 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 700 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 701 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 702 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 703 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 704 | * @param MemoryOrM2MDstIncMode This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 705 | * @arg @ref LL_BDMA_MEMORY_INCREMENT |
AnnaBridge | 172:65be27845400 | 706 | * @arg @ref LL_BDMA_MEMORY_NOINCREMENT |
AnnaBridge | 172:65be27845400 | 707 | * @retval None |
AnnaBridge | 172:65be27845400 | 708 | */ |
AnnaBridge | 172:65be27845400 | 709 | __STATIC_INLINE void LL_BDMA_SetMemoryIncMode(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode) |
AnnaBridge | 172:65be27845400 | 710 | { |
AnnaBridge | 172:65be27845400 | 711 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 712 | |
AnnaBridge | 172:65be27845400 | 713 | MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_MINC, |
AnnaBridge | 172:65be27845400 | 714 | MemoryOrM2MDstIncMode); |
AnnaBridge | 172:65be27845400 | 715 | } |
AnnaBridge | 172:65be27845400 | 716 | |
AnnaBridge | 172:65be27845400 | 717 | /** |
AnnaBridge | 172:65be27845400 | 718 | * @brief Get Memory increment mode. |
AnnaBridge | 172:65be27845400 | 719 | * @rmtoll CCR MINC LL_BDMA_GetMemoryIncMode |
AnnaBridge | 172:65be27845400 | 720 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 721 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 722 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 723 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 724 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 725 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 726 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 727 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 728 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 729 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 730 | * @retval Returned value can be one of the following values: |
AnnaBridge | 172:65be27845400 | 731 | * @arg @ref LL_BDMA_MEMORY_INCREMENT |
AnnaBridge | 172:65be27845400 | 732 | * @arg @ref LL_BDMA_MEMORY_NOINCREMENT |
AnnaBridge | 172:65be27845400 | 733 | */ |
AnnaBridge | 172:65be27845400 | 734 | __STATIC_INLINE uint32_t LL_BDMA_GetMemoryIncMode(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 735 | { |
AnnaBridge | 172:65be27845400 | 736 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 737 | |
AnnaBridge | 172:65be27845400 | 738 | return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, |
AnnaBridge | 172:65be27845400 | 739 | BDMA_CCR_MINC)); |
AnnaBridge | 172:65be27845400 | 740 | } |
AnnaBridge | 172:65be27845400 | 741 | |
AnnaBridge | 172:65be27845400 | 742 | /** |
AnnaBridge | 172:65be27845400 | 743 | * @brief Set Peripheral size. |
AnnaBridge | 172:65be27845400 | 744 | * @rmtoll CCR PSIZE LL_BDMA_SetPeriphSize |
AnnaBridge | 172:65be27845400 | 745 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 746 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 747 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 748 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 749 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 750 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 751 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 752 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 753 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 754 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 755 | * @param PeriphOrM2MSrcDataSize This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 756 | * @arg @ref LL_BDMA_PDATAALIGN_BYTE |
AnnaBridge | 172:65be27845400 | 757 | * @arg @ref LL_BDMA_PDATAALIGN_HALFWORD |
AnnaBridge | 172:65be27845400 | 758 | * @arg @ref LL_BDMA_PDATAALIGN_WORD |
AnnaBridge | 172:65be27845400 | 759 | * @retval None |
AnnaBridge | 172:65be27845400 | 760 | */ |
AnnaBridge | 172:65be27845400 | 761 | __STATIC_INLINE void LL_BDMA_SetPeriphSize(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize) |
AnnaBridge | 172:65be27845400 | 762 | { |
AnnaBridge | 172:65be27845400 | 763 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 764 | |
AnnaBridge | 172:65be27845400 | 765 | MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_PSIZE, |
AnnaBridge | 172:65be27845400 | 766 | PeriphOrM2MSrcDataSize); |
AnnaBridge | 172:65be27845400 | 767 | } |
AnnaBridge | 172:65be27845400 | 768 | |
AnnaBridge | 172:65be27845400 | 769 | /** |
AnnaBridge | 172:65be27845400 | 770 | * @brief Get Peripheral size. |
AnnaBridge | 172:65be27845400 | 771 | * @rmtoll CCR PSIZE LL_BDMA_GetPeriphSize |
AnnaBridge | 172:65be27845400 | 772 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 773 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 774 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 775 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 776 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 777 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 778 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 779 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 780 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 781 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 782 | * @retval Returned value can be one of the following values: |
AnnaBridge | 172:65be27845400 | 783 | * @arg @ref LL_BDMA_PDATAALIGN_BYTE |
AnnaBridge | 172:65be27845400 | 784 | * @arg @ref LL_BDMA_PDATAALIGN_HALFWORD |
AnnaBridge | 172:65be27845400 | 785 | * @arg @ref LL_BDMA_PDATAALIGN_WORD |
AnnaBridge | 172:65be27845400 | 786 | */ |
AnnaBridge | 172:65be27845400 | 787 | __STATIC_INLINE uint32_t LL_BDMA_GetPeriphSize(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 788 | { |
AnnaBridge | 172:65be27845400 | 789 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 790 | |
AnnaBridge | 172:65be27845400 | 791 | return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, |
AnnaBridge | 172:65be27845400 | 792 | BDMA_CCR_PSIZE)); |
AnnaBridge | 172:65be27845400 | 793 | } |
AnnaBridge | 172:65be27845400 | 794 | |
AnnaBridge | 172:65be27845400 | 795 | /** |
AnnaBridge | 172:65be27845400 | 796 | * @brief Set Memory size. |
AnnaBridge | 172:65be27845400 | 797 | * @rmtoll CCR MSIZE LL_BDMA_SetMemorySize |
AnnaBridge | 172:65be27845400 | 798 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 799 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 800 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 801 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 802 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 803 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 804 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 805 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 806 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 807 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 808 | * @param MemoryOrM2MDstDataSize This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 809 | * @arg @ref LL_BDMA_MDATAALIGN_BYTE |
AnnaBridge | 172:65be27845400 | 810 | * @arg @ref LL_BDMA_MDATAALIGN_HALFWORD |
AnnaBridge | 172:65be27845400 | 811 | * @arg @ref LL_BDMA_MDATAALIGN_WORD |
AnnaBridge | 172:65be27845400 | 812 | * @retval None |
AnnaBridge | 172:65be27845400 | 813 | */ |
AnnaBridge | 172:65be27845400 | 814 | __STATIC_INLINE void LL_BDMA_SetMemorySize(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize) |
AnnaBridge | 172:65be27845400 | 815 | { |
AnnaBridge | 172:65be27845400 | 816 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 817 | |
AnnaBridge | 172:65be27845400 | 818 | MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_MSIZE, |
AnnaBridge | 172:65be27845400 | 819 | MemoryOrM2MDstDataSize); |
AnnaBridge | 172:65be27845400 | 820 | } |
AnnaBridge | 172:65be27845400 | 821 | |
AnnaBridge | 172:65be27845400 | 822 | /** |
AnnaBridge | 172:65be27845400 | 823 | * @brief Get Memory size. |
AnnaBridge | 172:65be27845400 | 824 | * @rmtoll CCR MSIZE LL_BDMA_GetMemorySize |
AnnaBridge | 172:65be27845400 | 825 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 826 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 827 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 828 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 829 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 830 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 831 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 832 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 833 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 834 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 835 | * @retval Returned value can be one of the following values: |
AnnaBridge | 172:65be27845400 | 836 | * @arg @ref LL_BDMA_MDATAALIGN_BYTE |
AnnaBridge | 172:65be27845400 | 837 | * @arg @ref LL_BDMA_MDATAALIGN_HALFWORD |
AnnaBridge | 172:65be27845400 | 838 | * @arg @ref LL_BDMA_MDATAALIGN_WORD |
AnnaBridge | 172:65be27845400 | 839 | */ |
AnnaBridge | 172:65be27845400 | 840 | __STATIC_INLINE uint32_t LL_BDMA_GetMemorySize(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 841 | { |
AnnaBridge | 172:65be27845400 | 842 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 843 | |
AnnaBridge | 172:65be27845400 | 844 | return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, |
AnnaBridge | 172:65be27845400 | 845 | BDMA_CCR_MSIZE)); |
AnnaBridge | 172:65be27845400 | 846 | } |
AnnaBridge | 172:65be27845400 | 847 | |
AnnaBridge | 172:65be27845400 | 848 | /** |
AnnaBridge | 172:65be27845400 | 849 | * @brief Set Channel priority level. |
AnnaBridge | 172:65be27845400 | 850 | * @rmtoll CCR PL LL_BDMA_SetChannelPriorityLevel |
AnnaBridge | 172:65be27845400 | 851 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 852 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 853 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 854 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 855 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 856 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 857 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 858 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 859 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 860 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 861 | * @param Priority This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 862 | * @arg @ref LL_BDMA_PRIORITY_LOW |
AnnaBridge | 172:65be27845400 | 863 | * @arg @ref LL_BDMA_PRIORITY_MEDIUM |
AnnaBridge | 172:65be27845400 | 864 | * @arg @ref LL_BDMA_PRIORITY_HIGH |
AnnaBridge | 172:65be27845400 | 865 | * @arg @ref LL_BDMA_PRIORITY_VERYHIGH |
AnnaBridge | 172:65be27845400 | 866 | * @retval None |
AnnaBridge | 172:65be27845400 | 867 | */ |
AnnaBridge | 172:65be27845400 | 868 | __STATIC_INLINE void LL_BDMA_SetChannelPriorityLevel(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t Priority) |
AnnaBridge | 172:65be27845400 | 869 | { |
AnnaBridge | 172:65be27845400 | 870 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 871 | |
AnnaBridge | 172:65be27845400 | 872 | MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_PL, |
AnnaBridge | 172:65be27845400 | 873 | Priority); |
AnnaBridge | 172:65be27845400 | 874 | } |
AnnaBridge | 172:65be27845400 | 875 | |
AnnaBridge | 172:65be27845400 | 876 | /** |
AnnaBridge | 172:65be27845400 | 877 | * @brief Get Channel priority level. |
AnnaBridge | 172:65be27845400 | 878 | * @rmtoll CCR PL LL_BDMA_GetChannelPriorityLevel |
AnnaBridge | 172:65be27845400 | 879 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 880 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 881 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 882 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 883 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 884 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 885 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 886 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 887 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 888 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 889 | * @retval Returned value can be one of the following values: |
AnnaBridge | 172:65be27845400 | 890 | * @arg @ref LL_BDMA_PRIORITY_LOW |
AnnaBridge | 172:65be27845400 | 891 | * @arg @ref LL_BDMA_PRIORITY_MEDIUM |
AnnaBridge | 172:65be27845400 | 892 | * @arg @ref LL_BDMA_PRIORITY_HIGH |
AnnaBridge | 172:65be27845400 | 893 | * @arg @ref LL_BDMA_PRIORITY_VERYHIGH |
AnnaBridge | 172:65be27845400 | 894 | */ |
AnnaBridge | 172:65be27845400 | 895 | __STATIC_INLINE uint32_t LL_BDMA_GetChannelPriorityLevel(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 896 | { |
AnnaBridge | 172:65be27845400 | 897 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 898 | |
AnnaBridge | 172:65be27845400 | 899 | return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, |
AnnaBridge | 172:65be27845400 | 900 | BDMA_CCR_PL)); |
AnnaBridge | 172:65be27845400 | 901 | } |
AnnaBridge | 172:65be27845400 | 902 | |
AnnaBridge | 172:65be27845400 | 903 | /** |
AnnaBridge | 172:65be27845400 | 904 | * @brief Set Number of data to transfer. |
AnnaBridge | 172:65be27845400 | 905 | * @note This action has no effect if |
AnnaBridge | 172:65be27845400 | 906 | * channel is enabled. |
AnnaBridge | 172:65be27845400 | 907 | * @rmtoll CNDTR NDT LL_BDMA_SetDataLength |
AnnaBridge | 172:65be27845400 | 908 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 909 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 910 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 911 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 912 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 913 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 914 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 915 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 916 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 917 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 918 | * @param NbData Between Min_Data = 0 and Max_Data = 0x0000FFFF |
AnnaBridge | 172:65be27845400 | 919 | * @retval None |
AnnaBridge | 172:65be27845400 | 920 | */ |
AnnaBridge | 172:65be27845400 | 921 | __STATIC_INLINE void LL_BDMA_SetDataLength(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t NbData) |
AnnaBridge | 172:65be27845400 | 922 | { |
AnnaBridge | 172:65be27845400 | 923 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 924 | |
AnnaBridge | 172:65be27845400 | 925 | MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CNDTR, |
AnnaBridge | 172:65be27845400 | 926 | BDMA_CNDTR_NDT, NbData); |
AnnaBridge | 172:65be27845400 | 927 | } |
AnnaBridge | 172:65be27845400 | 928 | |
AnnaBridge | 172:65be27845400 | 929 | /** |
AnnaBridge | 172:65be27845400 | 930 | * @brief Get Number of data to transfer. |
AnnaBridge | 172:65be27845400 | 931 | * @note Once the channel is enabled, the return value indicate the |
AnnaBridge | 172:65be27845400 | 932 | * remaining bytes to be transmitted. |
AnnaBridge | 172:65be27845400 | 933 | * @rmtoll CNDTR NDT LL_BDMA_GetDataLength |
AnnaBridge | 172:65be27845400 | 934 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 935 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 936 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 937 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 938 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 939 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 940 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 941 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 942 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 943 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 944 | * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 945 | */ |
AnnaBridge | 172:65be27845400 | 946 | __STATIC_INLINE uint32_t LL_BDMA_GetDataLength(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 947 | { |
AnnaBridge | 172:65be27845400 | 948 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 949 | |
AnnaBridge | 172:65be27845400 | 950 | return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CNDTR, |
AnnaBridge | 172:65be27845400 | 951 | BDMA_CNDTR_NDT)); |
AnnaBridge | 172:65be27845400 | 952 | } |
AnnaBridge | 172:65be27845400 | 953 | |
AnnaBridge | 172:65be27845400 | 954 | /** |
AnnaBridge | 172:65be27845400 | 955 | * @brief Set Current target (only in double buffer mode) to Memory 1 or Memory 0. |
AnnaBridge | 172:65be27845400 | 956 | * @rmtoll CR CT LL_BDMA_SetCurrentTargetMem |
AnnaBridge | 172:65be27845400 | 957 | * @param BDMAx BDMAx Instance |
AnnaBridge | 172:65be27845400 | 958 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 959 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 960 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 961 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 962 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 963 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 964 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 965 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 966 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 967 | * @param CurrentMemory This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 968 | * @arg @ref LL_BDMA_CURRENTTARGETMEM0 |
AnnaBridge | 172:65be27845400 | 969 | * @arg @ref LL_BDMA_CURRENTTARGETMEM1 |
AnnaBridge | 172:65be27845400 | 970 | * @retval None |
AnnaBridge | 172:65be27845400 | 971 | */ |
AnnaBridge | 172:65be27845400 | 972 | __STATIC_INLINE void LL_BDMA_SetCurrentTargetMem(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t CurrentMemory) |
AnnaBridge | 172:65be27845400 | 973 | { |
AnnaBridge | 172:65be27845400 | 974 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 975 | |
AnnaBridge | 172:65be27845400 | 976 | MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_CT, CurrentMemory); |
AnnaBridge | 172:65be27845400 | 977 | } |
AnnaBridge | 172:65be27845400 | 978 | |
AnnaBridge | 172:65be27845400 | 979 | /** |
AnnaBridge | 172:65be27845400 | 980 | * @brief Set Current target (only in double buffer mode) to Memory 1 or Memory 0. |
AnnaBridge | 172:65be27845400 | 981 | * @rmtoll CR CT LL_BDMA_GetCurrentTargetMem |
AnnaBridge | 172:65be27845400 | 982 | * @param BDMAx BDMAx Instance |
AnnaBridge | 172:65be27845400 | 983 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 984 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 985 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 986 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 987 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 988 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 989 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 990 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 991 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 992 | * @retval Returned value can be one of the following values: |
AnnaBridge | 172:65be27845400 | 993 | * @arg @ref LL_BDMA_CURRENTTARGETMEM0 |
AnnaBridge | 172:65be27845400 | 994 | * @arg @ref LL_BDMA_CURRENTTARGETMEM1 |
AnnaBridge | 172:65be27845400 | 995 | */ |
AnnaBridge | 172:65be27845400 | 996 | __STATIC_INLINE uint32_t LL_BDMA_GetCurrentTargetMem(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 997 | { |
AnnaBridge | 172:65be27845400 | 998 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 999 | |
AnnaBridge | 172:65be27845400 | 1000 | return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_CT)); |
AnnaBridge | 172:65be27845400 | 1001 | } |
AnnaBridge | 172:65be27845400 | 1002 | |
AnnaBridge | 172:65be27845400 | 1003 | /** |
AnnaBridge | 172:65be27845400 | 1004 | * @brief Enable the double buffer mode. |
AnnaBridge | 172:65be27845400 | 1005 | * @rmtoll CR DBM LL_BDMA_EnableDoubleBufferMode |
AnnaBridge | 172:65be27845400 | 1006 | * @param BDMAx BDMAx Instance |
AnnaBridge | 172:65be27845400 | 1007 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1008 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1009 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1010 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1011 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1012 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1013 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1014 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1015 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1016 | * @retval None |
AnnaBridge | 172:65be27845400 | 1017 | */ |
AnnaBridge | 172:65be27845400 | 1018 | __STATIC_INLINE void LL_BDMA_EnableDoubleBufferMode(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 1019 | { |
AnnaBridge | 172:65be27845400 | 1020 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1021 | |
AnnaBridge | 172:65be27845400 | 1022 | SET_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_DBM); |
AnnaBridge | 172:65be27845400 | 1023 | } |
AnnaBridge | 172:65be27845400 | 1024 | |
AnnaBridge | 172:65be27845400 | 1025 | /** |
AnnaBridge | 172:65be27845400 | 1026 | * @brief Disable the double buffer mode. |
AnnaBridge | 172:65be27845400 | 1027 | * @rmtoll CR DBM LL_BDMA_DisableDoubleBufferMode |
AnnaBridge | 172:65be27845400 | 1028 | * @param BDMAx BDMAx Instance |
AnnaBridge | 172:65be27845400 | 1029 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1030 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1031 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1032 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1033 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1034 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1035 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1036 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1037 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1038 | * @retval None |
AnnaBridge | 172:65be27845400 | 1039 | */ |
AnnaBridge | 172:65be27845400 | 1040 | __STATIC_INLINE void LL_BDMA_DisableDoubleBufferMode(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 1041 | { |
AnnaBridge | 172:65be27845400 | 1042 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1043 | |
AnnaBridge | 172:65be27845400 | 1044 | CLEAR_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_DBM); |
AnnaBridge | 172:65be27845400 | 1045 | } |
AnnaBridge | 172:65be27845400 | 1046 | |
AnnaBridge | 172:65be27845400 | 1047 | /** |
AnnaBridge | 172:65be27845400 | 1048 | * @brief Configure the Source and Destination addresses. |
AnnaBridge | 172:65be27845400 | 1049 | * @note This API must not be called when the BDMA channel is enabled. |
AnnaBridge | 172:65be27845400 | 1050 | * @note Each IP using BDMA provides an API to get directly the register adress (LL_PPP_BDMA_GetRegAddr). |
AnnaBridge | 172:65be27845400 | 1051 | * @rmtoll CPAR PA LL_BDMA_ConfigAddresses\n |
AnnaBridge | 172:65be27845400 | 1052 | * CMAR MA LL_BDMA_ConfigAddresses |
AnnaBridge | 172:65be27845400 | 1053 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1054 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1055 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1056 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1057 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1058 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1059 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1060 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1061 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1062 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1063 | * @param SrcAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 1064 | * @param DstAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 1065 | * @param Direction This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1066 | * @arg @ref LL_BDMA_DIRECTION_PERIPH_TO_MEMORY |
AnnaBridge | 172:65be27845400 | 1067 | * @arg @ref LL_BDMA_DIRECTION_MEMORY_TO_PERIPH |
AnnaBridge | 172:65be27845400 | 1068 | * @arg @ref LL_BDMA_DIRECTION_MEMORY_TO_MEMORY |
AnnaBridge | 172:65be27845400 | 1069 | * @retval None |
AnnaBridge | 172:65be27845400 | 1070 | */ |
AnnaBridge | 172:65be27845400 | 1071 | __STATIC_INLINE void LL_BDMA_ConfigAddresses(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t SrcAddress, |
AnnaBridge | 172:65be27845400 | 1072 | uint32_t DstAddress, uint32_t Direction) |
AnnaBridge | 172:65be27845400 | 1073 | { |
AnnaBridge | 172:65be27845400 | 1074 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1075 | |
AnnaBridge | 172:65be27845400 | 1076 | /* Direction Memory to Periph */ |
AnnaBridge | 172:65be27845400 | 1077 | if (Direction == LL_BDMA_DIRECTION_MEMORY_TO_PERIPH) |
AnnaBridge | 172:65be27845400 | 1078 | { |
AnnaBridge | 172:65be27845400 | 1079 | WRITE_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM0AR, SrcAddress); |
AnnaBridge | 172:65be27845400 | 1080 | WRITE_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CPAR, DstAddress); |
AnnaBridge | 172:65be27845400 | 1081 | } |
AnnaBridge | 172:65be27845400 | 1082 | /* Direction Periph to Memory and Memory to Memory */ |
AnnaBridge | 172:65be27845400 | 1083 | else |
AnnaBridge | 172:65be27845400 | 1084 | { |
AnnaBridge | 172:65be27845400 | 1085 | WRITE_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CPAR, SrcAddress); |
AnnaBridge | 172:65be27845400 | 1086 | WRITE_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM0AR, DstAddress); |
AnnaBridge | 172:65be27845400 | 1087 | } |
AnnaBridge | 172:65be27845400 | 1088 | } |
AnnaBridge | 172:65be27845400 | 1089 | |
AnnaBridge | 172:65be27845400 | 1090 | /** |
AnnaBridge | 172:65be27845400 | 1091 | * @brief Set the Memory address. |
AnnaBridge | 172:65be27845400 | 1092 | * @note Interface used for direction LL_BDMA_DIRECTION_PERIPH_TO_MEMORY or LL_BDMA_DIRECTION_MEMORY_TO_PERIPH only. |
AnnaBridge | 172:65be27845400 | 1093 | * @note This API must not be called when the BDMA channel is enabled. |
AnnaBridge | 172:65be27845400 | 1094 | * @rmtoll CMAR MA LL_BDMA_SetMemoryAddress |
AnnaBridge | 172:65be27845400 | 1095 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1096 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1097 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1098 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1099 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1100 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1101 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1102 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1103 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1104 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1105 | * @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 1106 | * @retval None |
AnnaBridge | 172:65be27845400 | 1107 | */ |
AnnaBridge | 172:65be27845400 | 1108 | __STATIC_INLINE void LL_BDMA_SetMemoryAddress(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t MemoryAddress) |
AnnaBridge | 172:65be27845400 | 1109 | { |
AnnaBridge | 172:65be27845400 | 1110 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1111 | |
AnnaBridge | 172:65be27845400 | 1112 | WRITE_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM0AR, MemoryAddress); |
AnnaBridge | 172:65be27845400 | 1113 | } |
AnnaBridge | 172:65be27845400 | 1114 | |
AnnaBridge | 172:65be27845400 | 1115 | /** |
AnnaBridge | 172:65be27845400 | 1116 | * @brief Set the Peripheral address. |
AnnaBridge | 172:65be27845400 | 1117 | * @note Interface used for direction LL_BDMA_DIRECTION_PERIPH_TO_MEMORY or LL_BDMA_DIRECTION_MEMORY_TO_PERIPH only. |
AnnaBridge | 172:65be27845400 | 1118 | * @note This API must not be called when the BDMA channel is enabled. |
AnnaBridge | 172:65be27845400 | 1119 | * @rmtoll CPAR PA LL_BDMA_SetPeriphAddress |
AnnaBridge | 172:65be27845400 | 1120 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1121 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1122 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1123 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1124 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1125 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1126 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1127 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1128 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1129 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1130 | * @param PeriphAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 1131 | * @retval None |
AnnaBridge | 172:65be27845400 | 1132 | */ |
AnnaBridge | 172:65be27845400 | 1133 | __STATIC_INLINE void LL_BDMA_SetPeriphAddress(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t PeriphAddress) |
AnnaBridge | 172:65be27845400 | 1134 | { |
AnnaBridge | 172:65be27845400 | 1135 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1136 | |
AnnaBridge | 172:65be27845400 | 1137 | WRITE_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CPAR, PeriphAddress); |
AnnaBridge | 172:65be27845400 | 1138 | } |
AnnaBridge | 172:65be27845400 | 1139 | |
AnnaBridge | 172:65be27845400 | 1140 | /** |
AnnaBridge | 172:65be27845400 | 1141 | * @brief Get Memory address. |
AnnaBridge | 172:65be27845400 | 1142 | * @note Interface used for direction LL_BDMA_DIRECTION_PERIPH_TO_MEMORY or LL_BDMA_DIRECTION_MEMORY_TO_PERIPH only. |
AnnaBridge | 172:65be27845400 | 1143 | * @rmtoll CMAR MA LL_BDMA_GetMemoryAddress |
AnnaBridge | 172:65be27845400 | 1144 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1145 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1146 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1147 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1148 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1149 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1150 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1151 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1152 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1153 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1154 | * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 1155 | */ |
AnnaBridge | 172:65be27845400 | 1156 | __STATIC_INLINE uint32_t LL_BDMA_GetMemoryAddress(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 1157 | { |
AnnaBridge | 172:65be27845400 | 1158 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1159 | |
AnnaBridge | 172:65be27845400 | 1160 | return (READ_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM0AR)); |
AnnaBridge | 172:65be27845400 | 1161 | } |
AnnaBridge | 172:65be27845400 | 1162 | |
AnnaBridge | 172:65be27845400 | 1163 | /** |
AnnaBridge | 172:65be27845400 | 1164 | * @brief Get Peripheral address. |
AnnaBridge | 172:65be27845400 | 1165 | * @note Interface used for direction LL_BDMA_DIRECTION_PERIPH_TO_MEMORY or LL_BDMA_DIRECTION_MEMORY_TO_PERIPH only. |
AnnaBridge | 172:65be27845400 | 1166 | * @rmtoll CPAR PA LL_BDMA_GetPeriphAddress |
AnnaBridge | 172:65be27845400 | 1167 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1168 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1169 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1170 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1171 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1172 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1173 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1174 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1175 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1176 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1177 | * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 1178 | */ |
AnnaBridge | 172:65be27845400 | 1179 | __STATIC_INLINE uint32_t LL_BDMA_GetPeriphAddress(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 1180 | { |
AnnaBridge | 172:65be27845400 | 1181 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1182 | |
AnnaBridge | 172:65be27845400 | 1183 | return (READ_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CPAR)); |
AnnaBridge | 172:65be27845400 | 1184 | } |
AnnaBridge | 172:65be27845400 | 1185 | |
AnnaBridge | 172:65be27845400 | 1186 | /** |
AnnaBridge | 172:65be27845400 | 1187 | * @brief Set the Memory to Memory Source address. |
AnnaBridge | 172:65be27845400 | 1188 | * @note Interface used for direction LL_BDMA_DIRECTION_MEMORY_TO_MEMORY only. |
AnnaBridge | 172:65be27845400 | 1189 | * @note This API must not be called when the BDMA channel is enabled. |
AnnaBridge | 172:65be27845400 | 1190 | * @rmtoll CPAR PA LL_BDMA_SetM2MSrcAddress |
AnnaBridge | 172:65be27845400 | 1191 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1192 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1193 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1194 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1195 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1196 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1197 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1198 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1199 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1200 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1201 | * @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 1202 | * @retval None |
AnnaBridge | 172:65be27845400 | 1203 | */ |
AnnaBridge | 172:65be27845400 | 1204 | __STATIC_INLINE void LL_BDMA_SetM2MSrcAddress(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t MemoryAddress) |
AnnaBridge | 172:65be27845400 | 1205 | { |
AnnaBridge | 172:65be27845400 | 1206 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1207 | |
AnnaBridge | 172:65be27845400 | 1208 | WRITE_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CPAR, MemoryAddress); |
AnnaBridge | 172:65be27845400 | 1209 | } |
AnnaBridge | 172:65be27845400 | 1210 | |
AnnaBridge | 172:65be27845400 | 1211 | /** |
AnnaBridge | 172:65be27845400 | 1212 | * @brief Set the Memory to Memory Destination address. |
AnnaBridge | 172:65be27845400 | 1213 | * @note Interface used for direction LL_BDMA_DIRECTION_MEMORY_TO_MEMORY only. |
AnnaBridge | 172:65be27845400 | 1214 | * @note This API must not be called when the BDMA channel is enabled. |
AnnaBridge | 172:65be27845400 | 1215 | * @rmtoll CMAR MA LL_BDMA_SetM2MDstAddress |
AnnaBridge | 172:65be27845400 | 1216 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1217 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1218 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1219 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1220 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1221 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1222 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1223 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1224 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1225 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1226 | * @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 1227 | * @retval None |
AnnaBridge | 172:65be27845400 | 1228 | */ |
AnnaBridge | 172:65be27845400 | 1229 | __STATIC_INLINE void LL_BDMA_SetM2MDstAddress(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t MemoryAddress) |
AnnaBridge | 172:65be27845400 | 1230 | { |
AnnaBridge | 172:65be27845400 | 1231 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1232 | |
AnnaBridge | 172:65be27845400 | 1233 | WRITE_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM0AR, MemoryAddress); |
AnnaBridge | 172:65be27845400 | 1234 | } |
AnnaBridge | 172:65be27845400 | 1235 | |
AnnaBridge | 172:65be27845400 | 1236 | /** |
AnnaBridge | 172:65be27845400 | 1237 | * @brief Get the Memory to Memory Source address. |
AnnaBridge | 172:65be27845400 | 1238 | * @note Interface used for direction LL_BDMA_DIRECTION_MEMORY_TO_MEMORY only. |
AnnaBridge | 172:65be27845400 | 1239 | * @rmtoll CPAR PA LL_BDMA_GetM2MSrcAddress |
AnnaBridge | 172:65be27845400 | 1240 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1241 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1242 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1243 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1244 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1245 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1246 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1247 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1248 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1249 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1250 | * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 1251 | */ |
AnnaBridge | 172:65be27845400 | 1252 | __STATIC_INLINE uint32_t LL_BDMA_GetM2MSrcAddress(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 1253 | { |
AnnaBridge | 172:65be27845400 | 1254 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1255 | |
AnnaBridge | 172:65be27845400 | 1256 | return (READ_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CPAR)); |
AnnaBridge | 172:65be27845400 | 1257 | } |
AnnaBridge | 172:65be27845400 | 1258 | |
AnnaBridge | 172:65be27845400 | 1259 | /** |
AnnaBridge | 172:65be27845400 | 1260 | * @brief Get the Memory to Memory Destination address. |
AnnaBridge | 172:65be27845400 | 1261 | * @note Interface used for direction LL_BDMA_DIRECTION_MEMORY_TO_MEMORY only. |
AnnaBridge | 172:65be27845400 | 1262 | * @rmtoll CMAR MA LL_BDMA_GetM2MDstAddress |
AnnaBridge | 172:65be27845400 | 1263 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1264 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1265 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1266 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1267 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1268 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1269 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1270 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1271 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1272 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1273 | * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 1274 | */ |
AnnaBridge | 172:65be27845400 | 1275 | __STATIC_INLINE uint32_t LL_BDMA_GetM2MDstAddress(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 1276 | { |
AnnaBridge | 172:65be27845400 | 1277 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1278 | |
AnnaBridge | 172:65be27845400 | 1279 | return (READ_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM0AR)); |
AnnaBridge | 172:65be27845400 | 1280 | } |
AnnaBridge | 172:65be27845400 | 1281 | |
AnnaBridge | 172:65be27845400 | 1282 | /** |
AnnaBridge | 172:65be27845400 | 1283 | * @brief Set Memory 1 address (used in case of Double buffer mode). |
AnnaBridge | 172:65be27845400 | 1284 | * @rmtoll M1AR M1A LL_BDMA_SetMemory1Address |
AnnaBridge | 172:65be27845400 | 1285 | * @param BDMAx BDMAx Instance |
AnnaBridge | 172:65be27845400 | 1286 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1287 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1288 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1289 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1290 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1291 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1292 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1293 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1294 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1295 | * @param Address Between 0 to 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 1296 | * @retval None |
AnnaBridge | 172:65be27845400 | 1297 | */ |
AnnaBridge | 172:65be27845400 | 1298 | __STATIC_INLINE void LL_BDMA_SetMemory1Address(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t Address) |
AnnaBridge | 172:65be27845400 | 1299 | { |
AnnaBridge | 172:65be27845400 | 1300 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1301 | |
AnnaBridge | 172:65be27845400 | 1302 | MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM1AR, BDMA_CM1AR_MA, Address); |
AnnaBridge | 172:65be27845400 | 1303 | } |
AnnaBridge | 172:65be27845400 | 1304 | |
AnnaBridge | 172:65be27845400 | 1305 | /** |
AnnaBridge | 172:65be27845400 | 1306 | * @brief Get Memory 1 address (used in case of Double buffer mode). |
AnnaBridge | 172:65be27845400 | 1307 | * @rmtoll M1AR M1A LL_BDMA_GetMemory1Address |
AnnaBridge | 172:65be27845400 | 1308 | * @param BDMAx BDMAx Instance |
AnnaBridge | 172:65be27845400 | 1309 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1310 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1311 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1312 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1313 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1314 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1315 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1316 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1317 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1318 | * @retval Between 0 to 0xFFFFFFFF |
AnnaBridge | 172:65be27845400 | 1319 | */ |
AnnaBridge | 172:65be27845400 | 1320 | __STATIC_INLINE uint32_t LL_BDMA_GetMemory1Address(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 1321 | { |
AnnaBridge | 172:65be27845400 | 1322 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 1323 | |
AnnaBridge | 172:65be27845400 | 1324 | return (((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM1AR); |
AnnaBridge | 172:65be27845400 | 1325 | } |
AnnaBridge | 172:65be27845400 | 1326 | |
AnnaBridge | 172:65be27845400 | 1327 | /** |
AnnaBridge | 172:65be27845400 | 1328 | * @brief Set BDMA request for BDMA Channels on DMAMUX Channel x. |
AnnaBridge | 172:65be27845400 | 1329 | * @note DMAMUX2 channel 0 to 7 are mapped to BDMA channel 0 to 7. |
AnnaBridge | 172:65be27845400 | 1330 | * @rmtoll CxCR DMAREQ_ID LL_BDMA_SetPeriphRequest |
AnnaBridge | 172:65be27845400 | 1331 | * @param BDMAx BDMAx Instance |
AnnaBridge | 172:65be27845400 | 1332 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1333 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1334 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1335 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1336 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1337 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1338 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1339 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1340 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1341 | * @param Request This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1342 | * @arg @ref LL_DMAMUX2_REQ_MEM2MEM |
AnnaBridge | 172:65be27845400 | 1343 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR0 |
AnnaBridge | 172:65be27845400 | 1344 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR1 |
AnnaBridge | 172:65be27845400 | 1345 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR2 |
AnnaBridge | 172:65be27845400 | 1346 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR3 |
AnnaBridge | 172:65be27845400 | 1347 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR4 |
AnnaBridge | 172:65be27845400 | 1348 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR5 |
AnnaBridge | 172:65be27845400 | 1349 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR6 |
AnnaBridge | 172:65be27845400 | 1350 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR7 |
AnnaBridge | 172:65be27845400 | 1351 | * @arg @ref LL_DMAMUX2_REQ_LPUART1_RX |
AnnaBridge | 172:65be27845400 | 1352 | * @arg @ref LL_DMAMUX2_REQ_LPUART1_TX |
AnnaBridge | 172:65be27845400 | 1353 | * @arg @ref LL_DMAMUX2_REQ_SPI6_RX |
AnnaBridge | 172:65be27845400 | 1354 | * @arg @ref LL_DMAMUX2_REQ_SPI6_TX |
AnnaBridge | 172:65be27845400 | 1355 | * @arg @ref LL_DMAMUX2_REQ_I2C4_RX |
AnnaBridge | 172:65be27845400 | 1356 | * @arg @ref LL_DMAMUX2_REQ_I2C4_TX |
AnnaBridge | 172:65be27845400 | 1357 | * @arg @ref LL_DMAMUX2_REQ_SAI4_A |
AnnaBridge | 172:65be27845400 | 1358 | * @arg @ref LL_DMAMUX2_REQ_SAI4_B |
AnnaBridge | 172:65be27845400 | 1359 | * @arg @ref LL_DMAMUX2_REQ_ADC3 |
AnnaBridge | 172:65be27845400 | 1360 | * @retval None |
AnnaBridge | 172:65be27845400 | 1361 | */ |
AnnaBridge | 172:65be27845400 | 1362 | __STATIC_INLINE void LL_BDMA_SetPeriphRequest(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t Request) |
AnnaBridge | 172:65be27845400 | 1363 | { |
AnnaBridge | 172:65be27845400 | 1364 | UNUSED(BDMAx); |
AnnaBridge | 172:65be27845400 | 1365 | MODIFY_REG(((DMAMUX_Channel_TypeDef *)(uint32_t)((uint32_t)DMAMUX2_Channel0 + (DMAMUX_CCR_SIZE * (Channel))))->CCR, DMAMUX_CxCR_DMAREQ_ID, Request); |
AnnaBridge | 172:65be27845400 | 1366 | } |
AnnaBridge | 172:65be27845400 | 1367 | |
AnnaBridge | 172:65be27845400 | 1368 | /** |
AnnaBridge | 172:65be27845400 | 1369 | * @brief Get BDMA request for BDMA Channels on DMAMUX Channel x. |
AnnaBridge | 172:65be27845400 | 1370 | * @note DMAMUX channel 0 to 7 are mapped to BDMA channel 0 to 7. |
AnnaBridge | 172:65be27845400 | 1371 | * @rmtoll CxCR DMAREQ_ID LL_BDMA_GetPeriphRequest |
AnnaBridge | 172:65be27845400 | 1372 | * @param BDMAx BDMAx Instance |
AnnaBridge | 172:65be27845400 | 1373 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1374 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 1375 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 1376 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 1377 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 1378 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 1379 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 1380 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 1381 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 1382 | * @retval Returned value can be one of the following values: |
AnnaBridge | 172:65be27845400 | 1383 | * @arg @ref LL_DMAMUX2_REQ_MEM2MEM |
AnnaBridge | 172:65be27845400 | 1384 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR0 |
AnnaBridge | 172:65be27845400 | 1385 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR1 |
AnnaBridge | 172:65be27845400 | 1386 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR2 |
AnnaBridge | 172:65be27845400 | 1387 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR3 |
AnnaBridge | 172:65be27845400 | 1388 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR4 |
AnnaBridge | 172:65be27845400 | 1389 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR5 |
AnnaBridge | 172:65be27845400 | 1390 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR6 |
AnnaBridge | 172:65be27845400 | 1391 | * @arg @ref LL_DMAMUX2_REQ_GENERATOR7 |
AnnaBridge | 172:65be27845400 | 1392 | * @arg @ref LL_DMAMUX2_REQ_LPUART1_RX |
AnnaBridge | 172:65be27845400 | 1393 | * @arg @ref LL_DMAMUX2_REQ_LPUART1_TX |
AnnaBridge | 172:65be27845400 | 1394 | * @arg @ref LL_DMAMUX2_REQ_SPI6_RX |
AnnaBridge | 172:65be27845400 | 1395 | * @arg @ref LL_DMAMUX2_REQ_SPI6_TX |
AnnaBridge | 172:65be27845400 | 1396 | * @arg @ref LL_DMAMUX2_REQ_I2C4_RX |
AnnaBridge | 172:65be27845400 | 1397 | * @arg @ref LL_DMAMUX2_REQ_I2C4_TX |
AnnaBridge | 172:65be27845400 | 1398 | * @arg @ref LL_DMAMUX2_REQ_SAI4_A |
AnnaBridge | 172:65be27845400 | 1399 | * @arg @ref LL_DMAMUX2_REQ_SAI4_B |
AnnaBridge | 172:65be27845400 | 1400 | * @arg @ref LL_DMAMUX2_REQ_ADC3 |
AnnaBridge | 172:65be27845400 | 1401 | */ |
AnnaBridge | 172:65be27845400 | 1402 | __STATIC_INLINE uint32_t LL_BDMA_GetPeriphRequest(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 1403 | { |
AnnaBridge | 172:65be27845400 | 1404 | UNUSED(BDMAx); |
AnnaBridge | 172:65be27845400 | 1405 | return (READ_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)((uint32_t)DMAMUX2_Channel0 + (DMAMUX_CCR_SIZE * (Channel)))))->CCR, DMAMUX_CxCR_DMAREQ_ID)); |
AnnaBridge | 172:65be27845400 | 1406 | } |
AnnaBridge | 172:65be27845400 | 1407 | |
AnnaBridge | 172:65be27845400 | 1408 | /** |
AnnaBridge | 172:65be27845400 | 1409 | * @} |
AnnaBridge | 172:65be27845400 | 1410 | */ |
AnnaBridge | 172:65be27845400 | 1411 | |
AnnaBridge | 172:65be27845400 | 1412 | |
AnnaBridge | 172:65be27845400 | 1413 | /** @defgroup BDMA_LL_EF_FLAG_Management FLAG_Management |
AnnaBridge | 172:65be27845400 | 1414 | * @{ |
AnnaBridge | 172:65be27845400 | 1415 | */ |
AnnaBridge | 172:65be27845400 | 1416 | /** |
AnnaBridge | 172:65be27845400 | 1417 | * @brief Get Channel 0 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1418 | * @rmtoll ISR GIF0 LL_BDMA_IsActiveFlag_GI0 |
AnnaBridge | 172:65be27845400 | 1419 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1420 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1421 | */ |
AnnaBridge | 172:65be27845400 | 1422 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_GI0(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1423 | { |
AnnaBridge | 172:65be27845400 | 1424 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_GIF0) == (BDMA_ISR_GIF0)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1425 | } |
AnnaBridge | 172:65be27845400 | 1426 | |
AnnaBridge | 172:65be27845400 | 1427 | /** |
AnnaBridge | 172:65be27845400 | 1428 | * @brief Get Channel 1 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1429 | * @rmtoll ISR GIF1 LL_BDMA_IsActiveFlag_GI1 |
AnnaBridge | 172:65be27845400 | 1430 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1431 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1432 | */ |
AnnaBridge | 172:65be27845400 | 1433 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_GI1(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1434 | { |
AnnaBridge | 172:65be27845400 | 1435 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_GIF1) == (BDMA_ISR_GIF1)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1436 | } |
AnnaBridge | 172:65be27845400 | 1437 | |
AnnaBridge | 172:65be27845400 | 1438 | /** |
AnnaBridge | 172:65be27845400 | 1439 | * @brief Get Channel 2 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1440 | * @rmtoll ISR GIF2 LL_BDMA_IsActiveFlag_GI2 |
AnnaBridge | 172:65be27845400 | 1441 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1442 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1443 | */ |
AnnaBridge | 172:65be27845400 | 1444 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_GI2(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1445 | { |
AnnaBridge | 172:65be27845400 | 1446 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_GIF2) == (BDMA_ISR_GIF2)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1447 | } |
AnnaBridge | 172:65be27845400 | 1448 | |
AnnaBridge | 172:65be27845400 | 1449 | /** |
AnnaBridge | 172:65be27845400 | 1450 | * @brief Get Channel 3 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1451 | * @rmtoll ISR GIF3 LL_BDMA_IsActiveFlag_GI3 |
AnnaBridge | 172:65be27845400 | 1452 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1453 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1454 | */ |
AnnaBridge | 172:65be27845400 | 1455 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_GI3(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1456 | { |
AnnaBridge | 172:65be27845400 | 1457 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_GIF3) == (BDMA_ISR_GIF3)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1458 | } |
AnnaBridge | 172:65be27845400 | 1459 | |
AnnaBridge | 172:65be27845400 | 1460 | /** |
AnnaBridge | 172:65be27845400 | 1461 | * @brief Get Channel 4 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1462 | * @rmtoll ISR GIF4 LL_BDMA_IsActiveFlag_GI4 |
AnnaBridge | 172:65be27845400 | 1463 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1464 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1465 | */ |
AnnaBridge | 172:65be27845400 | 1466 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_GI4(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1467 | { |
AnnaBridge | 172:65be27845400 | 1468 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_GIF4) == (BDMA_ISR_GIF4)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1469 | } |
AnnaBridge | 172:65be27845400 | 1470 | |
AnnaBridge | 172:65be27845400 | 1471 | /** |
AnnaBridge | 172:65be27845400 | 1472 | * @brief Get Channel 5 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1473 | * @rmtoll ISR GIF5 LL_BDMA_IsActiveFlag_GI5 |
AnnaBridge | 172:65be27845400 | 1474 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1475 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1476 | */ |
AnnaBridge | 172:65be27845400 | 1477 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_GI5(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1478 | { |
AnnaBridge | 172:65be27845400 | 1479 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_GIF5) == (BDMA_ISR_GIF5)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1480 | } |
AnnaBridge | 172:65be27845400 | 1481 | |
AnnaBridge | 172:65be27845400 | 1482 | /** |
AnnaBridge | 172:65be27845400 | 1483 | * @brief Get Channel 6 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1484 | * @rmtoll ISR GIF6 LL_BDMA_IsActiveFlag_GI6 |
AnnaBridge | 172:65be27845400 | 1485 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1486 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1487 | */ |
AnnaBridge | 172:65be27845400 | 1488 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_GI6(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1489 | { |
AnnaBridge | 172:65be27845400 | 1490 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_GIF6) == (BDMA_ISR_GIF6)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1491 | } |
AnnaBridge | 172:65be27845400 | 1492 | |
AnnaBridge | 172:65be27845400 | 1493 | /** |
AnnaBridge | 172:65be27845400 | 1494 | * @brief Get Channel 7 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1495 | * @rmtoll ISR GIF7 LL_BDMA_IsActiveFlag_GI7 |
AnnaBridge | 172:65be27845400 | 1496 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1497 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1498 | */ |
AnnaBridge | 172:65be27845400 | 1499 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_GI7(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1500 | { |
AnnaBridge | 172:65be27845400 | 1501 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_GIF7) == (BDMA_ISR_GIF7)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1502 | } |
AnnaBridge | 172:65be27845400 | 1503 | |
AnnaBridge | 172:65be27845400 | 1504 | /** |
AnnaBridge | 172:65be27845400 | 1505 | * @brief Get Channel 0 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1506 | * @rmtoll ISR TCIF0 LL_BDMA_IsActiveFlag_TC0 |
AnnaBridge | 172:65be27845400 | 1507 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1508 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1509 | */ |
AnnaBridge | 172:65be27845400 | 1510 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TC0(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1511 | { |
AnnaBridge | 172:65be27845400 | 1512 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TCIF0) == (BDMA_ISR_TCIF0)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1513 | } |
AnnaBridge | 172:65be27845400 | 1514 | /** |
AnnaBridge | 172:65be27845400 | 1515 | * @brief Get Channel 1 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1516 | * @rmtoll ISR TCIF1 LL_BDMA_IsActiveFlag_TC1 |
AnnaBridge | 172:65be27845400 | 1517 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1518 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1519 | */ |
AnnaBridge | 172:65be27845400 | 1520 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TC1(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1521 | { |
AnnaBridge | 172:65be27845400 | 1522 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TCIF1) == (BDMA_ISR_TCIF1)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1523 | } |
AnnaBridge | 172:65be27845400 | 1524 | |
AnnaBridge | 172:65be27845400 | 1525 | /** |
AnnaBridge | 172:65be27845400 | 1526 | * @brief Get Channel 2 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1527 | * @rmtoll ISR TCIF2 LL_BDMA_IsActiveFlag_TC2 |
AnnaBridge | 172:65be27845400 | 1528 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1529 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1530 | */ |
AnnaBridge | 172:65be27845400 | 1531 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TC2(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1532 | { |
AnnaBridge | 172:65be27845400 | 1533 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TCIF2) == (BDMA_ISR_TCIF2)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1534 | } |
AnnaBridge | 172:65be27845400 | 1535 | |
AnnaBridge | 172:65be27845400 | 1536 | /** |
AnnaBridge | 172:65be27845400 | 1537 | * @brief Get Channel 3 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1538 | * @rmtoll ISR TCIF3 LL_BDMA_IsActiveFlag_TC3 |
AnnaBridge | 172:65be27845400 | 1539 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1540 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1541 | */ |
AnnaBridge | 172:65be27845400 | 1542 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TC3(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1543 | { |
AnnaBridge | 172:65be27845400 | 1544 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TCIF3) == (BDMA_ISR_TCIF3)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1545 | } |
AnnaBridge | 172:65be27845400 | 1546 | |
AnnaBridge | 172:65be27845400 | 1547 | /** |
AnnaBridge | 172:65be27845400 | 1548 | * @brief Get Channel 4 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1549 | * @rmtoll ISR TCIF4 LL_BDMA_IsActiveFlag_TC4 |
AnnaBridge | 172:65be27845400 | 1550 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1551 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1552 | */ |
AnnaBridge | 172:65be27845400 | 1553 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TC4(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1554 | { |
AnnaBridge | 172:65be27845400 | 1555 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TCIF4) == (BDMA_ISR_TCIF4)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1556 | } |
AnnaBridge | 172:65be27845400 | 1557 | |
AnnaBridge | 172:65be27845400 | 1558 | /** |
AnnaBridge | 172:65be27845400 | 1559 | * @brief Get Channel 5 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1560 | * @rmtoll ISR TCIF5 LL_BDMA_IsActiveFlag_TC5 |
AnnaBridge | 172:65be27845400 | 1561 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1562 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1563 | */ |
AnnaBridge | 172:65be27845400 | 1564 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TC5(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1565 | { |
AnnaBridge | 172:65be27845400 | 1566 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TCIF5) == (BDMA_ISR_TCIF5)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1567 | } |
AnnaBridge | 172:65be27845400 | 1568 | |
AnnaBridge | 172:65be27845400 | 1569 | /** |
AnnaBridge | 172:65be27845400 | 1570 | * @brief Get Channel 6 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1571 | * @rmtoll ISR TCIF6 LL_BDMA_IsActiveFlag_TC6 |
AnnaBridge | 172:65be27845400 | 1572 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1573 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1574 | */ |
AnnaBridge | 172:65be27845400 | 1575 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TC6(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1576 | { |
AnnaBridge | 172:65be27845400 | 1577 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TCIF6) == (BDMA_ISR_TCIF6)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1578 | } |
AnnaBridge | 172:65be27845400 | 1579 | |
AnnaBridge | 172:65be27845400 | 1580 | /** |
AnnaBridge | 172:65be27845400 | 1581 | * @brief Get Channel 7 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1582 | * @rmtoll ISR TCIF7 LL_BDMA_IsActiveFlag_TC7 |
AnnaBridge | 172:65be27845400 | 1583 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1584 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1585 | */ |
AnnaBridge | 172:65be27845400 | 1586 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TC7(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1587 | { |
AnnaBridge | 172:65be27845400 | 1588 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TCIF7) == (BDMA_ISR_TCIF7)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1589 | } |
AnnaBridge | 172:65be27845400 | 1590 | |
AnnaBridge | 172:65be27845400 | 1591 | /** |
AnnaBridge | 172:65be27845400 | 1592 | * @brief Get Channel 0 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1593 | * @rmtoll ISR HTIF0 LL_BDMA_IsActiveFlag_HT0 |
AnnaBridge | 172:65be27845400 | 1594 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1595 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1596 | */ |
AnnaBridge | 172:65be27845400 | 1597 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_HT0(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1598 | { |
AnnaBridge | 172:65be27845400 | 1599 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_HTIF0) == (BDMA_ISR_HTIF0)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1600 | } |
AnnaBridge | 172:65be27845400 | 1601 | /** |
AnnaBridge | 172:65be27845400 | 1602 | * @brief Get Channel 1 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1603 | * @rmtoll ISR HTIF1 LL_BDMA_IsActiveFlag_HT1 |
AnnaBridge | 172:65be27845400 | 1604 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1605 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1606 | */ |
AnnaBridge | 172:65be27845400 | 1607 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_HT1(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1608 | { |
AnnaBridge | 172:65be27845400 | 1609 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_HTIF1) == (BDMA_ISR_HTIF1)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1610 | } |
AnnaBridge | 172:65be27845400 | 1611 | |
AnnaBridge | 172:65be27845400 | 1612 | /** |
AnnaBridge | 172:65be27845400 | 1613 | * @brief Get Channel 2 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1614 | * @rmtoll ISR HTIF2 LL_BDMA_IsActiveFlag_HT2 |
AnnaBridge | 172:65be27845400 | 1615 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1616 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1617 | */ |
AnnaBridge | 172:65be27845400 | 1618 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_HT2(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1619 | { |
AnnaBridge | 172:65be27845400 | 1620 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_HTIF2) == (BDMA_ISR_HTIF2)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1621 | } |
AnnaBridge | 172:65be27845400 | 1622 | |
AnnaBridge | 172:65be27845400 | 1623 | /** |
AnnaBridge | 172:65be27845400 | 1624 | * @brief Get Channel 3 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1625 | * @rmtoll ISR HTIF3 LL_BDMA_IsActiveFlag_HT3 |
AnnaBridge | 172:65be27845400 | 1626 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1627 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1628 | */ |
AnnaBridge | 172:65be27845400 | 1629 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_HT3(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1630 | { |
AnnaBridge | 172:65be27845400 | 1631 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_HTIF3) == (BDMA_ISR_HTIF3)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1632 | } |
AnnaBridge | 172:65be27845400 | 1633 | |
AnnaBridge | 172:65be27845400 | 1634 | /** |
AnnaBridge | 172:65be27845400 | 1635 | * @brief Get Channel 4 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1636 | * @rmtoll ISR HTIF4 LL_BDMA_IsActiveFlag_HT4 |
AnnaBridge | 172:65be27845400 | 1637 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1638 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1639 | */ |
AnnaBridge | 172:65be27845400 | 1640 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_HT4(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1641 | { |
AnnaBridge | 172:65be27845400 | 1642 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_HTIF4) == (BDMA_ISR_HTIF4)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1643 | } |
AnnaBridge | 172:65be27845400 | 1644 | |
AnnaBridge | 172:65be27845400 | 1645 | /** |
AnnaBridge | 172:65be27845400 | 1646 | * @brief Get Channel 5 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1647 | * @rmtoll ISR HTIF5 LL_BDMA_IsActiveFlag_HT5 |
AnnaBridge | 172:65be27845400 | 1648 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1649 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1650 | */ |
AnnaBridge | 172:65be27845400 | 1651 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_HT5(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1652 | { |
AnnaBridge | 172:65be27845400 | 1653 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_HTIF5) == (BDMA_ISR_HTIF5)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1654 | } |
AnnaBridge | 172:65be27845400 | 1655 | |
AnnaBridge | 172:65be27845400 | 1656 | /** |
AnnaBridge | 172:65be27845400 | 1657 | * @brief Get Channel 6 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1658 | * @rmtoll ISR HTIF6 LL_BDMA_IsActiveFlag_HT6 |
AnnaBridge | 172:65be27845400 | 1659 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1660 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1661 | */ |
AnnaBridge | 172:65be27845400 | 1662 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_HT6(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1663 | { |
AnnaBridge | 172:65be27845400 | 1664 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_HTIF6) == (BDMA_ISR_HTIF6)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1665 | } |
AnnaBridge | 172:65be27845400 | 1666 | |
AnnaBridge | 172:65be27845400 | 1667 | /** |
AnnaBridge | 172:65be27845400 | 1668 | * @brief Get Channel 7 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1669 | * @rmtoll ISR HTIF7 LL_BDMA_IsActiveFlag_HT7 |
AnnaBridge | 172:65be27845400 | 1670 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1671 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1672 | */ |
AnnaBridge | 172:65be27845400 | 1673 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_HT7(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1674 | { |
AnnaBridge | 172:65be27845400 | 1675 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_HTIF7) == (BDMA_ISR_HTIF7)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1676 | } |
AnnaBridge | 172:65be27845400 | 1677 | |
AnnaBridge | 172:65be27845400 | 1678 | /** |
AnnaBridge | 172:65be27845400 | 1679 | * @brief Get Channel 0 transfer error flag. |
AnnaBridge | 172:65be27845400 | 1680 | * @rmtoll ISR TEIF0 LL_BDMA_IsActiveFlag_TE0 |
AnnaBridge | 172:65be27845400 | 1681 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1682 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1683 | */ |
AnnaBridge | 172:65be27845400 | 1684 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TE0(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1685 | { |
AnnaBridge | 172:65be27845400 | 1686 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TEIF0) == (BDMA_ISR_TEIF0)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1687 | } |
AnnaBridge | 172:65be27845400 | 1688 | |
AnnaBridge | 172:65be27845400 | 1689 | /** |
AnnaBridge | 172:65be27845400 | 1690 | * @brief Get Channel 1 transfer error flag. |
AnnaBridge | 172:65be27845400 | 1691 | * @rmtoll ISR TEIF1 LL_BDMA_IsActiveFlag_TE1 |
AnnaBridge | 172:65be27845400 | 1692 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1693 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1694 | */ |
AnnaBridge | 172:65be27845400 | 1695 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TE1(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1696 | { |
AnnaBridge | 172:65be27845400 | 1697 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TEIF1) == (BDMA_ISR_TEIF1)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1698 | } |
AnnaBridge | 172:65be27845400 | 1699 | |
AnnaBridge | 172:65be27845400 | 1700 | /** |
AnnaBridge | 172:65be27845400 | 1701 | * @brief Get Channel 2 transfer error flag. |
AnnaBridge | 172:65be27845400 | 1702 | * @rmtoll ISR TEIF2 LL_BDMA_IsActiveFlag_TE2 |
AnnaBridge | 172:65be27845400 | 1703 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1704 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1705 | */ |
AnnaBridge | 172:65be27845400 | 1706 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TE2(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1707 | { |
AnnaBridge | 172:65be27845400 | 1708 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TEIF2) == (BDMA_ISR_TEIF2)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1709 | } |
AnnaBridge | 172:65be27845400 | 1710 | |
AnnaBridge | 172:65be27845400 | 1711 | /** |
AnnaBridge | 172:65be27845400 | 1712 | * @brief Get Channel 3 transfer error flag. |
AnnaBridge | 172:65be27845400 | 1713 | * @rmtoll ISR TEIF3 LL_BDMA_IsActiveFlag_TE3 |
AnnaBridge | 172:65be27845400 | 1714 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1715 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1716 | */ |
AnnaBridge | 172:65be27845400 | 1717 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TE3(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1718 | { |
AnnaBridge | 172:65be27845400 | 1719 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TEIF3) == (BDMA_ISR_TEIF3)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1720 | } |
AnnaBridge | 172:65be27845400 | 1721 | |
AnnaBridge | 172:65be27845400 | 1722 | /** |
AnnaBridge | 172:65be27845400 | 1723 | * @brief Get Channel 4 transfer error flag. |
AnnaBridge | 172:65be27845400 | 1724 | * @rmtoll ISR TEIF4 LL_BDMA_IsActiveFlag_TE4 |
AnnaBridge | 172:65be27845400 | 1725 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1726 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1727 | */ |
AnnaBridge | 172:65be27845400 | 1728 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TE4(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1729 | { |
AnnaBridge | 172:65be27845400 | 1730 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TEIF4) == (BDMA_ISR_TEIF4)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1731 | } |
AnnaBridge | 172:65be27845400 | 1732 | |
AnnaBridge | 172:65be27845400 | 1733 | /** |
AnnaBridge | 172:65be27845400 | 1734 | * @brief Get Channel 5 transfer error flag. |
AnnaBridge | 172:65be27845400 | 1735 | * @rmtoll ISR TEIF5 LL_BDMA_IsActiveFlag_TE5 |
AnnaBridge | 172:65be27845400 | 1736 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1737 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1738 | */ |
AnnaBridge | 172:65be27845400 | 1739 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TE5(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1740 | { |
AnnaBridge | 172:65be27845400 | 1741 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TEIF5) == (BDMA_ISR_TEIF5)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1742 | } |
AnnaBridge | 172:65be27845400 | 1743 | |
AnnaBridge | 172:65be27845400 | 1744 | /** |
AnnaBridge | 172:65be27845400 | 1745 | * @brief Get Channel 6 transfer error flag. |
AnnaBridge | 172:65be27845400 | 1746 | * @rmtoll ISR TEIF6 LL_BDMA_IsActiveFlag_TE6 |
AnnaBridge | 172:65be27845400 | 1747 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1748 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1749 | */ |
AnnaBridge | 172:65be27845400 | 1750 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TE6(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1751 | { |
AnnaBridge | 172:65be27845400 | 1752 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TEIF6) == (BDMA_ISR_TEIF6)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1753 | } |
AnnaBridge | 172:65be27845400 | 1754 | |
AnnaBridge | 172:65be27845400 | 1755 | /** |
AnnaBridge | 172:65be27845400 | 1756 | * @brief Get Channel 7 transfer error flag. |
AnnaBridge | 172:65be27845400 | 1757 | * @rmtoll ISR TEIF7 LL_BDMA_IsActiveFlag_TE7 |
AnnaBridge | 172:65be27845400 | 1758 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1759 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 1760 | */ |
AnnaBridge | 172:65be27845400 | 1761 | __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TE7(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1762 | { |
AnnaBridge | 172:65be27845400 | 1763 | return ((READ_BIT(BDMAx->ISR, BDMA_ISR_TEIF7) == (BDMA_ISR_TEIF7)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 1764 | } |
AnnaBridge | 172:65be27845400 | 1765 | |
AnnaBridge | 172:65be27845400 | 1766 | /** |
AnnaBridge | 172:65be27845400 | 1767 | * @brief Clear Channel 0 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1768 | * @rmtoll IFCR CGIF0 LL_BDMA_ClearFlag_GI0 |
AnnaBridge | 172:65be27845400 | 1769 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1770 | * @retval None |
AnnaBridge | 172:65be27845400 | 1771 | */ |
AnnaBridge | 172:65be27845400 | 1772 | __STATIC_INLINE void LL_BDMA_ClearFlag_GI0(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1773 | { |
AnnaBridge | 172:65be27845400 | 1774 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF0); |
AnnaBridge | 172:65be27845400 | 1775 | } |
AnnaBridge | 172:65be27845400 | 1776 | /** |
AnnaBridge | 172:65be27845400 | 1777 | * @brief Clear Channel 1 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1778 | * @rmtoll IFCR CGIF1 LL_BDMA_ClearFlag_GI1 |
AnnaBridge | 172:65be27845400 | 1779 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1780 | * @retval None |
AnnaBridge | 172:65be27845400 | 1781 | */ |
AnnaBridge | 172:65be27845400 | 1782 | __STATIC_INLINE void LL_BDMA_ClearFlag_GI1(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1783 | { |
AnnaBridge | 172:65be27845400 | 1784 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF1); |
AnnaBridge | 172:65be27845400 | 1785 | } |
AnnaBridge | 172:65be27845400 | 1786 | |
AnnaBridge | 172:65be27845400 | 1787 | /** |
AnnaBridge | 172:65be27845400 | 1788 | * @brief Clear Channel 2 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1789 | * @rmtoll IFCR CGIF2 LL_BDMA_ClearFlag_GI2 |
AnnaBridge | 172:65be27845400 | 1790 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1791 | * @retval None |
AnnaBridge | 172:65be27845400 | 1792 | */ |
AnnaBridge | 172:65be27845400 | 1793 | __STATIC_INLINE void LL_BDMA_ClearFlag_GI2(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1794 | { |
AnnaBridge | 172:65be27845400 | 1795 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF2); |
AnnaBridge | 172:65be27845400 | 1796 | } |
AnnaBridge | 172:65be27845400 | 1797 | |
AnnaBridge | 172:65be27845400 | 1798 | /** |
AnnaBridge | 172:65be27845400 | 1799 | * @brief Clear Channel 3 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1800 | * @rmtoll IFCR CGIF3 LL_BDMA_ClearFlag_GI3 |
AnnaBridge | 172:65be27845400 | 1801 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1802 | * @retval None |
AnnaBridge | 172:65be27845400 | 1803 | */ |
AnnaBridge | 172:65be27845400 | 1804 | __STATIC_INLINE void LL_BDMA_ClearFlag_GI3(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1805 | { |
AnnaBridge | 172:65be27845400 | 1806 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF3); |
AnnaBridge | 172:65be27845400 | 1807 | } |
AnnaBridge | 172:65be27845400 | 1808 | |
AnnaBridge | 172:65be27845400 | 1809 | /** |
AnnaBridge | 172:65be27845400 | 1810 | * @brief Clear Channel 4 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1811 | * @rmtoll IFCR CGIF4 LL_BDMA_ClearFlag_GI4 |
AnnaBridge | 172:65be27845400 | 1812 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1813 | * @retval None |
AnnaBridge | 172:65be27845400 | 1814 | */ |
AnnaBridge | 172:65be27845400 | 1815 | __STATIC_INLINE void LL_BDMA_ClearFlag_GI4(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1816 | { |
AnnaBridge | 172:65be27845400 | 1817 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF4); |
AnnaBridge | 172:65be27845400 | 1818 | } |
AnnaBridge | 172:65be27845400 | 1819 | |
AnnaBridge | 172:65be27845400 | 1820 | /** |
AnnaBridge | 172:65be27845400 | 1821 | * @brief Clear Channel 5 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1822 | * @rmtoll IFCR CGIF5 LL_BDMA_ClearFlag_GI5 |
AnnaBridge | 172:65be27845400 | 1823 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1824 | * @retval None |
AnnaBridge | 172:65be27845400 | 1825 | */ |
AnnaBridge | 172:65be27845400 | 1826 | __STATIC_INLINE void LL_BDMA_ClearFlag_GI5(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1827 | { |
AnnaBridge | 172:65be27845400 | 1828 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF5); |
AnnaBridge | 172:65be27845400 | 1829 | } |
AnnaBridge | 172:65be27845400 | 1830 | |
AnnaBridge | 172:65be27845400 | 1831 | /** |
AnnaBridge | 172:65be27845400 | 1832 | * @brief Clear Channel 6 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1833 | * @rmtoll IFCR CGIF6 LL_BDMA_ClearFlag_GI6 |
AnnaBridge | 172:65be27845400 | 1834 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1835 | * @retval None |
AnnaBridge | 172:65be27845400 | 1836 | */ |
AnnaBridge | 172:65be27845400 | 1837 | __STATIC_INLINE void LL_BDMA_ClearFlag_GI6(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1838 | { |
AnnaBridge | 172:65be27845400 | 1839 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF6); |
AnnaBridge | 172:65be27845400 | 1840 | } |
AnnaBridge | 172:65be27845400 | 1841 | |
AnnaBridge | 172:65be27845400 | 1842 | /** |
AnnaBridge | 172:65be27845400 | 1843 | * @brief Clear Channel 7 global interrupt flag. |
AnnaBridge | 172:65be27845400 | 1844 | * @rmtoll IFCR CGIF7 LL_BDMA_ClearFlag_GI7 |
AnnaBridge | 172:65be27845400 | 1845 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1846 | * @retval None |
AnnaBridge | 172:65be27845400 | 1847 | */ |
AnnaBridge | 172:65be27845400 | 1848 | __STATIC_INLINE void LL_BDMA_ClearFlag_GI7(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1849 | { |
AnnaBridge | 172:65be27845400 | 1850 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF7); |
AnnaBridge | 172:65be27845400 | 1851 | } |
AnnaBridge | 172:65be27845400 | 1852 | |
AnnaBridge | 172:65be27845400 | 1853 | /** |
AnnaBridge | 172:65be27845400 | 1854 | * @brief Clear Channel 0 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1855 | * @rmtoll IFCR CTCIF0 LL_BDMA_ClearFlag_TC0 |
AnnaBridge | 172:65be27845400 | 1856 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1857 | * @retval None |
AnnaBridge | 172:65be27845400 | 1858 | */ |
AnnaBridge | 172:65be27845400 | 1859 | __STATIC_INLINE void LL_BDMA_ClearFlag_TC0(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1860 | { |
AnnaBridge | 172:65be27845400 | 1861 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTCIF0); |
AnnaBridge | 172:65be27845400 | 1862 | } |
AnnaBridge | 172:65be27845400 | 1863 | /** |
AnnaBridge | 172:65be27845400 | 1864 | * @brief Clear Channel 1 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1865 | * @rmtoll IFCR CTCIF1 LL_BDMA_ClearFlag_TC1 |
AnnaBridge | 172:65be27845400 | 1866 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1867 | * @retval None |
AnnaBridge | 172:65be27845400 | 1868 | */ |
AnnaBridge | 172:65be27845400 | 1869 | __STATIC_INLINE void LL_BDMA_ClearFlag_TC1(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1870 | { |
AnnaBridge | 172:65be27845400 | 1871 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTCIF1); |
AnnaBridge | 172:65be27845400 | 1872 | } |
AnnaBridge | 172:65be27845400 | 1873 | |
AnnaBridge | 172:65be27845400 | 1874 | /** |
AnnaBridge | 172:65be27845400 | 1875 | * @brief Clear Channel 2 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1876 | * @rmtoll IFCR CTCIF2 LL_BDMA_ClearFlag_TC2 |
AnnaBridge | 172:65be27845400 | 1877 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1878 | * @retval None |
AnnaBridge | 172:65be27845400 | 1879 | */ |
AnnaBridge | 172:65be27845400 | 1880 | __STATIC_INLINE void LL_BDMA_ClearFlag_TC2(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1881 | { |
AnnaBridge | 172:65be27845400 | 1882 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTCIF2); |
AnnaBridge | 172:65be27845400 | 1883 | } |
AnnaBridge | 172:65be27845400 | 1884 | |
AnnaBridge | 172:65be27845400 | 1885 | /** |
AnnaBridge | 172:65be27845400 | 1886 | * @brief Clear Channel 3 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1887 | * @rmtoll IFCR CTCIF3 LL_BDMA_ClearFlag_TC3 |
AnnaBridge | 172:65be27845400 | 1888 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1889 | * @retval None |
AnnaBridge | 172:65be27845400 | 1890 | */ |
AnnaBridge | 172:65be27845400 | 1891 | __STATIC_INLINE void LL_BDMA_ClearFlag_TC3(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1892 | { |
AnnaBridge | 172:65be27845400 | 1893 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTCIF3); |
AnnaBridge | 172:65be27845400 | 1894 | } |
AnnaBridge | 172:65be27845400 | 1895 | |
AnnaBridge | 172:65be27845400 | 1896 | /** |
AnnaBridge | 172:65be27845400 | 1897 | * @brief Clear Channel 4 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1898 | * @rmtoll IFCR CTCIF4 LL_BDMA_ClearFlag_TC4 |
AnnaBridge | 172:65be27845400 | 1899 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1900 | * @retval None |
AnnaBridge | 172:65be27845400 | 1901 | */ |
AnnaBridge | 172:65be27845400 | 1902 | __STATIC_INLINE void LL_BDMA_ClearFlag_TC4(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1903 | { |
AnnaBridge | 172:65be27845400 | 1904 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTCIF4); |
AnnaBridge | 172:65be27845400 | 1905 | } |
AnnaBridge | 172:65be27845400 | 1906 | |
AnnaBridge | 172:65be27845400 | 1907 | /** |
AnnaBridge | 172:65be27845400 | 1908 | * @brief Clear Channel 5 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1909 | * @rmtoll IFCR CTCIF5 LL_BDMA_ClearFlag_TC5 |
AnnaBridge | 172:65be27845400 | 1910 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1911 | * @retval None |
AnnaBridge | 172:65be27845400 | 1912 | */ |
AnnaBridge | 172:65be27845400 | 1913 | __STATIC_INLINE void LL_BDMA_ClearFlag_TC5(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1914 | { |
AnnaBridge | 172:65be27845400 | 1915 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTCIF5); |
AnnaBridge | 172:65be27845400 | 1916 | } |
AnnaBridge | 172:65be27845400 | 1917 | |
AnnaBridge | 172:65be27845400 | 1918 | /** |
AnnaBridge | 172:65be27845400 | 1919 | * @brief Clear Channel 6 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1920 | * @rmtoll IFCR CTCIF6 LL_BDMA_ClearFlag_TC6 |
AnnaBridge | 172:65be27845400 | 1921 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1922 | * @retval None |
AnnaBridge | 172:65be27845400 | 1923 | */ |
AnnaBridge | 172:65be27845400 | 1924 | __STATIC_INLINE void LL_BDMA_ClearFlag_TC6(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1925 | { |
AnnaBridge | 172:65be27845400 | 1926 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTCIF6); |
AnnaBridge | 172:65be27845400 | 1927 | } |
AnnaBridge | 172:65be27845400 | 1928 | |
AnnaBridge | 172:65be27845400 | 1929 | /** |
AnnaBridge | 172:65be27845400 | 1930 | * @brief Clear Channel 7 transfer complete flag. |
AnnaBridge | 172:65be27845400 | 1931 | * @rmtoll IFCR CTCIF7 LL_BDMA_ClearFlag_TC7 |
AnnaBridge | 172:65be27845400 | 1932 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1933 | * @retval None |
AnnaBridge | 172:65be27845400 | 1934 | */ |
AnnaBridge | 172:65be27845400 | 1935 | __STATIC_INLINE void LL_BDMA_ClearFlag_TC7(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1936 | { |
AnnaBridge | 172:65be27845400 | 1937 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTCIF7); |
AnnaBridge | 172:65be27845400 | 1938 | } |
AnnaBridge | 172:65be27845400 | 1939 | |
AnnaBridge | 172:65be27845400 | 1940 | /** |
AnnaBridge | 172:65be27845400 | 1941 | * @brief Clear Channel 0 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1942 | * @rmtoll IFCR CHTIF0 LL_BDMA_ClearFlag_HT0 |
AnnaBridge | 172:65be27845400 | 1943 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1944 | * @retval None |
AnnaBridge | 172:65be27845400 | 1945 | */ |
AnnaBridge | 172:65be27845400 | 1946 | __STATIC_INLINE void LL_BDMA_ClearFlag_HT0(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1947 | { |
AnnaBridge | 172:65be27845400 | 1948 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CHTIF0); |
AnnaBridge | 172:65be27845400 | 1949 | } |
AnnaBridge | 172:65be27845400 | 1950 | /** |
AnnaBridge | 172:65be27845400 | 1951 | * @brief Clear Channel 1 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1952 | * @rmtoll IFCR CHTIF1 LL_BDMA_ClearFlag_HT1 |
AnnaBridge | 172:65be27845400 | 1953 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1954 | * @retval None |
AnnaBridge | 172:65be27845400 | 1955 | */ |
AnnaBridge | 172:65be27845400 | 1956 | __STATIC_INLINE void LL_BDMA_ClearFlag_HT1(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1957 | { |
AnnaBridge | 172:65be27845400 | 1958 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CHTIF1); |
AnnaBridge | 172:65be27845400 | 1959 | } |
AnnaBridge | 172:65be27845400 | 1960 | |
AnnaBridge | 172:65be27845400 | 1961 | /** |
AnnaBridge | 172:65be27845400 | 1962 | * @brief Clear Channel 2 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1963 | * @rmtoll IFCR CHTIF2 LL_BDMA_ClearFlag_HT2 |
AnnaBridge | 172:65be27845400 | 1964 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1965 | * @retval None |
AnnaBridge | 172:65be27845400 | 1966 | */ |
AnnaBridge | 172:65be27845400 | 1967 | __STATIC_INLINE void LL_BDMA_ClearFlag_HT2(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1968 | { |
AnnaBridge | 172:65be27845400 | 1969 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CHTIF2); |
AnnaBridge | 172:65be27845400 | 1970 | } |
AnnaBridge | 172:65be27845400 | 1971 | |
AnnaBridge | 172:65be27845400 | 1972 | /** |
AnnaBridge | 172:65be27845400 | 1973 | * @brief Clear Channel 3 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1974 | * @rmtoll IFCR CHTIF3 LL_BDMA_ClearFlag_HT3 |
AnnaBridge | 172:65be27845400 | 1975 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1976 | * @retval None |
AnnaBridge | 172:65be27845400 | 1977 | */ |
AnnaBridge | 172:65be27845400 | 1978 | __STATIC_INLINE void LL_BDMA_ClearFlag_HT3(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1979 | { |
AnnaBridge | 172:65be27845400 | 1980 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CHTIF3); |
AnnaBridge | 172:65be27845400 | 1981 | } |
AnnaBridge | 172:65be27845400 | 1982 | |
AnnaBridge | 172:65be27845400 | 1983 | /** |
AnnaBridge | 172:65be27845400 | 1984 | * @brief Clear Channel 4 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1985 | * @rmtoll IFCR CHTIF4 LL_BDMA_ClearFlag_HT4 |
AnnaBridge | 172:65be27845400 | 1986 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1987 | * @retval None |
AnnaBridge | 172:65be27845400 | 1988 | */ |
AnnaBridge | 172:65be27845400 | 1989 | __STATIC_INLINE void LL_BDMA_ClearFlag_HT4(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 1990 | { |
AnnaBridge | 172:65be27845400 | 1991 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CHTIF4); |
AnnaBridge | 172:65be27845400 | 1992 | } |
AnnaBridge | 172:65be27845400 | 1993 | |
AnnaBridge | 172:65be27845400 | 1994 | /** |
AnnaBridge | 172:65be27845400 | 1995 | * @brief Clear Channel 5 half transfer flag. |
AnnaBridge | 172:65be27845400 | 1996 | * @rmtoll IFCR CHTIF5 LL_BDMA_ClearFlag_HT5 |
AnnaBridge | 172:65be27845400 | 1997 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 1998 | * @retval None |
AnnaBridge | 172:65be27845400 | 1999 | */ |
AnnaBridge | 172:65be27845400 | 2000 | __STATIC_INLINE void LL_BDMA_ClearFlag_HT5(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 2001 | { |
AnnaBridge | 172:65be27845400 | 2002 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CHTIF5); |
AnnaBridge | 172:65be27845400 | 2003 | } |
AnnaBridge | 172:65be27845400 | 2004 | |
AnnaBridge | 172:65be27845400 | 2005 | /** |
AnnaBridge | 172:65be27845400 | 2006 | * @brief Clear Channel 6 half transfer flag. |
AnnaBridge | 172:65be27845400 | 2007 | * @rmtoll IFCR CHTIF6 LL_BDMA_ClearFlag_HT6 |
AnnaBridge | 172:65be27845400 | 2008 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2009 | * @retval None |
AnnaBridge | 172:65be27845400 | 2010 | */ |
AnnaBridge | 172:65be27845400 | 2011 | __STATIC_INLINE void LL_BDMA_ClearFlag_HT6(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 2012 | { |
AnnaBridge | 172:65be27845400 | 2013 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CHTIF6); |
AnnaBridge | 172:65be27845400 | 2014 | } |
AnnaBridge | 172:65be27845400 | 2015 | |
AnnaBridge | 172:65be27845400 | 2016 | /** |
AnnaBridge | 172:65be27845400 | 2017 | * @brief Clear Channel 7 half transfer flag. |
AnnaBridge | 172:65be27845400 | 2018 | * @rmtoll IFCR CHTIF7 LL_BDMA_ClearFlag_HT7 |
AnnaBridge | 172:65be27845400 | 2019 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2020 | * @retval None |
AnnaBridge | 172:65be27845400 | 2021 | */ |
AnnaBridge | 172:65be27845400 | 2022 | __STATIC_INLINE void LL_BDMA_ClearFlag_HT7(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 2023 | { |
AnnaBridge | 172:65be27845400 | 2024 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CHTIF7); |
AnnaBridge | 172:65be27845400 | 2025 | } |
AnnaBridge | 172:65be27845400 | 2026 | |
AnnaBridge | 172:65be27845400 | 2027 | /** |
AnnaBridge | 172:65be27845400 | 2028 | * @brief Clear Channel 0 transfer error flag. |
AnnaBridge | 172:65be27845400 | 2029 | * @rmtoll IFCR CTEIF0 LL_BDMA_ClearFlag_TE0 |
AnnaBridge | 172:65be27845400 | 2030 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2031 | * @retval None |
AnnaBridge | 172:65be27845400 | 2032 | */ |
AnnaBridge | 172:65be27845400 | 2033 | __STATIC_INLINE void LL_BDMA_ClearFlag_TE0(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 2034 | { |
AnnaBridge | 172:65be27845400 | 2035 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTEIF0); |
AnnaBridge | 172:65be27845400 | 2036 | } |
AnnaBridge | 172:65be27845400 | 2037 | |
AnnaBridge | 172:65be27845400 | 2038 | /** |
AnnaBridge | 172:65be27845400 | 2039 | * @brief Clear Channel 1 transfer error flag. |
AnnaBridge | 172:65be27845400 | 2040 | * @rmtoll IFCR CTEIF1 LL_BDMA_ClearFlag_TE1 |
AnnaBridge | 172:65be27845400 | 2041 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2042 | * @retval None |
AnnaBridge | 172:65be27845400 | 2043 | */ |
AnnaBridge | 172:65be27845400 | 2044 | __STATIC_INLINE void LL_BDMA_ClearFlag_TE1(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 2045 | { |
AnnaBridge | 172:65be27845400 | 2046 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTEIF1); |
AnnaBridge | 172:65be27845400 | 2047 | } |
AnnaBridge | 172:65be27845400 | 2048 | |
AnnaBridge | 172:65be27845400 | 2049 | /** |
AnnaBridge | 172:65be27845400 | 2050 | * @brief Clear Channel 2 transfer error flag. |
AnnaBridge | 172:65be27845400 | 2051 | * @rmtoll IFCR CTEIF2 LL_BDMA_ClearFlag_TE2 |
AnnaBridge | 172:65be27845400 | 2052 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2053 | * @retval None |
AnnaBridge | 172:65be27845400 | 2054 | */ |
AnnaBridge | 172:65be27845400 | 2055 | __STATIC_INLINE void LL_BDMA_ClearFlag_TE2(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 2056 | { |
AnnaBridge | 172:65be27845400 | 2057 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTEIF2); |
AnnaBridge | 172:65be27845400 | 2058 | } |
AnnaBridge | 172:65be27845400 | 2059 | |
AnnaBridge | 172:65be27845400 | 2060 | /** |
AnnaBridge | 172:65be27845400 | 2061 | * @brief Clear Channel 3 transfer error flag. |
AnnaBridge | 172:65be27845400 | 2062 | * @rmtoll IFCR CTEIF3 LL_BDMA_ClearFlag_TE3 |
AnnaBridge | 172:65be27845400 | 2063 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2064 | * @retval None |
AnnaBridge | 172:65be27845400 | 2065 | */ |
AnnaBridge | 172:65be27845400 | 2066 | __STATIC_INLINE void LL_BDMA_ClearFlag_TE3(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 2067 | { |
AnnaBridge | 172:65be27845400 | 2068 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTEIF3); |
AnnaBridge | 172:65be27845400 | 2069 | } |
AnnaBridge | 172:65be27845400 | 2070 | |
AnnaBridge | 172:65be27845400 | 2071 | /** |
AnnaBridge | 172:65be27845400 | 2072 | * @brief Clear Channel 4 transfer error flag. |
AnnaBridge | 172:65be27845400 | 2073 | * @rmtoll IFCR CTEIF4 LL_BDMA_ClearFlag_TE4 |
AnnaBridge | 172:65be27845400 | 2074 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2075 | * @retval None |
AnnaBridge | 172:65be27845400 | 2076 | */ |
AnnaBridge | 172:65be27845400 | 2077 | __STATIC_INLINE void LL_BDMA_ClearFlag_TE4(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 2078 | { |
AnnaBridge | 172:65be27845400 | 2079 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTEIF4); |
AnnaBridge | 172:65be27845400 | 2080 | } |
AnnaBridge | 172:65be27845400 | 2081 | |
AnnaBridge | 172:65be27845400 | 2082 | /** |
AnnaBridge | 172:65be27845400 | 2083 | * @brief Clear Channel 5 transfer error flag. |
AnnaBridge | 172:65be27845400 | 2084 | * @rmtoll IFCR CTEIF5 LL_BDMA_ClearFlag_TE5 |
AnnaBridge | 172:65be27845400 | 2085 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2086 | * @retval None |
AnnaBridge | 172:65be27845400 | 2087 | */ |
AnnaBridge | 172:65be27845400 | 2088 | __STATIC_INLINE void LL_BDMA_ClearFlag_TE5(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 2089 | { |
AnnaBridge | 172:65be27845400 | 2090 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTEIF5); |
AnnaBridge | 172:65be27845400 | 2091 | } |
AnnaBridge | 172:65be27845400 | 2092 | |
AnnaBridge | 172:65be27845400 | 2093 | /** |
AnnaBridge | 172:65be27845400 | 2094 | * @brief Clear Channel 6 transfer error flag. |
AnnaBridge | 172:65be27845400 | 2095 | * @rmtoll IFCR CTEIF6 LL_BDMA_ClearFlag_TE6 |
AnnaBridge | 172:65be27845400 | 2096 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2097 | * @retval None |
AnnaBridge | 172:65be27845400 | 2098 | */ |
AnnaBridge | 172:65be27845400 | 2099 | __STATIC_INLINE void LL_BDMA_ClearFlag_TE6(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 2100 | { |
AnnaBridge | 172:65be27845400 | 2101 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTEIF6); |
AnnaBridge | 172:65be27845400 | 2102 | } |
AnnaBridge | 172:65be27845400 | 2103 | |
AnnaBridge | 172:65be27845400 | 2104 | /** |
AnnaBridge | 172:65be27845400 | 2105 | * @brief Clear Channel 7 transfer error flag. |
AnnaBridge | 172:65be27845400 | 2106 | * @rmtoll IFCR CTEIF7 LL_BDMA_ClearFlag_TE7 |
AnnaBridge | 172:65be27845400 | 2107 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2108 | * @retval None |
AnnaBridge | 172:65be27845400 | 2109 | */ |
AnnaBridge | 172:65be27845400 | 2110 | __STATIC_INLINE void LL_BDMA_ClearFlag_TE7(BDMA_TypeDef *BDMAx) |
AnnaBridge | 172:65be27845400 | 2111 | { |
AnnaBridge | 172:65be27845400 | 2112 | WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTEIF7); |
AnnaBridge | 172:65be27845400 | 2113 | } |
AnnaBridge | 172:65be27845400 | 2114 | |
AnnaBridge | 172:65be27845400 | 2115 | /** |
AnnaBridge | 172:65be27845400 | 2116 | * @} |
AnnaBridge | 172:65be27845400 | 2117 | */ |
AnnaBridge | 172:65be27845400 | 2118 | |
AnnaBridge | 172:65be27845400 | 2119 | /** @defgroup BDMA_LL_EF_IT_Management IT_Management |
AnnaBridge | 172:65be27845400 | 2120 | * @{ |
AnnaBridge | 172:65be27845400 | 2121 | */ |
AnnaBridge | 172:65be27845400 | 2122 | /** |
AnnaBridge | 172:65be27845400 | 2123 | * @brief Enable Transfer complete interrupt. |
AnnaBridge | 172:65be27845400 | 2124 | * @rmtoll CCR TCIE LL_BDMA_EnableIT_TC |
AnnaBridge | 172:65be27845400 | 2125 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2126 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 2127 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 2128 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 2129 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 2130 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 2131 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 2132 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 2133 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 2134 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 2135 | * @retval None |
AnnaBridge | 172:65be27845400 | 2136 | */ |
AnnaBridge | 172:65be27845400 | 2137 | __STATIC_INLINE void LL_BDMA_EnableIT_TC(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 2138 | { |
AnnaBridge | 172:65be27845400 | 2139 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 2140 | |
AnnaBridge | 172:65be27845400 | 2141 | SET_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_TCIE); |
AnnaBridge | 172:65be27845400 | 2142 | } |
AnnaBridge | 172:65be27845400 | 2143 | |
AnnaBridge | 172:65be27845400 | 2144 | /** |
AnnaBridge | 172:65be27845400 | 2145 | * @brief Enable Half transfer interrupt. |
AnnaBridge | 172:65be27845400 | 2146 | * @rmtoll CCR HTIE LL_BDMA_EnableIT_HT |
AnnaBridge | 172:65be27845400 | 2147 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2148 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 2149 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 2150 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 2151 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 2152 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 2153 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 2154 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 2155 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 2156 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 2157 | * @retval None |
AnnaBridge | 172:65be27845400 | 2158 | */ |
AnnaBridge | 172:65be27845400 | 2159 | __STATIC_INLINE void LL_BDMA_EnableIT_HT(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 2160 | { |
AnnaBridge | 172:65be27845400 | 2161 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 2162 | |
AnnaBridge | 172:65be27845400 | 2163 | SET_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_HTIE); |
AnnaBridge | 172:65be27845400 | 2164 | } |
AnnaBridge | 172:65be27845400 | 2165 | |
AnnaBridge | 172:65be27845400 | 2166 | /** |
AnnaBridge | 172:65be27845400 | 2167 | * @brief Enable Transfer error interrupt. |
AnnaBridge | 172:65be27845400 | 2168 | * @rmtoll CCR TEIE LL_BDMA_EnableIT_TE |
AnnaBridge | 172:65be27845400 | 2169 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2170 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 2171 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 2172 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 2173 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 2174 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 2175 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 2176 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 2177 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 2178 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 2179 | * @retval None |
AnnaBridge | 172:65be27845400 | 2180 | */ |
AnnaBridge | 172:65be27845400 | 2181 | __STATIC_INLINE void LL_BDMA_EnableIT_TE(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 2182 | { |
AnnaBridge | 172:65be27845400 | 2183 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 2184 | |
AnnaBridge | 172:65be27845400 | 2185 | SET_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_TEIE); |
AnnaBridge | 172:65be27845400 | 2186 | } |
AnnaBridge | 172:65be27845400 | 2187 | |
AnnaBridge | 172:65be27845400 | 2188 | /** |
AnnaBridge | 172:65be27845400 | 2189 | * @brief Disable Transfer complete interrupt. |
AnnaBridge | 172:65be27845400 | 2190 | * @rmtoll CCR TCIE LL_BDMA_DisableIT_TC |
AnnaBridge | 172:65be27845400 | 2191 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2192 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 2193 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 2194 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 2195 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 2196 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 2197 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 2198 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 2199 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 2200 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 2201 | * @retval None |
AnnaBridge | 172:65be27845400 | 2202 | */ |
AnnaBridge | 172:65be27845400 | 2203 | __STATIC_INLINE void LL_BDMA_DisableIT_TC(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 2204 | { |
AnnaBridge | 172:65be27845400 | 2205 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 2206 | |
AnnaBridge | 172:65be27845400 | 2207 | CLEAR_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_TCIE); |
AnnaBridge | 172:65be27845400 | 2208 | } |
AnnaBridge | 172:65be27845400 | 2209 | |
AnnaBridge | 172:65be27845400 | 2210 | /** |
AnnaBridge | 172:65be27845400 | 2211 | * @brief Disable Half transfer interrupt. |
AnnaBridge | 172:65be27845400 | 2212 | * @rmtoll CCR HTIE LL_BDMA_DisableIT_HT |
AnnaBridge | 172:65be27845400 | 2213 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2214 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 2215 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 2216 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 2217 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 2218 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 2219 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 2220 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 2221 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 2222 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 2223 | * @retval None |
AnnaBridge | 172:65be27845400 | 2224 | */ |
AnnaBridge | 172:65be27845400 | 2225 | __STATIC_INLINE void LL_BDMA_DisableIT_HT(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 2226 | { |
AnnaBridge | 172:65be27845400 | 2227 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 2228 | |
AnnaBridge | 172:65be27845400 | 2229 | CLEAR_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_HTIE); |
AnnaBridge | 172:65be27845400 | 2230 | } |
AnnaBridge | 172:65be27845400 | 2231 | |
AnnaBridge | 172:65be27845400 | 2232 | /** |
AnnaBridge | 172:65be27845400 | 2233 | * @brief Disable Transfer error interrupt. |
AnnaBridge | 172:65be27845400 | 2234 | * @rmtoll CCR TEIE LL_BDMA_DisableIT_TE |
AnnaBridge | 172:65be27845400 | 2235 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2236 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 2237 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 2238 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 2239 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 2240 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 2241 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 2242 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 2243 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 2244 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 2245 | * @retval None |
AnnaBridge | 172:65be27845400 | 2246 | */ |
AnnaBridge | 172:65be27845400 | 2247 | __STATIC_INLINE void LL_BDMA_DisableIT_TE(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 2248 | { |
AnnaBridge | 172:65be27845400 | 2249 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 2250 | |
AnnaBridge | 172:65be27845400 | 2251 | CLEAR_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_TEIE); |
AnnaBridge | 172:65be27845400 | 2252 | } |
AnnaBridge | 172:65be27845400 | 2253 | |
AnnaBridge | 172:65be27845400 | 2254 | /** |
AnnaBridge | 172:65be27845400 | 2255 | * @brief Check if Transfer complete Interrupt is enabled. |
AnnaBridge | 172:65be27845400 | 2256 | * @rmtoll CCR TCIE LL_BDMA_IsEnabledIT_TC |
AnnaBridge | 172:65be27845400 | 2257 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2258 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 2259 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 2260 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 2261 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 2262 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 2263 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 2264 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 2265 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 2266 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 2267 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 2268 | */ |
AnnaBridge | 172:65be27845400 | 2269 | __STATIC_INLINE uint32_t LL_BDMA_IsEnabledIT_TC(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 2270 | { |
AnnaBridge | 172:65be27845400 | 2271 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 2272 | |
AnnaBridge | 172:65be27845400 | 2273 | return ((READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_TCIE) == (BDMA_CCR_TCIE)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 2274 | } |
AnnaBridge | 172:65be27845400 | 2275 | |
AnnaBridge | 172:65be27845400 | 2276 | /** |
AnnaBridge | 172:65be27845400 | 2277 | * @brief Check if Half transfer Interrupt is enabled. |
AnnaBridge | 172:65be27845400 | 2278 | * @rmtoll CCR HTIE LL_BDMA_IsEnabledIT_HT |
AnnaBridge | 172:65be27845400 | 2279 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2280 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 2281 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 2282 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 2283 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 2284 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 2285 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 2286 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 2287 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 2288 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 2289 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 2290 | */ |
AnnaBridge | 172:65be27845400 | 2291 | __STATIC_INLINE uint32_t LL_BDMA_IsEnabledIT_HT(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 2292 | { |
AnnaBridge | 172:65be27845400 | 2293 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 2294 | |
AnnaBridge | 172:65be27845400 | 2295 | return ((READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_HTIE) == (BDMA_CCR_HTIE)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 2296 | } |
AnnaBridge | 172:65be27845400 | 2297 | |
AnnaBridge | 172:65be27845400 | 2298 | /** |
AnnaBridge | 172:65be27845400 | 2299 | * @brief Check if Transfer error Interrupt is enabled. |
AnnaBridge | 172:65be27845400 | 2300 | * @rmtoll CCR TEIE LL_BDMA_IsEnabledIT_TE |
AnnaBridge | 172:65be27845400 | 2301 | * @param BDMAx BDMA Instance |
AnnaBridge | 172:65be27845400 | 2302 | * @param Channel This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 2303 | * @arg @ref LL_BDMA_CHANNEL_0 |
AnnaBridge | 172:65be27845400 | 2304 | * @arg @ref LL_BDMA_CHANNEL_1 |
AnnaBridge | 172:65be27845400 | 2305 | * @arg @ref LL_BDMA_CHANNEL_2 |
AnnaBridge | 172:65be27845400 | 2306 | * @arg @ref LL_BDMA_CHANNEL_3 |
AnnaBridge | 172:65be27845400 | 2307 | * @arg @ref LL_BDMA_CHANNEL_4 |
AnnaBridge | 172:65be27845400 | 2308 | * @arg @ref LL_BDMA_CHANNEL_5 |
AnnaBridge | 172:65be27845400 | 2309 | * @arg @ref LL_BDMA_CHANNEL_6 |
AnnaBridge | 172:65be27845400 | 2310 | * @arg @ref LL_BDMA_CHANNEL_7 |
AnnaBridge | 172:65be27845400 | 2311 | * @retval State of bit (1 or 0). |
AnnaBridge | 172:65be27845400 | 2312 | */ |
AnnaBridge | 172:65be27845400 | 2313 | __STATIC_INLINE uint32_t LL_BDMA_IsEnabledIT_TE(BDMA_TypeDef *BDMAx, uint32_t Channel) |
AnnaBridge | 172:65be27845400 | 2314 | { |
AnnaBridge | 172:65be27845400 | 2315 | register uint32_t bdma_base_addr = (uint32_t)BDMAx; |
AnnaBridge | 172:65be27845400 | 2316 | |
AnnaBridge | 172:65be27845400 | 2317 | return ((READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_TEIE) == (BDMA_CCR_TEIE)) ? 1UL : 0UL); |
AnnaBridge | 172:65be27845400 | 2318 | } |
AnnaBridge | 172:65be27845400 | 2319 | |
AnnaBridge | 172:65be27845400 | 2320 | /** |
AnnaBridge | 172:65be27845400 | 2321 | * @} |
AnnaBridge | 172:65be27845400 | 2322 | */ |
AnnaBridge | 172:65be27845400 | 2323 | |
AnnaBridge | 172:65be27845400 | 2324 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 172:65be27845400 | 2325 | /** @defgroup BDMA_LL_EF_Init Initialization and de-initialization functions |
AnnaBridge | 172:65be27845400 | 2326 | * @{ |
AnnaBridge | 172:65be27845400 | 2327 | */ |
AnnaBridge | 172:65be27845400 | 2328 | |
AnnaBridge | 172:65be27845400 | 2329 | uint32_t LL_BDMA_Init(BDMA_TypeDef *BDMAx, uint32_t Channel, LL_BDMA_InitTypeDef *BDMA_InitStruct); |
AnnaBridge | 172:65be27845400 | 2330 | uint32_t LL_BDMA_DeInit(BDMA_TypeDef *BDMAx, uint32_t Channel); |
AnnaBridge | 172:65be27845400 | 2331 | void LL_BDMA_StructInit(LL_BDMA_InitTypeDef *BDMA_InitStruct); |
AnnaBridge | 172:65be27845400 | 2332 | |
AnnaBridge | 172:65be27845400 | 2333 | /** |
AnnaBridge | 172:65be27845400 | 2334 | * @} |
AnnaBridge | 172:65be27845400 | 2335 | */ |
AnnaBridge | 172:65be27845400 | 2336 | #endif /* USE_FULL_LL_DRIVER */ |
AnnaBridge | 172:65be27845400 | 2337 | |
AnnaBridge | 172:65be27845400 | 2338 | /** |
AnnaBridge | 172:65be27845400 | 2339 | * @} |
AnnaBridge | 172:65be27845400 | 2340 | */ |
AnnaBridge | 172:65be27845400 | 2341 | |
AnnaBridge | 172:65be27845400 | 2342 | /** |
AnnaBridge | 172:65be27845400 | 2343 | * @} |
AnnaBridge | 172:65be27845400 | 2344 | */ |
AnnaBridge | 172:65be27845400 | 2345 | |
AnnaBridge | 172:65be27845400 | 2346 | #endif /* BDMA */ |
AnnaBridge | 172:65be27845400 | 2347 | |
AnnaBridge | 172:65be27845400 | 2348 | /** |
AnnaBridge | 172:65be27845400 | 2349 | * @} |
AnnaBridge | 172:65be27845400 | 2350 | */ |
AnnaBridge | 172:65be27845400 | 2351 | |
AnnaBridge | 172:65be27845400 | 2352 | /** |
AnnaBridge | 172:65be27845400 | 2353 | * @} |
AnnaBridge | 172:65be27845400 | 2354 | */ |
AnnaBridge | 172:65be27845400 | 2355 | |
AnnaBridge | 172:65be27845400 | 2356 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 2357 | } |
AnnaBridge | 172:65be27845400 | 2358 | #endif |
AnnaBridge | 172:65be27845400 | 2359 | |
AnnaBridge | 172:65be27845400 | 2360 | #endif /* STM32H7xx_LL_BDMA_H */ |
AnnaBridge | 172:65be27845400 | 2361 | |
AnnaBridge | 172:65be27845400 | 2362 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |