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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_STD/stm32h7xx_hal_adc_ex.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 172:65be27845400 | 1 | /** |
AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_hal_adc_ex.h |
AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
AnnaBridge | 172:65be27845400 | 5 | * @brief Header file of ADC HAL extended module. |
AnnaBridge | 172:65be27845400 | 6 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 7 | * @attention |
AnnaBridge | 172:65be27845400 | 8 | * |
AnnaBridge | 172:65be27845400 | 9 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
AnnaBridge | 172:65be27845400 | 10 | * All rights reserved.</center></h2> |
AnnaBridge | 172:65be27845400 | 11 | * |
AnnaBridge | 172:65be27845400 | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
AnnaBridge | 172:65be27845400 | 13 | * the "License"; You may not use this file except in compliance with the |
AnnaBridge | 172:65be27845400 | 14 | * License. You may obtain a copy of the License at: |
AnnaBridge | 172:65be27845400 | 15 | * opensource.org/licenses/BSD-3-Clause |
AnnaBridge | 172:65be27845400 | 16 | * |
AnnaBridge | 172:65be27845400 | 17 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 18 | */ |
AnnaBridge | 172:65be27845400 | 19 | |
AnnaBridge | 172:65be27845400 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 21 | #ifndef STM32H7xx_HAL_ADC_EX_H |
AnnaBridge | 172:65be27845400 | 22 | #define STM32H7xx_HAL_ADC_EX_H |
AnnaBridge | 172:65be27845400 | 23 | |
AnnaBridge | 172:65be27845400 | 24 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 25 | extern "C" { |
AnnaBridge | 172:65be27845400 | 26 | #endif |
AnnaBridge | 172:65be27845400 | 27 | |
AnnaBridge | 172:65be27845400 | 28 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 29 | #include "stm32h7xx_hal_def.h" |
AnnaBridge | 172:65be27845400 | 30 | |
AnnaBridge | 172:65be27845400 | 31 | /** @addtogroup STM32H7xx_HAL_Driver |
AnnaBridge | 172:65be27845400 | 32 | * @{ |
AnnaBridge | 172:65be27845400 | 33 | */ |
AnnaBridge | 172:65be27845400 | 34 | |
AnnaBridge | 172:65be27845400 | 35 | /** @addtogroup ADCEx |
AnnaBridge | 172:65be27845400 | 36 | * @{ |
AnnaBridge | 172:65be27845400 | 37 | */ |
AnnaBridge | 172:65be27845400 | 38 | |
AnnaBridge | 172:65be27845400 | 39 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 40 | /** @defgroup ADCEx_Exported_Types ADC Extended Exported Types |
AnnaBridge | 172:65be27845400 | 41 | * @{ |
AnnaBridge | 172:65be27845400 | 42 | */ |
AnnaBridge | 172:65be27845400 | 43 | |
AnnaBridge | 172:65be27845400 | 44 | /** |
AnnaBridge | 172:65be27845400 | 45 | * @brief ADC Injected Conversion Oversampling structure definition |
AnnaBridge | 172:65be27845400 | 46 | */ |
AnnaBridge | 172:65be27845400 | 47 | typedef struct |
AnnaBridge | 172:65be27845400 | 48 | { |
AnnaBridge | 172:65be27845400 | 49 | uint32_t Ratio; /*!< Configures the oversampling ratio. |
AnnaBridge | 172:65be27845400 | 50 | This parameter can be a value of @ref ADC_HAL_EC_OVS_RATIO */ |
AnnaBridge | 172:65be27845400 | 51 | |
AnnaBridge | 172:65be27845400 | 52 | uint32_t RightBitShift; /*!< Configures the division coefficient for the Oversampler. |
AnnaBridge | 172:65be27845400 | 53 | This parameter can be a value of @ref ADC_HAL_EC_OVS_SHIFT */ |
AnnaBridge | 172:65be27845400 | 54 | }ADC_InjOversamplingTypeDef; |
AnnaBridge | 172:65be27845400 | 55 | |
AnnaBridge | 172:65be27845400 | 56 | /** |
AnnaBridge | 172:65be27845400 | 57 | * @brief Structure definition of ADC group injected and ADC channel affected to ADC group injected |
AnnaBridge | 172:65be27845400 | 58 | * @note Parameters of this structure are shared within 2 scopes: |
AnnaBridge | 172:65be27845400 | 59 | * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime , InjectedSingleDiff, InjectedOffsetNumber, InjectedOffset |
AnnaBridge | 172:65be27845400 | 60 | * - Scope ADC group injected (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode, |
AnnaBridge | 172:65be27845400 | 61 | * AutoInjectedConv, QueueInjectedContext, ExternalTrigInjecConv, ExternalTrigInjecConvEdge, InjecOversamplingMode, InjecOversampling. |
AnnaBridge | 172:65be27845400 | 62 | * @note The setting of these parameters by function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state. |
AnnaBridge | 172:65be27845400 | 63 | * ADC state can be either: |
AnnaBridge | 172:65be27845400 | 64 | * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'InjectedSingleDiff') |
AnnaBridge | 172:65be27845400 | 65 | * - For parameters 'InjectedDiscontinuousConvMode', 'QueueInjectedContext', 'InjecOversampling': ADC enabled without conversion on going on injected group. |
AnnaBridge | 172:65be27845400 | 66 | * - For parameters 'InjectedSamplingTime', 'InjectedOffset', 'InjectedOffsetNumber', 'AutoInjectedConv': ADC enabled without conversion on going on regular and injected groups. |
AnnaBridge | 172:65be27845400 | 67 | * - For parameters 'InjectedChannel', 'InjectedRank', 'InjectedNbrOfConversion', 'ExternalTrigInjecConv', 'ExternalTrigInjecConvEdge': ADC enabled and while conversion on going |
AnnaBridge | 172:65be27845400 | 68 | * on ADC groups regular and injected. |
AnnaBridge | 172:65be27845400 | 69 | * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed |
AnnaBridge | 172:65be27845400 | 70 | * without error reporting (as it can be the expected behavior in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly). |
AnnaBridge | 172:65be27845400 | 71 | */ |
AnnaBridge | 172:65be27845400 | 72 | typedef struct |
AnnaBridge | 172:65be27845400 | 73 | { |
AnnaBridge | 172:65be27845400 | 74 | uint32_t InjectedChannel; /*!< Specifies the channel to configure into ADC group injected. |
AnnaBridge | 172:65be27845400 | 75 | This parameter can be a value of @ref ADC_HAL_EC_CHANNEL |
AnnaBridge | 172:65be27845400 | 76 | Note: Depending on devices and ADC instances, some channels may not be available on device package pins. Refer to device datasheet for channels availability. */ |
AnnaBridge | 172:65be27845400 | 77 | |
AnnaBridge | 172:65be27845400 | 78 | uint32_t InjectedRank; /*!< Specifies the rank in the ADC group injected sequencer. |
AnnaBridge | 172:65be27845400 | 79 | This parameter must be a value of @ref ADC_INJ_SEQ_RANKS. |
AnnaBridge | 172:65be27845400 | 80 | Note: to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by |
AnnaBridge | 172:65be27845400 | 81 | the new channel setting (or parameter number of conversions adjusted) */ |
AnnaBridge | 172:65be27845400 | 82 | |
AnnaBridge | 172:65be27845400 | 83 | uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel. |
AnnaBridge | 172:65be27845400 | 84 | Unit: ADC clock cycles. |
AnnaBridge | 172:65be27845400 | 85 | Conversion time is the addition of sampling time and processing time |
AnnaBridge | 172:65be27845400 | 86 | (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, 8.5 cycles at 8 bits, 6.5 cycles at 6 bits). |
AnnaBridge | 172:65be27845400 | 87 | This parameter can be a value of @ref ADC_HAL_EC_CHANNEL_SAMPLINGTIME. |
AnnaBridge | 172:65be27845400 | 88 | Caution: This parameter applies to a channel that can be used in a regular and/or injected group. |
AnnaBridge | 172:65be27845400 | 89 | It overwrites the last setting. |
AnnaBridge | 172:65be27845400 | 90 | Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), |
AnnaBridge | 172:65be27845400 | 91 | sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) |
AnnaBridge | 172:65be27845400 | 92 | Refer to device datasheet for timings values. */ |
AnnaBridge | 172:65be27845400 | 93 | |
AnnaBridge | 172:65be27845400 | 94 | uint32_t InjectedSingleDiff; /*!< Selection of single-ended or differential input. |
AnnaBridge | 172:65be27845400 | 95 | In differential mode: Differential measurement is between the selected channel 'i' (positive input) and channel 'i+1' (negative input). |
AnnaBridge | 172:65be27845400 | 96 | Only channel 'i' has to be configured, channel 'i+1' is configured automatically. |
AnnaBridge | 172:65be27845400 | 97 | This parameter must be a value of @ref ADC_HAL_EC_CHANNEL_SINGLE_DIFF_ENDING. |
AnnaBridge | 172:65be27845400 | 98 | Caution: This parameter applies to a channel that can be used in a regular and/or injected group. |
AnnaBridge | 172:65be27845400 | 99 | It overwrites the last setting. |
AnnaBridge | 172:65be27845400 | 100 | Note: Refer to Reference Manual to ensure the selected channel is available in differential mode. |
AnnaBridge | 172:65be27845400 | 101 | Note: When configuring a channel 'i' in differential mode, the channel 'i+1' is not usable separately. |
AnnaBridge | 172:65be27845400 | 102 | Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). |
AnnaBridge | 172:65be27845400 | 103 | If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behavior in case |
AnnaBridge | 172:65be27845400 | 104 | of another parameter update on the fly) */ |
AnnaBridge | 172:65be27845400 | 105 | |
AnnaBridge | 172:65be27845400 | 106 | uint32_t InjectedOffsetNumber; /*!< Selects the offset number. |
AnnaBridge | 172:65be27845400 | 107 | This parameter can be a value of @ref ADC_HAL_EC_OFFSET_NB. |
AnnaBridge | 172:65be27845400 | 108 | Caution: Only one offset is allowed per channel. This parameter overwrites the last setting. */ |
AnnaBridge | 172:65be27845400 | 109 | |
AnnaBridge | 172:65be27845400 | 110 | uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data. |
AnnaBridge | 172:65be27845400 | 111 | Offset value must be a positive number. |
AnnaBridge | 172:65be27845400 | 112 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number |
AnnaBridge | 172:65be27845400 | 113 | between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. |
AnnaBridge | 172:65be27845400 | 114 | Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled |
AnnaBridge | 172:65be27845400 | 115 | without continuous mode or external trigger that could launch a conversion). */ |
AnnaBridge | 172:65be27845400 | 116 | |
AnnaBridge | 172:65be27845400 | 117 | uint32_t InjectedOffsetRightShift; /*!< Specifies whether the 1 bit Right-shift feature is used or not. |
AnnaBridge | 172:65be27845400 | 118 | This parameter is applied only for 16-bit or 8-bit resolution. |
AnnaBridge | 172:65be27845400 | 119 | This parameter can be set to ENABLE or DISABLE. */ |
AnnaBridge | 172:65be27845400 | 120 | FunctionalState InjectedOffsetSignedSaturation; /*!< Specifies whether the Signed saturation feature is used or not. |
AnnaBridge | 172:65be27845400 | 121 | This parameter is applied only for 16-bit or 8-bit resolution. |
AnnaBridge | 172:65be27845400 | 122 | This parameter can be set to ENABLE or DISABLE. */ |
AnnaBridge | 172:65be27845400 | 123 | uint32_t InjectedLeftBitShift; /*!< Configures the left shifting applied to the final result with or without oversampling. |
AnnaBridge | 172:65be27845400 | 124 | This parameter can be a value of @ref ADCEx_Left_Bit_Shift */ |
AnnaBridge | 172:65be27845400 | 125 | uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the ADC group injected sequencer. |
AnnaBridge | 172:65be27845400 | 126 | To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled. |
AnnaBridge | 172:65be27845400 | 127 | This parameter must be a number between Min_Data = 1 and Max_Data = 4. |
AnnaBridge | 172:65be27845400 | 128 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
AnnaBridge | 172:65be27845400 | 129 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
AnnaBridge | 172:65be27845400 | 130 | |
AnnaBridge | 172:65be27845400 | 131 | FunctionalState InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of ADC group injected is performed in Complete-sequence/Discontinuous-sequence |
AnnaBridge | 172:65be27845400 | 132 | (main sequence subdivided in successive parts). |
AnnaBridge | 172:65be27845400 | 133 | Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. |
AnnaBridge | 172:65be27845400 | 134 | Discontinuous mode can be enabled only if continuous mode is disabled. |
AnnaBridge | 172:65be27845400 | 135 | This parameter can be set to ENABLE or DISABLE. |
AnnaBridge | 172:65be27845400 | 136 | Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). |
AnnaBridge | 172:65be27845400 | 137 | Note: For injected group, discontinuous mode converts the sequence channel by channel (discontinuous length fixed to 1 rank). |
AnnaBridge | 172:65be27845400 | 138 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
AnnaBridge | 172:65be27845400 | 139 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
AnnaBridge | 172:65be27845400 | 140 | |
AnnaBridge | 172:65be27845400 | 141 | FunctionalState AutoInjectedConv; /*!< Enables or disables the selected ADC group injected automatic conversion after regular one |
AnnaBridge | 172:65be27845400 | 142 | This parameter can be set to ENABLE or DISABLE. |
AnnaBridge | 172:65be27845400 | 143 | Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE) |
AnnaBridge | 172:65be27845400 | 144 | Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_INJECTED_SOFTWARE_START) |
AnnaBridge | 172:65be27845400 | 145 | Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete. |
AnnaBridge | 172:65be27845400 | 146 | To maintain JAUTO always enabled, DMA must be configured in circular mode. |
AnnaBridge | 172:65be27845400 | 147 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
AnnaBridge | 172:65be27845400 | 148 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
AnnaBridge | 172:65be27845400 | 149 | |
AnnaBridge | 172:65be27845400 | 150 | FunctionalState QueueInjectedContext; /*!< Specifies whether the context queue feature is enabled. |
AnnaBridge | 172:65be27845400 | 151 | This parameter can be set to ENABLE or DISABLE. |
AnnaBridge | 172:65be27845400 | 152 | If context queue is enabled, injected sequencer&channels configurations are queued on up to 2 contexts. If a |
AnnaBridge | 172:65be27845400 | 153 | new injected context is set when queue is full, error is triggered by interruption and through function |
AnnaBridge | 172:65be27845400 | 154 | 'HAL_ADCEx_InjectedQueueOverflowCallback'. |
AnnaBridge | 172:65be27845400 | 155 | Caution: This feature request that the sequence is fully configured before injected conversion start. |
AnnaBridge | 172:65be27845400 | 156 | Therefore, configure channels with as many calls to HAL_ADCEx_InjectedConfigChannel() as the 'InjectedNbrOfConversion' parameter. |
AnnaBridge | 172:65be27845400 | 157 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
AnnaBridge | 172:65be27845400 | 158 | configure a channel on injected group can impact the configuration of other channels previously set. |
AnnaBridge | 172:65be27845400 | 159 | Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). */ |
AnnaBridge | 172:65be27845400 | 160 | |
AnnaBridge | 172:65be27845400 | 161 | uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group. |
AnnaBridge | 172:65be27845400 | 162 | If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled and software trigger is used instead. |
AnnaBridge | 172:65be27845400 | 163 | This parameter can be a value of @ref ADC_injected_external_trigger_source. |
AnnaBridge | 172:65be27845400 | 164 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
AnnaBridge | 172:65be27845400 | 165 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
AnnaBridge | 172:65be27845400 | 166 | |
AnnaBridge | 172:65be27845400 | 167 | uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group. |
AnnaBridge | 172:65be27845400 | 168 | This parameter can be a value of @ref ADC_injected_external_trigger_edge. |
AnnaBridge | 172:65be27845400 | 169 | If trigger source is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded. |
AnnaBridge | 172:65be27845400 | 170 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
AnnaBridge | 172:65be27845400 | 171 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
AnnaBridge | 172:65be27845400 | 172 | |
AnnaBridge | 172:65be27845400 | 173 | FunctionalState InjecOversamplingMode; /*!< Specifies whether the oversampling feature is enabled or disabled. |
AnnaBridge | 172:65be27845400 | 174 | This parameter can be set to ENABLE or DISABLE. |
AnnaBridge | 172:65be27845400 | 175 | Note: This parameter can be modified only if there is no conversion is ongoing (both ADSTART and JADSTART cleared). */ |
AnnaBridge | 172:65be27845400 | 176 | |
AnnaBridge | 172:65be27845400 | 177 | ADC_InjOversamplingTypeDef InjecOversampling; /*!< Specifies the Oversampling parameters. |
AnnaBridge | 172:65be27845400 | 178 | Caution: this setting overwrites the previous oversampling configuration if oversampling already enabled. |
AnnaBridge | 172:65be27845400 | 179 | Note: This parameter can be modified only if there is no conversion is ongoing (both ADSTART and JADSTART cleared). */ |
AnnaBridge | 172:65be27845400 | 180 | }ADC_InjectionConfTypeDef; |
AnnaBridge | 172:65be27845400 | 181 | |
AnnaBridge | 172:65be27845400 | 182 | /** |
AnnaBridge | 172:65be27845400 | 183 | * @brief Structure definition of ADC multimode |
AnnaBridge | 172:65be27845400 | 184 | * @note The setting of these parameters by function HAL_ADCEx_MultiModeConfigChannel() is conditioned by ADCs state (both Master and Slave ADCs). |
AnnaBridge | 172:65be27845400 | 185 | * Both Master and Slave ADCs must be disabled. |
AnnaBridge | 172:65be27845400 | 186 | */ |
AnnaBridge | 172:65be27845400 | 187 | typedef struct |
AnnaBridge | 172:65be27845400 | 188 | { |
AnnaBridge | 172:65be27845400 | 189 | uint32_t Mode; /*!< Configures the ADC to operate in independent or multimode. |
AnnaBridge | 172:65be27845400 | 190 | This parameter can be a value of @ref ADC_HAL_EC_MULTI_MODE. */ |
AnnaBridge | 172:65be27845400 | 191 | uint32_t DualModeData; /*!< Configures the Dual ADC Mode Data Format: |
AnnaBridge | 172:65be27845400 | 192 | This parameter can be a value of @ref ADCEx_Dual_Mode_Data_Format */ |
AnnaBridge | 172:65be27845400 | 193 | uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases. |
AnnaBridge | 172:65be27845400 | 194 | This parameter can be a value of @ref ADC_HAL_EC_MULTI_TWOSMP_DELAY. |
AnnaBridge | 172:65be27845400 | 195 | Delay range depends on selected resolution: */ |
AnnaBridge | 172:65be27845400 | 196 | /* from 1 to 9 clock cycles for 16 bits, |
AnnaBridge | 172:65be27845400 | 197 | from 1 to 9 clock cycles for 14 bits |
AnnaBridge | 172:65be27845400 | 198 | from 1 to 8 clock cycles for 12 bits |
AnnaBridge | 172:65be27845400 | 199 | from 1 to 6 clock cycles for 10 bits |
AnnaBridge | 172:65be27845400 | 200 | from 1 to 6 clock cycles for 8 bits */ |
AnnaBridge | 172:65be27845400 | 201 | }ADC_MultiModeTypeDef; |
AnnaBridge | 172:65be27845400 | 202 | |
AnnaBridge | 172:65be27845400 | 203 | /** |
AnnaBridge | 172:65be27845400 | 204 | * @} |
AnnaBridge | 172:65be27845400 | 205 | */ |
AnnaBridge | 172:65be27845400 | 206 | |
AnnaBridge | 172:65be27845400 | 207 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 208 | |
AnnaBridge | 172:65be27845400 | 209 | /** @defgroup ADCEx_Exported_Constants ADC Extended Exported Constants |
AnnaBridge | 172:65be27845400 | 210 | * @{ |
AnnaBridge | 172:65be27845400 | 211 | */ |
AnnaBridge | 172:65be27845400 | 212 | |
AnnaBridge | 172:65be27845400 | 213 | /** @defgroup ADC_injected_external_trigger_source ADC group injected trigger source |
AnnaBridge | 172:65be27845400 | 214 | * @{ |
AnnaBridge | 172:65be27845400 | 215 | */ |
AnnaBridge | 172:65be27845400 | 216 | /* ADC group regular trigger sources for all ADC instances */ |
AnnaBridge | 172:65be27845400 | 217 | #define ADC_INJECTED_SOFTWARE_START (LL_ADC_INJ_TRIG_SOFTWARE) /*!< Software triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 218 | #define ADC_EXTERNALTRIGINJEC_T1_TRGO (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO) /*!< Event 0 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 219 | #define ADC_EXTERNALTRIGINJEC_T1_CC4 (LL_ADC_INJ_TRIG_EXT_TIM1_CH4) /*!< Event 1 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 220 | #define ADC_EXTERNALTRIGINJEC_T2_TRGO (LL_ADC_INJ_TRIG_EXT_TIM2_TRGO) /*!< Event 2 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 221 | #define ADC_EXTERNALTRIGINJEC_T2_CC1 (LL_ADC_INJ_TRIG_EXT_TIM2_CH1) /*!< Event 3 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 222 | #define ADC_EXTERNALTRIGINJEC_T3_CC4 (LL_ADC_INJ_TRIG_EXT_TIM3_CH4) /*!< Event 4 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 223 | #define ADC_EXTERNALTRIGINJEC_T4_TRGO (LL_ADC_INJ_TRIG_EXT_TIM4_TRGO) /*!< Event 5 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 224 | #define ADC_EXTERNALTRIGINJEC_EXT_IT15 (LL_ADC_INJ_TRIG_EXT_EXTI_LINE15) /*!< Event 6 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 225 | #define ADC_EXTERNALTRIGINJEC_T8_CC4 (LL_ADC_INJ_TRIG_EXT_TIM8_CH4) /*!< Event 7 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 226 | #define ADC_EXTERNALTRIGINJEC_T1_TRGO2 (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2) /*!< Event 8 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 227 | #define ADC_EXTERNALTRIGINJEC_T8_TRGO (LL_ADC_INJ_TRIG_EXT_TIM8_TRGO) /*!< Event 9 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 228 | #define ADC_EXTERNALTRIGINJEC_T8_TRGO2 (LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2) /*!< Event 10 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 229 | #define ADC_EXTERNALTRIGINJEC_T3_CC3 (LL_ADC_INJ_TRIG_EXT_TIM3_CH3) /*!< Event 11 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 230 | #define ADC_EXTERNALTRIGINJEC_T3_TRGO (LL_ADC_INJ_TRIG_EXT_TIM3_TRGO) /*!< Event 12 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 231 | #define ADC_EXTERNALTRIGINJEC_T3_CC1 (LL_ADC_INJ_TRIG_EXT_TIM3_CH1) /*!< Event 13 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 232 | #define ADC_EXTERNALTRIGINJEC_T6_TRGO (LL_ADC_INJ_TRIG_EXT_TIM6_TRGO) /*!< Event 14 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 233 | #define ADC_EXTERNALTRIGINJEC_T15_TRGO (LL_ADC_INJ_TRIG_EXT_TIM15_TRGO) /*!< Event 15 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 234 | #define ADC_EXTERNALTRIGINJEC_HR1_ADCTRG2 (LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2) /*!< Event 16 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 235 | #define ADC_EXTERNALTRIGINJEC_HR1_ADCTRG4 (LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4) /*!< Event 17 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 236 | #define ADC_EXTERNALTRIGINJEC_LPTIM1_OUT (LL_ADC_INJ_TRIG_EXT_LPTIM1_OUT) /*!< Event 18 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 237 | #define ADC_EXTERNALTRIGINJEC_LPTIM2_OUT (LL_ADC_INJ_TRIG_EXT_LPTIM2_OUT) /*!< Event 19 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 238 | #define ADC_EXTERNALTRIGINJEC_LPTIM3_OUT (LL_ADC_INJ_TRIG_EXT_LPTIM3_OUT) /*!< Event 20 triggers injected group conversion start */ |
AnnaBridge | 172:65be27845400 | 239 | |
AnnaBridge | 172:65be27845400 | 240 | /** |
AnnaBridge | 172:65be27845400 | 241 | * @} |
AnnaBridge | 172:65be27845400 | 242 | */ |
AnnaBridge | 172:65be27845400 | 243 | |
AnnaBridge | 172:65be27845400 | 244 | /** @defgroup ADC_injected_external_trigger_edge ADC group injected trigger edge (when external trigger is selected) |
AnnaBridge | 172:65be27845400 | 245 | * @{ |
AnnaBridge | 172:65be27845400 | 246 | */ |
AnnaBridge | 172:65be27845400 | 247 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE (0x00000000UL) /*!< Injected conversions hardware trigger detection disabled */ |
AnnaBridge | 172:65be27845400 | 248 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING (ADC_JSQR_JEXTEN_0) /*!< Injected conversions hardware trigger detection on the rising edge */ |
AnnaBridge | 172:65be27845400 | 249 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING (ADC_JSQR_JEXTEN_1) /*!< Injected conversions hardware trigger detection on the falling edge */ |
AnnaBridge | 172:65be27845400 | 250 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING (ADC_JSQR_JEXTEN) /*!< Injected conversions hardware trigger detection on both the rising and falling edges */ |
AnnaBridge | 172:65be27845400 | 251 | /** |
AnnaBridge | 172:65be27845400 | 252 | * @} |
AnnaBridge | 172:65be27845400 | 253 | */ |
AnnaBridge | 172:65be27845400 | 254 | |
AnnaBridge | 172:65be27845400 | 255 | /** @defgroup ADC_HAL_EC_CHANNEL_SINGLE_DIFF_ENDING Channel - Single or differential ending |
AnnaBridge | 172:65be27845400 | 256 | * @{ |
AnnaBridge | 172:65be27845400 | 257 | */ |
AnnaBridge | 172:65be27845400 | 258 | #define ADC_SINGLE_ENDED (LL_ADC_SINGLE_ENDED) /*!< ADC channel ending set to single ended (literal also used to set calibration mode) */ |
AnnaBridge | 172:65be27845400 | 259 | #define ADC_DIFFERENTIAL_ENDED (LL_ADC_DIFFERENTIAL_ENDED) /*!< ADC channel ending set to differential (literal also used to set calibration mode) */ |
AnnaBridge | 172:65be27845400 | 260 | /** |
AnnaBridge | 172:65be27845400 | 261 | * @} |
AnnaBridge | 172:65be27845400 | 262 | */ |
AnnaBridge | 172:65be27845400 | 263 | |
AnnaBridge | 172:65be27845400 | 264 | /** @defgroup ADC_HAL_EC_OFFSET_NB ADC instance - Offset number |
AnnaBridge | 172:65be27845400 | 265 | * @{ |
AnnaBridge | 172:65be27845400 | 266 | */ |
AnnaBridge | 172:65be27845400 | 267 | #define ADC_OFFSET_NONE (ADC_OFFSET_4 + 1U) /*!< ADC offset disabled: no offset correction for the selected ADC channel */ |
AnnaBridge | 172:65be27845400 | 268 | #define ADC_OFFSET_1 (LL_ADC_OFFSET_1) /*!< ADC offset number 1: ADC channel and offset level to which the offset programmed will be applied (independently of channel mapped on ADC group regular or group injected) */ |
AnnaBridge | 172:65be27845400 | 269 | #define ADC_OFFSET_2 (LL_ADC_OFFSET_2) /*!< ADC offset number 2: ADC channel and offset level to which the offset programmed will be applied (independently of channel mapped on ADC group regular or group injected) */ |
AnnaBridge | 172:65be27845400 | 270 | #define ADC_OFFSET_3 (LL_ADC_OFFSET_3) /*!< ADC offset number 3: ADC channel and offset level to which the offset programmed will be applied (independently of channel mapped on ADC group regular or group injected) */ |
AnnaBridge | 172:65be27845400 | 271 | #define ADC_OFFSET_4 (LL_ADC_OFFSET_4) /*!< ADC offset number 4: ADC channel and offset level to which the offset programmed will be applied (independently of channel mapped on ADC group regular or group injected) */ |
AnnaBridge | 172:65be27845400 | 272 | /** |
AnnaBridge | 172:65be27845400 | 273 | * @} |
AnnaBridge | 172:65be27845400 | 274 | */ |
AnnaBridge | 172:65be27845400 | 275 | |
AnnaBridge | 172:65be27845400 | 276 | /** @defgroup ADC_INJ_SEQ_RANKS ADC group injected - Sequencer ranks |
AnnaBridge | 172:65be27845400 | 277 | * @{ |
AnnaBridge | 172:65be27845400 | 278 | */ |
AnnaBridge | 172:65be27845400 | 279 | #define ADC_INJECTED_RANK_1 (LL_ADC_INJ_RANK_1) /*!< ADC group injected sequencer rank 1 */ |
AnnaBridge | 172:65be27845400 | 280 | #define ADC_INJECTED_RANK_2 (LL_ADC_INJ_RANK_2) /*!< ADC group injected sequencer rank 2 */ |
AnnaBridge | 172:65be27845400 | 281 | #define ADC_INJECTED_RANK_3 (LL_ADC_INJ_RANK_3) /*!< ADC group injected sequencer rank 3 */ |
AnnaBridge | 172:65be27845400 | 282 | #define ADC_INJECTED_RANK_4 (LL_ADC_INJ_RANK_4) /*!< ADC group injected sequencer rank 4 */ |
AnnaBridge | 172:65be27845400 | 283 | /** |
AnnaBridge | 172:65be27845400 | 284 | * @} |
AnnaBridge | 172:65be27845400 | 285 | */ |
AnnaBridge | 172:65be27845400 | 286 | |
AnnaBridge | 172:65be27845400 | 287 | /** @defgroup ADC_HAL_EC_MULTI_MODE Multimode - Mode |
AnnaBridge | 172:65be27845400 | 288 | * @{ |
AnnaBridge | 172:65be27845400 | 289 | */ |
AnnaBridge | 172:65be27845400 | 290 | #define ADC_MODE_INDEPENDENT (LL_ADC_MULTI_INDEPENDENT) /*!< ADC dual mode disabled (ADC independent mode) */ |
AnnaBridge | 172:65be27845400 | 291 | #define ADC_DUALMODE_REGSIMULT (LL_ADC_MULTI_DUAL_REG_SIMULT) /*!< ADC dual mode enabled: group regular simultaneous */ |
AnnaBridge | 172:65be27845400 | 292 | #define ADC_DUALMODE_INTERL (LL_ADC_MULTI_DUAL_REG_INTERL) /*!< ADC dual mode enabled: Combined group regular interleaved */ |
AnnaBridge | 172:65be27845400 | 293 | #define ADC_DUALMODE_INJECSIMULT (LL_ADC_MULTI_DUAL_INJ_SIMULT) /*!< ADC dual mode enabled: group injected simultaneous */ |
AnnaBridge | 172:65be27845400 | 294 | #define ADC_DUALMODE_ALTERTRIG (LL_ADC_MULTI_DUAL_INJ_ALTERN) /*!< ADC dual mode enabled: group injected alternate trigger. Works only with external triggers (not internal SW start) */ |
AnnaBridge | 172:65be27845400 | 295 | #define ADC_DUALMODE_REGSIMULT_INJECSIMULT (LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM) /*!< ADC dual mode enabled: Combined group regular simultaneous + group injected simultaneous */ |
AnnaBridge | 172:65be27845400 | 296 | #define ADC_DUALMODE_REGSIMULT_ALTERTRIG (LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT) /*!< ADC dual mode enabled: Combined group regular simultaneous + group injected alternate trigger */ |
AnnaBridge | 172:65be27845400 | 297 | #define ADC_DUALMODE_REGINTERL_INJECSIMULT (LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM) /*!< ADC dual mode enabled: Combined group regular interleaved + group injected simultaneous */ |
AnnaBridge | 172:65be27845400 | 298 | /** @defgroup ADCEx_Dual_Mode_Data_Format ADC Extended Dual Mode Data Formatting |
AnnaBridge | 172:65be27845400 | 299 | * @{ |
AnnaBridge | 172:65be27845400 | 300 | */ |
AnnaBridge | 172:65be27845400 | 301 | #define ADC_DUALMODEDATAFORMAT_DISABLED ((uint32_t)0x00000000) /*!< Dual ADC mode without data packing: ADCx_CDR and ADCx_CDR2 registers not used */ |
AnnaBridge | 172:65be27845400 | 302 | #define ADC_DUALMODEDATAFORMAT_32_10_BITS ((uint32_t)ADC_CCR_DAMDF_1) /*!< Data formatting mode for 32 down to 10-bit resolution */ |
AnnaBridge | 172:65be27845400 | 303 | #define ADC_DUALMODEDATAFORMAT_8_BITS ((uint32_t)(ADC_CCR_DAMDF_0 |ADC_CCR_DAMDF_1)) /*!< Data formatting mode for 8-bit resolution */ |
AnnaBridge | 172:65be27845400 | 304 | /** |
AnnaBridge | 172:65be27845400 | 305 | * @} |
AnnaBridge | 172:65be27845400 | 306 | */ |
AnnaBridge | 172:65be27845400 | 307 | /** @defgroup ADC_HAL_EC_MULTI_TWOSMP_DELAY Multimode - Delay between two sampling phases |
AnnaBridge | 172:65be27845400 | 308 | * @{ |
AnnaBridge | 172:65be27845400 | 309 | */ |
AnnaBridge | 172:65be27845400 | 310 | #define ADC_TWOSAMPLINGDELAY_1CYCLE (LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE_5) /*!< ADC multimode delay between two sampling phases: 1 ADC clock cycle */ |
AnnaBridge | 172:65be27845400 | 311 | #define ADC_TWOSAMPLINGDELAY_2CYCLES (LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES_5) /*!< ADC multimode delay between two sampling phases: 2 ADC clock cycles */ |
AnnaBridge | 172:65be27845400 | 312 | #define ADC_TWOSAMPLINGDELAY_3CYCLES (LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES_5) /*!< ADC multimode delay between two sampling phases: 3 ADC clock cycles */ |
AnnaBridge | 172:65be27845400 | 313 | #define ADC_TWOSAMPLINGDELAY_4CYCLES (LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES_5) /*!< ADC multimode delay between two sampling phases: 4 ADC clock cycles */ |
AnnaBridge | 172:65be27845400 | 314 | #define ADC_TWOSAMPLINGDELAY_5CYCLES (LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES_5) /*!< ADC multimode delay between two sampling phases: 5 ADC clock cycles */ |
AnnaBridge | 172:65be27845400 | 315 | #define ADC_TWOSAMPLINGDELAY_6CYCLES (LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES_5) /*!< ADC multimode delay between two sampling phases: 6 ADC clock cycles */ |
AnnaBridge | 172:65be27845400 | 316 | #define ADC_TWOSAMPLINGDELAY_7CYCLES (LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES_5) /*!< ADC multimode delay between two sampling phases: 7 ADC clock cycles */ |
AnnaBridge | 172:65be27845400 | 317 | #define ADC_TWOSAMPLINGDELAY_8CYCLES (LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES) /*!< ADC multimode delay between two sampling phases: 8 ADC clock cycles */ |
AnnaBridge | 172:65be27845400 | 318 | #define ADC_TWOSAMPLINGDELAY_9CYCLES (LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES) /*!< ADC multimode delay between two sampling phases: 9 ADC clock cycles */ |
AnnaBridge | 172:65be27845400 | 319 | /** |
AnnaBridge | 172:65be27845400 | 320 | * @} |
AnnaBridge | 172:65be27845400 | 321 | */ |
AnnaBridge | 172:65be27845400 | 322 | |
AnnaBridge | 172:65be27845400 | 323 | /** |
AnnaBridge | 172:65be27845400 | 324 | * @} |
AnnaBridge | 172:65be27845400 | 325 | */ |
AnnaBridge | 172:65be27845400 | 326 | |
AnnaBridge | 172:65be27845400 | 327 | /** @defgroup ADC_HAL_EC_GROUPS ADC instance - Groups |
AnnaBridge | 172:65be27845400 | 328 | * @{ |
AnnaBridge | 172:65be27845400 | 329 | */ |
AnnaBridge | 172:65be27845400 | 330 | #define ADC_REGULAR_GROUP (LL_ADC_GROUP_REGULAR) /*!< ADC group regular (available on all STM32 devices) */ |
AnnaBridge | 172:65be27845400 | 331 | #define ADC_INJECTED_GROUP (LL_ADC_GROUP_INJECTED) /*!< ADC group injected (not available on all STM32 devices)*/ |
AnnaBridge | 172:65be27845400 | 332 | #define ADC_REGULAR_INJECTED_GROUP (LL_ADC_GROUP_REGULAR_INJECTED) /*!< ADC both groups regular and injected */ |
AnnaBridge | 172:65be27845400 | 333 | /** |
AnnaBridge | 172:65be27845400 | 334 | * @} |
AnnaBridge | 172:65be27845400 | 335 | */ |
AnnaBridge | 172:65be27845400 | 336 | |
AnnaBridge | 172:65be27845400 | 337 | /** @defgroup ADC_CFGR_fields ADCx CFGR fields |
AnnaBridge | 172:65be27845400 | 338 | * @{ |
AnnaBridge | 172:65be27845400 | 339 | */ |
AnnaBridge | 172:65be27845400 | 340 | #define ADC_CFGR_FIELDS (ADC_CFGR_AWD1CH | ADC_CFGR_JAUTO | ADC_CFGR_JAWD1EN |\ |
AnnaBridge | 172:65be27845400 | 341 | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL | ADC_CFGR_JQM |\ |
AnnaBridge | 172:65be27845400 | 342 | ADC_CFGR_JDISCEN | ADC_CFGR_DISCNUM | ADC_CFGR_DISCEN |\ |
AnnaBridge | 172:65be27845400 | 343 | ADC_CFGR_AUTDLY | ADC_CFGR_CONT | ADC_CFGR_OVRMOD |\ |
AnnaBridge | 172:65be27845400 | 344 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\ |
AnnaBridge | 172:65be27845400 | 345 | ADC_CFGR_RES | ADC_CFGR_DMACFG | ADC_CFGR_DMAEN ) |
AnnaBridge | 172:65be27845400 | 346 | /** |
AnnaBridge | 172:65be27845400 | 347 | * @} |
AnnaBridge | 172:65be27845400 | 348 | */ |
AnnaBridge | 172:65be27845400 | 349 | |
AnnaBridge | 172:65be27845400 | 350 | /** @defgroup ADC_SMPR1_fields ADCx SMPR1 fields |
AnnaBridge | 172:65be27845400 | 351 | * @{ |
AnnaBridge | 172:65be27845400 | 352 | */ |
AnnaBridge | 172:65be27845400 | 353 | #define ADC_SMPR1_FIELDS (ADC_SMPR1_SMP9 | ADC_SMPR1_SMP8 | ADC_SMPR1_SMP7 |\ |
AnnaBridge | 172:65be27845400 | 354 | ADC_SMPR1_SMP6 | ADC_SMPR1_SMP5 | ADC_SMPR1_SMP4 |\ |
AnnaBridge | 172:65be27845400 | 355 | ADC_SMPR1_SMP3 | ADC_SMPR1_SMP2 | ADC_SMPR1_SMP1 |\ |
AnnaBridge | 172:65be27845400 | 356 | ADC_SMPR1_SMP0) |
AnnaBridge | 172:65be27845400 | 357 | /** |
AnnaBridge | 172:65be27845400 | 358 | * @} |
AnnaBridge | 172:65be27845400 | 359 | */ |
AnnaBridge | 172:65be27845400 | 360 | |
AnnaBridge | 172:65be27845400 | 361 | /** @defgroup ADC_CFGR_fields_2 ADCx CFGR sub fields |
AnnaBridge | 172:65be27845400 | 362 | * @{ |
AnnaBridge | 172:65be27845400 | 363 | */ |
AnnaBridge | 172:65be27845400 | 364 | /* ADC_CFGR fields of parameters that can be updated when no conversion |
AnnaBridge | 172:65be27845400 | 365 | (neither regular nor injected) is on-going */ |
AnnaBridge | 172:65be27845400 | 366 | #define ADC_CFGR_FIELDS_2 ((uint32_t)(ADC_CFGR_DMNGT | ADC_CFGR_AUTDLY)) |
AnnaBridge | 172:65be27845400 | 367 | /** |
AnnaBridge | 172:65be27845400 | 368 | * @} |
AnnaBridge | 172:65be27845400 | 369 | */ |
AnnaBridge | 172:65be27845400 | 370 | |
AnnaBridge | 172:65be27845400 | 371 | #if defined(DFSDM1_Channel0) |
AnnaBridge | 172:65be27845400 | 372 | /** @defgroup ADC_HAL_EC_REG_DFSDM_TRANSFER ADC group regular - DFSDM transfer of ADC conversion data |
AnnaBridge | 172:65be27845400 | 373 | * @{ |
AnnaBridge | 172:65be27845400 | 374 | */ |
AnnaBridge | 172:65be27845400 | 375 | #define ADC_DFSDM_MODE_DISABLE (0x00000000UL) /*!< ADC conversions are not transferred by DFSDM. */ |
AnnaBridge | 172:65be27845400 | 376 | #define ADC_DFSDM_MODE_ENABLE (LL_ADC_REG_DFSDM_TRANSFER_ENABLE) /*!< ADC conversion data are transfered to DFSDM for post processing. The ADC conversion data format must be 16-bit signed and right aligned, refer to reference manual. DFSDM transfer cannot be used if DMA transfer is enabled. */ |
AnnaBridge | 172:65be27845400 | 377 | /** |
AnnaBridge | 172:65be27845400 | 378 | * @} |
AnnaBridge | 172:65be27845400 | 379 | */ |
AnnaBridge | 172:65be27845400 | 380 | #endif |
AnnaBridge | 172:65be27845400 | 381 | |
AnnaBridge | 172:65be27845400 | 382 | /** |
AnnaBridge | 172:65be27845400 | 383 | * @} |
AnnaBridge | 172:65be27845400 | 384 | */ |
AnnaBridge | 172:65be27845400 | 385 | |
AnnaBridge | 172:65be27845400 | 386 | /* Exported macros -----------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 387 | |
AnnaBridge | 172:65be27845400 | 388 | /** @defgroup ADCEx_Exported_Macro ADC Extended Exported Macros |
AnnaBridge | 172:65be27845400 | 389 | * @{ |
AnnaBridge | 172:65be27845400 | 390 | */ |
AnnaBridge | 172:65be27845400 | 391 | |
AnnaBridge | 172:65be27845400 | 392 | /** @brief Force ADC instance in multimode mode independent (multimode disable). |
AnnaBridge | 172:65be27845400 | 393 | * @note This macro must be used only in case of transition from multimode |
AnnaBridge | 172:65be27845400 | 394 | * to mode independent and in case of unknown previous state, |
AnnaBridge | 172:65be27845400 | 395 | * to ensure ADC configuration is in mode independent. |
AnnaBridge | 172:65be27845400 | 396 | * @note Standard way of multimode configuration change is done from |
AnnaBridge | 172:65be27845400 | 397 | * HAL ADC handle of ADC master using function |
AnnaBridge | 172:65be27845400 | 398 | * "HAL_ADCEx_MultiModeConfigChannel(..., ADC_MODE_INDEPENDENT)" )". |
AnnaBridge | 172:65be27845400 | 399 | * Usage of this macro is not the Standard way of multimode |
AnnaBridge | 172:65be27845400 | 400 | * configuration and can lead to have HAL ADC handles status |
AnnaBridge | 172:65be27845400 | 401 | * misaligned. Usage of this macro must be limited to cases |
AnnaBridge | 172:65be27845400 | 402 | * mentionned above. |
AnnaBridge | 172:65be27845400 | 403 | * @param __HANDLE__ ADC handle. |
AnnaBridge | 172:65be27845400 | 404 | * @retval None |
AnnaBridge | 172:65be27845400 | 405 | */ |
AnnaBridge | 172:65be27845400 | 406 | #define ADC_FORCE_MODE_INDEPENDENT(__HANDLE__) \ |
AnnaBridge | 172:65be27845400 | 407 | LL_ADC_SetMultimode(__LL_ADC_COMMON_INSTANCE((__HANDLE__)->Instance), LL_ADC_MULTI_INDEPENDENT) |
AnnaBridge | 172:65be27845400 | 408 | |
AnnaBridge | 172:65be27845400 | 409 | /** |
AnnaBridge | 172:65be27845400 | 410 | * @} |
AnnaBridge | 172:65be27845400 | 411 | */ |
AnnaBridge | 172:65be27845400 | 412 | |
AnnaBridge | 172:65be27845400 | 413 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 414 | |
AnnaBridge | 172:65be27845400 | 415 | /** @defgroup ADCEx_Private_Macro_internal_HAL_driver ADC Extended Private Macros |
AnnaBridge | 172:65be27845400 | 416 | * @{ |
AnnaBridge | 172:65be27845400 | 417 | */ |
AnnaBridge | 172:65be27845400 | 418 | /* Macro reserved for internal HAL driver usage, not intended to be used in */ |
AnnaBridge | 172:65be27845400 | 419 | /* code of final user. */ |
AnnaBridge | 172:65be27845400 | 420 | |
AnnaBridge | 172:65be27845400 | 421 | /** |
AnnaBridge | 172:65be27845400 | 422 | * @brief Test if conversion trigger of injected group is software start |
AnnaBridge | 172:65be27845400 | 423 | * or external trigger. |
AnnaBridge | 172:65be27845400 | 424 | * @param __HANDLE__ ADC handle. |
AnnaBridge | 172:65be27845400 | 425 | * @retval SET (software start) or RESET (external trigger). |
AnnaBridge | 172:65be27845400 | 426 | */ |
AnnaBridge | 172:65be27845400 | 427 | #define ADC_IS_SOFTWARE_START_INJECTED(__HANDLE__) \ |
AnnaBridge | 172:65be27845400 | 428 | (((__HANDLE__)->Instance->JSQR & ADC_JSQR_JEXTEN) == 0UL) |
AnnaBridge | 172:65be27845400 | 429 | |
AnnaBridge | 172:65be27845400 | 430 | /** |
AnnaBridge | 172:65be27845400 | 431 | * @brief Check if conversion is on going on regular or injected groups. |
AnnaBridge | 172:65be27845400 | 432 | * @param __HANDLE__ ADC handle. |
AnnaBridge | 172:65be27845400 | 433 | * @retval SET (conversion is on going) or RESET (no conversion is on going). |
AnnaBridge | 172:65be27845400 | 434 | */ |
AnnaBridge | 172:65be27845400 | 435 | #define ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(__HANDLE__) \ |
AnnaBridge | 172:65be27845400 | 436 | (( (((__HANDLE__)->Instance->CR) & (ADC_CR_ADSTART | ADC_CR_JADSTART)) == 0UL \ |
AnnaBridge | 172:65be27845400 | 437 | ) ? RESET : SET) |
AnnaBridge | 172:65be27845400 | 438 | |
AnnaBridge | 172:65be27845400 | 439 | /** |
AnnaBridge | 172:65be27845400 | 440 | * @brief Check if conversion is on going on injected group. |
AnnaBridge | 172:65be27845400 | 441 | * @param __HANDLE__ ADC handle. |
AnnaBridge | 172:65be27845400 | 442 | * @retval Value "0" (no conversion is on going) or value "1" (conversion is on going) |
AnnaBridge | 172:65be27845400 | 443 | */ |
AnnaBridge | 172:65be27845400 | 444 | #define ADC_IS_CONVERSION_ONGOING_INJECTED(__HANDLE__) \ |
AnnaBridge | 172:65be27845400 | 445 | (LL_ADC_INJ_IsConversionOngoing((__HANDLE__)->Instance)) |
AnnaBridge | 172:65be27845400 | 446 | |
AnnaBridge | 172:65be27845400 | 447 | /** |
AnnaBridge | 172:65be27845400 | 448 | * @brief Check whether or not ADC is independent. |
AnnaBridge | 172:65be27845400 | 449 | * @param __HANDLE__ ADC handle. |
AnnaBridge | 172:65be27845400 | 450 | * @note When multimode feature is not available, the macro always returns SET. |
AnnaBridge | 172:65be27845400 | 451 | * @retval SET (ADC is independent) or RESET (ADC is not). |
AnnaBridge | 172:65be27845400 | 452 | */ |
AnnaBridge | 172:65be27845400 | 453 | #define ADC_IS_INDEPENDENT(__HANDLE__) \ |
AnnaBridge | 172:65be27845400 | 454 | ( ( ( ((__HANDLE__)->Instance) == ADC3) \ |
AnnaBridge | 172:65be27845400 | 455 | )? \ |
AnnaBridge | 172:65be27845400 | 456 | SET \ |
AnnaBridge | 172:65be27845400 | 457 | : \ |
AnnaBridge | 172:65be27845400 | 458 | RESET \ |
AnnaBridge | 172:65be27845400 | 459 | ) |
AnnaBridge | 172:65be27845400 | 460 | |
AnnaBridge | 172:65be27845400 | 461 | /** |
AnnaBridge | 172:65be27845400 | 462 | * @brief Set the selected injected Channel rank. |
AnnaBridge | 172:65be27845400 | 463 | * @param __CHANNELNB__ Channel number. |
AnnaBridge | 172:65be27845400 | 464 | * @param __RANKNB__ Rank number. |
AnnaBridge | 172:65be27845400 | 465 | * @retval None |
AnnaBridge | 172:65be27845400 | 466 | */ |
AnnaBridge | 172:65be27845400 | 467 | #define ADC_JSQR_RK(__CHANNELNB__, __RANKNB__) ((((__CHANNELNB__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK)) |
AnnaBridge | 172:65be27845400 | 468 | |
AnnaBridge | 172:65be27845400 | 469 | /** |
AnnaBridge | 172:65be27845400 | 470 | * @brief Configure ADC injected context queue |
AnnaBridge | 172:65be27845400 | 471 | * @param __INJECT_CONTEXT_QUEUE_MODE__ Injected context queue mode. |
AnnaBridge | 172:65be27845400 | 472 | * @retval None |
AnnaBridge | 172:65be27845400 | 473 | */ |
AnnaBridge | 172:65be27845400 | 474 | #define ADC_CFGR_INJECT_CONTEXT_QUEUE(__INJECT_CONTEXT_QUEUE_MODE__) ((__INJECT_CONTEXT_QUEUE_MODE__) << ADC_CFGR_JQM_Pos) |
AnnaBridge | 172:65be27845400 | 475 | |
AnnaBridge | 172:65be27845400 | 476 | /** |
AnnaBridge | 172:65be27845400 | 477 | * @brief Configure ADC discontinuous conversion mode for injected group |
AnnaBridge | 172:65be27845400 | 478 | * @param __INJECT_DISCONTINUOUS_MODE__ Injected discontinuous mode. |
AnnaBridge | 172:65be27845400 | 479 | * @retval None |
AnnaBridge | 172:65be27845400 | 480 | */ |
AnnaBridge | 172:65be27845400 | 481 | #define ADC_CFGR_INJECT_DISCCONTINUOUS(__INJECT_DISCONTINUOUS_MODE__) ((__INJECT_DISCONTINUOUS_MODE__) << ADC_CFGR_JDISCEN_Pos) |
AnnaBridge | 172:65be27845400 | 482 | |
AnnaBridge | 172:65be27845400 | 483 | /** |
AnnaBridge | 172:65be27845400 | 484 | * @brief Configure ADC discontinuous conversion mode for regular group |
AnnaBridge | 172:65be27845400 | 485 | * @param __REG_DISCONTINUOUS_MODE__ Regular discontinuous mode. |
AnnaBridge | 172:65be27845400 | 486 | * @retval None |
AnnaBridge | 172:65be27845400 | 487 | */ |
AnnaBridge | 172:65be27845400 | 488 | #define ADC_CFGR_REG_DISCONTINUOUS(__REG_DISCONTINUOUS_MODE__) ((__REG_DISCONTINUOUS_MODE__) << ADC_CFGR_DISCEN_Pos) |
AnnaBridge | 172:65be27845400 | 489 | |
AnnaBridge | 172:65be27845400 | 490 | /** |
AnnaBridge | 172:65be27845400 | 491 | * @brief Configure the number of discontinuous conversions for regular group. |
AnnaBridge | 172:65be27845400 | 492 | * @param __NBR_DISCONTINUOUS_CONV__ Number of discontinuous conversions. |
AnnaBridge | 172:65be27845400 | 493 | * @retval None |
AnnaBridge | 172:65be27845400 | 494 | */ |
AnnaBridge | 172:65be27845400 | 495 | #define ADC_CFGR_DISCONTINUOUS_NUM(__NBR_DISCONTINUOUS_CONV__) (((__NBR_DISCONTINUOUS_CONV__) - 1UL) << ADC_CFGR_DISCNUM_Pos) |
AnnaBridge | 172:65be27845400 | 496 | |
AnnaBridge | 172:65be27845400 | 497 | /** |
AnnaBridge | 172:65be27845400 | 498 | * @brief Configure the ADC auto delay mode. |
AnnaBridge | 172:65be27845400 | 499 | * @param __AUTOWAIT__ Auto delay bit enable or disable. |
AnnaBridge | 172:65be27845400 | 500 | * @retval None |
AnnaBridge | 172:65be27845400 | 501 | */ |
AnnaBridge | 172:65be27845400 | 502 | #define ADC_CFGR_AUTOWAIT(__AUTOWAIT__) ((__AUTOWAIT__) << ADC_CFGR_AUTDLY_Pos) |
AnnaBridge | 172:65be27845400 | 503 | |
AnnaBridge | 172:65be27845400 | 504 | /** |
AnnaBridge | 172:65be27845400 | 505 | * @brief Configure ADC continuous conversion mode. |
AnnaBridge | 172:65be27845400 | 506 | * @param __CONTINUOUS_MODE__ Continuous mode. |
AnnaBridge | 172:65be27845400 | 507 | * @retval None |
AnnaBridge | 172:65be27845400 | 508 | */ |
AnnaBridge | 172:65be27845400 | 509 | #define ADC_CFGR_CONTINUOUS(__CONTINUOUS_MODE__) ((__CONTINUOUS_MODE__) << ADC_CFGR_CONT_Pos) |
AnnaBridge | 172:65be27845400 | 510 | |
AnnaBridge | 172:65be27845400 | 511 | /** |
AnnaBridge | 172:65be27845400 | 512 | * @brief Enable the ADC DMA continuous request. |
AnnaBridge | 172:65be27845400 | 513 | * @param __DMACONTREQ_MODE__: DMA continuous request mode. |
AnnaBridge | 172:65be27845400 | 514 | * @retval None |
AnnaBridge | 172:65be27845400 | 515 | */ |
AnnaBridge | 172:65be27845400 | 516 | #define ADC_CFGR_DMACONTREQ(__DMACONTREQ_MODE__) ((__DMACONTREQ_MODE__)) |
AnnaBridge | 172:65be27845400 | 517 | /** |
AnnaBridge | 172:65be27845400 | 518 | * @brief Configure the channel number into offset OFRx register. |
AnnaBridge | 172:65be27845400 | 519 | * @param __CHANNEL__ ADC Channel. |
AnnaBridge | 172:65be27845400 | 520 | * @retval None |
AnnaBridge | 172:65be27845400 | 521 | */ |
AnnaBridge | 172:65be27845400 | 522 | #define ADC_OFR_CHANNEL(__CHANNEL__) ((__CHANNEL__) << ADC_OFR1_OFFSET1_CH_Pos) |
AnnaBridge | 172:65be27845400 | 523 | |
AnnaBridge | 172:65be27845400 | 524 | /** |
AnnaBridge | 172:65be27845400 | 525 | * @brief Configure the channel number into differential mode selection register. |
AnnaBridge | 172:65be27845400 | 526 | * @param __CHANNEL__ ADC Channel. |
AnnaBridge | 172:65be27845400 | 527 | * @retval None |
AnnaBridge | 172:65be27845400 | 528 | */ |
AnnaBridge | 172:65be27845400 | 529 | #define ADC_DIFSEL_CHANNEL(__CHANNEL__) (1UL << (__CHANNEL__)) |
AnnaBridge | 172:65be27845400 | 530 | |
AnnaBridge | 172:65be27845400 | 531 | /** |
AnnaBridge | 172:65be27845400 | 532 | * @brief Configure calibration factor in differential mode to be set into calibration register. |
AnnaBridge | 172:65be27845400 | 533 | * @param __CALIBRATION_FACTOR__ Calibration factor value. |
AnnaBridge | 172:65be27845400 | 534 | * @retval None |
AnnaBridge | 172:65be27845400 | 535 | */ |
AnnaBridge | 172:65be27845400 | 536 | #define ADC_CALFACT_DIFF_SET(__CALIBRATION_FACTOR__) (((__CALIBRATION_FACTOR__) & (ADC_CALFACT_CALFACT_D_Pos >> ADC_CALFACT_CALFACT_D_Pos) ) << ADC_CALFACT_CALFACT_D_Pos) |
AnnaBridge | 172:65be27845400 | 537 | |
AnnaBridge | 172:65be27845400 | 538 | /** |
AnnaBridge | 172:65be27845400 | 539 | * @brief Calibration factor in differential mode to be retrieved from calibration register. |
AnnaBridge | 172:65be27845400 | 540 | * @param __CALIBRATION_FACTOR__ Calibration factor value. |
AnnaBridge | 172:65be27845400 | 541 | * @retval None |
AnnaBridge | 172:65be27845400 | 542 | */ |
AnnaBridge | 172:65be27845400 | 543 | #define ADC_CALFACT_DIFF_GET(__CALIBRATION_FACTOR__) ((__CALIBRATION_FACTOR__) >> ADC_CALFACT_CALFACT_D_Pos) |
AnnaBridge | 172:65be27845400 | 544 | |
AnnaBridge | 172:65be27845400 | 545 | /** |
AnnaBridge | 172:65be27845400 | 546 | * @brief Configure the analog watchdog high threshold into registers TR1, TR2 or TR3. |
AnnaBridge | 172:65be27845400 | 547 | * @param __THRESHOLD__ Threshold value. |
AnnaBridge | 172:65be27845400 | 548 | * @retval None |
AnnaBridge | 172:65be27845400 | 549 | */ |
AnnaBridge | 172:65be27845400 | 550 | #define ADC_TRX_HIGHTHRESHOLD(__THRESHOLD__) ((__THRESHOLD__) << 16UL) |
AnnaBridge | 172:65be27845400 | 551 | |
AnnaBridge | 172:65be27845400 | 552 | /** |
AnnaBridge | 172:65be27845400 | 553 | * @brief Configure the ADC DMA continuous request for ADC multimode. |
AnnaBridge | 172:65be27845400 | 554 | * @param __DMACONTREQ_MODE__ DMA continuous request mode. |
AnnaBridge | 172:65be27845400 | 555 | * @retval None |
AnnaBridge | 172:65be27845400 | 556 | */ |
AnnaBridge | 172:65be27845400 | 557 | #define ADC_CCR_MULTI_DMACONTREQ(__DMACONTREQ_MODE__) ((__DMACONTREQ_MODE__) << ADC_CCR_DMACFG_Pos) |
AnnaBridge | 172:65be27845400 | 558 | |
AnnaBridge | 172:65be27845400 | 559 | /** |
AnnaBridge | 172:65be27845400 | 560 | * @brief Shift the offset in function of the selected ADC resolution. |
AnnaBridge | 172:65be27845400 | 561 | * @note Offset has to be left-aligned on bit 15, the LSB (right bits) are set to 0 |
AnnaBridge | 172:65be27845400 | 562 | * If resolution 16 bits, no shift. |
AnnaBridge | 172:65be27845400 | 563 | * If resolution 14 bits, shift of 2 ranks on the left. |
AnnaBridge | 172:65be27845400 | 564 | * If resolution 12 bits, shift of 4 ranks on the left. |
AnnaBridge | 172:65be27845400 | 565 | * If resolution 10 bits, shift of 6 ranks on the left. |
AnnaBridge | 172:65be27845400 | 566 | * If resolution 8 bits, shift of 8 ranks on the left. |
AnnaBridge | 172:65be27845400 | 567 | * therefore, shift = (16 - resolution) = 16 - (16 - (((RES[2:0]) >> 2)*2)) |
AnnaBridge | 172:65be27845400 | 568 | * @param __HANDLE__: ADC handle |
AnnaBridge | 172:65be27845400 | 569 | * @param __OFFSET__: Value to be shifted |
AnnaBridge | 172:65be27845400 | 570 | * @retval None |
AnnaBridge | 172:65be27845400 | 571 | */ |
AnnaBridge | 172:65be27845400 | 572 | #define ADC_OFFSET_SHIFT_RESOLUTION(__HANDLE__, __OFFSET__) \ |
AnnaBridge | 172:65be27845400 | 573 | (((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES_2) == 0UL)? \ |
AnnaBridge | 172:65be27845400 | 574 | ((__OFFSET__)<<(((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES)>> 2UL )*2UL)): \ |
AnnaBridge | 172:65be27845400 | 575 | ((__OFFSET__)<<(((((__HANDLE__)->Instance->CFGR) & (ADC_CFGR_RES & 0xFFFFFFF3UL))>> 2UL )*2UL))) |
AnnaBridge | 172:65be27845400 | 576 | |
AnnaBridge | 172:65be27845400 | 577 | |
AnnaBridge | 172:65be27845400 | 578 | /** |
AnnaBridge | 172:65be27845400 | 579 | * @brief Shift the AWD1 threshold in function of the selected ADC resolution. |
AnnaBridge | 172:65be27845400 | 580 | * @note Thresholds have to be left-aligned on bit 15, the LSB (right bits) are set to 0. |
AnnaBridge | 172:65be27845400 | 581 | * If resolution 16 bits, no shift. |
AnnaBridge | 172:65be27845400 | 582 | * If resolution 14 bits, shift of 2 ranks on the left. |
AnnaBridge | 172:65be27845400 | 583 | * If resolution 12 bits, shift of 4 ranks on the left. |
AnnaBridge | 172:65be27845400 | 584 | * If resolution 10 bits, shift of 6 ranks on the left. |
AnnaBridge | 172:65be27845400 | 585 | * If resolution 8 bits, shift of 8 ranks on the left. |
AnnaBridge | 172:65be27845400 | 586 | * therefore, shift = (16 - resolution) = 16 - (16- (((RES[2:0]) >> 2)*2)) |
AnnaBridge | 172:65be27845400 | 587 | * @param __HANDLE__: ADC handle |
AnnaBridge | 172:65be27845400 | 588 | * @param __THRESHOLD__: Value to be shifted |
AnnaBridge | 172:65be27845400 | 589 | * @retval None |
AnnaBridge | 172:65be27845400 | 590 | */ |
AnnaBridge | 172:65be27845400 | 591 | #define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, __THRESHOLD__) \ |
AnnaBridge | 172:65be27845400 | 592 | (((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES_2) == 0UL)? \ |
AnnaBridge | 172:65be27845400 | 593 | ((__THRESHOLD__)<<(((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES)>> 2UL )*2UL)): \ |
AnnaBridge | 172:65be27845400 | 594 | ((__THRESHOLD__)<<(((((__HANDLE__)->Instance->CFGR) & (ADC_CFGR_RES & 0xFFFFFFF3UL))>> 2UL )*2UL))) |
AnnaBridge | 172:65be27845400 | 595 | |
AnnaBridge | 172:65be27845400 | 596 | /** |
AnnaBridge | 172:65be27845400 | 597 | * @brief Shift the AWD2 and AWD3 threshold in function of the selected ADC resolution. |
AnnaBridge | 172:65be27845400 | 598 | * @note Thresholds have to be left-aligned on bit 15, the LSB (right bits) are set to 0. |
AnnaBridge | 172:65be27845400 | 599 | * If resolution 16 bits, no shift. |
AnnaBridge | 172:65be27845400 | 600 | * If resolution 14 bits, shift of 2 ranks on the left. |
AnnaBridge | 172:65be27845400 | 601 | * If resolution 12 bits, shift of 4 ranks on the left. |
AnnaBridge | 172:65be27845400 | 602 | * If resolution 10 bits, shift of 6 ranks on the left. |
AnnaBridge | 172:65be27845400 | 603 | * If resolution 8 bits, shift of 8 ranks on the left. |
AnnaBridge | 172:65be27845400 | 604 | * therefore, shift = (16 - resolution) = 16 - (16- (((RES[2:0]) >> 2)*2)) |
AnnaBridge | 172:65be27845400 | 605 | * @param __HANDLE__: ADC handle |
AnnaBridge | 172:65be27845400 | 606 | * @param __THRESHOLD__: Value to be shifted |
AnnaBridge | 172:65be27845400 | 607 | * @retval None |
AnnaBridge | 172:65be27845400 | 608 | */ |
AnnaBridge | 172:65be27845400 | 609 | #define ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, __THRESHOLD__) \ |
AnnaBridge | 172:65be27845400 | 610 | (((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES_2) == 0UL)? \ |
AnnaBridge | 172:65be27845400 | 611 | ((__THRESHOLD__)<<(((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES)>> 2UL )*2UL)): \ |
AnnaBridge | 172:65be27845400 | 612 | ((__THRESHOLD__)<<(((((__HANDLE__)->Instance->CFGR) & (ADC_CFGR_RES & 0xFFFFFFF3UL))>> 2UL )*2UL))) |
AnnaBridge | 172:65be27845400 | 613 | |
AnnaBridge | 172:65be27845400 | 614 | |
AnnaBridge | 172:65be27845400 | 615 | /** |
AnnaBridge | 172:65be27845400 | 616 | * @brief Clear Common Control Register. |
AnnaBridge | 172:65be27845400 | 617 | * @param __HANDLE__ ADC handle. |
AnnaBridge | 172:65be27845400 | 618 | * @retval None |
AnnaBridge | 172:65be27845400 | 619 | */ |
AnnaBridge | 172:65be27845400 | 620 | /** |
AnnaBridge | 172:65be27845400 | 621 | * @brief Report common register to ADC1 and ADC2 |
AnnaBridge | 172:65be27845400 | 622 | * @param __HANDLE__: ADC handle |
AnnaBridge | 172:65be27845400 | 623 | * @retval Common control register |
AnnaBridge | 172:65be27845400 | 624 | */ |
AnnaBridge | 172:65be27845400 | 625 | #define ADC12_COMMON_REGISTER(__HANDLE__) (ADC12_COMMON) |
AnnaBridge | 172:65be27845400 | 626 | |
AnnaBridge | 172:65be27845400 | 627 | /** |
AnnaBridge | 172:65be27845400 | 628 | * @brief Report common register to ADC1 and ADC2 |
AnnaBridge | 172:65be27845400 | 629 | * @param __HANDLE__: ADC handle |
AnnaBridge | 172:65be27845400 | 630 | * @retval Common control register |
AnnaBridge | 172:65be27845400 | 631 | */ |
AnnaBridge | 172:65be27845400 | 632 | #define ADC3_COMMON_REGISTER(__HANDLE__) (ADC3_COMMON) |
AnnaBridge | 172:65be27845400 | 633 | |
AnnaBridge | 172:65be27845400 | 634 | /** |
AnnaBridge | 172:65be27845400 | 635 | * @brief Report Master Instance |
AnnaBridge | 172:65be27845400 | 636 | * @param __HANDLE__: ADC handle |
AnnaBridge | 172:65be27845400 | 637 | * @note return same instance if ADC of input handle is independent ADC |
AnnaBridge | 172:65be27845400 | 638 | * @retval Master Instance |
AnnaBridge | 172:65be27845400 | 639 | */ |
AnnaBridge | 172:65be27845400 | 640 | #define ADC_MASTER_REGISTER(__HANDLE__) \ |
AnnaBridge | 172:65be27845400 | 641 | ( ( ((((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC3)) \ |
AnnaBridge | 172:65be27845400 | 642 | )? \ |
AnnaBridge | 172:65be27845400 | 643 | ((__HANDLE__)->Instance) \ |
AnnaBridge | 172:65be27845400 | 644 | : \ |
AnnaBridge | 172:65be27845400 | 645 | (ADC1) \ |
AnnaBridge | 172:65be27845400 | 646 | ) |
AnnaBridge | 172:65be27845400 | 647 | |
AnnaBridge | 172:65be27845400 | 648 | /** |
AnnaBridge | 172:65be27845400 | 649 | * @brief Check whether or not dual regular conversions are enabled |
AnnaBridge | 172:65be27845400 | 650 | * @param __HANDLE__: ADC handle |
AnnaBridge | 172:65be27845400 | 651 | * @retval SET (dual regular conversions are enabled) or RESET (ADC is independent or no dual regular conversions are enabled) |
AnnaBridge | 172:65be27845400 | 652 | */ |
AnnaBridge | 172:65be27845400 | 653 | #define ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE(__HANDLE__) \ |
AnnaBridge | 172:65be27845400 | 654 | ( ( ((((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)) \ |
AnnaBridge | 172:65be27845400 | 655 | )? \ |
AnnaBridge | 172:65be27845400 | 656 | ( ((ADC12_COMMON->CCR & ADC_CCR_DUAL) != ADC_MODE_INDEPENDENT) && \ |
AnnaBridge | 172:65be27845400 | 657 | ((ADC12_COMMON->CCR & ADC_CCR_DUAL) != ADC_DUALMODE_INJECSIMULT) && \ |
AnnaBridge | 172:65be27845400 | 658 | ((ADC12_COMMON->CCR & ADC_CCR_DUAL) != ADC_DUALMODE_ALTERTRIG) ) \ |
AnnaBridge | 172:65be27845400 | 659 | : \ |
AnnaBridge | 172:65be27845400 | 660 | RESET \ |
AnnaBridge | 172:65be27845400 | 661 | ) |
AnnaBridge | 172:65be27845400 | 662 | |
AnnaBridge | 172:65be27845400 | 663 | /** |
AnnaBridge | 172:65be27845400 | 664 | * @brief Verification of condition for ADC start conversion: ADC must be in non-MultiMode or MultiMode with handle of ADC master |
AnnaBridge | 172:65be27845400 | 665 | * @param __HANDLE__: ADC handle |
AnnaBridge | 172:65be27845400 | 666 | * @retval SET (non-MultiMode or Master handle) or RESET (handle of Slave ADC in MultiMode) |
AnnaBridge | 172:65be27845400 | 667 | */ |
AnnaBridge | 172:65be27845400 | 668 | #define ADC12_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \ |
AnnaBridge | 172:65be27845400 | 669 | ( ( ((__HANDLE__)->Instance == ADC1) || ((__HANDLE__)->Instance == ADC2) \ |
AnnaBridge | 172:65be27845400 | 670 | )? \ |
AnnaBridge | 172:65be27845400 | 671 | SET \ |
AnnaBridge | 172:65be27845400 | 672 | : \ |
AnnaBridge | 172:65be27845400 | 673 | ((ADC12_COMMON->CCR & ADC_CCR_DUAL) == RESET) \ |
AnnaBridge | 172:65be27845400 | 674 | ) |
AnnaBridge | 172:65be27845400 | 675 | |
AnnaBridge | 172:65be27845400 | 676 | /** |
AnnaBridge | 172:65be27845400 | 677 | * @brief Verification of condition for ADC start conversion: ADC must be in non-MultiMode or MultiMode with handle of ADC master |
AnnaBridge | 172:65be27845400 | 678 | * @param __HANDLE__: ADC handle |
AnnaBridge | 172:65be27845400 | 679 | * @retval SET (non-MultiMode or Master handle) or RESET (handle of Slave ADC in MultiMode) |
AnnaBridge | 172:65be27845400 | 680 | */ |
AnnaBridge | 172:65be27845400 | 681 | #define ADC3_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \ |
AnnaBridge | 172:65be27845400 | 682 | ( ( ((__HANDLE__)->Instance == ADC3) \ |
AnnaBridge | 172:65be27845400 | 683 | )? \ |
AnnaBridge | 172:65be27845400 | 684 | SET \ |
AnnaBridge | 172:65be27845400 | 685 | : \ |
AnnaBridge | 172:65be27845400 | 686 | ((ADC3_COMMON->CCR & ADC_CCR_DUAL) == RESET) \ |
AnnaBridge | 172:65be27845400 | 687 | ) |
AnnaBridge | 172:65be27845400 | 688 | |
AnnaBridge | 172:65be27845400 | 689 | /** |
AnnaBridge | 172:65be27845400 | 690 | * @brief Ensure ADC Instance is Independent or Master, or is not Slave ADC with dual regular conversions enabled |
AnnaBridge | 172:65be27845400 | 691 | * @param __HANDLE__: ADC handle |
AnnaBridge | 172:65be27845400 | 692 | * @retval SET (Independent or Master, or Slave without dual regular conversions enabled) or RESET (Slave ADC with dual regular conversions enabled) |
AnnaBridge | 172:65be27845400 | 693 | */ |
AnnaBridge | 172:65be27845400 | 694 | #define ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(__HANDLE__) \ |
AnnaBridge | 172:65be27845400 | 695 | ( ( ((__HANDLE__)->Instance == ADC1) || ((__HANDLE__)->Instance == ADC3) \ |
AnnaBridge | 172:65be27845400 | 696 | )? \ |
AnnaBridge | 172:65be27845400 | 697 | SET \ |
AnnaBridge | 172:65be27845400 | 698 | : \ |
AnnaBridge | 172:65be27845400 | 699 | ( ((ADC12_COMMON->CCR & ADC_CCR_DUAL) == ADC_MODE_INDEPENDENT) || \ |
AnnaBridge | 172:65be27845400 | 700 | ((ADC12_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_INJECSIMULT) || \ |
AnnaBridge | 172:65be27845400 | 701 | ((ADC12_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_ALTERTRIG) )) |
AnnaBridge | 172:65be27845400 | 702 | |
AnnaBridge | 172:65be27845400 | 703 | /** |
AnnaBridge | 172:65be27845400 | 704 | * @brief Ensure ADC Instance is Independent or Master, or is not Slave ADC with dual injected conversions enabled |
AnnaBridge | 172:65be27845400 | 705 | * @param __HANDLE__: ADC handle |
AnnaBridge | 172:65be27845400 | 706 | * @retval SET (non-MultiMode or Master, or Slave without dual injected conversions enabled) or RESET (Slave ADC with dual injected conversions enabled) |
AnnaBridge | 172:65be27845400 | 707 | */ |
AnnaBridge | 172:65be27845400 | 708 | #define ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(__HANDLE__) \ |
AnnaBridge | 172:65be27845400 | 709 | ( ( ((__HANDLE__)->Instance == ADC1) || ((__HANDLE__)->Instance == ADC3) \ |
AnnaBridge | 172:65be27845400 | 710 | )? \ |
AnnaBridge | 172:65be27845400 | 711 | SET \ |
AnnaBridge | 172:65be27845400 | 712 | : \ |
AnnaBridge | 172:65be27845400 | 713 | ( ((ADC12_COMMON->CCR & ADC_CCR_DUAL) == ADC_MODE_INDEPENDENT) || \ |
AnnaBridge | 172:65be27845400 | 714 | ((ADC12_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_REGSIMULT) || \ |
AnnaBridge | 172:65be27845400 | 715 | ((ADC12_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_INTERL) )) |
AnnaBridge | 172:65be27845400 | 716 | |
AnnaBridge | 172:65be27845400 | 717 | |
AnnaBridge | 172:65be27845400 | 718 | |
AnnaBridge | 172:65be27845400 | 719 | #define ADC_CLEAR_COMMON_CONTROL_REGISTER(__HANDLE__) CLEAR_BIT(__LL_ADC_COMMON_INSTANCE((__HANDLE__)->Instance)->CCR, ADC_CCR_CKMODE | \ |
AnnaBridge | 172:65be27845400 | 720 | ADC_CCR_PRESC | \ |
AnnaBridge | 172:65be27845400 | 721 | ADC_CCR_VBATEN | \ |
AnnaBridge | 172:65be27845400 | 722 | ADC_CCR_TSEN | \ |
AnnaBridge | 172:65be27845400 | 723 | ADC_CCR_VREFEN | \ |
AnnaBridge | 172:65be27845400 | 724 | ADC_CCR_DAMDF | \ |
AnnaBridge | 172:65be27845400 | 725 | ADC_CCR_DELAY | \ |
AnnaBridge | 172:65be27845400 | 726 | ADC_CCR_DUAL ) |
AnnaBridge | 172:65be27845400 | 727 | |
AnnaBridge | 172:65be27845400 | 728 | /** |
AnnaBridge | 172:65be27845400 | 729 | * @brief Set handle instance of the ADC slave associated to the ADC master. |
AnnaBridge | 172:65be27845400 | 730 | * @param __HANDLE_MASTER__ ADC master handle. |
AnnaBridge | 172:65be27845400 | 731 | * @param __HANDLE_SLAVE__ ADC slave handle. |
AnnaBridge | 172:65be27845400 | 732 | * @note if __HANDLE_MASTER__ is the handle of a slave ADC (ADC2) or an independent ADC, __HANDLE_SLAVE__ instance is set to NULL. |
AnnaBridge | 172:65be27845400 | 733 | * @retval None |
AnnaBridge | 172:65be27845400 | 734 | */ |
AnnaBridge | 172:65be27845400 | 735 | #define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__) \ |
AnnaBridge | 172:65be27845400 | 736 | ( (((__HANDLE_MASTER__)->Instance == ADC1)) ? ((__HANDLE_SLAVE__)->Instance = ADC2) : ((__HANDLE_SLAVE__)->Instance = NULL) ) |
AnnaBridge | 172:65be27845400 | 737 | |
AnnaBridge | 172:65be27845400 | 738 | |
AnnaBridge | 172:65be27845400 | 739 | /** |
AnnaBridge | 172:65be27845400 | 740 | * @brief Verify the ADC instance connected to the temperature sensor. |
AnnaBridge | 172:65be27845400 | 741 | * @param __HANDLE__ ADC handle. |
AnnaBridge | 172:65be27845400 | 742 | * @retval SET (ADC instance is valid) or RESET (ADC instance is invalid) |
AnnaBridge | 172:65be27845400 | 743 | */ |
AnnaBridge | 172:65be27845400 | 744 | #define ADC_TEMPERATURE_SENSOR_INSTANCE(__HANDLE__) (((__HANDLE__)->Instance) == ADC3) |
AnnaBridge | 172:65be27845400 | 745 | |
AnnaBridge | 172:65be27845400 | 746 | /** |
AnnaBridge | 172:65be27845400 | 747 | * @brief Verify the ADC instance connected to the battery voltage VBAT. |
AnnaBridge | 172:65be27845400 | 748 | * @param __HANDLE__ ADC handle. |
AnnaBridge | 172:65be27845400 | 749 | * @retval SET (ADC instance is valid) or RESET (ADC instance is invalid) |
AnnaBridge | 172:65be27845400 | 750 | */ |
AnnaBridge | 172:65be27845400 | 751 | #define ADC_BATTERY_VOLTAGE_INSTANCE(__HANDLE__) (((__HANDLE__)->Instance) == ADC3) |
AnnaBridge | 172:65be27845400 | 752 | |
AnnaBridge | 172:65be27845400 | 753 | /** |
AnnaBridge | 172:65be27845400 | 754 | * @brief Verify the ADC instance connected to the internal voltage reference VREFINT. |
AnnaBridge | 172:65be27845400 | 755 | * @param __HANDLE__ ADC handle. |
AnnaBridge | 172:65be27845400 | 756 | * @retval SET (ADC instance is valid) or RESET (ADC instance is invalid) |
AnnaBridge | 172:65be27845400 | 757 | */ |
AnnaBridge | 172:65be27845400 | 758 | #define ADC_VREFINT_INSTANCE(__HANDLE__) (((__HANDLE__)->Instance) == ADC3) |
AnnaBridge | 172:65be27845400 | 759 | |
AnnaBridge | 172:65be27845400 | 760 | /** |
AnnaBridge | 172:65be27845400 | 761 | * @brief Verify the length of scheduled injected conversions group. |
AnnaBridge | 172:65be27845400 | 762 | * @param __LENGTH__ number of programmed conversions. |
AnnaBridge | 172:65be27845400 | 763 | * @retval SET (__LENGTH__ is within the maximum number of possible programmable injected conversions) or RESET (__LENGTH__ is null or too large) |
AnnaBridge | 172:65be27845400 | 764 | */ |
AnnaBridge | 172:65be27845400 | 765 | #define IS_ADC_INJECTED_NB_CONV(__LENGTH__) (((__LENGTH__) >= (1U)) && ((__LENGTH__) <= (4U))) |
AnnaBridge | 172:65be27845400 | 766 | |
AnnaBridge | 172:65be27845400 | 767 | /** |
AnnaBridge | 172:65be27845400 | 768 | * @brief Calibration factor size verification (7 bits maximum). |
AnnaBridge | 172:65be27845400 | 769 | * @param __CALIBRATION_FACTOR__ Calibration factor value. |
AnnaBridge | 172:65be27845400 | 770 | * @retval SET (__CALIBRATION_FACTOR__ is within the authorized size) or RESET (__CALIBRATION_FACTOR__ is too large) |
AnnaBridge | 172:65be27845400 | 771 | */ |
AnnaBridge | 172:65be27845400 | 772 | #define IS_ADC_CALFACT(__CALIBRATION_FACTOR__) ((__CALIBRATION_FACTOR__) <= (0x7FU)) |
AnnaBridge | 172:65be27845400 | 773 | |
AnnaBridge | 172:65be27845400 | 774 | |
AnnaBridge | 172:65be27845400 | 775 | /** |
AnnaBridge | 172:65be27845400 | 776 | * @brief Verify the ADC channel setting. |
AnnaBridge | 172:65be27845400 | 777 | * @param __CHANNEL__ programmed ADC channel. |
AnnaBridge | 172:65be27845400 | 778 | * @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid) |
AnnaBridge | 172:65be27845400 | 779 | */ |
AnnaBridge | 172:65be27845400 | 780 | #define IS_ADC_CHANNEL(__CHANNEL__) (((__CHANNEL__) == ADC_CHANNEL_0) || \ |
AnnaBridge | 172:65be27845400 | 781 | ((__CHANNEL__) == ADC_CHANNEL_1) || \ |
AnnaBridge | 172:65be27845400 | 782 | ((__CHANNEL__) == ADC_CHANNEL_2) || \ |
AnnaBridge | 172:65be27845400 | 783 | ((__CHANNEL__) == ADC_CHANNEL_3) || \ |
AnnaBridge | 172:65be27845400 | 784 | ((__CHANNEL__) == ADC_CHANNEL_4) || \ |
AnnaBridge | 172:65be27845400 | 785 | ((__CHANNEL__) == ADC_CHANNEL_5) || \ |
AnnaBridge | 172:65be27845400 | 786 | ((__CHANNEL__) == ADC_CHANNEL_6) || \ |
AnnaBridge | 172:65be27845400 | 787 | ((__CHANNEL__) == ADC_CHANNEL_7) || \ |
AnnaBridge | 172:65be27845400 | 788 | ((__CHANNEL__) == ADC_CHANNEL_8) || \ |
AnnaBridge | 172:65be27845400 | 789 | ((__CHANNEL__) == ADC_CHANNEL_9) || \ |
AnnaBridge | 172:65be27845400 | 790 | ((__CHANNEL__) == ADC_CHANNEL_10) || \ |
AnnaBridge | 172:65be27845400 | 791 | ((__CHANNEL__) == ADC_CHANNEL_11) || \ |
AnnaBridge | 172:65be27845400 | 792 | ((__CHANNEL__) == ADC_CHANNEL_12) || \ |
AnnaBridge | 172:65be27845400 | 793 | ((__CHANNEL__) == ADC_CHANNEL_13) || \ |
AnnaBridge | 172:65be27845400 | 794 | ((__CHANNEL__) == ADC_CHANNEL_14) || \ |
AnnaBridge | 172:65be27845400 | 795 | ((__CHANNEL__) == ADC_CHANNEL_15) || \ |
AnnaBridge | 172:65be27845400 | 796 | ((__CHANNEL__) == ADC_CHANNEL_16) || \ |
AnnaBridge | 172:65be27845400 | 797 | ((__CHANNEL__) == ADC_CHANNEL_17) || \ |
AnnaBridge | 172:65be27845400 | 798 | ((__CHANNEL__) == ADC_CHANNEL_18) || \ |
AnnaBridge | 172:65be27845400 | 799 | ((__CHANNEL__) == ADC_CHANNEL_19) || \ |
AnnaBridge | 172:65be27845400 | 800 | ((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) || \ |
AnnaBridge | 172:65be27845400 | 801 | ((__CHANNEL__) == ADC_CHANNEL_VBAT) || \ |
AnnaBridge | 172:65be27845400 | 802 | ((__CHANNEL__) == ADC_CHANNEL_DAC1CH1_ADC2)|| \ |
AnnaBridge | 172:65be27845400 | 803 | ((__CHANNEL__) == ADC_CHANNEL_DAC1CH2_ADC2)|| \ |
AnnaBridge | 172:65be27845400 | 804 | ((__CHANNEL__) == ADC_CHANNEL_VREFINT) ) |
AnnaBridge | 172:65be27845400 | 805 | |
AnnaBridge | 172:65be27845400 | 806 | /** |
AnnaBridge | 172:65be27845400 | 807 | * @brief Verify the ADC channel setting in differential mode for ADC1. |
AnnaBridge | 172:65be27845400 | 808 | * @param __CHANNEL__: programmed ADC channel. |
AnnaBridge | 172:65be27845400 | 809 | * @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid) |
AnnaBridge | 172:65be27845400 | 810 | */ |
AnnaBridge | 172:65be27845400 | 811 | #define IS_ADC1_DIFF_CHANNEL(__CHANNEL__) (((__CHANNEL__) == ADC_CHANNEL_1)|| \ |
AnnaBridge | 172:65be27845400 | 812 | ((__CHANNEL__) == ADC_CHANNEL_2) ||\ |
AnnaBridge | 172:65be27845400 | 813 | ((__CHANNEL__) == ADC_CHANNEL_3) ||\ |
AnnaBridge | 172:65be27845400 | 814 | ((__CHANNEL__) == ADC_CHANNEL_4) ||\ |
AnnaBridge | 172:65be27845400 | 815 | ((__CHANNEL__) == ADC_CHANNEL_5) ||\ |
AnnaBridge | 172:65be27845400 | 816 | ((__CHANNEL__) == ADC_CHANNEL_10) ||\ |
AnnaBridge | 172:65be27845400 | 817 | ((__CHANNEL__) == ADC_CHANNEL_11) ||\ |
AnnaBridge | 172:65be27845400 | 818 | ((__CHANNEL__) == ADC_CHANNEL_12) ||\ |
AnnaBridge | 172:65be27845400 | 819 | ((__CHANNEL__) == ADC_CHANNEL_16) ||\ |
AnnaBridge | 172:65be27845400 | 820 | ((__CHANNEL__) == ADC_CHANNEL_18) ) |
AnnaBridge | 172:65be27845400 | 821 | |
AnnaBridge | 172:65be27845400 | 822 | /** |
AnnaBridge | 172:65be27845400 | 823 | * @brief Verify the ADC channel setting in differential mode for ADC2. |
AnnaBridge | 172:65be27845400 | 824 | * @param __CHANNEL__: programmed ADC channel. |
AnnaBridge | 172:65be27845400 | 825 | * @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid) |
AnnaBridge | 172:65be27845400 | 826 | */ |
AnnaBridge | 172:65be27845400 | 827 | #define IS_ADC2_DIFF_CHANNEL(__CHANNEL__) (((__CHANNEL__) == ADC_CHANNEL_1)|| \ |
AnnaBridge | 172:65be27845400 | 828 | ((__CHANNEL__) == ADC_CHANNEL_2) || \ |
AnnaBridge | 172:65be27845400 | 829 | ((__CHANNEL__) == ADC_CHANNEL_3) || \ |
AnnaBridge | 172:65be27845400 | 830 | ((__CHANNEL__) == ADC_CHANNEL_4) || \ |
AnnaBridge | 172:65be27845400 | 831 | ((__CHANNEL__) == ADC_CHANNEL_5) || \ |
AnnaBridge | 172:65be27845400 | 832 | ((__CHANNEL__) == ADC_CHANNEL_10) || \ |
AnnaBridge | 172:65be27845400 | 833 | ((__CHANNEL__) == ADC_CHANNEL_11) || \ |
AnnaBridge | 172:65be27845400 | 834 | ((__CHANNEL__) == ADC_CHANNEL_12) || \ |
AnnaBridge | 172:65be27845400 | 835 | ((__CHANNEL__) == ADC_CHANNEL_18) ) |
AnnaBridge | 172:65be27845400 | 836 | |
AnnaBridge | 172:65be27845400 | 837 | /** |
AnnaBridge | 172:65be27845400 | 838 | * @brief Verify the ADC channel setting in differential mode for ADC3. |
AnnaBridge | 172:65be27845400 | 839 | * @param __CHANNEL__: programmed ADC channel. |
AnnaBridge | 172:65be27845400 | 840 | * @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid) |
AnnaBridge | 172:65be27845400 | 841 | */ |
AnnaBridge | 172:65be27845400 | 842 | #define IS_ADC3_DIFF_CHANNEL(__CHANNEL__) (((__CHANNEL__) == ADC_CHANNEL_1) || \ |
AnnaBridge | 172:65be27845400 | 843 | ((__CHANNEL__) == ADC_CHANNEL_2) || \ |
AnnaBridge | 172:65be27845400 | 844 | ((__CHANNEL__) == ADC_CHANNEL_3) || \ |
AnnaBridge | 172:65be27845400 | 845 | ((__CHANNEL__) == ADC_CHANNEL_4) || \ |
AnnaBridge | 172:65be27845400 | 846 | ((__CHANNEL__) == ADC_CHANNEL_5) || \ |
AnnaBridge | 172:65be27845400 | 847 | ((__CHANNEL__) == ADC_CHANNEL_10) || \ |
AnnaBridge | 172:65be27845400 | 848 | ((__CHANNEL__) == ADC_CHANNEL_11) || \ |
AnnaBridge | 172:65be27845400 | 849 | ((__CHANNEL__) == ADC_CHANNEL_13) || \ |
AnnaBridge | 172:65be27845400 | 850 | ((__CHANNEL__) == ADC_CHANNEL_14) || \ |
AnnaBridge | 172:65be27845400 | 851 | ((__CHANNEL__) == ADC_CHANNEL_15) ) |
AnnaBridge | 172:65be27845400 | 852 | |
AnnaBridge | 172:65be27845400 | 853 | |
AnnaBridge | 172:65be27845400 | 854 | |
AnnaBridge | 172:65be27845400 | 855 | /** |
AnnaBridge | 172:65be27845400 | 856 | * @brief Verify the ADC single-ended input or differential mode setting. |
AnnaBridge | 172:65be27845400 | 857 | * @param __SING_DIFF__ programmed channel setting. |
AnnaBridge | 172:65be27845400 | 858 | * @retval SET (__SING_DIFF__ is valid) or RESET (__SING_DIFF__ is invalid) |
AnnaBridge | 172:65be27845400 | 859 | */ |
AnnaBridge | 172:65be27845400 | 860 | #define IS_ADC_SINGLE_DIFFERENTIAL(__SING_DIFF__) (((__SING_DIFF__) == ADC_SINGLE_ENDED) || \ |
AnnaBridge | 172:65be27845400 | 861 | ((__SING_DIFF__) == ADC_DIFFERENTIAL_ENDED) ) |
AnnaBridge | 172:65be27845400 | 862 | |
AnnaBridge | 172:65be27845400 | 863 | /** |
AnnaBridge | 172:65be27845400 | 864 | * @brief Verify the ADC offset management setting. |
AnnaBridge | 172:65be27845400 | 865 | * @param __OFFSET_NUMBER__ ADC offset management. |
AnnaBridge | 172:65be27845400 | 866 | * @retval SET (__OFFSET_NUMBER__ is valid) or RESET (__OFFSET_NUMBER__ is invalid) |
AnnaBridge | 172:65be27845400 | 867 | */ |
AnnaBridge | 172:65be27845400 | 868 | #define IS_ADC_OFFSET_NUMBER(__OFFSET_NUMBER__) (((__OFFSET_NUMBER__) == ADC_OFFSET_NONE) || \ |
AnnaBridge | 172:65be27845400 | 869 | ((__OFFSET_NUMBER__) == ADC_OFFSET_1) || \ |
AnnaBridge | 172:65be27845400 | 870 | ((__OFFSET_NUMBER__) == ADC_OFFSET_2) || \ |
AnnaBridge | 172:65be27845400 | 871 | ((__OFFSET_NUMBER__) == ADC_OFFSET_3) || \ |
AnnaBridge | 172:65be27845400 | 872 | ((__OFFSET_NUMBER__) == ADC_OFFSET_4) ) |
AnnaBridge | 172:65be27845400 | 873 | |
AnnaBridge | 172:65be27845400 | 874 | /** |
AnnaBridge | 172:65be27845400 | 875 | * @brief Verify the ADC injected channel setting. |
AnnaBridge | 172:65be27845400 | 876 | * @param __CHANNEL__ programmed ADC injected channel. |
AnnaBridge | 172:65be27845400 | 877 | * @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid) |
AnnaBridge | 172:65be27845400 | 878 | */ |
AnnaBridge | 172:65be27845400 | 879 | #define IS_ADC_INJECTED_RANK(__CHANNEL__) (((__CHANNEL__) == ADC_INJECTED_RANK_1) || \ |
AnnaBridge | 172:65be27845400 | 880 | ((__CHANNEL__) == ADC_INJECTED_RANK_2) || \ |
AnnaBridge | 172:65be27845400 | 881 | ((__CHANNEL__) == ADC_INJECTED_RANK_3) || \ |
AnnaBridge | 172:65be27845400 | 882 | ((__CHANNEL__) == ADC_INJECTED_RANK_4) ) |
AnnaBridge | 172:65be27845400 | 883 | |
AnnaBridge | 172:65be27845400 | 884 | /** |
AnnaBridge | 172:65be27845400 | 885 | * @brief Verify the ADC injected conversions external trigger. |
AnnaBridge | 172:65be27845400 | 886 | * @param __INJTRIG__ programmed ADC injected conversions external trigger. |
AnnaBridge | 172:65be27845400 | 887 | * @retval SET (__INJTRIG__ is a valid value) or RESET (__INJTRIG__ is invalid) |
AnnaBridge | 172:65be27845400 | 888 | */ |
AnnaBridge | 172:65be27845400 | 889 | #define IS_ADC_EXTTRIGINJEC(__INJTRIG__) (((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T1_TRGO) || \ |
AnnaBridge | 172:65be27845400 | 890 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T1_CC4) || \ |
AnnaBridge | 172:65be27845400 | 891 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T2_TRGO) || \ |
AnnaBridge | 172:65be27845400 | 892 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T2_CC1) || \ |
AnnaBridge | 172:65be27845400 | 893 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_CC4) || \ |
AnnaBridge | 172:65be27845400 | 894 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T4_TRGO) || \ |
AnnaBridge | 172:65be27845400 | 895 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_EXT_IT15) || \ |
AnnaBridge | 172:65be27845400 | 896 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T8_CC4) || \ |
AnnaBridge | 172:65be27845400 | 897 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T1_TRGO2) || \ |
AnnaBridge | 172:65be27845400 | 898 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T8_TRGO) || \ |
AnnaBridge | 172:65be27845400 | 899 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T8_TRGO2) || \ |
AnnaBridge | 172:65be27845400 | 900 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_CC3) || \ |
AnnaBridge | 172:65be27845400 | 901 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_TRGO) || \ |
AnnaBridge | 172:65be27845400 | 902 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_CC1) || \ |
AnnaBridge | 172:65be27845400 | 903 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T6_TRGO) || \ |
AnnaBridge | 172:65be27845400 | 904 | ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T15_TRGO) || \ |
AnnaBridge | 172:65be27845400 | 905 | \ |
AnnaBridge | 172:65be27845400 | 906 | ((__INJTRIG__) == ADC_SOFTWARE_START) ) |
AnnaBridge | 172:65be27845400 | 907 | |
AnnaBridge | 172:65be27845400 | 908 | |
AnnaBridge | 172:65be27845400 | 909 | /** |
AnnaBridge | 172:65be27845400 | 910 | * @brief Verify the ADC edge trigger setting for injected group. |
AnnaBridge | 172:65be27845400 | 911 | * @param __EDGE__ programmed ADC edge trigger setting. |
AnnaBridge | 172:65be27845400 | 912 | * @retval SET (__EDGE__ is a valid value) or RESET (__EDGE__ is invalid) |
AnnaBridge | 172:65be27845400 | 913 | */ |
AnnaBridge | 172:65be27845400 | 914 | #define IS_ADC_EXTTRIGINJEC_EDGE(__EDGE__) (((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \ |
AnnaBridge | 172:65be27845400 | 915 | ((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING) || \ |
AnnaBridge | 172:65be27845400 | 916 | ((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING) || \ |
AnnaBridge | 172:65be27845400 | 917 | ((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING) ) |
AnnaBridge | 172:65be27845400 | 918 | |
AnnaBridge | 172:65be27845400 | 919 | /** |
AnnaBridge | 172:65be27845400 | 920 | * @brief Verify the ADC multimode setting. |
AnnaBridge | 172:65be27845400 | 921 | * @param __MODE__ programmed ADC multimode setting. |
AnnaBridge | 172:65be27845400 | 922 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
AnnaBridge | 172:65be27845400 | 923 | */ |
AnnaBridge | 172:65be27845400 | 924 | #define IS_ADC_MULTIMODE(__MODE__) (((__MODE__) == ADC_MODE_INDEPENDENT) || \ |
AnnaBridge | 172:65be27845400 | 925 | ((__MODE__) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \ |
AnnaBridge | 172:65be27845400 | 926 | ((__MODE__) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \ |
AnnaBridge | 172:65be27845400 | 927 | ((__MODE__) == ADC_DUALMODE_REGINTERL_INJECSIMULT) || \ |
AnnaBridge | 172:65be27845400 | 928 | ((__MODE__) == ADC_DUALMODE_INJECSIMULT) || \ |
AnnaBridge | 172:65be27845400 | 929 | ((__MODE__) == ADC_DUALMODE_REGSIMULT) || \ |
AnnaBridge | 172:65be27845400 | 930 | ((__MODE__) == ADC_DUALMODE_INTERL) || \ |
AnnaBridge | 172:65be27845400 | 931 | ((__MODE__) == ADC_DUALMODE_ALTERTRIG) ) |
AnnaBridge | 172:65be27845400 | 932 | |
AnnaBridge | 172:65be27845400 | 933 | /** |
AnnaBridge | 172:65be27845400 | 934 | * @brief Verify the ADC multimode DMA access setting. |
AnnaBridge | 172:65be27845400 | 935 | * @param __MODE__ programmed ADC multimode DMA access setting. |
AnnaBridge | 172:65be27845400 | 936 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
AnnaBridge | 172:65be27845400 | 937 | */ |
AnnaBridge | 172:65be27845400 | 938 | #define IS_ADC_DMA_ACCESS_MULTIMODE(__MODE__) (((__MODE__) == ADC_DMAACCESSMODE_DISABLED) || \ |
AnnaBridge | 172:65be27845400 | 939 | ((__MODE__) == ADC_DMAACCESSMODE_12_10_BITS) || \ |
AnnaBridge | 172:65be27845400 | 940 | ((__MODE__) == ADC_DMAACCESSMODE_8_6_BITS) ) |
AnnaBridge | 172:65be27845400 | 941 | |
AnnaBridge | 172:65be27845400 | 942 | /** |
AnnaBridge | 172:65be27845400 | 943 | * @brief Verify the ADC dual data mode setting. |
AnnaBridge | 172:65be27845400 | 944 | * @param MODE: programmed ADC dual mode setting. |
AnnaBridge | 172:65be27845400 | 945 | * @retval SET (MODE is valid) or RESET (MODE is invalid) |
AnnaBridge | 172:65be27845400 | 946 | */ |
AnnaBridge | 172:65be27845400 | 947 | #define IS_ADC_DUAL_DATA_MODE(MODE) (((MODE) == ADC_DUALMODEDATAFORMAT_DISABLED) || \ |
AnnaBridge | 172:65be27845400 | 948 | ((MODE) == ADC_DUALMODEDATAFORMAT_32_10_BITS) || \ |
AnnaBridge | 172:65be27845400 | 949 | ((MODE) == ADC_DUALMODEDATAFORMAT_8_BITS) ) |
AnnaBridge | 172:65be27845400 | 950 | |
AnnaBridge | 172:65be27845400 | 951 | /** |
AnnaBridge | 172:65be27845400 | 952 | * @brief Verify the ADC multimode delay setting. |
AnnaBridge | 172:65be27845400 | 953 | * @param __DELAY__ programmed ADC multimode delay setting. |
AnnaBridge | 172:65be27845400 | 954 | * @retval SET (__DELAY__ is a valid value) or RESET (__DELAY__ is invalid) |
AnnaBridge | 172:65be27845400 | 955 | */ |
AnnaBridge | 172:65be27845400 | 956 | #define IS_ADC_SAMPLING_DELAY(__DELAY__) (((__DELAY__) == ADC_TWOSAMPLINGDELAY_1CYCLE) || \ |
AnnaBridge | 172:65be27845400 | 957 | ((__DELAY__) == ADC_TWOSAMPLINGDELAY_2CYCLES) || \ |
AnnaBridge | 172:65be27845400 | 958 | ((__DELAY__) == ADC_TWOSAMPLINGDELAY_3CYCLES) || \ |
AnnaBridge | 172:65be27845400 | 959 | ((__DELAY__) == ADC_TWOSAMPLINGDELAY_4CYCLES) || \ |
AnnaBridge | 172:65be27845400 | 960 | ((__DELAY__) == ADC_TWOSAMPLINGDELAY_5CYCLES) || \ |
AnnaBridge | 172:65be27845400 | 961 | ((__DELAY__) == ADC_TWOSAMPLINGDELAY_6CYCLES) || \ |
AnnaBridge | 172:65be27845400 | 962 | ((__DELAY__) == ADC_TWOSAMPLINGDELAY_7CYCLES) || \ |
AnnaBridge | 172:65be27845400 | 963 | ((__DELAY__) == ADC_TWOSAMPLINGDELAY_8CYCLES) || \ |
AnnaBridge | 172:65be27845400 | 964 | ((__DELAY__) == ADC_TWOSAMPLINGDELAY_9CYCLES) ) |
AnnaBridge | 172:65be27845400 | 965 | |
AnnaBridge | 172:65be27845400 | 966 | |
AnnaBridge | 172:65be27845400 | 967 | /** |
AnnaBridge | 172:65be27845400 | 968 | * @brief Verify the ADC analog watchdog setting. |
AnnaBridge | 172:65be27845400 | 969 | * @param __WATCHDOG__ programmed ADC analog watchdog setting. |
AnnaBridge | 172:65be27845400 | 970 | * @retval SET (__WATCHDOG__ is valid) or RESET (__WATCHDOG__ is invalid) |
AnnaBridge | 172:65be27845400 | 971 | */ |
AnnaBridge | 172:65be27845400 | 972 | #define IS_ADC_ANALOG_WATCHDOG_NUMBER(__WATCHDOG__) (((__WATCHDOG__) == ADC_ANALOGWATCHDOG_1) || \ |
AnnaBridge | 172:65be27845400 | 973 | ((__WATCHDOG__) == ADC_ANALOGWATCHDOG_2) || \ |
AnnaBridge | 172:65be27845400 | 974 | ((__WATCHDOG__) == ADC_ANALOGWATCHDOG_3) ) |
AnnaBridge | 172:65be27845400 | 975 | |
AnnaBridge | 172:65be27845400 | 976 | /** |
AnnaBridge | 172:65be27845400 | 977 | * @brief Verify the ADC analog watchdog mode setting. |
AnnaBridge | 172:65be27845400 | 978 | * @param __WATCHDOG_MODE__ programmed ADC analog watchdog mode setting. |
AnnaBridge | 172:65be27845400 | 979 | * @retval SET (__WATCHDOG_MODE__ is valid) or RESET (__WATCHDOG_MODE__ is invalid) |
AnnaBridge | 172:65be27845400 | 980 | */ |
AnnaBridge | 172:65be27845400 | 981 | #define IS_ADC_ANALOG_WATCHDOG_MODE(__WATCHDOG_MODE__) (((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_NONE) || \ |
AnnaBridge | 172:65be27845400 | 982 | ((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \ |
AnnaBridge | 172:65be27845400 | 983 | ((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_SINGLE_INJEC) || \ |
AnnaBridge | 172:65be27845400 | 984 | ((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC) || \ |
AnnaBridge | 172:65be27845400 | 985 | ((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_ALL_REG) || \ |
AnnaBridge | 172:65be27845400 | 986 | ((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_ALL_INJEC) || \ |
AnnaBridge | 172:65be27845400 | 987 | ((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_ALL_REGINJEC) ) |
AnnaBridge | 172:65be27845400 | 988 | |
AnnaBridge | 172:65be27845400 | 989 | /** |
AnnaBridge | 172:65be27845400 | 990 | * @brief Verify the ADC conversion (regular or injected or both). |
AnnaBridge | 172:65be27845400 | 991 | * @param __CONVERSION__ ADC conversion group. |
AnnaBridge | 172:65be27845400 | 992 | * @retval SET (__CONVERSION__ is valid) or RESET (__CONVERSION__ is invalid) |
AnnaBridge | 172:65be27845400 | 993 | */ |
AnnaBridge | 172:65be27845400 | 994 | #define IS_ADC_CONVERSION_GROUP(__CONVERSION__) (((__CONVERSION__) == ADC_REGULAR_GROUP) || \ |
AnnaBridge | 172:65be27845400 | 995 | ((__CONVERSION__) == ADC_INJECTED_GROUP) || \ |
AnnaBridge | 172:65be27845400 | 996 | ((__CONVERSION__) == ADC_REGULAR_INJECTED_GROUP) ) |
AnnaBridge | 172:65be27845400 | 997 | |
AnnaBridge | 172:65be27845400 | 998 | /** |
AnnaBridge | 172:65be27845400 | 999 | * @brief Verify the ADC event type. |
AnnaBridge | 172:65be27845400 | 1000 | * @param __EVENT__ ADC event. |
AnnaBridge | 172:65be27845400 | 1001 | * @retval SET (__EVENT__ is valid) or RESET (__EVENT__ is invalid) |
AnnaBridge | 172:65be27845400 | 1002 | */ |
AnnaBridge | 172:65be27845400 | 1003 | #define IS_ADC_EVENT_TYPE(__EVENT__) (((__EVENT__) == ADC_EOSMP_EVENT) || \ |
AnnaBridge | 172:65be27845400 | 1004 | ((__EVENT__) == ADC_AWD_EVENT) || \ |
AnnaBridge | 172:65be27845400 | 1005 | ((__EVENT__) == ADC_AWD2_EVENT) || \ |
AnnaBridge | 172:65be27845400 | 1006 | ((__EVENT__) == ADC_AWD3_EVENT) || \ |
AnnaBridge | 172:65be27845400 | 1007 | ((__EVENT__) == ADC_OVR_EVENT) || \ |
AnnaBridge | 172:65be27845400 | 1008 | ((__EVENT__) == ADC_JQOVF_EVENT) ) |
AnnaBridge | 172:65be27845400 | 1009 | /** |
AnnaBridge | 172:65be27845400 | 1010 | * @brief Verify the ADC oversampling ratio. |
AnnaBridge | 172:65be27845400 | 1011 | * @param RATIO: programmed ADC oversampling ratio. |
AnnaBridge | 172:65be27845400 | 1012 | * @retval SET (RATIO is a valid value) or RESET (RATIO is invalid) |
AnnaBridge | 172:65be27845400 | 1013 | */ |
AnnaBridge | 172:65be27845400 | 1014 | #define IS_ADC_OVERSAMPLING_RATIO(RATIO) ((RATIO) < 1024UL) |
AnnaBridge | 172:65be27845400 | 1015 | /** |
AnnaBridge | 172:65be27845400 | 1016 | * @brief Verify the ADC oversampling shift. |
AnnaBridge | 172:65be27845400 | 1017 | * @param __SHIFT__ programmed ADC oversampling shift. |
AnnaBridge | 172:65be27845400 | 1018 | * @retval SET (__SHIFT__ is a valid value) or RESET (__SHIFT__ is invalid) |
AnnaBridge | 172:65be27845400 | 1019 | */ |
AnnaBridge | 172:65be27845400 | 1020 | #define IS_ADC_RIGHT_BIT_SHIFT(__SHIFT__) (((__SHIFT__) == ADC_RIGHTBITSHIFT_NONE) || \ |
AnnaBridge | 172:65be27845400 | 1021 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_1 ) || \ |
AnnaBridge | 172:65be27845400 | 1022 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_2 ) || \ |
AnnaBridge | 172:65be27845400 | 1023 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_3 ) || \ |
AnnaBridge | 172:65be27845400 | 1024 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_4 ) || \ |
AnnaBridge | 172:65be27845400 | 1025 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_5 ) || \ |
AnnaBridge | 172:65be27845400 | 1026 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_6 ) || \ |
AnnaBridge | 172:65be27845400 | 1027 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_7 ) || \ |
AnnaBridge | 172:65be27845400 | 1028 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_8 )) |
AnnaBridge | 172:65be27845400 | 1029 | |
AnnaBridge | 172:65be27845400 | 1030 | /** |
AnnaBridge | 172:65be27845400 | 1031 | * @brief Verify the ADC oversampling triggered mode. |
AnnaBridge | 172:65be27845400 | 1032 | * @param __MODE__ programmed ADC oversampling triggered mode. |
AnnaBridge | 172:65be27845400 | 1033 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
AnnaBridge | 172:65be27845400 | 1034 | */ |
AnnaBridge | 172:65be27845400 | 1035 | #define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(__MODE__) (((__MODE__) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) || \ |
AnnaBridge | 172:65be27845400 | 1036 | ((__MODE__) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) ) |
AnnaBridge | 172:65be27845400 | 1037 | |
AnnaBridge | 172:65be27845400 | 1038 | /** |
AnnaBridge | 172:65be27845400 | 1039 | * @brief Verify the ADC oversampling regular conversion resumed or continued mode. |
AnnaBridge | 172:65be27845400 | 1040 | * @param __MODE__ programmed ADC oversampling regular conversion resumed or continued mode. |
AnnaBridge | 172:65be27845400 | 1041 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
AnnaBridge | 172:65be27845400 | 1042 | */ |
AnnaBridge | 172:65be27845400 | 1043 | #define IS_ADC_REGOVERSAMPLING_MODE(__MODE__) (((__MODE__) == ADC_REGOVERSAMPLING_CONTINUED_MODE) || \ |
AnnaBridge | 172:65be27845400 | 1044 | ((__MODE__) == ADC_REGOVERSAMPLING_RESUMED_MODE) ) |
AnnaBridge | 172:65be27845400 | 1045 | |
AnnaBridge | 172:65be27845400 | 1046 | /** |
AnnaBridge | 172:65be27845400 | 1047 | * @brief Verify the DFSDM mode configuration. |
AnnaBridge | 172:65be27845400 | 1048 | * @param __HANDLE__ ADC handle. |
AnnaBridge | 172:65be27845400 | 1049 | * @note When DMSDFM configuration is not supported, the macro systematically reports SET. For |
AnnaBridge | 172:65be27845400 | 1050 | * this reason, the input parameter is the ADC handle and not the configuration parameter |
AnnaBridge | 172:65be27845400 | 1051 | * directly. |
AnnaBridge | 172:65be27845400 | 1052 | * @retval SET (DFSDM mode configuration is valid) or RESET (DFSDM mode configuration is invalid) |
AnnaBridge | 172:65be27845400 | 1053 | */ |
AnnaBridge | 172:65be27845400 | 1054 | #if defined(DFSDM1_Channel0) |
AnnaBridge | 172:65be27845400 | 1055 | #define IS_ADC_DFSDMCFG_MODE(__HANDLE__) (((__HANDLE__)->Init.DFSDMConfig == ADC_DFSDM_MODE_DISABLE) || \ |
AnnaBridge | 172:65be27845400 | 1056 | ((__HANDLE__)->Init.DFSDMConfig == ADC_DFSDM_MODE_ENABLE) ) |
AnnaBridge | 172:65be27845400 | 1057 | #else |
AnnaBridge | 172:65be27845400 | 1058 | #define IS_ADC_DFSDMCFG_MODE(__HANDLE__) (SET) |
AnnaBridge | 172:65be27845400 | 1059 | #endif |
AnnaBridge | 172:65be27845400 | 1060 | |
AnnaBridge | 172:65be27845400 | 1061 | /** |
AnnaBridge | 172:65be27845400 | 1062 | * @brief Return the DFSDM configuration mode. |
AnnaBridge | 172:65be27845400 | 1063 | * @param __HANDLE__ ADC handle. |
AnnaBridge | 172:65be27845400 | 1064 | * @note When DMSDFM configuration is not supported, the macro systematically reports 0x0 (i.e disabled). |
AnnaBridge | 172:65be27845400 | 1065 | * For this reason, the input parameter is the ADC handle and not the configuration parameter |
AnnaBridge | 172:65be27845400 | 1066 | * directly. |
AnnaBridge | 172:65be27845400 | 1067 | * @retval DFSDM configuration mode |
AnnaBridge | 172:65be27845400 | 1068 | */ |
AnnaBridge | 172:65be27845400 | 1069 | #if defined(DFSDM1_Channel0) |
AnnaBridge | 172:65be27845400 | 1070 | #define ADC_CFGR_DFSDM(__HANDLE__) ((__HANDLE__)->Init.DFSDMConfig) |
AnnaBridge | 172:65be27845400 | 1071 | #else |
AnnaBridge | 172:65be27845400 | 1072 | #define ADC_CFGR_DFSDM(__HANDLE__) (0x0UL) |
AnnaBridge | 172:65be27845400 | 1073 | #endif |
AnnaBridge | 172:65be27845400 | 1074 | |
AnnaBridge | 172:65be27845400 | 1075 | /** |
AnnaBridge | 172:65be27845400 | 1076 | * @} |
AnnaBridge | 172:65be27845400 | 1077 | */ |
AnnaBridge | 172:65be27845400 | 1078 | |
AnnaBridge | 172:65be27845400 | 1079 | |
AnnaBridge | 172:65be27845400 | 1080 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 1081 | /** @addtogroup ADCEx_Exported_Functions |
AnnaBridge | 172:65be27845400 | 1082 | * @{ |
AnnaBridge | 172:65be27845400 | 1083 | */ |
AnnaBridge | 172:65be27845400 | 1084 | |
AnnaBridge | 172:65be27845400 | 1085 | /** @addtogroup ADCEx_Exported_Functions_Group1 |
AnnaBridge | 172:65be27845400 | 1086 | * @{ |
AnnaBridge | 172:65be27845400 | 1087 | */ |
AnnaBridge | 172:65be27845400 | 1088 | /* IO operation functions *****************************************************/ |
AnnaBridge | 172:65be27845400 | 1089 | |
AnnaBridge | 172:65be27845400 | 1090 | /* ADC calibration */ |
AnnaBridge | 172:65be27845400 | 1091 | HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t CalibrationMode, uint32_t SingleDiff); |
AnnaBridge | 172:65be27845400 | 1092 | uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff); |
AnnaBridge | 172:65be27845400 | 1093 | HAL_StatusTypeDef HAL_ADCEx_LinearCalibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t* LinearCalib_Buffer); |
AnnaBridge | 172:65be27845400 | 1094 | HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff, uint32_t CalibrationFactor); |
AnnaBridge | 172:65be27845400 | 1095 | HAL_StatusTypeDef HAL_ADCEx_LinearCalibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t* LinearCalib_Buffer); |
AnnaBridge | 172:65be27845400 | 1096 | |
AnnaBridge | 172:65be27845400 | 1097 | /* Blocking mode: Polling */ |
AnnaBridge | 172:65be27845400 | 1098 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1099 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1100 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); |
AnnaBridge | 172:65be27845400 | 1101 | |
AnnaBridge | 172:65be27845400 | 1102 | /* Non-blocking mode: Interruption */ |
AnnaBridge | 172:65be27845400 | 1103 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1104 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1105 | |
AnnaBridge | 172:65be27845400 | 1106 | /* ADC multimode */ |
AnnaBridge | 172:65be27845400 | 1107 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length); |
AnnaBridge | 172:65be27845400 | 1108 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc); |
AnnaBridge | 172:65be27845400 | 1109 | uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc); |
AnnaBridge | 172:65be27845400 | 1110 | |
AnnaBridge | 172:65be27845400 | 1111 | /* ADC retrieve conversion value intended to be used with polling or interruption */ |
AnnaBridge | 172:65be27845400 | 1112 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank); |
AnnaBridge | 172:65be27845400 | 1113 | |
AnnaBridge | 172:65be27845400 | 1114 | /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */ |
AnnaBridge | 172:65be27845400 | 1115 | void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1116 | void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1117 | void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1118 | void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1119 | void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1120 | |
AnnaBridge | 172:65be27845400 | 1121 | /* ADC group regular conversions stop */ |
AnnaBridge | 172:65be27845400 | 1122 | HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1123 | HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1124 | HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1125 | HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1126 | |
AnnaBridge | 172:65be27845400 | 1127 | /** |
AnnaBridge | 172:65be27845400 | 1128 | * @} |
AnnaBridge | 172:65be27845400 | 1129 | */ |
AnnaBridge | 172:65be27845400 | 1130 | |
AnnaBridge | 172:65be27845400 | 1131 | /** @addtogroup ADCEx_Exported_Functions_Group2 |
AnnaBridge | 172:65be27845400 | 1132 | * @{ |
AnnaBridge | 172:65be27845400 | 1133 | */ |
AnnaBridge | 172:65be27845400 | 1134 | /* Peripheral Control functions ***********************************************/ |
AnnaBridge | 172:65be27845400 | 1135 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected); |
AnnaBridge | 172:65be27845400 | 1136 | HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode); |
AnnaBridge | 172:65be27845400 | 1137 | HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1138 | HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1139 | HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1140 | HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef* hadc); |
AnnaBridge | 172:65be27845400 | 1141 | |
AnnaBridge | 172:65be27845400 | 1142 | /** |
AnnaBridge | 172:65be27845400 | 1143 | * @} |
AnnaBridge | 172:65be27845400 | 1144 | */ |
AnnaBridge | 172:65be27845400 | 1145 | |
AnnaBridge | 172:65be27845400 | 1146 | /** |
AnnaBridge | 172:65be27845400 | 1147 | * @} |
AnnaBridge | 172:65be27845400 | 1148 | */ |
AnnaBridge | 172:65be27845400 | 1149 | |
AnnaBridge | 172:65be27845400 | 1150 | /** |
AnnaBridge | 172:65be27845400 | 1151 | * @} |
AnnaBridge | 172:65be27845400 | 1152 | */ |
AnnaBridge | 172:65be27845400 | 1153 | |
AnnaBridge | 172:65be27845400 | 1154 | /** |
AnnaBridge | 172:65be27845400 | 1155 | * @} |
AnnaBridge | 172:65be27845400 | 1156 | */ |
AnnaBridge | 172:65be27845400 | 1157 | |
AnnaBridge | 172:65be27845400 | 1158 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 1159 | } |
AnnaBridge | 172:65be27845400 | 1160 | #endif |
AnnaBridge | 172:65be27845400 | 1161 | |
AnnaBridge | 172:65be27845400 | 1162 | #endif /* STM32H7xx_HAL_ADC_EX_H */ |
AnnaBridge | 172:65be27845400 | 1163 | |
AnnaBridge | 172:65be27845400 | 1164 | |
AnnaBridge | 172:65be27845400 | 1165 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |