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TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f1xx_ll_exti.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f1xx_ll_exti.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief Header file of EXTI LL module.
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * @attention
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 12 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 14 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 17 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 19 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 20 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 32 *
AnnaBridge 171:3a7713b1edbc 33 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 37 #ifndef __STM32F1xx_LL_EXTI_H
AnnaBridge 171:3a7713b1edbc 38 #define __STM32F1xx_LL_EXTI_H
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 41 extern "C" {
AnnaBridge 171:3a7713b1edbc 42 #endif
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 45 #include "stm32f1xx.h"
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /** @addtogroup STM32F1xx_LL_Driver
AnnaBridge 171:3a7713b1edbc 48 * @{
AnnaBridge 171:3a7713b1edbc 49 */
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 #if defined (EXTI)
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /** @defgroup EXTI_LL EXTI
AnnaBridge 171:3a7713b1edbc 54 * @{
AnnaBridge 171:3a7713b1edbc 55 */
AnnaBridge 171:3a7713b1edbc 56
AnnaBridge 171:3a7713b1edbc 57 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 58 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 59 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 60 /* Private Macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 61 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 62 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
AnnaBridge 171:3a7713b1edbc 63 * @{
AnnaBridge 171:3a7713b1edbc 64 */
AnnaBridge 171:3a7713b1edbc 65 /**
AnnaBridge 171:3a7713b1edbc 66 * @}
AnnaBridge 171:3a7713b1edbc 67 */
AnnaBridge 171:3a7713b1edbc 68 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 171:3a7713b1edbc 69 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 70 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 71 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
AnnaBridge 171:3a7713b1edbc 72 * @{
AnnaBridge 171:3a7713b1edbc 73 */
AnnaBridge 171:3a7713b1edbc 74 typedef struct
AnnaBridge 171:3a7713b1edbc 75 {
AnnaBridge 171:3a7713b1edbc 76
AnnaBridge 171:3a7713b1edbc 77 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 78 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
AnnaBridge 171:3a7713b1edbc 81 This parameter can be set either to ENABLE or DISABLE */
AnnaBridge 171:3a7713b1edbc 82
AnnaBridge 171:3a7713b1edbc 83 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
AnnaBridge 171:3a7713b1edbc 84 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
AnnaBridge 171:3a7713b1edbc 85
AnnaBridge 171:3a7713b1edbc 86 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
AnnaBridge 171:3a7713b1edbc 87 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
AnnaBridge 171:3a7713b1edbc 88 } LL_EXTI_InitTypeDef;
AnnaBridge 171:3a7713b1edbc 89
AnnaBridge 171:3a7713b1edbc 90 /**
AnnaBridge 171:3a7713b1edbc 91 * @}
AnnaBridge 171:3a7713b1edbc 92 */
AnnaBridge 171:3a7713b1edbc 93 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 96 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
AnnaBridge 171:3a7713b1edbc 97 * @{
AnnaBridge 171:3a7713b1edbc 98 */
AnnaBridge 171:3a7713b1edbc 99
AnnaBridge 171:3a7713b1edbc 100 /** @defgroup EXTI_LL_EC_LINE LINE
AnnaBridge 171:3a7713b1edbc 101 * @{
AnnaBridge 171:3a7713b1edbc 102 */
AnnaBridge 171:3a7713b1edbc 103 #define LL_EXTI_LINE_0 EXTI_IMR_IM0 /*!< Extended line 0 */
AnnaBridge 171:3a7713b1edbc 104 #define LL_EXTI_LINE_1 EXTI_IMR_IM1 /*!< Extended line 1 */
AnnaBridge 171:3a7713b1edbc 105 #define LL_EXTI_LINE_2 EXTI_IMR_IM2 /*!< Extended line 2 */
AnnaBridge 171:3a7713b1edbc 106 #define LL_EXTI_LINE_3 EXTI_IMR_IM3 /*!< Extended line 3 */
AnnaBridge 171:3a7713b1edbc 107 #define LL_EXTI_LINE_4 EXTI_IMR_IM4 /*!< Extended line 4 */
AnnaBridge 171:3a7713b1edbc 108 #define LL_EXTI_LINE_5 EXTI_IMR_IM5 /*!< Extended line 5 */
AnnaBridge 171:3a7713b1edbc 109 #define LL_EXTI_LINE_6 EXTI_IMR_IM6 /*!< Extended line 6 */
AnnaBridge 171:3a7713b1edbc 110 #define LL_EXTI_LINE_7 EXTI_IMR_IM7 /*!< Extended line 7 */
AnnaBridge 171:3a7713b1edbc 111 #define LL_EXTI_LINE_8 EXTI_IMR_IM8 /*!< Extended line 8 */
AnnaBridge 171:3a7713b1edbc 112 #define LL_EXTI_LINE_9 EXTI_IMR_IM9 /*!< Extended line 9 */
AnnaBridge 171:3a7713b1edbc 113 #define LL_EXTI_LINE_10 EXTI_IMR_IM10 /*!< Extended line 10 */
AnnaBridge 171:3a7713b1edbc 114 #define LL_EXTI_LINE_11 EXTI_IMR_IM11 /*!< Extended line 11 */
AnnaBridge 171:3a7713b1edbc 115 #define LL_EXTI_LINE_12 EXTI_IMR_IM12 /*!< Extended line 12 */
AnnaBridge 171:3a7713b1edbc 116 #define LL_EXTI_LINE_13 EXTI_IMR_IM13 /*!< Extended line 13 */
AnnaBridge 171:3a7713b1edbc 117 #define LL_EXTI_LINE_14 EXTI_IMR_IM14 /*!< Extended line 14 */
AnnaBridge 171:3a7713b1edbc 118 #define LL_EXTI_LINE_15 EXTI_IMR_IM15 /*!< Extended line 15 */
AnnaBridge 171:3a7713b1edbc 119 #if defined(EXTI_IMR_IM16)
AnnaBridge 171:3a7713b1edbc 120 #define LL_EXTI_LINE_16 EXTI_IMR_IM16 /*!< Extended line 16 */
AnnaBridge 171:3a7713b1edbc 121 #endif
AnnaBridge 171:3a7713b1edbc 122 #define LL_EXTI_LINE_17 EXTI_IMR_IM17 /*!< Extended line 17 */
AnnaBridge 171:3a7713b1edbc 123 #if defined(EXTI_IMR_IM18)
AnnaBridge 171:3a7713b1edbc 124 #define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */
AnnaBridge 171:3a7713b1edbc 125 #endif
AnnaBridge 171:3a7713b1edbc 126 #if defined(EXTI_IMR_IM19)
AnnaBridge 171:3a7713b1edbc 127 #define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */
AnnaBridge 171:3a7713b1edbc 128 #endif
AnnaBridge 171:3a7713b1edbc 129 #if defined(EXTI_IMR_IM20)
AnnaBridge 171:3a7713b1edbc 130 #define LL_EXTI_LINE_20 EXTI_IMR_IM20 /*!< Extended line 20 */
AnnaBridge 171:3a7713b1edbc 131 #endif
AnnaBridge 171:3a7713b1edbc 132 #if defined(EXTI_IMR_IM21)
AnnaBridge 171:3a7713b1edbc 133 #define LL_EXTI_LINE_21 EXTI_IMR_IM21 /*!< Extended line 21 */
AnnaBridge 171:3a7713b1edbc 134 #endif
AnnaBridge 171:3a7713b1edbc 135 #if defined(EXTI_IMR_IM22)
AnnaBridge 171:3a7713b1edbc 136 #define LL_EXTI_LINE_22 EXTI_IMR_IM22 /*!< Extended line 22 */
AnnaBridge 171:3a7713b1edbc 137 #endif
AnnaBridge 171:3a7713b1edbc 138 #if defined(EXTI_IMR_IM23)
AnnaBridge 171:3a7713b1edbc 139 #define LL_EXTI_LINE_23 EXTI_IMR_IM23 /*!< Extended line 23 */
AnnaBridge 171:3a7713b1edbc 140 #endif
AnnaBridge 171:3a7713b1edbc 141 #if defined(EXTI_IMR_IM24)
AnnaBridge 171:3a7713b1edbc 142 #define LL_EXTI_LINE_24 EXTI_IMR_IM24 /*!< Extended line 24 */
AnnaBridge 171:3a7713b1edbc 143 #endif
AnnaBridge 171:3a7713b1edbc 144 #if defined(EXTI_IMR_IM25)
AnnaBridge 171:3a7713b1edbc 145 #define LL_EXTI_LINE_25 EXTI_IMR_IM25 /*!< Extended line 25 */
AnnaBridge 171:3a7713b1edbc 146 #endif
AnnaBridge 171:3a7713b1edbc 147 #if defined(EXTI_IMR_IM26)
AnnaBridge 171:3a7713b1edbc 148 #define LL_EXTI_LINE_26 EXTI_IMR_IM26 /*!< Extended line 26 */
AnnaBridge 171:3a7713b1edbc 149 #endif
AnnaBridge 171:3a7713b1edbc 150 #if defined(EXTI_IMR_IM27)
AnnaBridge 171:3a7713b1edbc 151 #define LL_EXTI_LINE_27 EXTI_IMR_IM27 /*!< Extended line 27 */
AnnaBridge 171:3a7713b1edbc 152 #endif
AnnaBridge 171:3a7713b1edbc 153 #if defined(EXTI_IMR_IM28)
AnnaBridge 171:3a7713b1edbc 154 #define LL_EXTI_LINE_28 EXTI_IMR_IM28 /*!< Extended line 28 */
AnnaBridge 171:3a7713b1edbc 155 #endif
AnnaBridge 171:3a7713b1edbc 156 #if defined(EXTI_IMR_IM29)
AnnaBridge 171:3a7713b1edbc 157 #define LL_EXTI_LINE_29 EXTI_IMR_IM29 /*!< Extended line 29 */
AnnaBridge 171:3a7713b1edbc 158 #endif
AnnaBridge 171:3a7713b1edbc 159 #if defined(EXTI_IMR_IM30)
AnnaBridge 171:3a7713b1edbc 160 #define LL_EXTI_LINE_30 EXTI_IMR_IM30 /*!< Extended line 30 */
AnnaBridge 171:3a7713b1edbc 161 #endif
AnnaBridge 171:3a7713b1edbc 162 #if defined(EXTI_IMR_IM31)
AnnaBridge 171:3a7713b1edbc 163 #define LL_EXTI_LINE_31 EXTI_IMR_IM31 /*!< Extended line 31 */
AnnaBridge 171:3a7713b1edbc 164 #endif
AnnaBridge 171:3a7713b1edbc 165 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR_IM /*!< All Extended line not reserved*/
AnnaBridge 171:3a7713b1edbc 166
AnnaBridge 171:3a7713b1edbc 167
AnnaBridge 171:3a7713b1edbc 168 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */
AnnaBridge 171:3a7713b1edbc 169
AnnaBridge 171:3a7713b1edbc 170 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 171 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */
AnnaBridge 171:3a7713b1edbc 172 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 171:3a7713b1edbc 173
AnnaBridge 171:3a7713b1edbc 174 /**
AnnaBridge 171:3a7713b1edbc 175 * @}
AnnaBridge 171:3a7713b1edbc 176 */
AnnaBridge 171:3a7713b1edbc 177 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 178
AnnaBridge 171:3a7713b1edbc 179 /** @defgroup EXTI_LL_EC_MODE Mode
AnnaBridge 171:3a7713b1edbc 180 * @{
AnnaBridge 171:3a7713b1edbc 181 */
AnnaBridge 171:3a7713b1edbc 182 #define LL_EXTI_MODE_IT ((uint8_t)0x00) /*!< Interrupt Mode */
AnnaBridge 171:3a7713b1edbc 183 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01) /*!< Event Mode */
AnnaBridge 171:3a7713b1edbc 184 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02) /*!< Interrupt & Event Mode */
AnnaBridge 171:3a7713b1edbc 185 /**
AnnaBridge 171:3a7713b1edbc 186 * @}
AnnaBridge 171:3a7713b1edbc 187 */
AnnaBridge 171:3a7713b1edbc 188
AnnaBridge 171:3a7713b1edbc 189 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
AnnaBridge 171:3a7713b1edbc 190 * @{
AnnaBridge 171:3a7713b1edbc 191 */
AnnaBridge 171:3a7713b1edbc 192 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00) /*!< No Trigger Mode */
AnnaBridge 171:3a7713b1edbc 193 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01) /*!< Trigger Rising Mode */
AnnaBridge 171:3a7713b1edbc 194 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02) /*!< Trigger Falling Mode */
AnnaBridge 171:3a7713b1edbc 195 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03) /*!< Trigger Rising & Falling Mode */
AnnaBridge 171:3a7713b1edbc 196
AnnaBridge 171:3a7713b1edbc 197 /**
AnnaBridge 171:3a7713b1edbc 198 * @}
AnnaBridge 171:3a7713b1edbc 199 */
AnnaBridge 171:3a7713b1edbc 200
AnnaBridge 171:3a7713b1edbc 201
AnnaBridge 171:3a7713b1edbc 202 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 171:3a7713b1edbc 203
AnnaBridge 171:3a7713b1edbc 204
AnnaBridge 171:3a7713b1edbc 205 /**
AnnaBridge 171:3a7713b1edbc 206 * @}
AnnaBridge 171:3a7713b1edbc 207 */
AnnaBridge 171:3a7713b1edbc 208
AnnaBridge 171:3a7713b1edbc 209 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 210 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
AnnaBridge 171:3a7713b1edbc 211 * @{
AnnaBridge 171:3a7713b1edbc 212 */
AnnaBridge 171:3a7713b1edbc 213
AnnaBridge 171:3a7713b1edbc 214 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge 171:3a7713b1edbc 215 * @{
AnnaBridge 171:3a7713b1edbc 216 */
AnnaBridge 171:3a7713b1edbc 217
AnnaBridge 171:3a7713b1edbc 218 /**
AnnaBridge 171:3a7713b1edbc 219 * @brief Write a value in EXTI register
AnnaBridge 171:3a7713b1edbc 220 * @param __REG__ Register to be written
AnnaBridge 171:3a7713b1edbc 221 * @param __VALUE__ Value to be written in the register
AnnaBridge 171:3a7713b1edbc 222 * @retval None
AnnaBridge 171:3a7713b1edbc 223 */
AnnaBridge 171:3a7713b1edbc 224 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
AnnaBridge 171:3a7713b1edbc 225
AnnaBridge 171:3a7713b1edbc 226 /**
AnnaBridge 171:3a7713b1edbc 227 * @brief Read a value in EXTI register
AnnaBridge 171:3a7713b1edbc 228 * @param __REG__ Register to be read
AnnaBridge 171:3a7713b1edbc 229 * @retval Register value
AnnaBridge 171:3a7713b1edbc 230 */
AnnaBridge 171:3a7713b1edbc 231 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
AnnaBridge 171:3a7713b1edbc 232 /**
AnnaBridge 171:3a7713b1edbc 233 * @}
AnnaBridge 171:3a7713b1edbc 234 */
AnnaBridge 171:3a7713b1edbc 235
AnnaBridge 171:3a7713b1edbc 236
AnnaBridge 171:3a7713b1edbc 237 /**
AnnaBridge 171:3a7713b1edbc 238 * @}
AnnaBridge 171:3a7713b1edbc 239 */
AnnaBridge 171:3a7713b1edbc 240
AnnaBridge 171:3a7713b1edbc 241
AnnaBridge 171:3a7713b1edbc 242
AnnaBridge 171:3a7713b1edbc 243 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 244 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
AnnaBridge 171:3a7713b1edbc 245 * @{
AnnaBridge 171:3a7713b1edbc 246 */
AnnaBridge 171:3a7713b1edbc 247 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
AnnaBridge 171:3a7713b1edbc 248 * @{
AnnaBridge 171:3a7713b1edbc 249 */
AnnaBridge 171:3a7713b1edbc 250
AnnaBridge 171:3a7713b1edbc 251 /**
AnnaBridge 171:3a7713b1edbc 252 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 253 * @note The reset value for the direct or internal lines (see RM)
AnnaBridge 171:3a7713b1edbc 254 * is set to 1 in order to enable the interrupt by default.
AnnaBridge 171:3a7713b1edbc 255 * Bits are set automatically at Power on.
AnnaBridge 171:3a7713b1edbc 256 * @rmtoll IMR IMx LL_EXTI_EnableIT_0_31
AnnaBridge 171:3a7713b1edbc 257 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 258 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 259 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 260 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 261 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 262 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 263 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 264 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 265 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 266 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 267 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 268 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 269 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 270 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 271 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 272 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 273 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 274 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 275 * @arg @ref LL_EXTI_LINE_17
AnnaBridge 171:3a7713b1edbc 276 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 277 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 278 * @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge 171:3a7713b1edbc 279 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 280 * @retval None
AnnaBridge 171:3a7713b1edbc 281 */
AnnaBridge 171:3a7713b1edbc 282 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 283 {
AnnaBridge 171:3a7713b1edbc 284 SET_BIT(EXTI->IMR, ExtiLine);
AnnaBridge 171:3a7713b1edbc 285 }
AnnaBridge 171:3a7713b1edbc 286
AnnaBridge 171:3a7713b1edbc 287 /**
AnnaBridge 171:3a7713b1edbc 288 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 289 * @note The reset value for the direct or internal lines (see RM)
AnnaBridge 171:3a7713b1edbc 290 * is set to 1 in order to enable the interrupt by default.
AnnaBridge 171:3a7713b1edbc 291 * Bits are set automatically at Power on.
AnnaBridge 171:3a7713b1edbc 292 * @rmtoll IMR IMx LL_EXTI_DisableIT_0_31
AnnaBridge 171:3a7713b1edbc 293 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 294 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 295 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 296 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 297 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 298 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 299 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 300 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 301 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 302 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 303 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 304 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 305 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 306 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 307 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 308 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 309 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 310 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 311 * @arg @ref LL_EXTI_LINE_17
AnnaBridge 171:3a7713b1edbc 312 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 313 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 314 * @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge 171:3a7713b1edbc 315 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 316 * @retval None
AnnaBridge 171:3a7713b1edbc 317 */
AnnaBridge 171:3a7713b1edbc 318 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 319 {
AnnaBridge 171:3a7713b1edbc 320 CLEAR_BIT(EXTI->IMR, ExtiLine);
AnnaBridge 171:3a7713b1edbc 321 }
AnnaBridge 171:3a7713b1edbc 322
AnnaBridge 171:3a7713b1edbc 323
AnnaBridge 171:3a7713b1edbc 324 /**
AnnaBridge 171:3a7713b1edbc 325 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 326 * @note The reset value for the direct or internal lines (see RM)
AnnaBridge 171:3a7713b1edbc 327 * is set to 1 in order to enable the interrupt by default.
AnnaBridge 171:3a7713b1edbc 328 * Bits are set automatically at Power on.
AnnaBridge 171:3a7713b1edbc 329 * @rmtoll IMR IMx LL_EXTI_IsEnabledIT_0_31
AnnaBridge 171:3a7713b1edbc 330 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 331 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 332 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 333 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 334 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 335 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 336 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 337 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 338 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 339 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 340 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 341 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 342 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 343 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 344 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 345 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 346 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 347 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 348 * @arg @ref LL_EXTI_LINE_17
AnnaBridge 171:3a7713b1edbc 349 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 350 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 351 * @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge 171:3a7713b1edbc 352 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 353 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 354 */
AnnaBridge 171:3a7713b1edbc 355 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 356 {
AnnaBridge 171:3a7713b1edbc 357 return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine));
AnnaBridge 171:3a7713b1edbc 358 }
AnnaBridge 171:3a7713b1edbc 359
AnnaBridge 171:3a7713b1edbc 360
AnnaBridge 171:3a7713b1edbc 361 /**
AnnaBridge 171:3a7713b1edbc 362 * @}
AnnaBridge 171:3a7713b1edbc 363 */
AnnaBridge 171:3a7713b1edbc 364
AnnaBridge 171:3a7713b1edbc 365 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
AnnaBridge 171:3a7713b1edbc 366 * @{
AnnaBridge 171:3a7713b1edbc 367 */
AnnaBridge 171:3a7713b1edbc 368
AnnaBridge 171:3a7713b1edbc 369 /**
AnnaBridge 171:3a7713b1edbc 370 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 371 * @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31
AnnaBridge 171:3a7713b1edbc 372 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 373 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 374 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 375 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 376 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 377 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 378 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 379 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 380 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 381 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 382 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 383 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 384 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 385 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 386 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 387 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 388 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 389 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 390 * @arg @ref LL_EXTI_LINE_17
AnnaBridge 171:3a7713b1edbc 391 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 392 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 393 * @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge 171:3a7713b1edbc 394 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 395 * @retval None
AnnaBridge 171:3a7713b1edbc 396 */
AnnaBridge 171:3a7713b1edbc 397 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 398 {
AnnaBridge 171:3a7713b1edbc 399 SET_BIT(EXTI->EMR, ExtiLine);
AnnaBridge 171:3a7713b1edbc 400
AnnaBridge 171:3a7713b1edbc 401 }
AnnaBridge 171:3a7713b1edbc 402
AnnaBridge 171:3a7713b1edbc 403
AnnaBridge 171:3a7713b1edbc 404 /**
AnnaBridge 171:3a7713b1edbc 405 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 406 * @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31
AnnaBridge 171:3a7713b1edbc 407 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 408 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 409 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 410 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 411 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 412 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 413 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 414 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 415 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 416 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 417 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 418 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 419 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 420 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 421 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 422 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 423 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 424 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 425 * @arg @ref LL_EXTI_LINE_17
AnnaBridge 171:3a7713b1edbc 426 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 427 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 428 * @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge 171:3a7713b1edbc 429 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 430 * @retval None
AnnaBridge 171:3a7713b1edbc 431 */
AnnaBridge 171:3a7713b1edbc 432 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 433 {
AnnaBridge 171:3a7713b1edbc 434 CLEAR_BIT(EXTI->EMR, ExtiLine);
AnnaBridge 171:3a7713b1edbc 435 }
AnnaBridge 171:3a7713b1edbc 436
AnnaBridge 171:3a7713b1edbc 437
AnnaBridge 171:3a7713b1edbc 438 /**
AnnaBridge 171:3a7713b1edbc 439 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 440 * @rmtoll EMR EMx LL_EXTI_IsEnabledEvent_0_31
AnnaBridge 171:3a7713b1edbc 441 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 442 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 443 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 444 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 445 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 446 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 447 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 448 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 449 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 450 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 451 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 452 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 453 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 454 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 455 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 456 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 457 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 458 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 459 * @arg @ref LL_EXTI_LINE_17
AnnaBridge 171:3a7713b1edbc 460 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 461 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 462 * @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge 171:3a7713b1edbc 463 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 464 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 465 */
AnnaBridge 171:3a7713b1edbc 466 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 467 {
AnnaBridge 171:3a7713b1edbc 468 return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine));
AnnaBridge 171:3a7713b1edbc 469
AnnaBridge 171:3a7713b1edbc 470 }
AnnaBridge 171:3a7713b1edbc 471
AnnaBridge 171:3a7713b1edbc 472
AnnaBridge 171:3a7713b1edbc 473 /**
AnnaBridge 171:3a7713b1edbc 474 * @}
AnnaBridge 171:3a7713b1edbc 475 */
AnnaBridge 171:3a7713b1edbc 476
AnnaBridge 171:3a7713b1edbc 477 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
AnnaBridge 171:3a7713b1edbc 478 * @{
AnnaBridge 171:3a7713b1edbc 479 */
AnnaBridge 171:3a7713b1edbc 480
AnnaBridge 171:3a7713b1edbc 481 /**
AnnaBridge 171:3a7713b1edbc 482 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 483 * @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge 171:3a7713b1edbc 484 * generated on these lines. If a rising edge on a configurable interrupt
AnnaBridge 171:3a7713b1edbc 485 * line occurs during a write operation in the EXTI_RTSR register, the
AnnaBridge 171:3a7713b1edbc 486 * pending bit is not set.
AnnaBridge 171:3a7713b1edbc 487 * Rising and falling edge triggers can be set for
AnnaBridge 171:3a7713b1edbc 488 * the same interrupt line. In this case, both generate a trigger
AnnaBridge 171:3a7713b1edbc 489 * condition.
AnnaBridge 171:3a7713b1edbc 490 * @rmtoll RTSR RTx LL_EXTI_EnableRisingTrig_0_31
AnnaBridge 171:3a7713b1edbc 491 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 171:3a7713b1edbc 492 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 493 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 494 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 495 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 496 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 497 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 498 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 499 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 500 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 501 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 502 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 503 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 504 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 505 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 506 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 507 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 508 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 509 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 510 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 511 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 512 * @retval None
AnnaBridge 171:3a7713b1edbc 513 */
AnnaBridge 171:3a7713b1edbc 514 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 515 {
AnnaBridge 171:3a7713b1edbc 516 SET_BIT(EXTI->RTSR, ExtiLine);
AnnaBridge 171:3a7713b1edbc 517
AnnaBridge 171:3a7713b1edbc 518 }
AnnaBridge 171:3a7713b1edbc 519
AnnaBridge 171:3a7713b1edbc 520
AnnaBridge 171:3a7713b1edbc 521 /**
AnnaBridge 171:3a7713b1edbc 522 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 523 * @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge 171:3a7713b1edbc 524 * generated on these lines. If a rising edge on a configurable interrupt
AnnaBridge 171:3a7713b1edbc 525 * line occurs during a write operation in the EXTI_RTSR register, the
AnnaBridge 171:3a7713b1edbc 526 * pending bit is not set.
AnnaBridge 171:3a7713b1edbc 527 * Rising and falling edge triggers can be set for
AnnaBridge 171:3a7713b1edbc 528 * the same interrupt line. In this case, both generate a trigger
AnnaBridge 171:3a7713b1edbc 529 * condition.
AnnaBridge 171:3a7713b1edbc 530 * @rmtoll RTSR RTx LL_EXTI_DisableRisingTrig_0_31
AnnaBridge 171:3a7713b1edbc 531 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 171:3a7713b1edbc 532 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 533 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 534 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 535 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 536 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 537 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 538 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 539 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 540 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 541 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 542 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 543 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 544 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 545 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 546 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 547 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 548 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 549 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 550 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 551 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 552 * @retval None
AnnaBridge 171:3a7713b1edbc 553 */
AnnaBridge 171:3a7713b1edbc 554 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 555 {
AnnaBridge 171:3a7713b1edbc 556 CLEAR_BIT(EXTI->RTSR, ExtiLine);
AnnaBridge 171:3a7713b1edbc 557
AnnaBridge 171:3a7713b1edbc 558 }
AnnaBridge 171:3a7713b1edbc 559
AnnaBridge 171:3a7713b1edbc 560
AnnaBridge 171:3a7713b1edbc 561 /**
AnnaBridge 171:3a7713b1edbc 562 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 563 * @rmtoll RTSR RTx LL_EXTI_IsEnabledRisingTrig_0_31
AnnaBridge 171:3a7713b1edbc 564 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 171:3a7713b1edbc 565 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 566 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 567 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 568 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 569 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 570 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 571 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 572 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 573 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 574 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 575 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 576 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 577 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 578 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 579 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 580 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 581 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 582 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 583 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 584 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 585 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 586 */
AnnaBridge 171:3a7713b1edbc 587 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 588 {
AnnaBridge 171:3a7713b1edbc 589 return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine));
AnnaBridge 171:3a7713b1edbc 590 }
AnnaBridge 171:3a7713b1edbc 591
AnnaBridge 171:3a7713b1edbc 592
AnnaBridge 171:3a7713b1edbc 593 /**
AnnaBridge 171:3a7713b1edbc 594 * @}
AnnaBridge 171:3a7713b1edbc 595 */
AnnaBridge 171:3a7713b1edbc 596
AnnaBridge 171:3a7713b1edbc 597 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
AnnaBridge 171:3a7713b1edbc 598 * @{
AnnaBridge 171:3a7713b1edbc 599 */
AnnaBridge 171:3a7713b1edbc 600
AnnaBridge 171:3a7713b1edbc 601 /**
AnnaBridge 171:3a7713b1edbc 602 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 603 * @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge 171:3a7713b1edbc 604 * generated on these lines. If a falling edge on a configurable interrupt
AnnaBridge 171:3a7713b1edbc 605 * line occurs during a write operation in the EXTI_FTSR register, the
AnnaBridge 171:3a7713b1edbc 606 * pending bit is not set.
AnnaBridge 171:3a7713b1edbc 607 * Rising and falling edge triggers can be set for
AnnaBridge 171:3a7713b1edbc 608 * the same interrupt line. In this case, both generate a trigger
AnnaBridge 171:3a7713b1edbc 609 * condition.
AnnaBridge 171:3a7713b1edbc 610 * @rmtoll FTSR FTx LL_EXTI_EnableFallingTrig_0_31
AnnaBridge 171:3a7713b1edbc 611 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 171:3a7713b1edbc 612 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 613 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 614 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 615 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 616 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 617 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 618 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 619 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 620 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 621 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 622 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 623 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 624 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 625 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 626 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 627 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 628 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 629 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 630 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 631 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 632 * @retval None
AnnaBridge 171:3a7713b1edbc 633 */
AnnaBridge 171:3a7713b1edbc 634 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 635 {
AnnaBridge 171:3a7713b1edbc 636 SET_BIT(EXTI->FTSR, ExtiLine);
AnnaBridge 171:3a7713b1edbc 637 }
AnnaBridge 171:3a7713b1edbc 638
AnnaBridge 171:3a7713b1edbc 639
AnnaBridge 171:3a7713b1edbc 640 /**
AnnaBridge 171:3a7713b1edbc 641 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 642 * @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge 171:3a7713b1edbc 643 * generated on these lines. If a Falling edge on a configurable interrupt
AnnaBridge 171:3a7713b1edbc 644 * line occurs during a write operation in the EXTI_FTSR register, the
AnnaBridge 171:3a7713b1edbc 645 * pending bit is not set.
AnnaBridge 171:3a7713b1edbc 646 * Rising and falling edge triggers can be set for the same interrupt line.
AnnaBridge 171:3a7713b1edbc 647 * In this case, both generate a trigger condition.
AnnaBridge 171:3a7713b1edbc 648 * @rmtoll FTSR FTx LL_EXTI_DisableFallingTrig_0_31
AnnaBridge 171:3a7713b1edbc 649 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 171:3a7713b1edbc 650 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 651 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 652 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 653 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 654 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 655 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 656 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 657 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 658 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 659 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 660 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 661 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 662 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 663 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 664 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 665 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 666 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 667 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 668 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 669 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 670 * @retval None
AnnaBridge 171:3a7713b1edbc 671 */
AnnaBridge 171:3a7713b1edbc 672 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 673 {
AnnaBridge 171:3a7713b1edbc 674 CLEAR_BIT(EXTI->FTSR, ExtiLine);
AnnaBridge 171:3a7713b1edbc 675 }
AnnaBridge 171:3a7713b1edbc 676
AnnaBridge 171:3a7713b1edbc 677
AnnaBridge 171:3a7713b1edbc 678 /**
AnnaBridge 171:3a7713b1edbc 679 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 680 * @rmtoll FTSR FTx LL_EXTI_IsEnabledFallingTrig_0_31
AnnaBridge 171:3a7713b1edbc 681 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 171:3a7713b1edbc 682 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 683 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 684 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 685 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 686 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 687 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 688 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 689 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 690 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 691 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 692 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 693 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 694 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 695 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 696 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 697 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 698 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 699 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 700 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 701 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 702 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 703 */
AnnaBridge 171:3a7713b1edbc 704 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 705 {
AnnaBridge 171:3a7713b1edbc 706 return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine));
AnnaBridge 171:3a7713b1edbc 707 }
AnnaBridge 171:3a7713b1edbc 708
AnnaBridge 171:3a7713b1edbc 709
AnnaBridge 171:3a7713b1edbc 710 /**
AnnaBridge 171:3a7713b1edbc 711 * @}
AnnaBridge 171:3a7713b1edbc 712 */
AnnaBridge 171:3a7713b1edbc 713
AnnaBridge 171:3a7713b1edbc 714 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
AnnaBridge 171:3a7713b1edbc 715 * @{
AnnaBridge 171:3a7713b1edbc 716 */
AnnaBridge 171:3a7713b1edbc 717
AnnaBridge 171:3a7713b1edbc 718 /**
AnnaBridge 171:3a7713b1edbc 719 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 720 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
AnnaBridge 171:3a7713b1edbc 721 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
AnnaBridge 171:3a7713b1edbc 722 * resulting in an interrupt request generation.
AnnaBridge 171:3a7713b1edbc 723 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
AnnaBridge 171:3a7713b1edbc 724 * register (by writing a 1 into the bit)
AnnaBridge 171:3a7713b1edbc 725 * @rmtoll SWIER SWIx LL_EXTI_GenerateSWI_0_31
AnnaBridge 171:3a7713b1edbc 726 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 171:3a7713b1edbc 727 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 728 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 729 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 730 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 731 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 732 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 733 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 734 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 735 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 736 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 737 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 738 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 739 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 740 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 741 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 742 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 743 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 744 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 745 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 746 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 747 * @retval None
AnnaBridge 171:3a7713b1edbc 748 */
AnnaBridge 171:3a7713b1edbc 749 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 750 {
AnnaBridge 171:3a7713b1edbc 751 SET_BIT(EXTI->SWIER, ExtiLine);
AnnaBridge 171:3a7713b1edbc 752 }
AnnaBridge 171:3a7713b1edbc 753
AnnaBridge 171:3a7713b1edbc 754
AnnaBridge 171:3a7713b1edbc 755 /**
AnnaBridge 171:3a7713b1edbc 756 * @}
AnnaBridge 171:3a7713b1edbc 757 */
AnnaBridge 171:3a7713b1edbc 758
AnnaBridge 171:3a7713b1edbc 759 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
AnnaBridge 171:3a7713b1edbc 760 * @{
AnnaBridge 171:3a7713b1edbc 761 */
AnnaBridge 171:3a7713b1edbc 762
AnnaBridge 171:3a7713b1edbc 763 /**
AnnaBridge 171:3a7713b1edbc 764 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 765 * @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge 171:3a7713b1edbc 766 * line. This bit is cleared by writing a 1 to the bit.
AnnaBridge 171:3a7713b1edbc 767 * @rmtoll PR PIFx LL_EXTI_IsActiveFlag_0_31
AnnaBridge 171:3a7713b1edbc 768 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 171:3a7713b1edbc 769 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 770 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 771 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 772 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 773 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 774 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 775 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 776 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 777 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 778 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 779 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 780 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 781 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 782 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 783 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 784 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 785 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 786 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 787 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 788 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 789 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 790 */
AnnaBridge 171:3a7713b1edbc 791 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 792 {
AnnaBridge 171:3a7713b1edbc 793 return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine));
AnnaBridge 171:3a7713b1edbc 794 }
AnnaBridge 171:3a7713b1edbc 795
AnnaBridge 171:3a7713b1edbc 796
AnnaBridge 171:3a7713b1edbc 797 /**
AnnaBridge 171:3a7713b1edbc 798 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 799 * @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge 171:3a7713b1edbc 800 * line. This bit is cleared by writing a 1 to the bit.
AnnaBridge 171:3a7713b1edbc 801 * @rmtoll PR PIFx LL_EXTI_ReadFlag_0_31
AnnaBridge 171:3a7713b1edbc 802 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 171:3a7713b1edbc 803 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 804 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 805 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 806 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 807 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 808 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 809 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 810 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 811 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 812 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 813 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 814 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 815 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 816 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 817 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 818 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 819 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 820 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 821 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 822 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 823 * @retval @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge 171:3a7713b1edbc 824 */
AnnaBridge 171:3a7713b1edbc 825 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 826 {
AnnaBridge 171:3a7713b1edbc 827 return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine));
AnnaBridge 171:3a7713b1edbc 828 }
AnnaBridge 171:3a7713b1edbc 829
AnnaBridge 171:3a7713b1edbc 830
AnnaBridge 171:3a7713b1edbc 831 /**
AnnaBridge 171:3a7713b1edbc 832 * @brief Clear ExtLine Flags for Lines in range 0 to 31
AnnaBridge 171:3a7713b1edbc 833 * @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge 171:3a7713b1edbc 834 * line. This bit is cleared by writing a 1 to the bit.
AnnaBridge 171:3a7713b1edbc 835 * @rmtoll PR PIFx LL_EXTI_ClearFlag_0_31
AnnaBridge 171:3a7713b1edbc 836 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 171:3a7713b1edbc 837 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 171:3a7713b1edbc 838 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 171:3a7713b1edbc 839 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 171:3a7713b1edbc 840 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 171:3a7713b1edbc 841 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 171:3a7713b1edbc 842 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 171:3a7713b1edbc 843 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 171:3a7713b1edbc 844 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 171:3a7713b1edbc 845 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 171:3a7713b1edbc 846 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 171:3a7713b1edbc 847 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 171:3a7713b1edbc 848 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 171:3a7713b1edbc 849 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 171:3a7713b1edbc 850 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 171:3a7713b1edbc 851 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 171:3a7713b1edbc 852 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 171:3a7713b1edbc 853 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 171:3a7713b1edbc 854 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 171:3a7713b1edbc 855 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 171:3a7713b1edbc 856 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 171:3a7713b1edbc 857 * @retval None
AnnaBridge 171:3a7713b1edbc 858 */
AnnaBridge 171:3a7713b1edbc 859 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
AnnaBridge 171:3a7713b1edbc 860 {
AnnaBridge 171:3a7713b1edbc 861 WRITE_REG(EXTI->PR, ExtiLine);
AnnaBridge 171:3a7713b1edbc 862 }
AnnaBridge 171:3a7713b1edbc 863
AnnaBridge 171:3a7713b1edbc 864
AnnaBridge 171:3a7713b1edbc 865 /**
AnnaBridge 171:3a7713b1edbc 866 * @}
AnnaBridge 171:3a7713b1edbc 867 */
AnnaBridge 171:3a7713b1edbc 868
AnnaBridge 171:3a7713b1edbc 869 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 870 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
AnnaBridge 171:3a7713b1edbc 871 * @{
AnnaBridge 171:3a7713b1edbc 872 */
AnnaBridge 171:3a7713b1edbc 873
AnnaBridge 171:3a7713b1edbc 874 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
AnnaBridge 171:3a7713b1edbc 875 uint32_t LL_EXTI_DeInit(void);
AnnaBridge 171:3a7713b1edbc 876 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
AnnaBridge 171:3a7713b1edbc 877
AnnaBridge 171:3a7713b1edbc 878
AnnaBridge 171:3a7713b1edbc 879 /**
AnnaBridge 171:3a7713b1edbc 880 * @}
AnnaBridge 171:3a7713b1edbc 881 */
AnnaBridge 171:3a7713b1edbc 882 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 171:3a7713b1edbc 883
AnnaBridge 171:3a7713b1edbc 884 /**
AnnaBridge 171:3a7713b1edbc 885 * @}
AnnaBridge 171:3a7713b1edbc 886 */
AnnaBridge 171:3a7713b1edbc 887
AnnaBridge 171:3a7713b1edbc 888 /**
AnnaBridge 171:3a7713b1edbc 889 * @}
AnnaBridge 171:3a7713b1edbc 890 */
AnnaBridge 171:3a7713b1edbc 891
AnnaBridge 171:3a7713b1edbc 892 #endif /* EXTI */
AnnaBridge 171:3a7713b1edbc 893
AnnaBridge 171:3a7713b1edbc 894 /**
AnnaBridge 171:3a7713b1edbc 895 * @}
AnnaBridge 171:3a7713b1edbc 896 */
AnnaBridge 171:3a7713b1edbc 897
AnnaBridge 171:3a7713b1edbc 898 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 899 }
AnnaBridge 171:3a7713b1edbc 900 #endif
AnnaBridge 171:3a7713b1edbc 901
AnnaBridge 171:3a7713b1edbc 902 #endif /* __STM32F1xx_LL_EXTI_H */
AnnaBridge 171:3a7713b1edbc 903
AnnaBridge 171:3a7713b1edbc 904 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/