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TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/pin_device.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /* mbed Microcontroller Library
AnnaBridge 171:3a7713b1edbc 2 *******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * Copyright (c) 2016, STMicroelectronics
AnnaBridge 171:3a7713b1edbc 4 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 5 *
AnnaBridge 171:3a7713b1edbc 6 * Redistribution and use in source and binary forms, with or without
AnnaBridge 171:3a7713b1edbc 7 * modification, are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 10 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 12 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 13 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 15 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 16 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 17 *
AnnaBridge 171:3a7713b1edbc 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 28 *******************************************************************************
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30 #ifndef MBED_PIN_DEVICE_H
AnnaBridge 171:3a7713b1edbc 31 #define MBED_PIN_DEVICE_H
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 #include "cmsis.h"
AnnaBridge 171:3a7713b1edbc 34 #include "stm32f1xx_ll_gpio.h"
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 extern const uint32_t ll_pin_defines[16];
AnnaBridge 171:3a7713b1edbc 37
AnnaBridge 171:3a7713b1edbc 38 static inline void stm_pin_DisconnectDebug(PinName pin)
AnnaBridge 171:3a7713b1edbc 39 {
AnnaBridge 171:3a7713b1edbc 40 // Enable AFIO clock
AnnaBridge 171:3a7713b1edbc 41 __HAL_RCC_AFIO_CLK_ENABLE();
AnnaBridge 171:3a7713b1edbc 42
AnnaBridge 171:3a7713b1edbc 43 // Disconnect JTAG-DP + SW-DP signals.
AnnaBridge 171:3a7713b1edbc 44 // Warning: Need to reconnect under reset
AnnaBridge 171:3a7713b1edbc 45 if ((pin == PA_13) || (pin == PA_14)) {
AnnaBridge 171:3a7713b1edbc 46 __HAL_AFIO_REMAP_SWJ_DISABLE(); // JTAG-DP Disabled and SW-DP Disabled
AnnaBridge 171:3a7713b1edbc 47 }
AnnaBridge 171:3a7713b1edbc 48 if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
AnnaBridge 171:3a7713b1edbc 49 __HAL_AFIO_REMAP_SWJ_NOJTAG(); // JTAG-DP Disabled and SW-DP enabled
AnnaBridge 171:3a7713b1edbc 50 }
AnnaBridge 171:3a7713b1edbc 51 }
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /* The AF selection of F1 family is specific compared to others */
AnnaBridge 171:3a7713b1edbc 54 static inline void stm_pin_SetAFPin(GPIO_TypeDef *gpio, PinName pin, uint32_t afnum)
AnnaBridge 171:3a7713b1edbc 55 {
AnnaBridge 171:3a7713b1edbc 56 // Enable AFIO clock
AnnaBridge 171:3a7713b1edbc 57 __HAL_RCC_AFIO_CLK_ENABLE();
AnnaBridge 171:3a7713b1edbc 58
AnnaBridge 171:3a7713b1edbc 59 if (afnum > 0) {
AnnaBridge 171:3a7713b1edbc 60 switch (afnum) {
AnnaBridge 171:3a7713b1edbc 61 case 1: // Remap SPI1
AnnaBridge 171:3a7713b1edbc 62 __HAL_AFIO_REMAP_SPI1_ENABLE();
AnnaBridge 171:3a7713b1edbc 63 break;
AnnaBridge 171:3a7713b1edbc 64 case 2: // Remap I2C1
AnnaBridge 171:3a7713b1edbc 65 __HAL_AFIO_REMAP_I2C1_ENABLE();
AnnaBridge 171:3a7713b1edbc 66 break;
AnnaBridge 171:3a7713b1edbc 67 case 3: // Remap USART1
AnnaBridge 171:3a7713b1edbc 68 __HAL_AFIO_REMAP_USART1_ENABLE();
AnnaBridge 171:3a7713b1edbc 69 break;
AnnaBridge 171:3a7713b1edbc 70 case 4: // Remap USART2
AnnaBridge 171:3a7713b1edbc 71 __HAL_AFIO_REMAP_USART2_ENABLE();
AnnaBridge 171:3a7713b1edbc 72 break;
AnnaBridge 171:3a7713b1edbc 73 case 5: // Partial Remap USART3
AnnaBridge 171:3a7713b1edbc 74 __HAL_AFIO_REMAP_USART3_PARTIAL();
AnnaBridge 171:3a7713b1edbc 75 break;
AnnaBridge 171:3a7713b1edbc 76 case 6: // Partial Remap TIM1
AnnaBridge 171:3a7713b1edbc 77 __HAL_AFIO_REMAP_TIM1_PARTIAL();
AnnaBridge 171:3a7713b1edbc 78 break;
AnnaBridge 171:3a7713b1edbc 79 case 7: // Partial Remap TIM3
AnnaBridge 171:3a7713b1edbc 80 __HAL_AFIO_REMAP_TIM3_PARTIAL();
AnnaBridge 171:3a7713b1edbc 81 break;
AnnaBridge 171:3a7713b1edbc 82 case 8: // Full Remap TIM2
AnnaBridge 171:3a7713b1edbc 83 __HAL_AFIO_REMAP_TIM2_ENABLE();
AnnaBridge 171:3a7713b1edbc 84 break;
AnnaBridge 171:3a7713b1edbc 85 case 9: // Full Remap TIM3
AnnaBridge 171:3a7713b1edbc 86 __HAL_AFIO_REMAP_TIM3_ENABLE();
AnnaBridge 171:3a7713b1edbc 87 break;
AnnaBridge 171:3a7713b1edbc 88 #if defined(AFIO_MAPR_CAN_REMAP_REMAP1)
AnnaBridge 171:3a7713b1edbc 89 case 10: // CAN_RX mapped to PB8, CAN_TX mapped to PB9
AnnaBridge 171:3a7713b1edbc 90 __HAL_AFIO_REMAP_CAN1_2();
AnnaBridge 171:3a7713b1edbc 91 break;
AnnaBridge 171:3a7713b1edbc 92 #endif
AnnaBridge 171:3a7713b1edbc 93 default:
AnnaBridge 171:3a7713b1edbc 94 break;
AnnaBridge 171:3a7713b1edbc 95 }
AnnaBridge 171:3a7713b1edbc 96 }
AnnaBridge 171:3a7713b1edbc 97 }
AnnaBridge 171:3a7713b1edbc 98
AnnaBridge 171:3a7713b1edbc 99 static inline void stm_pin_PullConfig(GPIO_TypeDef *gpio, uint32_t ll_pin, uint32_t pull_config)
AnnaBridge 171:3a7713b1edbc 100 {
AnnaBridge 171:3a7713b1edbc 101 uint32_t function = LL_GPIO_GetPinMode(gpio, ll_pin);
AnnaBridge 171:3a7713b1edbc 102
AnnaBridge 171:3a7713b1edbc 103 switch (pull_config) {
AnnaBridge 171:3a7713b1edbc 104 case GPIO_PULLUP:
AnnaBridge 171:3a7713b1edbc 105 if (function == LL_GPIO_MODE_FLOATING) {
AnnaBridge 171:3a7713b1edbc 106 LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_INPUT);
AnnaBridge 171:3a7713b1edbc 107 }
AnnaBridge 171:3a7713b1edbc 108 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_UP);
AnnaBridge 171:3a7713b1edbc 109 break;
AnnaBridge 171:3a7713b1edbc 110 case GPIO_PULLDOWN:
AnnaBridge 171:3a7713b1edbc 111 if (function == LL_GPIO_MODE_FLOATING) {
AnnaBridge 171:3a7713b1edbc 112 LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_INPUT);
AnnaBridge 171:3a7713b1edbc 113 }
AnnaBridge 171:3a7713b1edbc 114 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_DOWN);
AnnaBridge 171:3a7713b1edbc 115 break;
AnnaBridge 171:3a7713b1edbc 116 default:
AnnaBridge 171:3a7713b1edbc 117 /* Input+NoPull = Floating for F1 family */
AnnaBridge 171:3a7713b1edbc 118 if (function == LL_GPIO_MODE_INPUT) {
AnnaBridge 171:3a7713b1edbc 119 LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_FLOATING);
AnnaBridge 171:3a7713b1edbc 120 }
AnnaBridge 171:3a7713b1edbc 121 break;
AnnaBridge 171:3a7713b1edbc 122 }
AnnaBridge 171:3a7713b1edbc 123 }
AnnaBridge 171:3a7713b1edbc 124
AnnaBridge 171:3a7713b1edbc 125 #endif