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TARGET_LPC4088/TOOLCHAIN_ARM_STD/system_LPC407x_8x_177x_8x.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**********************************************************************
AnnaBridge 171:3a7713b1edbc 2 * $Id$ system_LPC407x_8x_177x_8x.h 2011-06-02
AnnaBridge 171:3a7713b1edbc 3 *//**
AnnaBridge 171:3a7713b1edbc 4 * @file system_LPC407x_8x_177x_8x.h
AnnaBridge 171:3a7713b1edbc 5 * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Source File
AnnaBridge 171:3a7713b1edbc 6 * for the NXP LPC Device Series
AnnaBridge 171:3a7713b1edbc 7 * @version 1.0
AnnaBridge 171:3a7713b1edbc 8 * @date 02. June. 2011
AnnaBridge 171:3a7713b1edbc 9 * @author NXP MCU SW Application Team
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Copyright(C) 2011, NXP Semiconductor
AnnaBridge 171:3a7713b1edbc 12 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 13 *
AnnaBridge 171:3a7713b1edbc 14 ***********************************************************************
AnnaBridge 171:3a7713b1edbc 15 * Software that is described herein is for illustrative purposes only
AnnaBridge 171:3a7713b1edbc 16 * which provides customers with programming information regarding the
AnnaBridge 171:3a7713b1edbc 17 * products. This software is supplied "AS IS" without any warranties.
AnnaBridge 171:3a7713b1edbc 18 * NXP Semiconductors assumes no responsibility or liability for the
AnnaBridge 171:3a7713b1edbc 19 * use of the software, conveys no license or title under any patent,
AnnaBridge 171:3a7713b1edbc 20 * copyright, or mask work right to the product. NXP Semiconductors
AnnaBridge 171:3a7713b1edbc 21 * reserves the right to make changes in the software without
AnnaBridge 171:3a7713b1edbc 22 * notification. NXP Semiconductors also make no representation or
AnnaBridge 171:3a7713b1edbc 23 * warranty that such application will be suitable for the specified
AnnaBridge 171:3a7713b1edbc 24 * use without further testing or modification.
AnnaBridge 171:3a7713b1edbc 25 * Permission to use, copy, modify, and distribute this software and its
AnnaBridge 171:3a7713b1edbc 26 * documentation is hereby granted, under NXP Semiconductors'
AnnaBridge 171:3a7713b1edbc 27 * relevant copyright in the software, without fee, provided that it
AnnaBridge 171:3a7713b1edbc 28 * is used in conjunction with NXP Semiconductors microcontrollers. This
AnnaBridge 171:3a7713b1edbc 29 * copyright, permission, and disclaimer notice must appear in all copies of
AnnaBridge 171:3a7713b1edbc 30 * this code.
AnnaBridge 171:3a7713b1edbc 31 **********************************************************************/
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 #ifndef __SYSTEM_LPC407x_8x_177x_8x_H
AnnaBridge 171:3a7713b1edbc 34 #define __SYSTEM_LPC407x_8x_177x_8x_H
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 37 extern "C" {
AnnaBridge 171:3a7713b1edbc 38 #endif
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #include <stdint.h>
AnnaBridge 171:3a7713b1edbc 41
AnnaBridge 171:3a7713b1edbc 42 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
AnnaBridge 171:3a7713b1edbc 43 extern uint32_t PeripheralClock; /*!< Peripheral Clock Frequency (Pclk) */
AnnaBridge 171:3a7713b1edbc 44 extern uint32_t EMCClock; /*!< EMC Clock */
AnnaBridge 171:3a7713b1edbc 45 extern uint32_t USBClock; /*!< USB Frequency */
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47
AnnaBridge 171:3a7713b1edbc 48 /**
AnnaBridge 171:3a7713b1edbc 49 * Initialize the system
AnnaBridge 171:3a7713b1edbc 50 *
AnnaBridge 171:3a7713b1edbc 51 * @param none
AnnaBridge 171:3a7713b1edbc 52 * @return none
AnnaBridge 171:3a7713b1edbc 53 *
AnnaBridge 171:3a7713b1edbc 54 * @brief Setup the microcontroller system.
AnnaBridge 171:3a7713b1edbc 55 * Initialize the System and update the SystemCoreClock variable.
AnnaBridge 171:3a7713b1edbc 56 */
AnnaBridge 171:3a7713b1edbc 57 extern void SystemInit (void);
AnnaBridge 171:3a7713b1edbc 58
AnnaBridge 171:3a7713b1edbc 59 /**
AnnaBridge 171:3a7713b1edbc 60 * Update SystemCoreClock variable
AnnaBridge 171:3a7713b1edbc 61 *
AnnaBridge 171:3a7713b1edbc 62 * @param none
AnnaBridge 171:3a7713b1edbc 63 * @return none
AnnaBridge 171:3a7713b1edbc 64 *
AnnaBridge 171:3a7713b1edbc 65 * @brief Updates the SystemCoreClock with current core Clock
AnnaBridge 171:3a7713b1edbc 66 * retrieved from cpu registers.
AnnaBridge 171:3a7713b1edbc 67 */
AnnaBridge 171:3a7713b1edbc 68 extern void SystemCoreClockUpdate (void);
AnnaBridge 171:3a7713b1edbc 69
AnnaBridge 171:3a7713b1edbc 70 /*----------------------------------------------------------------------------
AnnaBridge 171:3a7713b1edbc 71 Define clocks
AnnaBridge 171:3a7713b1edbc 72 *----------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 73 #define XTAL (12000000UL) /* Oscillator frequency */
AnnaBridge 171:3a7713b1edbc 74 #define OSC_CLK ( XTAL) /* Main oscillator frequency */
AnnaBridge 171:3a7713b1edbc 75 #define RTC_CLK ( 32768UL) /* RTC oscillator frequency */
AnnaBridge 171:3a7713b1edbc 76 #define IRC_OSC (12000000UL) /* Internal RC oscillator frequency */
AnnaBridge 171:3a7713b1edbc 77 #define WDT_OSC ( 500000UL) /* Internal WDT oscillator frequency */
AnnaBridge 171:3a7713b1edbc 78
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80
AnnaBridge 171:3a7713b1edbc 81 /*
AnnaBridge 171:3a7713b1edbc 82 //-------- <<< end of configuration section >>> ------------------------------
AnnaBridge 171:3a7713b1edbc 83 */
AnnaBridge 171:3a7713b1edbc 84
AnnaBridge 171:3a7713b1edbc 85 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 86 }
AnnaBridge 171:3a7713b1edbc 87 #endif
AnnaBridge 171:3a7713b1edbc 88
AnnaBridge 171:3a7713b1edbc 89 #endif /* __SYSTEM_LPC407x_8x_177x_8x_H */