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TARGET_GR_LYCHEE/TOOLCHAIN_ARM_STD/mem_RZ_A1LU.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 161:aa5281ff4a02 1 /**************************************************************************//**
AnnaBridge 161:aa5281ff4a02 2 * @file mem_RZ_A1LU.h
AnnaBridge 161:aa5281ff4a02 3 * @brief Memory base and size definitions (used in scatter file)
AnnaBridge 161:aa5281ff4a02 4 * @version V1.00
AnnaBridge 161:aa5281ff4a02 5 * @date 10 Mar 2017
AnnaBridge 161:aa5281ff4a02 6 *
AnnaBridge 161:aa5281ff4a02 7 * @note
AnnaBridge 161:aa5281ff4a02 8 *
AnnaBridge 161:aa5281ff4a02 9 ******************************************************************************/
AnnaBridge 161:aa5281ff4a02 10 /*
AnnaBridge 161:aa5281ff4a02 11 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge 161:aa5281ff4a02 12 *
AnnaBridge 161:aa5281ff4a02 13 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 161:aa5281ff4a02 14 *
AnnaBridge 161:aa5281ff4a02 15 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 161:aa5281ff4a02 16 * not use this file except in compliance with the License.
AnnaBridge 161:aa5281ff4a02 17 * You may obtain a copy of the License at
AnnaBridge 161:aa5281ff4a02 18 *
AnnaBridge 161:aa5281ff4a02 19 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 161:aa5281ff4a02 20 *
AnnaBridge 161:aa5281ff4a02 21 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 161:aa5281ff4a02 22 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 161:aa5281ff4a02 23 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 161:aa5281ff4a02 24 * See the License for the specific language governing permissions and
AnnaBridge 161:aa5281ff4a02 25 * limitations under the License.
AnnaBridge 161:aa5281ff4a02 26 */
AnnaBridge 161:aa5281ff4a02 27
AnnaBridge 161:aa5281ff4a02 28 #ifndef __MEM_RZ_A1LU_H
AnnaBridge 161:aa5281ff4a02 29 #define __MEM_RZ_A1LU_H
AnnaBridge 161:aa5281ff4a02 30
AnnaBridge 161:aa5281ff4a02 31 /*----------------------------------------------------------------------------
AnnaBridge 161:aa5281ff4a02 32 User Stack & Heap size definition
AnnaBridge 161:aa5281ff4a02 33 *----------------------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 34 /*
AnnaBridge 161:aa5281ff4a02 35 //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
AnnaBridge 161:aa5281ff4a02 36 */
AnnaBridge 161:aa5281ff4a02 37
AnnaBridge 161:aa5281ff4a02 38 /*--------------------- ROM Configuration ------------------------------------
AnnaBridge 161:aa5281ff4a02 39 //
AnnaBridge 161:aa5281ff4a02 40 // <h> ROM Configuration
AnnaBridge 161:aa5281ff4a02 41 // <o0> ROM Base Address <0x0-0xFFFFFFFF:8>
AnnaBridge 161:aa5281ff4a02 42 // <o1> ROM Size (in Bytes) <0x0-0xFFFFFFFF:8>
AnnaBridge 161:aa5281ff4a02 43 // </h>
AnnaBridge 161:aa5281ff4a02 44 *----------------------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 45
AnnaBridge 161:aa5281ff4a02 46 /*--------------------- RAM Configuration -----------------------------------
AnnaBridge 161:aa5281ff4a02 47 *----------------------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 48 #define __RAM_BASE 0x20000000
AnnaBridge 170:e95d10626187 49 #define __RAM_SIZE 0x00300000
AnnaBridge 161:aa5281ff4a02 50 #define __NC_RAM_SIZE 0x00100000
AnnaBridge 161:aa5281ff4a02 51 #define __NM_RAM_SIZE (__RAM_SIZE - __NC_RAM_SIZE)
AnnaBridge 161:aa5281ff4a02 52 #define __DATA_NC_BASE (__RAM_BASE + __NM_RAM_SIZE + 0x40000000)
AnnaBridge 161:aa5281ff4a02 53
AnnaBridge 161:aa5281ff4a02 54 #define __UND_STACK_SIZE 0x00000100
AnnaBridge 161:aa5281ff4a02 55 #define __SVC_STACK_SIZE 0x00008000
AnnaBridge 161:aa5281ff4a02 56 #define __ABT_STACK_SIZE 0x00000100
AnnaBridge 161:aa5281ff4a02 57 #define __FIQ_STACK_SIZE 0x00000100
AnnaBridge 161:aa5281ff4a02 58 #define __IRQ_STACK_SIZE 0x0000F000
AnnaBridge 161:aa5281ff4a02 59 #define __STACK_SIZE (__UND_STACK_SIZE + __SVC_STACK_SIZE + __ABT_STACK_SIZE + __FIQ_STACK_SIZE + __IRQ_STACK_SIZE)
AnnaBridge 161:aa5281ff4a02 60
AnnaBridge 161:aa5281ff4a02 61 /*----------------------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 62
AnnaBridge 161:aa5281ff4a02 63 /*--------------------- TTB Configuration ------------------------------------
AnnaBridge 161:aa5281ff4a02 64 //
AnnaBridge 161:aa5281ff4a02 65 // <h> TTB Configuration
AnnaBridge 161:aa5281ff4a02 66 // <o0> TTB Base Address <0x0-0xFFFFFFFF:8>
AnnaBridge 161:aa5281ff4a02 67 // <o1> TTB Size (in Bytes) <0x0-0xFFFFFFFF:8>
AnnaBridge 161:aa5281ff4a02 68 // </h>
AnnaBridge 161:aa5281ff4a02 69 *----------------------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 70 #define __TTB_BASE 0x20000000
AnnaBridge 161:aa5281ff4a02 71 #define __TTB_SIZE 0x00004000
AnnaBridge 161:aa5281ff4a02 72
AnnaBridge 161:aa5281ff4a02 73 #endif /* __MEM_RZ_A1H_H */