Maxim Integrated
MAX7032 Transceiver Mbed Driver
Max7032.h@0:65766360f6b9, 2021-08-02 (annotated)
- Committer:
- Sinan Divarci
- Date:
- Mon Aug 02 16:42:52 2021 +0300
- Revision:
- 0:65766360f6b9
initial commit
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Sinan Divarci |
0:65766360f6b9 | 1 | /******************************************************************************* |
| Sinan Divarci |
0:65766360f6b9 | 2 | * Copyright(C) Maxim Integrated Products, Inc., All Rights Reserved. |
| Sinan Divarci |
0:65766360f6b9 | 3 | * |
| Sinan Divarci |
0:65766360f6b9 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| Sinan Divarci |
0:65766360f6b9 | 5 | * copy of this software and associated documentation files(the "Software"), |
| Sinan Divarci |
0:65766360f6b9 | 6 | * to deal in the Software without restriction, including without limitation |
| Sinan Divarci |
0:65766360f6b9 | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| Sinan Divarci |
0:65766360f6b9 | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| Sinan Divarci |
0:65766360f6b9 | 9 | * Software is furnished to do so, subject to the following conditions: |
| Sinan Divarci |
0:65766360f6b9 | 10 | * |
| Sinan Divarci |
0:65766360f6b9 | 11 | * The above copyright notice and this permission notice shall be included |
| Sinan Divarci |
0:65766360f6b9 | 12 | * in all copies or substantial portions of the Software. |
| Sinan Divarci |
0:65766360f6b9 | 13 | * |
| Sinan Divarci |
0:65766360f6b9 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| Sinan Divarci |
0:65766360f6b9 | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| Sinan Divarci |
0:65766360f6b9 | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| Sinan Divarci |
0:65766360f6b9 | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
| Sinan Divarci |
0:65766360f6b9 | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| Sinan Divarci |
0:65766360f6b9 | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| Sinan Divarci |
0:65766360f6b9 | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| Sinan Divarci |
0:65766360f6b9 | 21 | * |
| Sinan Divarci |
0:65766360f6b9 | 22 | * Except as contained in this notice, the name of Maxim Integrated |
| Sinan Divarci |
0:65766360f6b9 | 23 | * Products, Inc.shall not be used except as stated in the Maxim Integrated |
| Sinan Divarci |
0:65766360f6b9 | 24 | * Products, Inc.Branding Policy. |
| Sinan Divarci |
0:65766360f6b9 | 25 | * |
| Sinan Divarci |
0:65766360f6b9 | 26 | * The mere transfer of this software does not imply any licenses |
| Sinan Divarci |
0:65766360f6b9 | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
| Sinan Divarci |
0:65766360f6b9 | 28 | * trademarks, maskwork rights, or any other form of intellectual |
| Sinan Divarci |
0:65766360f6b9 | 29 | * property whatsoever. Maxim Integrated Products, Inc.retains all |
| Sinan Divarci |
0:65766360f6b9 | 30 | * ownership rights. |
| Sinan Divarci |
0:65766360f6b9 | 31 | ******************************************************************************* |
| Sinan Divarci |
0:65766360f6b9 | 32 | */ |
| Sinan Divarci |
0:65766360f6b9 | 33 | |
| Sinan Divarci |
0:65766360f6b9 | 34 | #ifndef MAX7032_MAX7032_H_ |
| Sinan Divarci |
0:65766360f6b9 | 35 | #define MAX7032_MAX7032_H_ |
| Sinan Divarci |
0:65766360f6b9 | 36 | |
| Sinan Divarci |
0:65766360f6b9 | 37 | #include "mbed.h" |
| Sinan Divarci |
0:65766360f6b9 | 38 | #include "Max7032_regs.h" |
| Sinan Divarci |
0:65766360f6b9 | 39 | #include "rtos.h" |
| Sinan Divarci |
0:65766360f6b9 | 40 | |
| Sinan Divarci |
0:65766360f6b9 | 41 | #define MAX7032_SPI MXC_SPIM2 |
| Sinan Divarci |
0:65766360f6b9 | 42 | |
| Sinan Divarci |
0:65766360f6b9 | 43 | #define MAX7032_SPI MXC_SPIM2 |
| Sinan Divarci |
0:65766360f6b9 | 44 | #define MAX7032_SPI_MOSI P5_1 |
| Sinan Divarci |
0:65766360f6b9 | 45 | #define MAX7032_SPI_MISO P5_2 |
| Sinan Divarci |
0:65766360f6b9 | 46 | #define MAX7032_SPI_SCK P5_0 |
| Sinan Divarci |
0:65766360f6b9 | 47 | #define MAX7032_SPI_CS P5_5 |
| Sinan Divarci |
0:65766360f6b9 | 48 | |
| Sinan Divarci |
0:65766360f6b9 | 49 | #define MAX7032_PIN_POWER P4_0 |
| Sinan Divarci |
0:65766360f6b9 | 50 | #define MAX7032_PIN_RSSI AIN_1 |
| Sinan Divarci |
0:65766360f6b9 | 51 | #define MAX7032_TRX_PIN P3_3 |
| Sinan Divarci |
0:65766360f6b9 | 52 | |
| Sinan Divarci |
0:65766360f6b9 | 53 | #define MAX7032_MBED_DATA_PIN P5_6 |
| Sinan Divarci |
0:65766360f6b9 | 54 | #define MAX7032_GPIO_DATA_PORT PORT_5 |
| Sinan Divarci |
0:65766360f6b9 | 55 | #define MAX7032_GPIO_DATA_PIN PIN_6 |
| Sinan Divarci |
0:65766360f6b9 | 56 | |
| Sinan Divarci |
0:65766360f6b9 | 57 | #define Q_START_CONF_LEN 17 |
| Sinan Divarci |
0:65766360f6b9 | 58 | |
| Sinan Divarci |
0:65766360f6b9 | 59 | class MAX7032 |
| Sinan Divarci |
0:65766360f6b9 | 60 | { |
| Sinan Divarci |
0:65766360f6b9 | 61 | private: |
| Sinan Divarci |
0:65766360f6b9 | 62 | max7032_reg_map_t *reg_map; |
| Sinan Divarci |
0:65766360f6b9 | 63 | SPI *spi_handler; |
| Sinan Divarci |
0:65766360f6b9 | 64 | DigitalOut *ssel; |
| Sinan Divarci |
0:65766360f6b9 | 65 | DigitalOut *power_pin; |
| Sinan Divarci |
0:65766360f6b9 | 66 | DigitalOut *trx_pin; |
| Sinan Divarci |
0:65766360f6b9 | 67 | DigitalOut *data_send; |
| Sinan Divarci |
0:65766360f6b9 | 68 | PinName data_pin; |
| Sinan Divarci |
0:65766360f6b9 | 69 | DigitalOut *dio; |
| Sinan Divarci |
0:65766360f6b9 | 70 | |
| Sinan Divarci |
0:65766360f6b9 | 71 | DigitalIn *data_read; |
| Sinan Divarci |
0:65766360f6b9 | 72 | |
| Sinan Divarci |
0:65766360f6b9 | 73 | uint8_t preset_mode; |
| Sinan Divarci |
0:65766360f6b9 | 74 | float f_xtal ; |
| Sinan Divarci |
0:65766360f6b9 | 75 | float f_rf; |
| Sinan Divarci |
0:65766360f6b9 | 76 | float data_rate; |
| Sinan Divarci |
0:65766360f6b9 | 77 | float fsk_dev; |
| Sinan Divarci |
0:65766360f6b9 | 78 | const float fsk_dev_max = 0.1f; //100khz |
| Sinan Divarci |
0:65766360f6b9 | 79 | |
| Sinan Divarci |
0:65766360f6b9 | 80 | protected: |
| Sinan Divarci |
0:65766360f6b9 | 81 | |
| Sinan Divarci |
0:65766360f6b9 | 82 | |
| Sinan Divarci |
0:65766360f6b9 | 83 | public: |
| Sinan Divarci |
0:65766360f6b9 | 84 | |
| Sinan Divarci |
0:65766360f6b9 | 85 | //Constructors |
| Sinan Divarci |
0:65766360f6b9 | 86 | MAX7032(SPI *spi, DigitalOut *cs, DigitalOut *powerPin, PinName dataPin, DigitalOut *dioPin, DigitalOut *trxPin); |
| Sinan Divarci |
0:65766360f6b9 | 87 | |
| Sinan Divarci |
0:65766360f6b9 | 88 | MAX7032(SPI *spi, DigitalOut *powerPin, PinName dataPin, DigitalOut *dioPin, DigitalOut *trxPin); |
| Sinan Divarci |
0:65766360f6b9 | 89 | |
| Sinan Divarci |
0:65766360f6b9 | 90 | //Destructor |
| Sinan Divarci |
0:65766360f6b9 | 91 | ~MAX7032(); |
| Sinan Divarci |
0:65766360f6b9 | 92 | |
| Sinan Divarci |
0:65766360f6b9 | 93 | typedef enum { |
| Sinan Divarci |
0:65766360f6b9 | 94 | POWER_ADDR = 0x00, |
| Sinan Divarci |
0:65766360f6b9 | 95 | CONTRL_ADDR = 0x01, |
| Sinan Divarci |
0:65766360f6b9 | 96 | CONF0_ADDR = 0x02, |
| Sinan Divarci |
0:65766360f6b9 | 97 | CONF1_ADDR = 0x03, |
| Sinan Divarci |
0:65766360f6b9 | 98 | OSC_ADDR = 0x05, |
| Sinan Divarci |
0:65766360f6b9 | 99 | TOFFMSB_ADDR = 0x06, |
| Sinan Divarci |
0:65766360f6b9 | 100 | TOFFLSB_ADDR = 0x07, |
| Sinan Divarci |
0:65766360f6b9 | 101 | TCPU_ADDR = 0x08, |
| Sinan Divarci |
0:65766360f6b9 | 102 | TRFMSB_ADDR = 0x09, |
| Sinan Divarci |
0:65766360f6b9 | 103 | TRFLSB_ADDR = 0x0A, |
| Sinan Divarci |
0:65766360f6b9 | 104 | TONMSB_ADDR = 0x0B, |
| Sinan Divarci |
0:65766360f6b9 | 105 | TONLSB_ADDR = 0x0C, |
| Sinan Divarci |
0:65766360f6b9 | 106 | TXLOWMSB_ADDR = 0x0D, |
| Sinan Divarci |
0:65766360f6b9 | 107 | TXLOWLSB_ADDR = 0x0E, |
| Sinan Divarci |
0:65766360f6b9 | 108 | TXHIGHMSB_ADDR = 0x0F, |
| Sinan Divarci |
0:65766360f6b9 | 109 | TXHIGHLSB_ADDR = 0x10, |
| Sinan Divarci |
0:65766360f6b9 | 110 | STATUS_ADDR = 0x1A, |
| Sinan Divarci |
0:65766360f6b9 | 111 | }register_address_t; |
| Sinan Divarci |
0:65766360f6b9 | 112 | |
| Sinan Divarci |
0:65766360f6b9 | 113 | typedef enum { |
| Sinan Divarci |
0:65766360f6b9 | 114 | X0, |
| Sinan Divarci |
0:65766360f6b9 | 115 | RSSIO, |
| Sinan Divarci |
0:65766360f6b9 | 116 | PA, |
| Sinan Divarci |
0:65766360f6b9 | 117 | PkDet, |
| Sinan Divarci |
0:65766360f6b9 | 118 | BaseB, |
| Sinan Divarci |
0:65766360f6b9 | 119 | MIXER, |
| Sinan Divarci |
0:65766360f6b9 | 120 | AGC, |
| Sinan Divarci |
0:65766360f6b9 | 121 | LNA, |
| Sinan Divarci |
0:65766360f6b9 | 122 | SLEEP, |
| Sinan Divarci |
0:65766360f6b9 | 123 | CKOUT, |
| Sinan Divarci |
0:65766360f6b9 | 124 | FCAL, |
| Sinan Divarci |
0:65766360f6b9 | 125 | PCAL, |
| Sinan Divarci |
0:65766360f6b9 | 126 | X1, |
| Sinan Divarci |
0:65766360f6b9 | 127 | TRK_EN, |
| Sinan Divarci |
0:65766360f6b9 | 128 | GAIN, |
| Sinan Divarci |
0:65766360f6b9 | 129 | AGCLK, |
| Sinan Divarci |
0:65766360f6b9 | 130 | ONPS0, |
| Sinan Divarci |
0:65766360f6b9 | 131 | ONPS1, |
| Sinan Divarci |
0:65766360f6b9 | 132 | OFPS0, |
| Sinan Divarci |
0:65766360f6b9 | 133 | OFPS1, |
| Sinan Divarci |
0:65766360f6b9 | 134 | DRX, |
| Sinan Divarci |
0:65766360f6b9 | 135 | MGAIN, |
| Sinan Divarci |
0:65766360f6b9 | 136 | T_R, |
| Sinan Divarci |
0:65766360f6b9 | 137 | MODE, |
| Sinan Divarci |
0:65766360f6b9 | 138 | DT0, |
| Sinan Divarci |
0:65766360f6b9 | 139 | DT1, |
| Sinan Divarci |
0:65766360f6b9 | 140 | DT2, |
| Sinan Divarci |
0:65766360f6b9 | 141 | CDIV0, |
| Sinan Divarci |
0:65766360f6b9 | 142 | CDIV1, |
| Sinan Divarci |
0:65766360f6b9 | 143 | CLKOF, |
| Sinan Divarci |
0:65766360f6b9 | 144 | ACAL, |
| Sinan Divarci |
0:65766360f6b9 | 145 | X2, |
| Sinan Divarci |
0:65766360f6b9 | 146 | NUM_OF_BIT |
| Sinan Divarci |
0:65766360f6b9 | 147 | }reg_bits_t; |
| Sinan Divarci |
0:65766360f6b9 | 148 | |
| Sinan Divarci |
0:65766360f6b9 | 149 | typedef enum |
| Sinan Divarci |
0:65766360f6b9 | 150 | { |
| Sinan Divarci |
0:65766360f6b9 | 151 | Manchester = 0, |
| Sinan Divarci |
0:65766360f6b9 | 152 | NRZ = 1 |
| Sinan Divarci |
0:65766360f6b9 | 153 | }encoding_t; |
| Sinan Divarci |
0:65766360f6b9 | 154 | |
| Sinan Divarci |
0:65766360f6b9 | 155 | encoding_t encoding; |
| Sinan Divarci |
0:65766360f6b9 | 156 | |
| Sinan Divarci |
0:65766360f6b9 | 157 | /** |
| Sinan Divarci |
0:65766360f6b9 | 158 | * @brief Operation state of the RF receiver |
| Sinan Divarci |
0:65766360f6b9 | 159 | * |
| Sinan Divarci |
0:65766360f6b9 | 160 | * @details |
| Sinan Divarci |
0:65766360f6b9 | 161 | * - Default : 0x00 |
| Sinan Divarci |
0:65766360f6b9 | 162 | * - Description : Indicates whether initialization is successful |
| Sinan Divarci |
0:65766360f6b9 | 163 | */ |
| Sinan Divarci |
0:65766360f6b9 | 164 | typedef enum { |
| Sinan Divarci |
0:65766360f6b9 | 165 | INITIALIZED = 0, |
| Sinan Divarci |
0:65766360f6b9 | 166 | UNINITIALIZED = 1, |
| Sinan Divarci |
0:65766360f6b9 | 167 | UNKNOWN = 2, |
| Sinan Divarci |
0:65766360f6b9 | 168 | } operation_mode_t; |
| Sinan Divarci |
0:65766360f6b9 | 169 | |
| Sinan Divarci |
0:65766360f6b9 | 170 | operation_mode_t operation_mode; |
| Sinan Divarci |
0:65766360f6b9 | 171 | |
| Sinan Divarci |
0:65766360f6b9 | 172 | /** |
| Sinan Divarci |
0:65766360f6b9 | 173 | * @brief Register Configuration |
| Sinan Divarci |
0:65766360f6b9 | 174 | * |
| Sinan Divarci |
0:65766360f6b9 | 175 | * @details |
| Sinan Divarci |
0:65766360f6b9 | 176 | * - Register : CONF0 (0x02) |
| Sinan Divarci |
0:65766360f6b9 | 177 | * - Bit Fields : [7] |
| Sinan Divarci |
0:65766360f6b9 | 178 | * - Default : 0x0 |
| Sinan Divarci |
0:65766360f6b9 | 179 | * - Description : ASK/FSK Selection for both receive and transmit |
| Sinan Divarci |
0:65766360f6b9 | 180 | */ |
| Sinan Divarci |
0:65766360f6b9 | 181 | typedef enum { |
| Sinan Divarci |
0:65766360f6b9 | 182 | ASK_FSK_SEL_ASK, /**< 0x0: ASK modulation */ |
| Sinan Divarci |
0:65766360f6b9 | 183 | ASK_FSK_SEL_FSK /**< 0x1: FSK modulation */ |
| Sinan Divarci |
0:65766360f6b9 | 184 | } ask_fsk_sel_t; |
| Sinan Divarci |
0:65766360f6b9 | 185 | |
| Sinan Divarci |
0:65766360f6b9 | 186 | |
| Sinan Divarci |
0:65766360f6b9 | 187 | /* REGISTER SET & GET FUNCTION DECLARATIONS */ |
| Sinan Divarci |
0:65766360f6b9 | 188 | |
| Sinan Divarci |
0:65766360f6b9 | 189 | |
| Sinan Divarci |
0:65766360f6b9 | 190 | /** |
| Sinan Divarci |
0:65766360f6b9 | 191 | * @brief Sets the specified bit. |
| Sinan Divarci |
0:65766360f6b9 | 192 | * |
| Sinan Divarci |
0:65766360f6b9 | 193 | * @param[in] bit_field Bit to be set. |
| Sinan Divarci |
0:65766360f6b9 | 194 | * @param[in] val Value to be set. |
| Sinan Divarci |
0:65766360f6b9 | 195 | * |
| Sinan Divarci |
0:65766360f6b9 | 196 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 197 | */ |
| Sinan Divarci |
0:65766360f6b9 | 198 | int set_bit_field(reg_bits_t bit_field, uint8_t val); |
| Sinan Divarci |
0:65766360f6b9 | 199 | |
| Sinan Divarci |
0:65766360f6b9 | 200 | /** |
| Sinan Divarci |
0:65766360f6b9 | 201 | * @brief Gets the specified bit. |
| Sinan Divarci |
0:65766360f6b9 | 202 | * |
| Sinan Divarci |
0:65766360f6b9 | 203 | * @param[in] bit_field Bit to get value. |
| Sinan Divarci |
0:65766360f6b9 | 204 | * @param[in] val The address to store the value of the Bit. |
| Sinan Divarci |
0:65766360f6b9 | 205 | * |
| Sinan Divarci |
0:65766360f6b9 | 206 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 207 | */ |
| Sinan Divarci |
0:65766360f6b9 | 208 | int get_bit_field(reg_bits_t bit_field, uint8_t *val); |
| Sinan Divarci |
0:65766360f6b9 | 209 | |
| Sinan Divarci |
0:65766360f6b9 | 210 | /** |
| Sinan Divarci |
0:65766360f6b9 | 211 | * @brief Sets Low-Noise Amplifier Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 212 | * |
| Sinan Divarci |
0:65766360f6b9 | 213 | * @param[in] lna 0x0: Disable, 0x1: Enable. |
| Sinan Divarci |
0:65766360f6b9 | 214 | * |
| Sinan Divarci |
0:65766360f6b9 | 215 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 216 | */ |
| Sinan Divarci |
0:65766360f6b9 | 217 | int set_lna(uint8_t lna); |
| Sinan Divarci |
0:65766360f6b9 | 218 | |
| Sinan Divarci |
0:65766360f6b9 | 219 | /** |
| Sinan Divarci |
0:65766360f6b9 | 220 | * @brief Gets Low-Noise Amplifier Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 221 | * |
| Sinan Divarci |
0:65766360f6b9 | 222 | * @returns LNA Power-Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 223 | */ |
| Sinan Divarci |
0:65766360f6b9 | 224 | int get_lna(); |
| Sinan Divarci |
0:65766360f6b9 | 225 | |
| Sinan Divarci |
0:65766360f6b9 | 226 | /** |
| Sinan Divarci |
0:65766360f6b9 | 227 | * @brief Sets Automatic Gain Control Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 228 | * |
| Sinan Divarci |
0:65766360f6b9 | 229 | * @param[in] agc 0x0: Disable, 0x1: Enable. |
| Sinan Divarci |
0:65766360f6b9 | 230 | * |
| Sinan Divarci |
0:65766360f6b9 | 231 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 232 | */ |
| Sinan Divarci |
0:65766360f6b9 | 233 | int set_agc(uint8_t agc); |
| Sinan Divarci |
0:65766360f6b9 | 234 | |
| Sinan Divarci |
0:65766360f6b9 | 235 | /** |
| Sinan Divarci |
0:65766360f6b9 | 236 | * @brief Gets Automatic Gain Control Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 237 | * |
| Sinan Divarci |
0:65766360f6b9 | 238 | * @returns AGC Power-Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 239 | */ |
| Sinan Divarci |
0:65766360f6b9 | 240 | int get_agc(); |
| Sinan Divarci |
0:65766360f6b9 | 241 | |
| Sinan Divarci |
0:65766360f6b9 | 242 | /** |
| Sinan Divarci |
0:65766360f6b9 | 243 | * @brief Sets Mixer Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 244 | * |
| Sinan Divarci |
0:65766360f6b9 | 245 | * @param[in] mixer 0x0: Disable, 0x1: Enable. |
| Sinan Divarci |
0:65766360f6b9 | 246 | * |
| Sinan Divarci |
0:65766360f6b9 | 247 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 248 | */ |
| Sinan Divarci |
0:65766360f6b9 | 249 | int set_mixer(uint8_t mixer); |
| Sinan Divarci |
0:65766360f6b9 | 250 | |
| Sinan Divarci |
0:65766360f6b9 | 251 | /** |
| Sinan Divarci |
0:65766360f6b9 | 252 | * @brief Gets Mixer Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 253 | * |
| Sinan Divarci |
0:65766360f6b9 | 254 | * @returns Mixer Power-Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 255 | */ |
| Sinan Divarci |
0:65766360f6b9 | 256 | int get_mixer(); |
| Sinan Divarci |
0:65766360f6b9 | 257 | |
| Sinan Divarci |
0:65766360f6b9 | 258 | /** |
| Sinan Divarci |
0:65766360f6b9 | 259 | * @brief Sets Baseband Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 260 | * |
| Sinan Divarci |
0:65766360f6b9 | 261 | * @param[in] baseb 0x0: Disable, 0x1: Enable. |
| Sinan Divarci |
0:65766360f6b9 | 262 | * |
| Sinan Divarci |
0:65766360f6b9 | 263 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 264 | */ |
| Sinan Divarci |
0:65766360f6b9 | 265 | int set_baseb(uint8_t baseb); |
| Sinan Divarci |
0:65766360f6b9 | 266 | |
| Sinan Divarci |
0:65766360f6b9 | 267 | /** |
| Sinan Divarci |
0:65766360f6b9 | 268 | * @brief Gets Baseband Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 269 | * |
| Sinan Divarci |
0:65766360f6b9 | 270 | * @returns Baseband Power-Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 271 | */ |
| Sinan Divarci |
0:65766360f6b9 | 272 | int get_baseb(); |
| Sinan Divarci |
0:65766360f6b9 | 273 | |
| Sinan Divarci |
0:65766360f6b9 | 274 | /** |
| Sinan Divarci |
0:65766360f6b9 | 275 | * @brief Sets Peak-detector Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 276 | * |
| Sinan Divarci |
0:65766360f6b9 | 277 | * @param[in] pkdet 0x0: Disable, 0x1: Enable. |
| Sinan Divarci |
0:65766360f6b9 | 278 | * |
| Sinan Divarci |
0:65766360f6b9 | 279 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 280 | */ |
| Sinan Divarci |
0:65766360f6b9 | 281 | int set_pkdet(uint8_t pkdet); |
| Sinan Divarci |
0:65766360f6b9 | 282 | |
| Sinan Divarci |
0:65766360f6b9 | 283 | /** |
| Sinan Divarci |
0:65766360f6b9 | 284 | * @brief Gets Peak-detector Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 285 | * |
| Sinan Divarci |
0:65766360f6b9 | 286 | * @returns Peak-detector Power-Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 287 | */ |
| Sinan Divarci |
0:65766360f6b9 | 288 | int get_pkdet(); |
| Sinan Divarci |
0:65766360f6b9 | 289 | |
| Sinan Divarci |
0:65766360f6b9 | 290 | /** |
| Sinan Divarci |
0:65766360f6b9 | 291 | * @brief Sets Transmitter Power Amplifier Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 292 | * |
| Sinan Divarci |
0:65766360f6b9 | 293 | * @param[in] pa 0x0: Disable, 0x1: Enable. |
| Sinan Divarci |
0:65766360f6b9 | 294 | * |
| Sinan Divarci |
0:65766360f6b9 | 295 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 296 | */ |
| Sinan Divarci |
0:65766360f6b9 | 297 | int set_pa(uint8_t pa); |
| Sinan Divarci |
0:65766360f6b9 | 298 | |
| Sinan Divarci |
0:65766360f6b9 | 299 | /** |
| Sinan Divarci |
0:65766360f6b9 | 300 | * @brief Gets Transmitter Power Amplifier Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 301 | * |
| Sinan Divarci |
0:65766360f6b9 | 302 | * @returns Transmitter Power Amplifier Power-Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 303 | */ |
| Sinan Divarci |
0:65766360f6b9 | 304 | int get_pa(); |
| Sinan Divarci |
0:65766360f6b9 | 305 | |
| Sinan Divarci |
0:65766360f6b9 | 306 | /** |
| Sinan Divarci |
0:65766360f6b9 | 307 | * @brief Sets RSSI Amplifier Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 308 | * |
| Sinan Divarci |
0:65766360f6b9 | 309 | * @param[in] rssio 0x0: Disable, 0x1: Enable. |
| Sinan Divarci |
0:65766360f6b9 | 310 | * |
| Sinan Divarci |
0:65766360f6b9 | 311 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 312 | */ |
| Sinan Divarci |
0:65766360f6b9 | 313 | int set_rssio(uint8_t rssio); |
| Sinan Divarci |
0:65766360f6b9 | 314 | |
| Sinan Divarci |
0:65766360f6b9 | 315 | /** |
| Sinan Divarci |
0:65766360f6b9 | 316 | * @brief Gets RSSI Amplifier Power-Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 317 | * |
| Sinan Divarci |
0:65766360f6b9 | 318 | * @returns RSSI Amplifier Power-Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 319 | */ |
| Sinan Divarci |
0:65766360f6b9 | 320 | int get_rssio(); |
| Sinan Divarci |
0:65766360f6b9 | 321 | |
| Sinan Divarci |
0:65766360f6b9 | 322 | /** |
| Sinan Divarci |
0:65766360f6b9 | 323 | * @brief Sets AGC Locking Feature Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 324 | * |
| Sinan Divarci |
0:65766360f6b9 | 325 | * @param[in] agclk 0x0: Disable, 0x1: Enable. |
| Sinan Divarci |
0:65766360f6b9 | 326 | * |
| Sinan Divarci |
0:65766360f6b9 | 327 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 328 | */ |
| Sinan Divarci |
0:65766360f6b9 | 329 | int set_agclk(uint8_t agclk); |
| Sinan Divarci |
0:65766360f6b9 | 330 | |
| Sinan Divarci |
0:65766360f6b9 | 331 | /** |
| Sinan Divarci |
0:65766360f6b9 | 332 | * @brief Gets AGC Locking Feature Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 333 | * |
| Sinan Divarci |
0:65766360f6b9 | 334 | * @returns AGC Locking Feature Control Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 335 | */ |
| Sinan Divarci |
0:65766360f6b9 | 336 | int get_agclk(); |
| Sinan Divarci |
0:65766360f6b9 | 337 | |
| Sinan Divarci |
0:65766360f6b9 | 338 | /** |
| Sinan Divarci |
0:65766360f6b9 | 339 | * @brief Sets Gain State Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 340 | * |
| Sinan Divarci |
0:65766360f6b9 | 341 | * @param[in] gain 0x0: Force manual low-gain state if MGAIN = 1, |
| Sinan Divarci |
0:65766360f6b9 | 342 | * 0x1: Force manual high-gain state if MGAIN = 1. |
| Sinan Divarci |
0:65766360f6b9 | 343 | * |
| Sinan Divarci |
0:65766360f6b9 | 344 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 345 | */ |
| Sinan Divarci |
0:65766360f6b9 | 346 | int set_gain(uint8_t gain); |
| Sinan Divarci |
0:65766360f6b9 | 347 | |
| Sinan Divarci |
0:65766360f6b9 | 348 | /** |
| Sinan Divarci |
0:65766360f6b9 | 349 | * @brief Gets Gain State Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 350 | * |
| Sinan Divarci |
0:65766360f6b9 | 351 | * @returns Gain State Control Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 352 | */ |
| Sinan Divarci |
0:65766360f6b9 | 353 | int get_gain(); |
| Sinan Divarci |
0:65766360f6b9 | 354 | |
| Sinan Divarci |
0:65766360f6b9 | 355 | /** |
| Sinan Divarci |
0:65766360f6b9 | 356 | * @brief Sets Manual Peak-Detector Tracking Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 357 | * |
| Sinan Divarci |
0:65766360f6b9 | 358 | * @param[in] trk_en 0x0: Release peak-detector tracking, |
| Sinan Divarci |
0:65766360f6b9 | 359 | * 0x1: Force manual peak-detector tracking. |
| Sinan Divarci |
0:65766360f6b9 | 360 | * |
| Sinan Divarci |
0:65766360f6b9 | 361 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 362 | */ |
| Sinan Divarci |
0:65766360f6b9 | 363 | int set_trk_en(uint8_t trk_en); |
| Sinan Divarci |
0:65766360f6b9 | 364 | |
| Sinan Divarci |
0:65766360f6b9 | 365 | /** |
| Sinan Divarci |
0:65766360f6b9 | 366 | * @brief Gets Manual Peak-Detector Tracking Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 367 | * |
| Sinan Divarci |
0:65766360f6b9 | 368 | * @returns Manual Peak-Detector Tracking Control Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 369 | */ |
| Sinan Divarci |
0:65766360f6b9 | 370 | int get_trk_en(); |
| Sinan Divarci |
0:65766360f6b9 | 371 | |
| Sinan Divarci |
0:65766360f6b9 | 372 | /** |
| Sinan Divarci |
0:65766360f6b9 | 373 | * @brief Sets Polling Timer Calibration Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 374 | * |
| Sinan Divarci |
0:65766360f6b9 | 375 | * @description Sets PCAL Bit to 1 to Perform polling timer calibration. |
| Sinan Divarci |
0:65766360f6b9 | 376 | * Automatically reset to zero once calibration is completed |
| Sinan Divarci |
0:65766360f6b9 | 377 | * |
| Sinan Divarci |
0:65766360f6b9 | 378 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 379 | */ |
| Sinan Divarci |
0:65766360f6b9 | 380 | int set_pcal(); |
| Sinan Divarci |
0:65766360f6b9 | 381 | |
| Sinan Divarci |
0:65766360f6b9 | 382 | /** |
| Sinan Divarci |
0:65766360f6b9 | 383 | * @brief Gets Polling Timer Calibration Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 384 | * |
| Sinan Divarci |
0:65766360f6b9 | 385 | * @returns Polling Timer Calibration Control Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 386 | */ |
| Sinan Divarci |
0:65766360f6b9 | 387 | int get_pcal(); |
| Sinan Divarci |
0:65766360f6b9 | 388 | |
| Sinan Divarci |
0:65766360f6b9 | 389 | /** |
| Sinan Divarci |
0:65766360f6b9 | 390 | * @brief Sets FSK calibration Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 391 | * |
| Sinan Divarci |
0:65766360f6b9 | 392 | * @description Sets FCAL Bit to 1 to Perform FSK calibration. |
| Sinan Divarci |
0:65766360f6b9 | 393 | * Automatically reset to zero once calibration is completed |
| Sinan Divarci |
0:65766360f6b9 | 394 | * |
| Sinan Divarci |
0:65766360f6b9 | 395 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 396 | */ |
| Sinan Divarci |
0:65766360f6b9 | 397 | int set_fcal(); |
| Sinan Divarci |
0:65766360f6b9 | 398 | |
| Sinan Divarci |
0:65766360f6b9 | 399 | /** |
| Sinan Divarci |
0:65766360f6b9 | 400 | * @brief Gets FSK calibration Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 401 | * |
| Sinan Divarci |
0:65766360f6b9 | 402 | * @returns FSK calibration Control Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 403 | */ |
| Sinan Divarci |
0:65766360f6b9 | 404 | int get_fcal(); |
| Sinan Divarci |
0:65766360f6b9 | 405 | |
| Sinan Divarci |
0:65766360f6b9 | 406 | /** |
| Sinan Divarci |
0:65766360f6b9 | 407 | * @brief Sets Crystal Clock Output Enable Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 408 | * |
| Sinan Divarci |
0:65766360f6b9 | 409 | * @param[in] sleep 0x0: Disable crystal clock output, |
| Sinan Divarci |
0:65766360f6b9 | 410 | * 0x1: Enable crystal clock output. |
| Sinan Divarci |
0:65766360f6b9 | 411 | * |
| Sinan Divarci |
0:65766360f6b9 | 412 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 413 | */ |
| Sinan Divarci |
0:65766360f6b9 | 414 | int set_ckout(uint8_t ckout); |
| Sinan Divarci |
0:65766360f6b9 | 415 | |
| Sinan Divarci |
0:65766360f6b9 | 416 | /** |
| Sinan Divarci |
0:65766360f6b9 | 417 | * @brief Gets Crystal Clock Output Enable Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 418 | * |
| Sinan Divarci |
0:65766360f6b9 | 419 | * @returns Sleep Mode Control Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 420 | */ |
| Sinan Divarci |
0:65766360f6b9 | 421 | int get_ckout(); |
| Sinan Divarci |
0:65766360f6b9 | 422 | |
| Sinan Divarci |
0:65766360f6b9 | 423 | /** |
| Sinan Divarci |
0:65766360f6b9 | 424 | * @brief Sets Sleep Mode Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 425 | * |
| Sinan Divarci |
0:65766360f6b9 | 426 | * @param[in] sleep 0x0: Normal operation, |
| Sinan Divarci |
0:65766360f6b9 | 427 | * 0x1: Deep-sleep mode, regardless the state of ENABLE pin. |
| Sinan Divarci |
0:65766360f6b9 | 428 | * |
| Sinan Divarci |
0:65766360f6b9 | 429 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 430 | */ |
| Sinan Divarci |
0:65766360f6b9 | 431 | int set_sleep(uint8_t sleep); |
| Sinan Divarci |
0:65766360f6b9 | 432 | |
| Sinan Divarci |
0:65766360f6b9 | 433 | /** |
| Sinan Divarci |
0:65766360f6b9 | 434 | * @brief Gets Sleep Mode Control Bit. |
| Sinan Divarci |
0:65766360f6b9 | 435 | * |
| Sinan Divarci |
0:65766360f6b9 | 436 | * @returns Sleep Mode Control Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 437 | */ |
| Sinan Divarci |
0:65766360f6b9 | 438 | int get_sleep(); |
| Sinan Divarci |
0:65766360f6b9 | 439 | |
| Sinan Divarci |
0:65766360f6b9 | 440 | /** |
| Sinan Divarci |
0:65766360f6b9 | 441 | * @brief Sets FSK or ASK modulation Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 442 | * |
| Sinan Divarci |
0:65766360f6b9 | 443 | * @param[in] ask_fsk_sel 0x0: Enable ASK for both receive and transmit, |
| Sinan Divarci |
0:65766360f6b9 | 444 | * 0x1: Enable FSK for both receive and transmit. |
| Sinan Divarci |
0:65766360f6b9 | 445 | * |
| Sinan Divarci |
0:65766360f6b9 | 446 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 447 | */ |
| Sinan Divarci |
0:65766360f6b9 | 448 | int set_mode(ask_fsk_sel_t ask_fsk_sel); |
| Sinan Divarci |
0:65766360f6b9 | 449 | |
| Sinan Divarci |
0:65766360f6b9 | 450 | /** |
| Sinan Divarci |
0:65766360f6b9 | 451 | * @brief Gets FSK or ASK modulation Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 452 | * |
| Sinan Divarci |
0:65766360f6b9 | 453 | * @param[in] ask_fsk_sel |
| Sinan Divarci |
0:65766360f6b9 | 454 | * |
| Sinan Divarci |
0:65766360f6b9 | 455 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 456 | */ |
| Sinan Divarci |
0:65766360f6b9 | 457 | int get_mode(ask_fsk_sel_t* ask_fsk_sel); |
| Sinan Divarci |
0:65766360f6b9 | 458 | |
| Sinan Divarci |
0:65766360f6b9 | 459 | /** |
| Sinan Divarci |
0:65766360f6b9 | 460 | * @brief Gets FSK or ASK modulation Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 461 | * |
| Sinan Divarci |
0:65766360f6b9 | 462 | * @returns FSK or ASK modulation Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 463 | */ |
| Sinan Divarci |
0:65766360f6b9 | 464 | int get_mode(); |
| Sinan Divarci |
0:65766360f6b9 | 465 | |
| Sinan Divarci |
0:65766360f6b9 | 466 | /** |
| Sinan Divarci |
0:65766360f6b9 | 467 | * @brief Sets Transmit or Receive Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 468 | * |
| Sinan Divarci |
0:65766360f6b9 | 469 | * @param[in] t_r 0x0: Enable receive mode of the transceiver when pin T/R = 0, |
| Sinan Divarci |
0:65766360f6b9 | 470 | * 0x1: Enable transmit mode of the transceiver, regardless the state of pin T/R. |
| Sinan Divarci |
0:65766360f6b9 | 471 | * |
| Sinan Divarci |
0:65766360f6b9 | 472 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 473 | */ |
| Sinan Divarci |
0:65766360f6b9 | 474 | int set_t_r(uint8_t t_r); |
| Sinan Divarci |
0:65766360f6b9 | 475 | |
| Sinan Divarci |
0:65766360f6b9 | 476 | /** |
| Sinan Divarci |
0:65766360f6b9 | 477 | * @brief Gets Transmit or Receive Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 478 | * |
| Sinan Divarci |
0:65766360f6b9 | 479 | * @returns Transmit or Receive Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 480 | */ |
| Sinan Divarci |
0:65766360f6b9 | 481 | int get_t_r(); |
| Sinan Divarci |
0:65766360f6b9 | 482 | |
| Sinan Divarci |
0:65766360f6b9 | 483 | /** |
| Sinan Divarci |
0:65766360f6b9 | 484 | * @brief Sets Manual Gain Mode Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 485 | * |
| Sinan Divarci |
0:65766360f6b9 | 486 | * @param[in] mgain 0x0: Disable manual-gain mode, |
| Sinan Divarci |
0:65766360f6b9 | 487 | * 0x1: Enable manual-gain mode. |
| Sinan Divarci |
0:65766360f6b9 | 488 | * |
| Sinan Divarci |
0:65766360f6b9 | 489 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 490 | */ |
| Sinan Divarci |
0:65766360f6b9 | 491 | int set_mgain(uint8_t mgain); |
| Sinan Divarci |
0:65766360f6b9 | 492 | |
| Sinan Divarci |
0:65766360f6b9 | 493 | /** |
| Sinan Divarci |
0:65766360f6b9 | 494 | * @brief Gets Manual Gain Mode Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 495 | * |
| Sinan Divarci |
0:65766360f6b9 | 496 | * @returns Manual Gain Mode Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 497 | */ |
| Sinan Divarci |
0:65766360f6b9 | 498 | int get_mgain(); |
| Sinan Divarci |
0:65766360f6b9 | 499 | |
| Sinan Divarci |
0:65766360f6b9 | 500 | /** |
| Sinan Divarci |
0:65766360f6b9 | 501 | * @brief Sets Discontinuous Receive Mode Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 502 | * |
| Sinan Divarci |
0:65766360f6b9 | 503 | * @param[in] drx 0x0: Disable DRX, |
| Sinan Divarci |
0:65766360f6b9 | 504 | * 0x1: Enable DRX. |
| Sinan Divarci |
0:65766360f6b9 | 505 | * |
| Sinan Divarci |
0:65766360f6b9 | 506 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 507 | */ |
| Sinan Divarci |
0:65766360f6b9 | 508 | int set_drx(uint8_t drx); |
| Sinan Divarci |
0:65766360f6b9 | 509 | |
| Sinan Divarci |
0:65766360f6b9 | 510 | /** |
| Sinan Divarci |
0:65766360f6b9 | 511 | * @brief Gets Discontinuous Receive Mode Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 512 | * |
| Sinan Divarci |
0:65766360f6b9 | 513 | * @returns Discontinuous Receive Mode Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 514 | */ |
| Sinan Divarci |
0:65766360f6b9 | 515 | int get_drx(); |
| Sinan Divarci |
0:65766360f6b9 | 516 | |
| Sinan Divarci |
0:65766360f6b9 | 517 | /** |
| Sinan Divarci |
0:65766360f6b9 | 518 | * @brief Sets Off-timer Prescaler Configuration Bits. |
| Sinan Divarci |
0:65766360f6b9 | 519 | * |
| Sinan Divarci |
0:65766360f6b9 | 520 | * @param[in] ofps Off-timer Prescaler Configuration Value. |
| Sinan Divarci |
0:65766360f6b9 | 521 | * |
| Sinan Divarci |
0:65766360f6b9 | 522 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 523 | */ |
| Sinan Divarci |
0:65766360f6b9 | 524 | int set_ofps(uint8_t ofps); |
| Sinan Divarci |
0:65766360f6b9 | 525 | |
| Sinan Divarci |
0:65766360f6b9 | 526 | /** |
| Sinan Divarci |
0:65766360f6b9 | 527 | * @brief Gets Off-timer Prescaler Configuration Bits. |
| Sinan Divarci |
0:65766360f6b9 | 528 | * |
| Sinan Divarci |
0:65766360f6b9 | 529 | * @returns Off-timer Prescaler Configuration Bit's value, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 530 | */ |
| Sinan Divarci |
0:65766360f6b9 | 531 | int get_ofps(); |
| Sinan Divarci |
0:65766360f6b9 | 532 | |
| Sinan Divarci |
0:65766360f6b9 | 533 | /** |
| Sinan Divarci |
0:65766360f6b9 | 534 | * @brief Sets On-timer Prescaler Configuration Bits. |
| Sinan Divarci |
0:65766360f6b9 | 535 | * |
| Sinan Divarci |
0:65766360f6b9 | 536 | * @param[in] onps On-timer Prescaler Configuration Value. |
| Sinan Divarci |
0:65766360f6b9 | 537 | * |
| Sinan Divarci |
0:65766360f6b9 | 538 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 539 | */ |
| Sinan Divarci |
0:65766360f6b9 | 540 | int set_onps(uint8_t onps); |
| Sinan Divarci |
0:65766360f6b9 | 541 | |
| Sinan Divarci |
0:65766360f6b9 | 542 | /** |
| Sinan Divarci |
0:65766360f6b9 | 543 | * @brief Gets On-timer Prescaler Configuration Bits. |
| Sinan Divarci |
0:65766360f6b9 | 544 | * |
| Sinan Divarci |
0:65766360f6b9 | 545 | * @returns On-timer Prescaler Configuration Bit's value, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 546 | */ |
| Sinan Divarci |
0:65766360f6b9 | 547 | int get_onps(); |
| Sinan Divarci |
0:65766360f6b9 | 548 | |
| Sinan Divarci |
0:65766360f6b9 | 549 | /** |
| Sinan Divarci |
0:65766360f6b9 | 550 | * @brief Sets Automatic FSK Calibration Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 551 | * |
| Sinan Divarci |
0:65766360f6b9 | 552 | * @param[in] acal 0x0: Disable automatic FSK calibration, |
| Sinan Divarci |
0:65766360f6b9 | 553 | * 0x1: Enable automatic FSK calibration when coming out of the sleep state in DRX mode. |
| Sinan Divarci |
0:65766360f6b9 | 554 | * |
| Sinan Divarci |
0:65766360f6b9 | 555 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 556 | */ |
| Sinan Divarci |
0:65766360f6b9 | 557 | int set_acal(uint8_t acal); |
| Sinan Divarci |
0:65766360f6b9 | 558 | |
| Sinan Divarci |
0:65766360f6b9 | 559 | /** |
| Sinan Divarci |
0:65766360f6b9 | 560 | * @brief Gets Automatic FSK Calibration Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 561 | * |
| Sinan Divarci |
0:65766360f6b9 | 562 | * @returns Automatic FSK Calibration Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 563 | */ |
| Sinan Divarci |
0:65766360f6b9 | 564 | int get_acal(); |
| Sinan Divarci |
0:65766360f6b9 | 565 | |
| Sinan Divarci |
0:65766360f6b9 | 566 | /** |
| Sinan Divarci |
0:65766360f6b9 | 567 | * @brief Sets Continuous Clock Output (even during tOFF or when ENABLE pin is low) Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 568 | * |
| Sinan Divarci |
0:65766360f6b9 | 569 | * @param[in] clkof 0x0: Continuous clock output; if CKOUT = 1, clock output is active during tON (DRX mode) or |
| Sinan Divarci |
0:65766360f6b9 | 570 | * when ENABLE pin is high (continuous receive mode), |
| Sinan Divarci |
0:65766360f6b9 | 571 | * 0x1: Enable continuous clock output when CKOUT = 1. |
| Sinan Divarci |
0:65766360f6b9 | 572 | * |
| Sinan Divarci |
0:65766360f6b9 | 573 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 574 | */ |
| Sinan Divarci |
0:65766360f6b9 | 575 | int set_clkof(uint8_t clkof); |
| Sinan Divarci |
0:65766360f6b9 | 576 | |
| Sinan Divarci |
0:65766360f6b9 | 577 | /** |
| Sinan Divarci |
0:65766360f6b9 | 578 | * @brief Gets Continuous Clock Output Configuration Bit. |
| Sinan Divarci |
0:65766360f6b9 | 579 | * |
| Sinan Divarci |
0:65766360f6b9 | 580 | * @returns Continuous Clock Output Configuration Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 581 | */ |
| Sinan Divarci |
0:65766360f6b9 | 582 | int get_clkof(); |
| Sinan Divarci |
0:65766360f6b9 | 583 | |
| Sinan Divarci |
0:65766360f6b9 | 584 | /** |
| Sinan Divarci |
0:65766360f6b9 | 585 | * @brief Sets Crystal Divider Configuration Bits. |
| Sinan Divarci |
0:65766360f6b9 | 586 | * |
| Sinan Divarci |
0:65766360f6b9 | 587 | * @param[in] cdiv Crystal Divider Configuration Value. |
| Sinan Divarci |
0:65766360f6b9 | 588 | * |
| Sinan Divarci |
0:65766360f6b9 | 589 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 590 | */ |
| Sinan Divarci |
0:65766360f6b9 | 591 | int set_cdiv(uint8_t cdiv); |
| Sinan Divarci |
0:65766360f6b9 | 592 | |
| Sinan Divarci |
0:65766360f6b9 | 593 | /** |
| Sinan Divarci |
0:65766360f6b9 | 594 | * @brief Gets Crystal Divider Configuration Bits Value. |
| Sinan Divarci |
0:65766360f6b9 | 595 | * |
| Sinan Divarci |
0:65766360f6b9 | 596 | * @returns Crystal Divider Configuration Bit's value, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 597 | */ |
| Sinan Divarci |
0:65766360f6b9 | 598 | int get_cdiv(); |
| Sinan Divarci |
0:65766360f6b9 | 599 | |
| Sinan Divarci |
0:65766360f6b9 | 600 | /** |
| Sinan Divarci |
0:65766360f6b9 | 601 | * @brief Sets AGC Dwell Timer Configuration Bits. |
| Sinan Divarci |
0:65766360f6b9 | 602 | * |
| Sinan Divarci |
0:65766360f6b9 | 603 | * @param[in] dt AGC Dwell Timer Configuration Value. |
| Sinan Divarci |
0:65766360f6b9 | 604 | * |
| Sinan Divarci |
0:65766360f6b9 | 605 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 606 | */ |
| Sinan Divarci |
0:65766360f6b9 | 607 | int set_dt(uint8_t dt); |
| Sinan Divarci |
0:65766360f6b9 | 608 | |
| Sinan Divarci |
0:65766360f6b9 | 609 | /** |
| Sinan Divarci |
0:65766360f6b9 | 610 | * @brief Gets AGC Dwell Timer Configuration Bits Value. |
| Sinan Divarci |
0:65766360f6b9 | 611 | * |
| Sinan Divarci |
0:65766360f6b9 | 612 | * @returns AGC Dwell Timer Configuration Bit's value, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 613 | */ |
| Sinan Divarci |
0:65766360f6b9 | 614 | int get_dt(); |
| Sinan Divarci |
0:65766360f6b9 | 615 | |
| Sinan Divarci |
0:65766360f6b9 | 616 | /** |
| Sinan Divarci |
0:65766360f6b9 | 617 | * @brief Sets the OSC Register. |
| Sinan Divarci |
0:65766360f6b9 | 618 | * |
| Sinan Divarci |
0:65766360f6b9 | 619 | * @param[in] osc OSC Register Value. |
| Sinan Divarci |
0:65766360f6b9 | 620 | * |
| Sinan Divarci |
0:65766360f6b9 | 621 | * @description This register must be set to the integer result of fXTAL/100kHz. |
| Sinan Divarci |
0:65766360f6b9 | 622 | * |
| Sinan Divarci |
0:65766360f6b9 | 623 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 624 | */ |
| Sinan Divarci |
0:65766360f6b9 | 625 | int set_osc(uint8_t osc); |
| Sinan Divarci |
0:65766360f6b9 | 626 | |
| Sinan Divarci |
0:65766360f6b9 | 627 | /** |
| Sinan Divarci |
0:65766360f6b9 | 628 | * @brief Gets the OSC Register Value. |
| Sinan Divarci |
0:65766360f6b9 | 629 | * |
| Sinan Divarci |
0:65766360f6b9 | 630 | * @returns OSC Register Value, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 631 | */ |
| Sinan Divarci |
0:65766360f6b9 | 632 | int get_osc(); |
| Sinan Divarci |
0:65766360f6b9 | 633 | |
| Sinan Divarci |
0:65766360f6b9 | 634 | /** |
| Sinan Divarci |
0:65766360f6b9 | 635 | * @brief Sets the tOFF Registers. |
| Sinan Divarci |
0:65766360f6b9 | 636 | * |
| Sinan Divarci |
0:65766360f6b9 | 637 | * @param[in] toff OSC Registers Value. |
| Sinan Divarci |
0:65766360f6b9 | 638 | * |
| Sinan Divarci |
0:65766360f6b9 | 639 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 640 | */ |
| Sinan Divarci |
0:65766360f6b9 | 641 | int set_toff(uint16_t toff); |
| Sinan Divarci |
0:65766360f6b9 | 642 | |
| Sinan Divarci |
0:65766360f6b9 | 643 | /** |
| Sinan Divarci |
0:65766360f6b9 | 644 | * @brief Gets the tOFF Registers Value. |
| Sinan Divarci |
0:65766360f6b9 | 645 | * |
| Sinan Divarci |
0:65766360f6b9 | 646 | * @returns tOFF Registers Value, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 647 | */ |
| Sinan Divarci |
0:65766360f6b9 | 648 | uint16_t get_toff(); |
| Sinan Divarci |
0:65766360f6b9 | 649 | |
| Sinan Divarci |
0:65766360f6b9 | 650 | /** |
| Sinan Divarci |
0:65766360f6b9 | 651 | * @brief Sets the tCPU Register. |
| Sinan Divarci |
0:65766360f6b9 | 652 | * |
| Sinan Divarci |
0:65766360f6b9 | 653 | * @param[in] tcpu tCPU Register Value. |
| Sinan Divarci |
0:65766360f6b9 | 654 | * |
| Sinan Divarci |
0:65766360f6b9 | 655 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 656 | */ |
| Sinan Divarci |
0:65766360f6b9 | 657 | int set_tcpu(uint8_t tcpu); |
| Sinan Divarci |
0:65766360f6b9 | 658 | |
| Sinan Divarci |
0:65766360f6b9 | 659 | /** |
| Sinan Divarci |
0:65766360f6b9 | 660 | * @brief Gets the tCPU Register Value. |
| Sinan Divarci |
0:65766360f6b9 | 661 | * |
| Sinan Divarci |
0:65766360f6b9 | 662 | * @returns tCPU Register Value, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 663 | */ |
| Sinan Divarci |
0:65766360f6b9 | 664 | uint8_t get_tcpu(); |
| Sinan Divarci |
0:65766360f6b9 | 665 | |
| Sinan Divarci |
0:65766360f6b9 | 666 | /** |
| Sinan Divarci |
0:65766360f6b9 | 667 | * @brief Sets the tRF Registers. |
| Sinan Divarci |
0:65766360f6b9 | 668 | * |
| Sinan Divarci |
0:65766360f6b9 | 669 | * @param[in] trf tRF Registers Value. |
| Sinan Divarci |
0:65766360f6b9 | 670 | * |
| Sinan Divarci |
0:65766360f6b9 | 671 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 672 | */ |
| Sinan Divarci |
0:65766360f6b9 | 673 | int set_trf(uint16_t trf); |
| Sinan Divarci |
0:65766360f6b9 | 674 | |
| Sinan Divarci |
0:65766360f6b9 | 675 | /** |
| Sinan Divarci |
0:65766360f6b9 | 676 | * @brief Gets the tRF Registers Value. |
| Sinan Divarci |
0:65766360f6b9 | 677 | * |
| Sinan Divarci |
0:65766360f6b9 | 678 | * @returns tRF Registers Value, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 679 | */ |
| Sinan Divarci |
0:65766360f6b9 | 680 | uint16_t get_trf(); |
| Sinan Divarci |
0:65766360f6b9 | 681 | |
| Sinan Divarci |
0:65766360f6b9 | 682 | /** |
| Sinan Divarci |
0:65766360f6b9 | 683 | * @brief Sets the tON Registers. |
| Sinan Divarci |
0:65766360f6b9 | 684 | * |
| Sinan Divarci |
0:65766360f6b9 | 685 | * @param[in] ton tON Registers Value. |
| Sinan Divarci |
0:65766360f6b9 | 686 | * |
| Sinan Divarci |
0:65766360f6b9 | 687 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 688 | */ |
| Sinan Divarci |
0:65766360f6b9 | 689 | int set_ton(uint16_t ton); |
| Sinan Divarci |
0:65766360f6b9 | 690 | |
| Sinan Divarci |
0:65766360f6b9 | 691 | /** |
| Sinan Divarci |
0:65766360f6b9 | 692 | * @brief Gets the tON Registers Value. |
| Sinan Divarci |
0:65766360f6b9 | 693 | * |
| Sinan Divarci |
0:65766360f6b9 | 694 | * @returns tON Registers Value, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 695 | */ |
| Sinan Divarci |
0:65766360f6b9 | 696 | uint16_t get_ton(); |
| Sinan Divarci |
0:65766360f6b9 | 697 | |
| Sinan Divarci |
0:65766360f6b9 | 698 | /** |
| Sinan Divarci |
0:65766360f6b9 | 699 | * @brief Sets the TxLOW Registers. |
| Sinan Divarci |
0:65766360f6b9 | 700 | * |
| Sinan Divarci |
0:65766360f6b9 | 701 | * @param[in] txlow_val TxLOW Registers Value. |
| Sinan Divarci |
0:65766360f6b9 | 702 | * |
| Sinan Divarci |
0:65766360f6b9 | 703 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 704 | */ |
| Sinan Divarci |
0:65766360f6b9 | 705 | int set_txlow(int txlow_val); |
| Sinan Divarci |
0:65766360f6b9 | 706 | |
| Sinan Divarci |
0:65766360f6b9 | 707 | /** |
| Sinan Divarci |
0:65766360f6b9 | 708 | * @brief Gets the TxLOW Registers Value. |
| Sinan Divarci |
0:65766360f6b9 | 709 | * |
| Sinan Divarci |
0:65766360f6b9 | 710 | * @returns the TxLOW Registers Value, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 711 | */ |
| Sinan Divarci |
0:65766360f6b9 | 712 | int get_txlow(); |
| Sinan Divarci |
0:65766360f6b9 | 713 | |
| Sinan Divarci |
0:65766360f6b9 | 714 | /** |
| Sinan Divarci |
0:65766360f6b9 | 715 | * @brief Sets the TxHIGH Registers. |
| Sinan Divarci |
0:65766360f6b9 | 716 | * |
| Sinan Divarci |
0:65766360f6b9 | 717 | * @param[in] txhigh_val TxHIGH Registers Value. |
| Sinan Divarci |
0:65766360f6b9 | 718 | * |
| Sinan Divarci |
0:65766360f6b9 | 719 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 720 | */ |
| Sinan Divarci |
0:65766360f6b9 | 721 | int set_txhigh(int txhigh_val); |
| Sinan Divarci |
0:65766360f6b9 | 722 | |
| Sinan Divarci |
0:65766360f6b9 | 723 | /** |
| Sinan Divarci |
0:65766360f6b9 | 724 | * @brief Gets the TxHIGH Registers Value. |
| Sinan Divarci |
0:65766360f6b9 | 725 | * |
| Sinan Divarci |
0:65766360f6b9 | 726 | * @returns the TxHIGH Registers Value, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 727 | */ |
| Sinan Divarci |
0:65766360f6b9 | 728 | int get_txhigh(); |
| Sinan Divarci |
0:65766360f6b9 | 729 | |
| Sinan Divarci |
0:65766360f6b9 | 730 | /** |
| Sinan Divarci |
0:65766360f6b9 | 731 | * @brief Gets Lock Detect Status Bit. |
| Sinan Divarci |
0:65766360f6b9 | 732 | * |
| Sinan Divarci |
0:65766360f6b9 | 733 | * @returns Lock Detect Status Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 734 | */ |
| Sinan Divarci |
0:65766360f6b9 | 735 | int get_lckd(); |
| Sinan Divarci |
0:65766360f6b9 | 736 | |
| Sinan Divarci |
0:65766360f6b9 | 737 | /** |
| Sinan Divarci |
0:65766360f6b9 | 738 | * @brief Gets AGC Gain State Status Bit. |
| Sinan Divarci |
0:65766360f6b9 | 739 | * |
| Sinan Divarci |
0:65766360f6b9 | 740 | * @returns AGC Gain State Status Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 741 | */ |
| Sinan Divarci |
0:65766360f6b9 | 742 | int get_gains(); |
| Sinan Divarci |
0:65766360f6b9 | 743 | |
| Sinan Divarci |
0:65766360f6b9 | 744 | /** |
| Sinan Divarci |
0:65766360f6b9 | 745 | * @brief Gets Clock/Crystal Alive Status Bit. |
| Sinan Divarci |
0:65766360f6b9 | 746 | * |
| Sinan Divarci |
0:65766360f6b9 | 747 | * @returns Clock/Crystal Alive Status Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 748 | */ |
| Sinan Divarci |
0:65766360f6b9 | 749 | int get_clkon(); |
| Sinan Divarci |
0:65766360f6b9 | 750 | |
| Sinan Divarci |
0:65766360f6b9 | 751 | /** |
| Sinan Divarci |
0:65766360f6b9 | 752 | * @brief Gets Polling Timer Calibration Done Status Bit. |
| Sinan Divarci |
0:65766360f6b9 | 753 | * |
| Sinan Divarci |
0:65766360f6b9 | 754 | * @returns Polling Timer Calibration Done Status Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 755 | */ |
| Sinan Divarci |
0:65766360f6b9 | 756 | int get_pcald(); |
| Sinan Divarci |
0:65766360f6b9 | 757 | |
| Sinan Divarci |
0:65766360f6b9 | 758 | /** |
| Sinan Divarci |
0:65766360f6b9 | 759 | * @brief Gets FSK Calibration Done Status Bit. |
| Sinan Divarci |
0:65766360f6b9 | 760 | * |
| Sinan Divarci |
0:65766360f6b9 | 761 | * @returns FSK Calibration Done Status Bit's State, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 762 | */ |
| Sinan Divarci |
0:65766360f6b9 | 763 | int get_fcald(); |
| Sinan Divarci |
0:65766360f6b9 | 764 | |
| Sinan Divarci |
0:65766360f6b9 | 765 | /* END OF REGISTER SET & GET FUNCTION DECLARATIONS */ |
| Sinan Divarci |
0:65766360f6b9 | 766 | |
| Sinan Divarci |
0:65766360f6b9 | 767 | /* DEVICE CONFIGURATION FUNCTION DECLARATIONS */ |
| Sinan Divarci |
0:65766360f6b9 | 768 | typedef enum { |
| Sinan Divarci |
0:65766360f6b9 | 769 | DISABLE, /**< 0x0: Disable */ |
| Sinan Divarci |
0:65766360f6b9 | 770 | F_XTAL, /**< 0x1: fXTAL */ |
| Sinan Divarci |
0:65766360f6b9 | 771 | F_XTAL_X0_5, /**< 0x2: fXTAL/2 */ |
| Sinan Divarci |
0:65766360f6b9 | 772 | F_XTAL_X0_25, /**< 0x3: fXTAL/4 */ |
| Sinan Divarci |
0:65766360f6b9 | 773 | F_XTAL_X0_125 /**< 0x4: fXTAL/8 */ |
| Sinan Divarci |
0:65766360f6b9 | 774 | } cdiv_t; |
| Sinan Divarci |
0:65766360f6b9 | 775 | |
| Sinan Divarci |
0:65766360f6b9 | 776 | /** |
| Sinan Divarci |
0:65766360f6b9 | 777 | * @brief Configures Crystal Clock Output. |
| Sinan Divarci |
0:65766360f6b9 | 778 | * |
| Sinan Divarci |
0:65766360f6b9 | 779 | * @param[in] cdiv Clock Output Configuration. |
| Sinan Divarci |
0:65766360f6b9 | 780 | * |
| Sinan Divarci |
0:65766360f6b9 | 781 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 782 | */ |
| Sinan Divarci |
0:65766360f6b9 | 783 | int adjust_clockout(cdiv_t cdiv); |
| Sinan Divarci |
0:65766360f6b9 | 784 | |
| Sinan Divarci |
0:65766360f6b9 | 785 | /** |
| Sinan Divarci |
0:65766360f6b9 | 786 | * @brief Gets Clock Output Configuration. |
| Sinan Divarci |
0:65766360f6b9 | 787 | * |
| Sinan Divarci |
0:65766360f6b9 | 788 | * @param[in] cdiv Clock Output Configuration. |
| Sinan Divarci |
0:65766360f6b9 | 789 | * |
| Sinan Divarci |
0:65766360f6b9 | 790 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 791 | */ |
| Sinan Divarci |
0:65766360f6b9 | 792 | int get_clockout_conf(cdiv_t *cdiv); |
| Sinan Divarci |
0:65766360f6b9 | 793 | |
| Sinan Divarci |
0:65766360f6b9 | 794 | /** |
| Sinan Divarci |
0:65766360f6b9 | 795 | * @brief Configures Internal Clock Frequency Divisor. |
| Sinan Divarci |
0:65766360f6b9 | 796 | * |
| Sinan Divarci |
0:65766360f6b9 | 797 | * @param[in] osc_freq Oscillator Frequency. |
| Sinan Divarci |
0:65766360f6b9 | 798 | * |
| Sinan Divarci |
0:65766360f6b9 | 799 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 800 | */ |
| Sinan Divarci |
0:65766360f6b9 | 801 | int adjust_osc_freq(float osc_freq); |
| Sinan Divarci |
0:65766360f6b9 | 802 | |
| Sinan Divarci |
0:65766360f6b9 | 803 | /** |
| Sinan Divarci |
0:65766360f6b9 | 804 | * @brief Gets Oscillator Frequency. |
| Sinan Divarci |
0:65766360f6b9 | 805 | * |
| Sinan Divarci |
0:65766360f6b9 | 806 | * @returns Oscillator Frequency. |
| Sinan Divarci |
0:65766360f6b9 | 807 | */ |
| Sinan Divarci |
0:65766360f6b9 | 808 | float get_osc_freq(); |
| Sinan Divarci |
0:65766360f6b9 | 809 | |
| Sinan Divarci |
0:65766360f6b9 | 810 | typedef enum { |
| Sinan Divarci |
0:65766360f6b9 | 811 | US_120, /**< 0x0: 120 us */ |
| Sinan Divarci |
0:65766360f6b9 | 812 | US_480, /**< 0x1: 480 us */ |
| Sinan Divarci |
0:65766360f6b9 | 813 | US_1920, /**< 0x2: 1920 us */ |
| Sinan Divarci |
0:65766360f6b9 | 814 | US_7680 /**< 0x3: 7680 us */ |
| Sinan Divarci |
0:65766360f6b9 | 815 | } timer_base_t; |
| Sinan Divarci |
0:65766360f6b9 | 816 | |
| Sinan Divarci |
0:65766360f6b9 | 817 | /** |
| Sinan Divarci |
0:65766360f6b9 | 818 | * @brief Configures the off timer. |
| Sinan Divarci |
0:65766360f6b9 | 819 | * |
| Sinan Divarci |
0:65766360f6b9 | 820 | * @param[in] time_base Timer Base Configuration. |
| Sinan Divarci |
0:65766360f6b9 | 821 | * @param[in] timer_val tOFF Registers Value. |
| Sinan Divarci |
0:65766360f6b9 | 822 | * |
| Sinan Divarci |
0:65766360f6b9 | 823 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 824 | */ |
| Sinan Divarci |
0:65766360f6b9 | 825 | int adjust_off_timer(timer_base_t time_base, int timer_val); |
| Sinan Divarci |
0:65766360f6b9 | 826 | |
| Sinan Divarci |
0:65766360f6b9 | 827 | /** |
| Sinan Divarci |
0:65766360f6b9 | 828 | * @brief Configures the off timer. |
| Sinan Divarci |
0:65766360f6b9 | 829 | * |
| Sinan Divarci |
0:65766360f6b9 | 830 | * @param[in] toff_time Off Time in microseconds. |
| Sinan Divarci |
0:65766360f6b9 | 831 | * |
| Sinan Divarci |
0:65766360f6b9 | 832 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 833 | */ |
| Sinan Divarci |
0:65766360f6b9 | 834 | int adjust_off_timer(int toff_time); |
| Sinan Divarci |
0:65766360f6b9 | 835 | |
| Sinan Divarci |
0:65766360f6b9 | 836 | /** |
| Sinan Divarci |
0:65766360f6b9 | 837 | * @brief Gets the off time in us. |
| Sinan Divarci |
0:65766360f6b9 | 838 | * |
| Sinan Divarci |
0:65766360f6b9 | 839 | * @returns the off time in us, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 840 | */ |
| Sinan Divarci |
0:65766360f6b9 | 841 | int get_off_timer(); |
| Sinan Divarci |
0:65766360f6b9 | 842 | |
| Sinan Divarci |
0:65766360f6b9 | 843 | /** |
| Sinan Divarci |
0:65766360f6b9 | 844 | * @brief Configures the CPU recovery timer. |
| Sinan Divarci |
0:65766360f6b9 | 845 | * |
| Sinan Divarci |
0:65766360f6b9 | 846 | * @param[in] tcpu_time desired CPU recovery time in us. |
| Sinan Divarci |
0:65766360f6b9 | 847 | * |
| Sinan Divarci |
0:65766360f6b9 | 848 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 849 | */ |
| Sinan Divarci |
0:65766360f6b9 | 850 | int adjust_cpu_recovery_timer(int tcpu_time); |
| Sinan Divarci |
0:65766360f6b9 | 851 | |
| Sinan Divarci |
0:65766360f6b9 | 852 | /** |
| Sinan Divarci |
0:65766360f6b9 | 853 | * @brief Gets the CPU recovery time in us. |
| Sinan Divarci |
0:65766360f6b9 | 854 | * |
| Sinan Divarci |
0:65766360f6b9 | 855 | * @returns the CPU recovery time in us, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 856 | */ |
| Sinan Divarci |
0:65766360f6b9 | 857 | int get_cpu_recovery_timer(); |
| Sinan Divarci |
0:65766360f6b9 | 858 | |
| Sinan Divarci |
0:65766360f6b9 | 859 | /** |
| Sinan Divarci |
0:65766360f6b9 | 860 | * @brief Configures the RF settling timer. |
| Sinan Divarci |
0:65766360f6b9 | 861 | * |
| Sinan Divarci |
0:65766360f6b9 | 862 | * @param[in] trf_time RF settling time in us. |
| Sinan Divarci |
0:65766360f6b9 | 863 | * |
| Sinan Divarci |
0:65766360f6b9 | 864 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 865 | */ |
| Sinan Divarci |
0:65766360f6b9 | 866 | int adjust_rf_settling_timer(int trf_time); |
| Sinan Divarci |
0:65766360f6b9 | 867 | |
| Sinan Divarci |
0:65766360f6b9 | 868 | /** |
| Sinan Divarci |
0:65766360f6b9 | 869 | * @brief Gets the RF settling time in us. |
| Sinan Divarci |
0:65766360f6b9 | 870 | * |
| Sinan Divarci |
0:65766360f6b9 | 871 | * @returns the RF settling time in us, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 872 | */ |
| Sinan Divarci |
0:65766360f6b9 | 873 | int get_rf_settling_timer(); |
| Sinan Divarci |
0:65766360f6b9 | 874 | |
| Sinan Divarci |
0:65766360f6b9 | 875 | /** |
| Sinan Divarci |
0:65766360f6b9 | 876 | * @brief Configures the on timer. |
| Sinan Divarci |
0:65766360f6b9 | 877 | * |
| Sinan Divarci |
0:65766360f6b9 | 878 | * @param[in] time_base Timer Base Configuration. |
| Sinan Divarci |
0:65766360f6b9 | 879 | * @param[in] timer_val tON Registers Value. |
| Sinan Divarci |
0:65766360f6b9 | 880 | * |
| Sinan Divarci |
0:65766360f6b9 | 881 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 882 | */ |
| Sinan Divarci |
0:65766360f6b9 | 883 | int adjust_on_timer(timer_base_t time_base, int timer_val); |
| Sinan Divarci |
0:65766360f6b9 | 884 | |
| Sinan Divarci |
0:65766360f6b9 | 885 | /** |
| Sinan Divarci |
0:65766360f6b9 | 886 | * @brief Configures the on timer. |
| Sinan Divarci |
0:65766360f6b9 | 887 | * |
| Sinan Divarci |
0:65766360f6b9 | 888 | * @param[in] ton_time On Time in microseconds. |
| Sinan Divarci |
0:65766360f6b9 | 889 | * |
| Sinan Divarci |
0:65766360f6b9 | 890 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 891 | */ |
| Sinan Divarci |
0:65766360f6b9 | 892 | int adjust_on_timer(int ton_time); |
| Sinan Divarci |
0:65766360f6b9 | 893 | |
| Sinan Divarci |
0:65766360f6b9 | 894 | /** |
| Sinan Divarci |
0:65766360f6b9 | 895 | * @brief Gets the on time in us. |
| Sinan Divarci |
0:65766360f6b9 | 896 | * |
| Sinan Divarci |
0:65766360f6b9 | 897 | * @returns the on time in us, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 898 | */ |
| Sinan Divarci |
0:65766360f6b9 | 899 | int get_on_timer(); |
| Sinan Divarci |
0:65766360f6b9 | 900 | |
| Sinan Divarci |
0:65766360f6b9 | 901 | /** |
| Sinan Divarci |
0:65766360f6b9 | 902 | * @brief Sets the devices center frequency. |
| Sinan Divarci |
0:65766360f6b9 | 903 | * |
| Sinan Divarci |
0:65766360f6b9 | 904 | * @param[in] center_freq desired center frequency |
| Sinan Divarci |
0:65766360f6b9 | 905 | * |
| Sinan Divarci |
0:65766360f6b9 | 906 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 907 | */ |
| Sinan Divarci |
0:65766360f6b9 | 908 | int set_center_freq(float center_freq); |
| Sinan Divarci |
0:65766360f6b9 | 909 | |
| Sinan Divarci |
0:65766360f6b9 | 910 | /** |
| Sinan Divarci |
0:65766360f6b9 | 911 | * @brief Gets the devices center frequency. |
| Sinan Divarci |
0:65766360f6b9 | 912 | * |
| Sinan Divarci |
0:65766360f6b9 | 913 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 914 | */ |
| Sinan Divarci |
0:65766360f6b9 | 915 | float get_center_freq(); |
| Sinan Divarci |
0:65766360f6b9 | 916 | |
| Sinan Divarci |
0:65766360f6b9 | 917 | /** |
| Sinan Divarci |
0:65766360f6b9 | 918 | * @brief Sets the devices data rate. |
| Sinan Divarci |
0:65766360f6b9 | 919 | * |
| Sinan Divarci |
0:65766360f6b9 | 920 | * @param[in] data_rate_set desired data rate |
| Sinan Divarci |
0:65766360f6b9 | 921 | * |
| Sinan Divarci |
0:65766360f6b9 | 922 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 923 | */ |
| Sinan Divarci |
0:65766360f6b9 | 924 | int set_data_rate(float data_rate_set); |
| Sinan Divarci |
0:65766360f6b9 | 925 | |
| Sinan Divarci |
0:65766360f6b9 | 926 | /** |
| Sinan Divarci |
0:65766360f6b9 | 927 | * @brief Gets the devices data rate. |
| Sinan Divarci |
0:65766360f6b9 | 928 | * |
| Sinan Divarci |
0:65766360f6b9 | 929 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 930 | */ |
| Sinan Divarci |
0:65766360f6b9 | 931 | float get_data_rate(); |
| Sinan Divarci |
0:65766360f6b9 | 932 | |
| Sinan Divarci |
0:65766360f6b9 | 933 | /** |
| Sinan Divarci |
0:65766360f6b9 | 934 | * @brief Sets the FSK deviation. |
| Sinan Divarci |
0:65766360f6b9 | 935 | * |
| Sinan Divarci |
0:65766360f6b9 | 936 | * @param[in] fsk_dev_set desired FSK deviation |
| Sinan Divarci |
0:65766360f6b9 | 937 | * |
| Sinan Divarci |
0:65766360f6b9 | 938 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 939 | */ |
| Sinan Divarci |
0:65766360f6b9 | 940 | int set_fsk_dev(float fsk_dev_set); |
| Sinan Divarci |
0:65766360f6b9 | 941 | |
| Sinan Divarci |
0:65766360f6b9 | 942 | /** |
| Sinan Divarci |
0:65766360f6b9 | 943 | * @brief Gets the FSK deviation. |
| Sinan Divarci |
0:65766360f6b9 | 944 | * |
| Sinan Divarci |
0:65766360f6b9 | 945 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 946 | */ |
| Sinan Divarci |
0:65766360f6b9 | 947 | float get_fsk_dev(); |
| Sinan Divarci |
0:65766360f6b9 | 948 | |
| Sinan Divarci |
0:65766360f6b9 | 949 | /** |
| Sinan Divarci |
0:65766360f6b9 | 950 | * @brief Sets the encoding type. |
| Sinan Divarci |
0:65766360f6b9 | 951 | * |
| Sinan Divarci |
0:65766360f6b9 | 952 | * @param[in] encoding_set desired encoding type |
| Sinan Divarci |
0:65766360f6b9 | 953 | * |
| Sinan Divarci |
0:65766360f6b9 | 954 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 955 | */ |
| Sinan Divarci |
0:65766360f6b9 | 956 | int set_encoding(encoding_t encoding_set); |
| Sinan Divarci |
0:65766360f6b9 | 957 | |
| Sinan Divarci |
0:65766360f6b9 | 958 | /** |
| Sinan Divarci |
0:65766360f6b9 | 959 | * @brief Gets the encoding type. |
| Sinan Divarci |
0:65766360f6b9 | 960 | * |
| Sinan Divarci |
0:65766360f6b9 | 961 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 962 | */ |
| Sinan Divarci |
0:65766360f6b9 | 963 | int get_encoding(); |
| Sinan Divarci |
0:65766360f6b9 | 964 | |
| Sinan Divarci |
0:65766360f6b9 | 965 | /** |
| Sinan Divarci |
0:65766360f6b9 | 966 | * @brief Configures the AGC Dwell Timer. |
| Sinan Divarci |
0:65766360f6b9 | 967 | * |
| Sinan Divarci |
0:65766360f6b9 | 968 | * @param[in] k_val K value for dwell timer configuration. |
| Sinan Divarci |
0:65766360f6b9 | 969 | * |
| Sinan Divarci |
0:65766360f6b9 | 970 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 971 | */ |
| Sinan Divarci |
0:65766360f6b9 | 972 | int adjust_agc_dwell_timer(uint8_t k_val); |
| Sinan Divarci |
0:65766360f6b9 | 973 | |
| Sinan Divarci |
0:65766360f6b9 | 974 | /** |
| Sinan Divarci |
0:65766360f6b9 | 975 | * @brief Configures the AGC Dwell Timer. |
| Sinan Divarci |
0:65766360f6b9 | 976 | * |
| Sinan Divarci |
0:65766360f6b9 | 977 | * @param[in] dwell_time desired dwell time. |
| Sinan Divarci |
0:65766360f6b9 | 978 | * |
| Sinan Divarci |
0:65766360f6b9 | 979 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 980 | */ |
| Sinan Divarci |
0:65766360f6b9 | 981 | int adjust_agc_dwell_timer(int dwell_time); |
| Sinan Divarci |
0:65766360f6b9 | 982 | |
| Sinan Divarci |
0:65766360f6b9 | 983 | /** |
| Sinan Divarci |
0:65766360f6b9 | 984 | * @brief Gets the AGC Dwell Time Value. |
| Sinan Divarci |
0:65766360f6b9 | 985 | * |
| Sinan Divarci |
0:65766360f6b9 | 986 | * @returns the AGC Dwell Time Value, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 987 | */ |
| Sinan Divarci |
0:65766360f6b9 | 988 | int get_agc_dwell_timer(); |
| Sinan Divarci |
0:65766360f6b9 | 989 | |
| Sinan Divarci |
0:65766360f6b9 | 990 | /* END OF DEVICE CONFIGURATION FUNCTION DECLARATIONS */ |
| Sinan Divarci |
0:65766360f6b9 | 991 | |
| Sinan Divarci |
0:65766360f6b9 | 992 | /* PUBLIC FUNCTION DECLARATIONS */ |
| Sinan Divarci |
0:65766360f6b9 | 993 | |
| Sinan Divarci |
0:65766360f6b9 | 994 | /** |
| Sinan Divarci |
0:65766360f6b9 | 995 | * @brief Set power on/off |
| Sinan Divarci |
0:65766360f6b9 | 996 | * |
| Sinan Divarci |
0:65766360f6b9 | 997 | * @param[in] power 0 : power ON, 1: power OFF |
| Sinan Divarci |
0:65766360f6b9 | 998 | * |
| Sinan Divarci |
0:65766360f6b9 | 999 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 1000 | */ |
| Sinan Divarci |
0:65766360f6b9 | 1001 | int set_power_on_off(uint8_t power); |
| Sinan Divarci |
0:65766360f6b9 | 1002 | |
| Sinan Divarci |
0:65766360f6b9 | 1003 | /** |
| Sinan Divarci |
0:65766360f6b9 | 1004 | * @brief Read from a register. Since 3-wire spi is not supported by mbed, the read_register function must be implemented by the user. |
| Sinan Divarci |
0:65766360f6b9 | 1005 | * |
| Sinan Divarci |
0:65766360f6b9 | 1006 | * @param[in] reg Address of a register to be read. |
| Sinan Divarci |
0:65766360f6b9 | 1007 | * @param[out] value Pointer to save result value. |
| Sinan Divarci |
0:65766360f6b9 | 1008 | * |
| Sinan Divarci |
0:65766360f6b9 | 1009 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 1010 | */ |
| Sinan Divarci |
0:65766360f6b9 | 1011 | int read_register(uint8_t reg, uint8_t *value); |
| Sinan Divarci |
0:65766360f6b9 | 1012 | |
| Sinan Divarci |
0:65766360f6b9 | 1013 | /** |
| Sinan Divarci |
0:65766360f6b9 | 1014 | * @brief Write to a register. |
| Sinan Divarci |
0:65766360f6b9 | 1015 | * |
| Sinan Divarci |
0:65766360f6b9 | 1016 | * @param[in] reg Address of a register to be written. |
| Sinan Divarci |
0:65766360f6b9 | 1017 | * @param[out] value Pointer of value to be written to register. |
| Sinan Divarci |
0:65766360f6b9 | 1018 | * @param[in] len Size of result to be written. |
| Sinan Divarci |
0:65766360f6b9 | 1019 | * |
| Sinan Divarci |
0:65766360f6b9 | 1020 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 1021 | */ |
| Sinan Divarci |
0:65766360f6b9 | 1022 | int write_register(uint8_t reg, const uint8_t *value, uint8_t len); |
| Sinan Divarci |
0:65766360f6b9 | 1023 | |
| Sinan Divarci |
0:65766360f6b9 | 1024 | /** |
| Sinan Divarci |
0:65766360f6b9 | 1025 | * @brief Initial programming steps after power on or soft reset. |
| Sinan Divarci |
0:65766360f6b9 | 1026 | * |
| Sinan Divarci |
0:65766360f6b9 | 1027 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 1028 | */ |
| Sinan Divarci |
0:65766360f6b9 | 1029 | int initial_programming(void); |
| Sinan Divarci |
0:65766360f6b9 | 1030 | |
| Sinan Divarci |
0:65766360f6b9 | 1031 | /** |
| Sinan Divarci |
0:65766360f6b9 | 1032 | * @brief Loads the Quick Start configuration to the device for RX mode. |
| Sinan Divarci |
0:65766360f6b9 | 1033 | * |
| Sinan Divarci |
0:65766360f6b9 | 1034 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 1035 | */ |
| Sinan Divarci |
0:65766360f6b9 | 1036 | int rx_quich_start(void); |
| Sinan Divarci |
0:65766360f6b9 | 1037 | |
| Sinan Divarci |
0:65766360f6b9 | 1038 | /** |
| Sinan Divarci |
0:65766360f6b9 | 1039 | * @brief Loads the Quick Start configuration to the device for TX mode. |
| Sinan Divarci |
0:65766360f6b9 | 1040 | * |
| Sinan Divarci |
0:65766360f6b9 | 1041 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 1042 | */ |
| Sinan Divarci |
0:65766360f6b9 | 1043 | int tx_quich_start(void); |
| Sinan Divarci |
0:65766360f6b9 | 1044 | |
| Sinan Divarci |
0:65766360f6b9 | 1045 | typedef enum{ |
| Sinan Divarci |
0:65766360f6b9 | 1046 | RECEIVE_MODE, |
| Sinan Divarci |
0:65766360f6b9 | 1047 | TRANSMIT_MODE |
| Sinan Divarci |
0:65766360f6b9 | 1048 | }trx_state_t; |
| Sinan Divarci |
0:65766360f6b9 | 1049 | |
| Sinan Divarci |
0:65766360f6b9 | 1050 | /** |
| Sinan Divarci |
0:65766360f6b9 | 1051 | * @brief Sets the Device to Receiver or Transmitter Mode. |
| Sinan Divarci |
0:65766360f6b9 | 1052 | * |
| Sinan Divarci |
0:65766360f6b9 | 1053 | * @param[in] trx_state desired mode. |
| Sinan Divarci |
0:65766360f6b9 | 1054 | * |
| Sinan Divarci |
0:65766360f6b9 | 1055 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 1056 | */ |
| Sinan Divarci |
0:65766360f6b9 | 1057 | int set_trx_state(trx_state_t trx_state); |
| Sinan Divarci |
0:65766360f6b9 | 1058 | |
| Sinan Divarci |
0:65766360f6b9 | 1059 | /** |
| Sinan Divarci |
0:65766360f6b9 | 1060 | * @brief Gets the Mode the Device is in. |
| Sinan Divarci |
0:65766360f6b9 | 1061 | * |
| Sinan Divarci |
0:65766360f6b9 | 1062 | * @returns the mode the Device is in, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 1063 | */ |
| Sinan Divarci |
0:65766360f6b9 | 1064 | int get_trx_state(); |
| Sinan Divarci |
0:65766360f6b9 | 1065 | |
| Sinan Divarci |
0:65766360f6b9 | 1066 | /** |
| Sinan Divarci |
0:65766360f6b9 | 1067 | * @brief Transmits the RF data. |
| Sinan Divarci |
0:65766360f6b9 | 1068 | * |
| Sinan Divarci |
0:65766360f6b9 | 1069 | * @param[in] data Address of the data to be transmit. |
| Sinan Divarci |
0:65766360f6b9 | 1070 | * @param[in] data_len Size of the data to be transmit. |
| Sinan Divarci |
0:65766360f6b9 | 1071 | * |
| Sinan Divarci |
0:65766360f6b9 | 1072 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 1073 | */ |
| Sinan Divarci |
0:65766360f6b9 | 1074 | int rf_transmit_data(uint8_t *data, uint8_t data_len); |
| Sinan Divarci |
0:65766360f6b9 | 1075 | |
| Sinan Divarci |
0:65766360f6b9 | 1076 | /** |
| Sinan Divarci |
0:65766360f6b9 | 1077 | * @brief Receives the RF data. |
| Sinan Divarci |
0:65766360f6b9 | 1078 | * |
| Sinan Divarci |
0:65766360f6b9 | 1079 | * @param[in] coded_data the address where the received data will be stored. |
| Sinan Divarci |
0:65766360f6b9 | 1080 | * @param[in] coded_data_len the length of the data to be received. |
| Sinan Divarci |
0:65766360f6b9 | 1081 | * |
| Sinan Divarci |
0:65766360f6b9 | 1082 | * @description The coded data is sampled at twice the data rate. The coded data must be filtered. |
| Sinan Divarci |
0:65766360f6b9 | 1083 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 1084 | */ |
| Sinan Divarci |
0:65766360f6b9 | 1085 | int rf_receive_data(uint8_t *coded_data, uint8_t coded_data_len); |
| Sinan Divarci |
0:65766360f6b9 | 1086 | |
| Sinan Divarci |
0:65766360f6b9 | 1087 | /** |
| Sinan Divarci |
0:65766360f6b9 | 1088 | * @brief Sets the T/R Pin if defined. |
| Sinan Divarci |
0:65766360f6b9 | 1089 | * |
| Sinan Divarci |
0:65766360f6b9 | 1090 | * @param[in] pin_state desired pin state. |
| Sinan Divarci |
0:65766360f6b9 | 1091 | * |
| Sinan Divarci |
0:65766360f6b9 | 1092 | * @returns 0 on success, negative error code on failure. |
| Sinan Divarci |
0:65766360f6b9 | 1093 | */ |
| Sinan Divarci |
0:65766360f6b9 | 1094 | int set_trx_pin(trx_state_t pin_state); |
| Sinan Divarci |
0:65766360f6b9 | 1095 | }; |
| Sinan Divarci |
0:65766360f6b9 | 1096 | |
| Sinan Divarci |
0:65766360f6b9 | 1097 | #endif /* MAX7032_MAX7032_H_ */ |