Wim Huiskamp / HDSP253X

HDSP253X Smart Alphanumeric LED matrix display

Dependents:   mbed_bus

HDSP253X.cpp@0:b3430a613781, 2015-01-25 (annotated)

Committer:
wim
Date:
Sun Jan 25 17:23:44 2015 +0000
Revision:
0:b3430a613781
HDSP253X Smart Alphanumeric LED matrix display. First release as Lib.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wim 0:b3430a613781 1 /* HDSP253X_Display - Intelligent 8 digit 5x7 LED matrix display
wim 0:b3430a613781 2 *
wim 0:b3430a613781 3 * Copyright (c) 2011 Wim Huiskamp
wim 0:b3430a613781 4 * Modified software based on sourcecode by RAC 06/08/2008
wim 0:b3430a613781 5 *
wim 0:b3430a613781 6 * Released under the MIT License: http://mbed.org/license/mit
wim 0:b3430a613781 7 *
wim 0:b3430a613781 8 * version 0.2 Initial Release
wim 0:b3430a613781 9 */
wim 0:b3430a613781 10 #include "mbed.h"
wim 0:b3430a613781 11 //#include "Utils.h"
wim 0:b3430a613781 12 #include "PCF8574_DataBus.h"
wim 0:b3430a613781 13 #include "PCF8574_AddressBus.h"
wim 0:b3430a613781 14 #include "PCF8574_EnableBus.h"
wim 0:b3430a613781 15 #include "MBED_ControlBus.h"
wim 0:b3430a613781 16 #include "HDSP253X.h"
wim 0:b3430a613781 17
wim 0:b3430a613781 18 /** Create an HDSP253X_Display object connected to the proper busses
wim 0:b3430a613781 19 *
wim 0:b3430a613781 20 * @param PCF8574_DataBus data databus to connect to
wim 0:b3430a613781 21 * @param PCF8574_AddressBus address addressbus to connect to
wim 0:b3430a613781 22 * @param PCF8574_EnableBus enable enablebus to connect to
wim 0:b3430a613781 23 * @param MBED_ControlBus control controlbus to connect to
wim 0:b3430a613781 24 */
wim 0:b3430a613781 25 HDSP253X_Display::HDSP253X_Display (PCF8574_DataBus &databus, PCF8574_AddressBus &addressbus, PCF8574_EnableBus &enablebus, MBED_ControlBus &controlbus) :
wim 0:b3430a613781 26 _databus(databus), _addressbus(addressbus), _enablebus(enablebus), _controlbus(controlbus) {
wim 0:b3430a613781 27
wim 0:b3430a613781 28 _init();
wim 0:b3430a613781 29 }
wim 0:b3430a613781 30
wim 0:b3430a613781 31 /** Init HDSP253X_Display
wim 0:b3430a613781 32 * @param
wim 0:b3430a613781 33 * @returns
wim 0:b3430a613781 34 */
wim 0:b3430a613781 35 void HDSP253X_Display::_init(void)
wim 0:b3430a613781 36 {
wim 0:b3430a613781 37 // Apply reset
wim 0:b3430a613781 38 reset(); // Note that this also resets the LED status display.
wim 0:b3430a613781 39
wim 0:b3430a613781 40 // Note: Brightness is 100% after reset
wim 0:b3430a613781 41 set_brightness(HDSP253X_DEF_DISPLAY_BRIGHT);
wim 0:b3430a613781 42
wim 0:b3430a613781 43 // Reset cursor
wim 0:b3430a613781 44 locate(0);
wim 0:b3430a613781 45 }
wim 0:b3430a613781 46
wim 0:b3430a613781 47
wim 0:b3430a613781 48 /*****************************************************************************/
wim 0:b3430a613781 49 /******************* LOW LEVEL HDSP253X SUPPORT FUNCTIONS ******************/
wim 0:b3430a613781 50 /*****************************************************************************/
wim 0:b3430a613781 51
wim 0:b3430a613781 52 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 53 |
wim 0:b3430a613781 54 | Function: HDSP253X_reset
wim 0:b3430a613781 55 |
wim 0:b3430a613781 56 | Description: Reset routine for HDSP253X display, applying reset,
wim 0:b3430a613781 57 | removing reset, then waiting for preset delay.
wim 0:b3430a613781 58 | With the internal clock, the delay should be around 1
wim 0:b3430a613781 59 | millisecond, but slower clocks will require longer delays.
wim 0:b3430a613781 60 | After reset the Char RAM and Flash RAM is cleared, the CTRL word is
wim 0:b3430a613781 61 | cleared (Blink Off, Flash Off, Brightness 100%). UDC RAM and address
wim 0:b3430a613781 62 | are unaffected.
wim 0:b3430a613781 63 |
wim 0:b3430a613781 64 | Parameters: None
wim 0:b3430a613781 65 |
wim 0:b3430a613781 66 | Returns: Nothing.
wim 0:b3430a613781 67 |
wim 0:b3430a613781 68 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 69 void HDSP253X_Display::reset(void)
wim 0:b3430a613781 70 {
wim 0:b3430a613781 71 //NOTE: On LF28A the Reset* pin is connected to the display and to the latches.
wim 0:b3430a613781 72 // That implies they are all reset when the Reset* pin is used !
wim 0:b3430a613781 73 //
wim 0:b3430a613781 74 // Alternative for the Display may be SW reset instruction
wim 0:b3430a613781 75
wim 0:b3430a613781 76 // Apply the reset condition and then remove after short delay
wim 0:b3430a613781 77 _enablebus.chipselect(CS_DISP, HIGH);
wim 0:b3430a613781 78 wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 79
wim 0:b3430a613781 80 _enablebus.reset(LOW);
wim 0:b3430a613781 81 wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 82 wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 83 _enablebus.reset(HIGH);
wim 0:b3430a613781 84
wim 0:b3430a613781 85 // Wait for the preset delay to allow operation to complete
wim 0:b3430a613781 86 wait_ms(HDSP253X_RST_CLR_DELAY_MS);
wim 0:b3430a613781 87
wim 0:b3430a613781 88 // Reset cursor
wim 0:b3430a613781 89 locate(0);
wim 0:b3430a613781 90 }
wim 0:b3430a613781 91
wim 0:b3430a613781 92
wim 0:b3430a613781 93 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 94 |
wim 0:b3430a613781 95 | Function: HDSP253X_write
wim 0:b3430a613781 96 |
wim 0:b3430a613781 97 | Description: Low level data write routine for HDSP253X. Takes in data
wim 0:b3430a613781 98 | and address (including Flash as top bit) and writes
wim 0:b3430a613781 99 | it to the display. For simplicity, entire address byte
wim 0:b3430a613781 100 | is written, even though top two bits are unused inputs.
wim 0:b3430a613781 101 | After performing the operation, address lines are set
wim 0:b3430a613781 102 | all high, in order to eliminate current drain through
wim 0:b3430a613781 103 | pullup resistors (0.5mA per pin with 10K pullups)
wim 0:b3430a613781 104 |
wim 0:b3430a613781 105 | Parameters: address - full address in bits 0-5 (bit 5 is flash)
wim 0:b3430a613781 106 | data - data byte to write out
wim 0:b3430a613781 107 |
wim 0:b3430a613781 108 | Returns: Nothing.
wim 0:b3430a613781 109 |
wim 0:b3430a613781 110 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 111
wim 0:b3430a613781 112 void HDSP253X_Display::_write(uint8_t address, uint8_t data)
wim 0:b3430a613781 113 {
wim 0:b3430a613781 114 // // Switch databus buffer to outputs
wim 0:b3430a613781 115 // _controlbus.busdir(WRITE);
wim 0:b3430a613781 116 // // Switch databus to outputs
wim 0:b3430a613781 117 // _databus.busdir(WRITE);
wim 0:b3430a613781 118
wim 0:b3430a613781 119
wim 0:b3430a613781 120 // Write out the address on to the addressbus and wait
wim 0:b3430a613781 121 _addressbus.write(address);
wim 0:b3430a613781 122 // wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 123
wim 0:b3430a613781 124 // Set CE low and wait
wim 0:b3430a613781 125 _enablebus.chipselect(CS_DISP, LOW);
wim 0:b3430a613781 126 // wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 127
wim 0:b3430a613781 128 // Write data to the databus
wim 0:b3430a613781 129 _databus.write(data);
wim 0:b3430a613781 130 // wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 131
wim 0:b3430a613781 132 // Set WR low, wait, then set high and wait
wim 0:b3430a613781 133 _controlbus.WR(LOW);
wim 0:b3430a613781 134 // wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 135 _controlbus.WR(HIGH);
wim 0:b3430a613781 136 // wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 137
wim 0:b3430a613781 138 // Set CE high and wait
wim 0:b3430a613781 139 _enablebus.chipselect(CS_DISP, HIGH);
wim 0:b3430a613781 140 // wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 141
wim 0:b3430a613781 142 // // Switch databus back to inputs
wim 0:b3430a613781 143 // _databus.busdir(READ);
wim 0:b3430a613781 144 // // Switch databus buffer back to inputs
wim 0:b3430a613781 145 // _controlbus.busdir(READ);
wim 0:b3430a613781 146
wim 0:b3430a613781 147 // // Set address lines all high to minimise power through pullups
wim 0:b3430a613781 148 // _addressbus.write(HDSP253X_ADDR_LOW_POWER);
wim 0:b3430a613781 149 }
wim 0:b3430a613781 150
wim 0:b3430a613781 151 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 152 |
wim 0:b3430a613781 153 | Function: HDSP253X_read
wim 0:b3430a613781 154 |
wim 0:b3430a613781 155 | Description: Low level data read routine for HDSP253X. Takes in
wim 0:b3430a613781 156 | address (including Flash as top bit) and reads data
wim 0:b3430a613781 157 | from the display. For simplicity, entire address byte
wim 0:b3430a613781 158 | is written, even though top two bits are unused inputs.
wim 0:b3430a613781 159 | After performing the operation, address lines are set
wim 0:b3430a613781 160 | all high, in order to eliminate current drain through
wim 0:b3430a613781 161 | pullup resistors (0.5mA per pin with 10K pullups)
wim 0:b3430a613781 162 |
wim 0:b3430a613781 163 | Parameters: address - full address in bits 0-5 (bit 5 is flash)
wim 0:b3430a613781 164 |
wim 0:b3430a613781 165 | Returns: data - data byte read in (Note that D7 is masked out)
wim 0:b3430a613781 166 |
wim 0:b3430a613781 167 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 168
wim 0:b3430a613781 169 uint8_t HDSP253X_Display::_read(uint8_t address)
wim 0:b3430a613781 170 {
wim 0:b3430a613781 171 uint8_t data = 0;
wim 0:b3430a613781 172
wim 0:b3430a613781 173 // Switch databus to inputs
wim 0:b3430a613781 174 _databus.busdir(READ);
wim 0:b3430a613781 175 // Switch databus buffer to inputs
wim 0:b3430a613781 176 _controlbus.busdir(READ);
wim 0:b3430a613781 177
wim 0:b3430a613781 178 // Write out the address on to the addressbus and wait
wim 0:b3430a613781 179 _addressbus.write(address);
wim 0:b3430a613781 180 // wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 181
wim 0:b3430a613781 182 // Set CE low and wait
wim 0:b3430a613781 183 _enablebus.chipselect(CS_DISP, LOW);
wim 0:b3430a613781 184 // wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 185
wim 0:b3430a613781 186 // Set RD low and wait
wim 0:b3430a613781 187 _controlbus.RD(LOW);
wim 0:b3430a613781 188 // wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 189
wim 0:b3430a613781 190 // Read the data byte from databus
wim 0:b3430a613781 191 // Mask out the not-readable D7 bit, this mask is needed for my specific targetboard !
wim 0:b3430a613781 192 // Reading the unconnected D7 bit results in 'H' level. A RMW cycle on the Ctrl register
wim 0:b3430a613781 193 // would then always result in a Clearscreen !
wim 0:b3430a613781 194 data = _databus.read() & HDSP253X_CTRL_MASK;
wim 0:b3430a613781 195
wim 0:b3430a613781 196 // set RD high and wait
wim 0:b3430a613781 197 _controlbus.RD(HIGH);
wim 0:b3430a613781 198 // wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 199
wim 0:b3430a613781 200 // Set CE high and wait
wim 0:b3430a613781 201 _enablebus.chipselect(CS_DISP, HIGH);
wim 0:b3430a613781 202 // wait_ms(HDSP253X_1TCY_WAIT_MS);
wim 0:b3430a613781 203
wim 0:b3430a613781 204 // // Set address lines all high to minimise power through pullups
wim 0:b3430a613781 205 // _addressbus.write(HDSP253X_ADDR_LOW_POWER);
wim 0:b3430a613781 206
wim 0:b3430a613781 207 // Switch databus buffer back to outputs
wim 0:b3430a613781 208 _controlbus.busdir(WRITE);
wim 0:b3430a613781 209 // Switch databus to outputs
wim 0:b3430a613781 210 _databus.busdir(WRITE);
wim 0:b3430a613781 211
wim 0:b3430a613781 212 // Return read data to caller
wim 0:b3430a613781 213 return data;
wim 0:b3430a613781 214 }
wim 0:b3430a613781 215
wim 0:b3430a613781 216
wim 0:b3430a613781 217 /*****************************************************************************/
wim 0:b3430a613781 218 /************** HIGH LEVEL HDSP253X CHARACTER DISPLAY FUNCTIONS ************/
wim 0:b3430a613781 219 /*****************************************************************************/
wim 0:b3430a613781 220
wim 0:b3430a613781 221
wim 0:b3430a613781 222 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 223 |
wim 0:b3430a613781 224 | Function: HDSP253X_putudc
wim 0:b3430a613781 225 |
wim 0:b3430a613781 226 | Description: Displays specified UDC character on the display at current
wim 0:b3430a613781 227 | position. Used defined characters use codes from 128-142.
wim 0:b3430a613781 228 | Note that the normal putc write routines can also be used
wim 0:b3430a613781 229 | to show UDCs, using ASCII values 128 to 143 inclusive.
wim 0:b3430a613781 230 |
wim 0:b3430a613781 231 | Parameters: udc_char_num - UDC character, 16 possible UDC values from 0-15
wim 0:b3430a613781 232 |
wim 0:b3430a613781 233 | Returns: Nothing
wim 0:b3430a613781 234 |
wim 0:b3430a613781 235 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 236
wim 0:b3430a613781 237 void HDSP253X_Display::putudc (char udc_char_num)
wim 0:b3430a613781 238 {
wim 0:b3430a613781 239 putc(HDSP253X_ASCII_UDC_CHARS + udc_char_num);
wim 0:b3430a613781 240 }
wim 0:b3430a613781 241
wim 0:b3430a613781 242 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 243 |
wim 0:b3430a613781 244 | Function: HDSP253X_printf
wim 0:b3430a613781 245 |
wim 0:b3430a613781 246 | Description: Displays specified string on the display at current
wim 0:b3430a613781 247 | cursor position. Increments cursor.
wim 0:b3430a613781 248 |
wim 0:b3430a613781 249 | Parameters: format - format string
wim 0:b3430a613781 250 | args - data
wim 0:b3430a613781 251 |
wim 0:b3430a613781 252 | Returns: Nothing
wim 0:b3430a613781 253 |
wim 0:b3430a613781 254 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 255
wim 0:b3430a613781 256 void HDSP253X_Display::printf (char * format, ...) {
wim 0:b3430a613781 257 char display_string[64];
wim 0:b3430a613781 258 // int rv;
wim 0:b3430a613781 259 int string_len, i;
wim 0:b3430a613781 260 va_list args;
wim 0:b3430a613781 261 va_start (args, format);
wim 0:b3430a613781 262
wim 0:b3430a613781 263 // rv=vsprintf (display_string, format, args);
wim 0:b3430a613781 264 vsprintf (display_string, format, args);
wim 0:b3430a613781 265 va_end (args);
wim 0:b3430a613781 266 // printf("printing:'%s'\n", display_string);
wim 0:b3430a613781 267 // writeString (buffer);
wim 0:b3430a613781 268
wim 0:b3430a613781 269 // loop round, writing characters
wim 0:b3430a613781 270 string_len = strlen(display_string); // obtain length of string
wim 0:b3430a613781 271 for (i = 0; i < string_len; i++) {
wim 0:b3430a613781 272 putc(display_string[i]);
wim 0:b3430a613781 273 };
wim 0:b3430a613781 274
wim 0:b3430a613781 275 // return rv;
wim 0:b3430a613781 276 }
wim 0:b3430a613781 277
wim 0:b3430a613781 278
wim 0:b3430a613781 279
wim 0:b3430a613781 280 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 281 |
wim 0:b3430a613781 282 | Function: HDSP253X_putc
wim 0:b3430a613781 283 |
wim 0:b3430a613781 284 | Description: Displays specified character on the display at current
wim 0:b3430a613781 285 | cursor position. Increments cursor.
wim 0:b3430a613781 286 | Position on the display (0 to 7, Leftmost = 0)
wim 0:b3430a613781 287 |
wim 0:b3430a613781 288 | Parameters: disp_char - single character to display
wim 0:b3430a613781 289 | - ASCII characters, 128 values between 0-127
wim 0:b3430a613781 290 | - UDC character, 15 possible UDC values from 128-142
wim 0:b3430a613781 291 |
wim 0:b3430a613781 292 | Returns: Nothing
wim 0:b3430a613781 293 |
wim 0:b3430a613781 294 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 295 void HDSP253X_Display::putc(char disp_char) {
wim 0:b3430a613781 296
wim 0:b3430a613781 297 // Write selected character to display at current position
wim 0:b3430a613781 298
wim 0:b3430a613781 299 if ((disp_char & HDSP253X_UDC_SEL) == HDSP253X_UDC_SEL) {
wim 0:b3430a613781 300 // Write UDC character to display, code between 128-143
wim 0:b3430a613781 301 disp_char &= HDSP253X_UDC_MASK; // mask off unused bits
wim 0:b3430a613781 302 disp_char |= HDSP253X_UDC_SEL; // add in top bit to specify UDC
wim 0:b3430a613781 303 _write(HDSP253X_ADDR_CHAR_BASE + _column, disp_char);
wim 0:b3430a613781 304 }
wim 0:b3430a613781 305 else {
wim 0:b3430a613781 306 // Write ASCII character, code between 0-127
wim 0:b3430a613781 307 disp_char &= HDSP253X_CHAR_MASK; // mask off unused bits
wim 0:b3430a613781 308 _write(HDSP253X_ADDR_CHAR_BASE + _column, disp_char);
wim 0:b3430a613781 309 }
wim 0:b3430a613781 310
wim 0:b3430a613781 311 // Incr and wrap around cursorposition
wim 0:b3430a613781 312 _column++;
wim 0:b3430a613781 313 _column = _column % HDSP253X_NUM_CHARS;
wim 0:b3430a613781 314 }
wim 0:b3430a613781 315
wim 0:b3430a613781 316
wim 0:b3430a613781 317
wim 0:b3430a613781 318 #if(0)
wim 0:b3430a613781 319 char HDSP253X_Display::getc() {
wim 0:b3430a613781 320 return -1;
wim 0:b3430a613781 321 }
wim 0:b3430a613781 322 #endif
wim 0:b3430a613781 323
wim 0:b3430a613781 324 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 325 |
wim 0:b3430a613781 326 | Function: HDSP253X_locate
wim 0:b3430a613781 327 |
wim 0:b3430a613781 328 | Description: Set the cursor address where the next character will be written.
wim 0:b3430a613781 329 |
wim 0:b3430a613781 330 | Parameters: Cursor Column address
wim 0:b3430a613781 331 |
wim 0:b3430a613781 332 | Returns: Nothing
wim 0:b3430a613781 333 |
wim 0:b3430a613781 334 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 335
wim 0:b3430a613781 336 void HDSP253X_Display::locate(uint8_t column) {
wim 0:b3430a613781 337
wim 0:b3430a613781 338 // _row = row % HDSP253X_NUM_ROWS;
wim 0:b3430a613781 339 _column = column % HDSP253X_NUM_CHARS;
wim 0:b3430a613781 340 }
wim 0:b3430a613781 341
wim 0:b3430a613781 342
wim 0:b3430a613781 343 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 344 |
wim 0:b3430a613781 345 | Function: HDSP253X_cls
wim 0:b3430a613781 346 |
wim 0:b3430a613781 347 | Description: Clears the displayed data and flash RAM, but not the user
wim 0:b3430a613781 348 | defined characters. Waits for the preset delay to ensure the
wim 0:b3430a613781 349 | display is ready for operation; with an internal clock,
wim 0:b3430a613781 350 | this delay needs to be around 1 millisecond.
wim 0:b3430a613781 351 |
wim 0:b3430a613781 352 | Parameters: None
wim 0:b3430a613781 353 |
wim 0:b3430a613781 354 | Returns: Nothing
wim 0:b3430a613781 355 |
wim 0:b3430a613781 356 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 357
wim 0:b3430a613781 358 void HDSP253X_Display::cls(void) {
wim 0:b3430a613781 359
wim 0:b3430a613781 360 uint8_t disp_data;
wim 0:b3430a613781 361
wim 0:b3430a613781 362 // Read in control word, modify and write back out
wim 0:b3430a613781 363 disp_data = _read(HDSP253X_ADDR_CTRL_WORD);
wim 0:b3430a613781 364 disp_data |= HDSP253X_CTRL_CLEAR_MASK;
wim 0:b3430a613781 365 _write(HDSP253X_ADDR_CTRL_WORD, disp_data);
wim 0:b3430a613781 366
wim 0:b3430a613781 367 // Wait for the preset delay to allow operation to complete
wim 0:b3430a613781 368 wait_ms(HDSP253X_RST_CLR_DELAY_MS);
wim 0:b3430a613781 369
wim 0:b3430a613781 370 // Reset cursor
wim 0:b3430a613781 371 locate(0);
wim 0:b3430a613781 372 }
wim 0:b3430a613781 373
wim 0:b3430a613781 374
wim 0:b3430a613781 375 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 376 |
wim 0:b3430a613781 377 | Function: HDSP253X_set_brightness
wim 0:b3430a613781 378 |
wim 0:b3430a613781 379 | Description: Sets the brightness of the HDSP253X display, by performing
wim 0:b3430a613781 380 | a read-modify-write on the control register.
wim 0:b3430a613781 381 |
wim 0:b3430a613781 382 | Parameters: brightness - 3 bit brightness value
wim 0:b3430a613781 383 |
wim 0:b3430a613781 384 | Returns: Nothing
wim 0:b3430a613781 385 |
wim 0:b3430a613781 386 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 387
wim 0:b3430a613781 388 void HDSP253X_Display::set_brightness(uint8_t brightness) {
wim 0:b3430a613781 389
wim 0:b3430a613781 390 uint8_t ctrl_data;
wim 0:b3430a613781 391
wim 0:b3430a613781 392 // Read in control word, modify and write back out
wim 0:b3430a613781 393 ctrl_data = _read(HDSP253X_ADDR_CTRL_WORD);
wim 0:b3430a613781 394 ctrl_data &= ~HDSP253X_CTRL_BRIGHT_MASK;
wim 0:b3430a613781 395 ctrl_data |= (brightness & HDSP253X_CTRL_BRIGHT_MASK);
wim 0:b3430a613781 396 _write(HDSP253X_ADDR_CTRL_WORD, ctrl_data);
wim 0:b3430a613781 397 }
wim 0:b3430a613781 398
wim 0:b3430a613781 399 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 400 |
wim 0:b3430a613781 401 | Function: HDSP253X_start_self_test
wim 0:b3430a613781 402 |
wim 0:b3430a613781 403 | Description: Starts the HDSP253X self test, setting the relevant
wim 0:b3430a613781 404 | control word bit. The caller should then wait for
wim 0:b3430a613781 405 | the required number of seconds before checking the result.
wim 0:b3430a613781 406 | With the internal display clock, the self test takes
wim 0:b3430a613781 407 | around 5 seconds, so waiting for 6 seconds should
wim 0:b3430a613781 408 | be OK. Slower clocks will require longer delays.
wim 0:b3430a613781 409 |
wim 0:b3430a613781 410 | Note that some displays such as the Siemens HDSP2111
wim 0:b3430a613781 411 | appear to take longer than the official 4.5 seconds
wim 0:b3430a613781 412 | so it is advisable to wait for longer (say 6 seconds)
wim 0:b3430a613781 413 | before checking the result. Attempting to access the
wim 0:b3430a613781 414 | display before it is ready may result in the self test
wim 0:b3430a613781 415 | status failing to clear down.
wim 0:b3430a613781 416 |
wim 0:b3430a613781 417 | Also note that some display datasheets suggest that
wim 0:b3430a613781 418 | the display must be reset BEFORE running the self
wim 0:b3430a613781 419 | test routine, so this routine does this.
wim 0:b3430a613781 420 |
wim 0:b3430a613781 421 | Parameters: None
wim 0:b3430a613781 422 |
wim 0:b3430a613781 423 | Returns: Nothing
wim 0:b3430a613781 424 |
wim 0:b3430a613781 425 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 426
wim 0:b3430a613781 427 void HDSP253X_Display::start_self_test(void) {
wim 0:b3430a613781 428
wim 0:b3430a613781 429 // Reset the display to ensure it is ready for the self test
wim 0:b3430a613781 430 reset();
wim 0:b3430a613781 431
wim 0:b3430a613781 432 // Directly write the self test request, as control word is wiped at end
wim 0:b3430a613781 433 _write(HDSP253X_ADDR_CTRL_WORD, HDSP253X_CTRL_SELFTEST_MASK);
wim 0:b3430a613781 434 }
wim 0:b3430a613781 435
wim 0:b3430a613781 436 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 437 |
wim 0:b3430a613781 438 | Function: HDSP253X_finish_self_test
wim 0:b3430a613781 439 |
wim 0:b3430a613781 440 | Description: Reads the control register to determine the self test
wim 0:b3430a613781 441 | result. Then issues a display reset to ensure
wim 0:b3430a613781 442 | that it is ready for operation afterwards. While such
wim 0:b3430a613781 443 | a reset should not be necessary if an adequate delay
wim 0:b3430a613781 444 | occurs between starting the self test and checking the
wim 0:b3430a613781 445 | result, issuing a reset guarantees that the display will
wim 0:b3430a613781 446 | be ready for operation. This also means that this function
wim 0:b3430a613781 447 | can be called early to prematurely terminate a self test.
wim 0:b3430a613781 448 |
wim 0:b3430a613781 449 | Parameters: None
wim 0:b3430a613781 450 |
wim 0:b3430a613781 451 | Returns: True if passed, False if failed
wim 0:b3430a613781 452 |
wim 0:b3430a613781 453 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 454
wim 0:b3430a613781 455 bool HDSP253X_Display::finish_self_test(void) {
wim 0:b3430a613781 456 uint8_t ctrl_data;
wim 0:b3430a613781 457 bool result;
wim 0:b3430a613781 458
wim 0:b3430a613781 459 // Read back control word and obtain self test result
wim 0:b3430a613781 460 ctrl_data = _read(HDSP253X_ADDR_CTRL_WORD);
wim 0:b3430a613781 461 result = ((ctrl_data & HDSP253X_CTRL_STRESULT_MASK) != 0);
wim 0:b3430a613781 462
wim 0:b3430a613781 463 // Reset the display to ensure it is ready for normal operation
wim 0:b3430a613781 464 reset();
wim 0:b3430a613781 465
wim 0:b3430a613781 466 // Indicate the self test result
wim 0:b3430a613781 467 return result;
wim 0:b3430a613781 468 }
wim 0:b3430a613781 469
wim 0:b3430a613781 470
wim 0:b3430a613781 471 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 472 |
wim 0:b3430a613781 473 | Function: HDSP253X_set_blink_mode
wim 0:b3430a613781 474 |
wim 0:b3430a613781 475 | Description: Enables or disables the blinking function on the display.
wim 0:b3430a613781 476 | When enabled, blinking will flash the whole display
wim 0:b3430a613781 477 | irrespective of the flash RAM. With the internal clock,
wim 0:b3430a613781 478 | the blink rate is 2Hz. Note that blink mode overrides
wim 0:b3430a613781 479 | the normal flashing mode.
wim 0:b3430a613781 480 |
wim 0:b3430a613781 481 | Parameters: enable - true to enable, false to disable
wim 0:b3430a613781 482 |
wim 0:b3430a613781 483 | Returns: Nothing
wim 0:b3430a613781 484 |
wim 0:b3430a613781 485 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 486
wim 0:b3430a613781 487 void HDSP253X_Display::set_blink_mode(bool enable) {
wim 0:b3430a613781 488 uint8_t ctrl_data;
wim 0:b3430a613781 489
wim 0:b3430a613781 490 // read in control word, modify and write back out
wim 0:b3430a613781 491 ctrl_data = _read(HDSP253X_ADDR_CTRL_WORD);
wim 0:b3430a613781 492 if (enable) {
wim 0:b3430a613781 493 ctrl_data |= HDSP253X_CTRL_BLINK_MASK;
wim 0:b3430a613781 494 }
wim 0:b3430a613781 495 else {
wim 0:b3430a613781 496 ctrl_data &= ~HDSP253X_CTRL_BLINK_MASK;
wim 0:b3430a613781 497 }
wim 0:b3430a613781 498 _write(HDSP253X_ADDR_CTRL_WORD, ctrl_data);
wim 0:b3430a613781 499 }
wim 0:b3430a613781 500
wim 0:b3430a613781 501 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 502 |
wim 0:b3430a613781 503 | Function: HDSP253X_set_flash_mode
wim 0:b3430a613781 504 |
wim 0:b3430a613781 505 | Description: Enables or disables the flashing function on the display.
wim 0:b3430a613781 506 | When enabled, characters with the flashing bit set in the
wim 0:b3430a613781 507 | RAM will flash. With the internal clock, the flash rate is 2Hz.
wim 0:b3430a613781 508 |
wim 0:b3430a613781 509 | Parameters: enable - true to enable, false to disable
wim 0:b3430a613781 510 |
wim 0:b3430a613781 511 | Returns: Nothing
wim 0:b3430a613781 512 |
wim 0:b3430a613781 513 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 514
wim 0:b3430a613781 515 void HDSP253X_Display::set_flash_mode(bool enable) {
wim 0:b3430a613781 516 uint8_t ctrl_data;
wim 0:b3430a613781 517
wim 0:b3430a613781 518 // read in control word, modify and write back out
wim 0:b3430a613781 519 ctrl_data = _read(HDSP253X_ADDR_CTRL_WORD);
wim 0:b3430a613781 520 if (enable) {
wim 0:b3430a613781 521 ctrl_data |= HDSP253X_CTRL_FLASH_MASK;
wim 0:b3430a613781 522 }
wim 0:b3430a613781 523 else {
wim 0:b3430a613781 524 ctrl_data &= ~HDSP253X_CTRL_FLASH_MASK;
wim 0:b3430a613781 525 }
wim 0:b3430a613781 526 _write(HDSP253X_ADDR_CTRL_WORD, ctrl_data);
wim 0:b3430a613781 527 }
wim 0:b3430a613781 528
wim 0:b3430a613781 529 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 530 |
wim 0:b3430a613781 531 | Function: HDSP253X_set_all_flash_states
wim 0:b3430a613781 532 |
wim 0:b3430a613781 533 | Description: Sets flashing states of all characters in flash RAM, using
wim 0:b3430a613781 534 | supplied bit mask. Each bit corresponds to a character
wim 0:b3430a613781 535 | (bit 7 on left, bit 0 on right), and is set to flash and
wim 0:b3430a613781 536 | clear for steady operation. NOTE: The overall flashing
wim 0:b3430a613781 537 | enable/disable state is set by the separate set flash
wim 0:b3430a613781 538 | mode function.
wim 0:b3430a613781 539 |
wim 0:b3430a613781 540 | Parameters: flash_bits - bitmask containing flash states
wim 0:b3430a613781 541 |
wim 0:b3430a613781 542 | Returns: Nothing
wim 0:b3430a613781 543 |
wim 0:b3430a613781 544 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 545
wim 0:b3430a613781 546 void HDSP253X_Display::set_all_flash_states(uint8_t flash_bits)
wim 0:b3430a613781 547 {
wim 0:b3430a613781 548 int i;
wim 0:b3430a613781 549 uint8_t char_pos;
wim 0:b3430a613781 550
wim 0:b3430a613781 551 // loop round all character positions, extracting each bit in turn
wim 0:b3430a613781 552 for (i = 1; i <= HDSP253X_NUM_CHARS; i++)
wim 0:b3430a613781 553 {
wim 0:b3430a613781 554 // Get state of bottom bit from mask and use to adjust flash state
wim 0:b3430a613781 555 // Note that character address is reversed as we start from right
wim 0:b3430a613781 556 char_pos = HDSP253X_NUM_CHARS - i;
wim 0:b3430a613781 557 _write(HDSP253X_ADDR_FLASH_BASE + char_pos, flash_bits & 0x01);
wim 0:b3430a613781 558
wim 0:b3430a613781 559 // Shift the mask to the right, ready for the next go
wim 0:b3430a613781 560 flash_bits >>= 1;
wim 0:b3430a613781 561 }
wim 0:b3430a613781 562 }
wim 0:b3430a613781 563
wim 0:b3430a613781 564 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 565 |
wim 0:b3430a613781 566 | Function: HDSP253X_set_char_flash_state
wim 0:b3430a613781 567 |
wim 0:b3430a613781 568 | Description: Sets flashing state of one character in flash RAM, using
wim 0:b3430a613781 569 | supplied character position and enable state. NOTE: The
wim 0:b3430a613781 570 | overall flashing enable/disable state is set by the
wim 0:b3430a613781 571 | separate set flash mode function.
wim 0:b3430a613781 572 |
wim 0:b3430a613781 573 | Parameters: flash_state - TRUE to flash, FALSE for steady operation
wim 0:b3430a613781 574 | char_pos - position on the display (0 to 7)
wim 0:b3430a613781 575 |
wim 0:b3430a613781 576 | Returns: Nothing
wim 0:b3430a613781 577 |
wim 0:b3430a613781 578 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 579
wim 0:b3430a613781 580 void HDSP253X_Display::set_char_flash_state(bool flash_state, uint8_t char_pos) {
wim 0:b3430a613781 581 // Write out the new flash state to the flash RAM
wim 0:b3430a613781 582 _write(HDSP253X_ADDR_FLASH_BASE + char_pos, flash_state);
wim 0:b3430a613781 583 }
wim 0:b3430a613781 584
wim 0:b3430a613781 585 /*---------------------------------------------------------------------------*\
wim 0:b3430a613781 586 |
wim 0:b3430a613781 587 | Function: HDSP253X_define_user_char
wim 0:b3430a613781 588 |
wim 0:b3430a613781 589 | Description: Full definition of UDC, firstly setting the UDC address
wim 0:b3430a613781 590 | to specified character, and then loading all 7 data rows.
wim 0:b3430a613781 591 | Note that for each row, only the bottom 5 bits are used.
wim 0:b3430a613781 592 |
wim 0:b3430a613781 593 | Parameters: udc_char_num - number of UDC character, from 0 to 15
wim 0:b3430a613781 594 | row_data_1 - top row data
wim 0:b3430a613781 595 | row_data_2 - second row data
wim 0:b3430a613781 596 | row_data_3 - third row data
wim 0:b3430a613781 597 | row_data_4 - fourth row data
wim 0:b3430a613781 598 | row_data_5 - fifth row data
wim 0:b3430a613781 599 | row_data_6 - sixth row data
wim 0:b3430a613781 600 | row_data_7 - bottomp row data
wim 0:b3430a613781 601 |
wim 0:b3430a613781 602 | Returns: Nothing
wim 0:b3430a613781 603 |
wim 0:b3430a613781 604 \*---------------------------------------------------------------------------*/
wim 0:b3430a613781 605
wim 0:b3430a613781 606 void HDSP253X_Display::define_user_char(uint8_t udc_char_num, uint8_t row_data_1, uint8_t row_data_2,
wim 0:b3430a613781 607 uint8_t row_data_3, uint8_t row_data_4, uint8_t row_data_5,
wim 0:b3430a613781 608 uint8_t row_data_6, uint8_t row_data_7)
wim 0:b3430a613781 609 {
wim 0:b3430a613781 610 // firstly set the UDC character address, by writing to the UDC addr reg
wim 0:b3430a613781 611 _write(HDSP253X_ADDR_UDC_ADDRESS, udc_char_num);
wim 0:b3430a613781 612
wim 0:b3430a613781 613 // now write out the 7 rows to the UDC RAM
wim 0:b3430a613781 614 _write(HDSP253X_ADDR_UDC_ROW_BASE+0, row_data_1);
wim 0:b3430a613781 615 _write(HDSP253X_ADDR_UDC_ROW_BASE+1, row_data_2);
wim 0:b3430a613781 616 _write(HDSP253X_ADDR_UDC_ROW_BASE+2, row_data_3);
wim 0:b3430a613781 617 _write(HDSP253X_ADDR_UDC_ROW_BASE+3, row_data_4);
wim 0:b3430a613781 618 _write(HDSP253X_ADDR_UDC_ROW_BASE+4, row_data_5);
wim 0:b3430a613781 619 _write(HDSP253X_ADDR_UDC_ROW_BASE+5, row_data_6);
wim 0:b3430a613781 620 _write(HDSP253X_ADDR_UDC_ROW_BASE+6, row_data_7);
wim 0:b3430a613781 621 }
wim 0:b3430a613781 622
wim 0:b3430a613781 623
wim 0:b3430a613781 624 /*****************************************************************************/
wim 0:b3430a613781 625 /****************************** END OF FILE ********************************/
wim 0:b3430a613781 626 /*****************************************************************************/
wim 0:b3430a613781 627