arm_power_q31.c

00001 /* ----------------------------------------------------------------------
00002  * Project:      CMSIS DSP Library
00003  * Title:        arm_power_q31.c
00004  * Description:  Sum of the squares of the elements of a Q31 vector
00005  *
00006  * $Date:        27. January 2017
00007  * $Revision:    V.1.5.1
00008  *
00009  * Target Processor: Cortex-M cores
00010  * -------------------------------------------------------------------- */
00011 /*
00012  * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
00013  *
00014  * SPDX-License-Identifier: Apache-2.0
00015  *
00016  * Licensed under the Apache License, Version 2.0 (the License); you may
00017  * not use this file except in compliance with the License.
00018  * You may obtain a copy of the License at
00019  *
00020  * www.apache.org/licenses/LICENSE-2.0
00021  *
00022  * Unless required by applicable law or agreed to in writing, software
00023  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
00024  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00025  * See the License for the specific language governing permissions and
00026  * limitations under the License.
00027  */
00028 
00029 #include "arm_math.h"
00030 
00031 /**
00032  * @ingroup groupStats
00033  */
00034 
00035 /**
00036  * @addtogroup power
00037  * @{
00038  */
00039 
00040 /**
00041  * @brief Sum of the squares of the elements of a Q31 vector.
00042  * @param[in]       *pSrc points to the input vector
00043  * @param[in]       blockSize length of the input vector
00044  * @param[out]      *pResult sum of the squares value returned here
00045  * @return none.
00046  *
00047  * @details
00048  * <b>Scaling and Overflow Behavior:</b>
00049  *
00050  * \par
00051  * The function is implemented using a 64-bit internal accumulator.
00052  * The input is represented in 1.31 format.
00053  * Intermediate multiplication yields a 2.62 format, and this
00054  * result is truncated to 2.48 format by discarding the lower 14 bits.
00055  * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
00056  * With 15 guard bits in the accumulator, there is no risk of overflow, and the
00057  * full precision of the intermediate multiplication is preserved.
00058  * Finally, the return result is in 16.48 format.
00059  *
00060  */
00061 
00062 void arm_power_q31(
00063   q31_t * pSrc,
00064   uint32_t blockSize,
00065   q63_t * pResult)
00066 {
00067   q63_t sum = 0;                                 /* Temporary result storage */
00068   q31_t in;
00069   uint32_t blkCnt;                               /* loop counter */
00070 
00071 
00072 #if defined (ARM_MATH_DSP)
00073   /* Run the below code for Cortex-M4 and Cortex-M3 */
00074 
00075   /*loop Unrolling */
00076   blkCnt = blockSize >> 2U;
00077 
00078   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00079    ** a second loop below computes the remaining 1 to 3 samples. */
00080   while (blkCnt > 0U)
00081   {
00082     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00083     /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */
00084     in = *pSrc++;
00085     sum += ((q63_t) in * in) >> 14U;
00086 
00087     in = *pSrc++;
00088     sum += ((q63_t) in * in) >> 14U;
00089 
00090     in = *pSrc++;
00091     sum += ((q63_t) in * in) >> 14U;
00092 
00093     in = *pSrc++;
00094     sum += ((q63_t) in * in) >> 14U;
00095 
00096     /* Decrement the loop counter */
00097     blkCnt--;
00098   }
00099 
00100   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00101    ** No loop unrolling is used. */
00102   blkCnt = blockSize % 0x4U;
00103 
00104 #else
00105   /* Run the below code for Cortex-M0 */
00106 
00107   /* Loop over blockSize number of values */
00108   blkCnt = blockSize;
00109 
00110 #endif /* #if defined (ARM_MATH_DSP) */
00111 
00112   while (blkCnt > 0U)
00113   {
00114     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00115     /* Compute Power and then store the result in a temporary variable, sum. */
00116     in = *pSrc++;
00117     sum += ((q63_t) in * in) >> 14U;
00118 
00119     /* Decrement the loop counter */
00120     blkCnt--;
00121   }
00122 
00123   /* Store the results in 16.48 format  */
00124   *pResult = sum;
00125 }
00126 
00127 /**
00128  * @} end of power group
00129  */
00130