arm_mean_q15.c

00001 /* ----------------------------------------------------------------------
00002  * Project:      CMSIS DSP Library
00003  * Title:        arm_mean_q15.c
00004  * Description:  Mean value of a Q15 vector
00005  *
00006  * $Date:        27. January 2017
00007  * $Revision:    V.1.5.1
00008  *
00009  * Target Processor: Cortex-M cores
00010  * -------------------------------------------------------------------- */
00011 /*
00012  * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
00013  *
00014  * SPDX-License-Identifier: Apache-2.0
00015  *
00016  * Licensed under the Apache License, Version 2.0 (the License); you may
00017  * not use this file except in compliance with the License.
00018  * You may obtain a copy of the License at
00019  *
00020  * www.apache.org/licenses/LICENSE-2.0
00021  *
00022  * Unless required by applicable law or agreed to in writing, software
00023  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
00024  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00025  * See the License for the specific language governing permissions and
00026  * limitations under the License.
00027  */
00028 
00029 #include "arm_math.h"
00030 
00031 /**
00032  * @ingroup groupStats
00033  */
00034 
00035 /**
00036  * @addtogroup mean
00037  * @{
00038  */
00039 
00040 
00041 /**
00042  * @brief Mean value of a Q15 vector.
00043  * @param[in]       *pSrc points to the input vector
00044  * @param[in]       blockSize length of the input vector
00045  * @param[out]      *pResult mean value returned here
00046  * @return none.
00047  *
00048  * @details
00049  * <b>Scaling and Overflow Behavior:</b>
00050  * \par
00051  * The function is implemented using a 32-bit internal accumulator.
00052  * The input is represented in 1.15 format and is accumulated in a 32-bit
00053  * accumulator in 17.15 format.
00054  * There is no risk of internal overflow with this approach, and the
00055  * full precision of intermediate result is preserved.
00056  * Finally, the accumulator is saturated and truncated to yield a result of 1.15 format.
00057  *
00058  */
00059 
00060 void arm_mean_q15(
00061   q15_t * pSrc,
00062   uint32_t blockSize,
00063   q15_t * pResult)
00064 {
00065   q31_t sum = 0;                                 /* Temporary result storage */
00066   uint32_t blkCnt;                               /* loop counter */
00067 
00068 #if defined (ARM_MATH_DSP)
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070 
00071   q31_t in;
00072 
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2U;
00075 
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while (blkCnt > 0U)
00079   {
00080     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00081     in = *__SIMD32(pSrc)++;
00082     sum += ((in << 16U) >> 16U);
00083     sum +=  (in >> 16U);
00084     in = *__SIMD32(pSrc)++;
00085     sum += ((in << 16U) >> 16U);
00086     sum +=  (in >> 16U);
00087 
00088     /* Decrement the loop counter */
00089     blkCnt--;
00090   }
00091 
00092   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00093    ** No loop unrolling is used. */
00094   blkCnt = blockSize % 0x4U;
00095 
00096 #else
00097   /* Run the below code for Cortex-M0 */
00098 
00099   /* Loop over blockSize number of values */
00100   blkCnt = blockSize;
00101 
00102 #endif /* #if defined (ARM_MATH_DSP) */
00103 
00104   while (blkCnt > 0U)
00105   {
00106     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00107     sum += *pSrc++;
00108 
00109     /* Decrement the loop counter */
00110     blkCnt--;
00111   }
00112 
00113   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
00114   /* Store the result to the destination */
00115   *pResult = (q15_t) (sum / (q31_t)blockSize);
00116 }
00117 
00118 /**
00119  * @} end of mean group
00120  */
00121