LPC1768 and LPC11U24 watchdog timer
Dependents: GSwifi_tsutenkaku barometer-m0 BMAGThrRev
Revision 3:b1efde09d8a7, committed 2016-05-25
- Comitter:
- okini3939
- Date:
- Wed May 25 08:52:32 2016 +0000
- Parent:
- 2:f6f05e2eafd0
- Commit message:
- supported LPC8XX
Changed in this revision
WDT.cpp | Show annotated file Show diff for this revision Revisions of this file |
WDT.h | Show annotated file Show diff for this revision Revisions of this file |
diff -r f6f05e2eafd0 -r b1efde09d8a7 WDT.cpp --- a/WDT.cpp Fri Jul 11 00:53:14 2014 +0000 +++ b/WDT.cpp Wed May 25 08:52:32 2016 +0000 @@ -12,10 +12,17 @@ LPC_WDT->WDTC = s * (float)clk; LPC_WDT->WDMOD = 0x03; // Enabled and Reset #elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11UXX) - LPC_WWDT->CLKSEL = 0x01; // Set CLK src to PCLK - uint32_t clk = SystemCoreClock / 16; // WD has a fixed /4 prescaler, PCLK default is /4 + LPC_WWDT->CLKSEL = 0x01; // Set CLK src to WDOSC + uint32_t clk = 500000 / 64 / 4; // WD has a fixed /4 prescaler, WDOSC default is /4 LPC_WWDT->TC = s * (float)clk; LPC_WWDT->MOD = 0x03; // Enabled and Reset +#elif defined(TARGET_LPC81X) || defined(TARGET_LPC82X) + LPC_SYSCON->WDTOSCCTRL = (0xA << 5); // wdt_osc_clk = Fclkana/2, Fclkana = 3.5MHz + LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 17); // Enable Clock WWDT + LPC_SYSCON->PDRUNCFG &= ~(1 << 6); // Enable Power WDTOSC_PD + uint32_t clk = ((3500000 / 2) / 4); // COUNT = wdt_osc_clk/4 + LPC_WWDT->TC = s * (float)clk; + LPC_WWDT->MOD = 0x3; // Enabled and Reset #endif kick(); } @@ -29,6 +36,9 @@ #elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11UXX) LPC_WWDT->FEED = 0xAA; LPC_WWDT->FEED = 0x55; +#elif defined(TARGET_LPC81X) || defined(TARGET_LPC82X) + LPC_WWDT->FEED = 0xAA; + LPC_WWDT->FEED = 0x55; #endif __enable_irq(); } @@ -38,6 +48,8 @@ return LPC_WDT->WDMOD & (1<<2) ? 1 : 0; #elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11UXX) return LPC_WWDT->MOD & (1<<2) ? 1 : 0; +#elif defined(TARGET_LPC81X) || defined(TARGET_LPC82X) + return LPC_WWDT->MOD & (1<<2) ? 1 : 0; #endif } @@ -55,13 +67,23 @@ LPC_SYSCON->PDRUNCFG &= ~(1<<6); // WDT on LPC_SYSCON->WDTOSCCTRL = (1<<5)|(0x1f<<0); // 500kHz / 64 - LPC_WWDT->CLKSEL = (1<<0); // Set CLK src to PCLK - uint32_t clk = 500000 / 64 / 4; // WD has a fixed /4 prescaler, PCLK default is /4 + LPC_WWDT->CLKSEL = (1<<0); // Set CLK src to WDOSC + uint32_t clk = 500000 / 64 / 4; // WD has a fixed /4 prescaler, WDOSC default is /4 LPC_WWDT->TC = s * (float)clk; LPC_WWDT->WARNINT = 0; LPC_WWDT->MOD = 0x01; // Enabled but Reset disable kick(); LPC_SYSCON->STARTERP1 |= (1<<12); +#elif defined(TARGET_LPC81X) || defined(TARGET_LPC82X) + LPC_SYSCON->WDTOSCCTRL = (0xA << 5); // wdt_osc_clk = Fclkana/2, Fclkana = 3.5MHz + LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 17); // Enable Clock WWDT + LPC_SYSCON->PDRUNCFG &= ~(1 << 6); // Enable Power WDTOSC_PD + uint32_t clk = ((3500000 / 2) / 4); // COUNT = wdt_osc_clk/4 + LPC_WWDT->TC = s * (float)clk; + LPC_WWDT->WARNINT = 0; + LPC_WWDT->MOD = 0x1; // Enabled and Reset + kick(); + LPC_SYSCON->STARTERP1 |= (1<<12); #endif NVIC_SetVector(WDT_IRQn, (uint32_t)&Watchdog::isr_wdt); NVIC_ClearPendingIRQ(WDT_IRQn); @@ -83,6 +105,9 @@ #elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11UXX) LPC_WWDT->MOD |= (1<<3); LPC_WWDT->MOD &= ~(1<<2); +#elif defined(TARGET_LPC81X) || defined(TARGET_LPC82X) + LPC_WWDT->MOD |= (1<<3); + LPC_WWDT->MOD &= ~(1<<2); #endif _fptr.call(); } @@ -92,6 +117,8 @@ LPC_SC->PCON = 0; #elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11UXX) LPC_PMU->PCON = 0; +#elif defined(TARGET_LPC81X) || defined(TARGET_LPC82X) + LPC_PMU->PCON = 0; #endif SCB->SCR &= ~(1<<2); __WFI(); @@ -106,7 +133,31 @@ LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG; LPC_PMU->PCON &= ~(7<<0); LPC_PMU->PCON |= (1<<0); +#elif defined(TARGET_LPC81X) || defined(TARGET_LPC82X) + LPC_SYSCON->PDSLEEPCFG &= ~(1<<6); // WDT on + LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG; + LPC_PMU->PCON &= ~(7<<0); + LPC_PMU->PCON |= (1<<0); #endif SCB->SCR |= (1<<2); __WFI(); } + +void Watchdog::powerDown () { +#if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) + LPC_SC->PCON &= ~(7<<0); + LPC_SC->PCON |= (2<<0); +#elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11UXX) + LPC_SYSCON->PDSLEEPCFG &= ~(1<<6); // WDT on + LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG; + LPC_PMU->PCON &= ~(7<<0); + LPC_PMU->PCON = (2<<0); +#elif defined(TARGET_LPC81X) || defined(TARGET_LPC82X) + LPC_SYSCON->PDSLEEPCFG &= ~(1<<6); // WDT on + LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG; + LPC_PMU->PCON &= ~(7<<0); + LPC_PMU->PCON = (2<<0); +#endif + SCB->SCR |= (1<<2); + __WFI(); +}
diff -r f6f05e2eafd0 -r b1efde09d8a7 WDT.h --- a/WDT.h Fri Jul 11 00:53:14 2014 +0000 +++ b/WDT.h Wed May 25 08:52:32 2016 +0000 @@ -22,6 +22,7 @@ void sleep (); void deepSleep (); + void powerDown (); private: static FunctionPointer _fptr;