My forked repository. DISCO_F407VG, DISCO_F303VC, DISCO_F051R8 and DISCO_F100RB maybe added.
Dependents: FastPWM-DISCO-test
Fork of FastPWM by
FastPWM_STM_TIM_PinOut.cpp
00001 #include "mbed.h" 00002 00003 #if defined (TARGET_NUCLEO_F030R8) || (TARGET_DISCO_F051R8) 00004 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { 00005 switch (pin) { 00006 // Channels 1 00007 case PA_4: case PA_6: case PB_1: case PB_4: case PB_8: case PB_9: case PB_14: case PC_6: case PB_6: case PB_7: 00008 return &pwm->CCR1; 00009 00010 // Channels 2 00011 case PA_7: case PB_5: case PC_7: 00012 return &pwm->CCR2; 00013 00014 // Channels 3 00015 case PB_0: case PC_8: 00016 return &pwm->CCR3; 00017 00018 // Channels 4 00019 case PC_9: 00020 return &pwm->CCR4; 00021 default: 00022 /* NOP */ 00023 break; 00024 } 00025 return NULL; 00026 } 00027 #endif 00028 00029 #if defined TARGET_NUCLEO_F401RE || defined TARGET_NUCLEO_F411RE 00030 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { 00031 switch (pin) { 00032 // Channels 1 : PWMx/1 00033 case PA_0: case PA_5: case PA_6: case PA_8: case PA_15: case PB_4: case PB_6: case PC_6: case PA_7: case PB_13: 00034 return &pwm->CCR1; 00035 00036 // Channels 2 : PWMx/2 00037 case PA_1: case PA_9: case PB_3: case PB_5: case PB_7: case PC_7: case PB_0: case PB_14: 00038 return &pwm->CCR2; 00039 00040 // Channels 3 : PWMx/3 00041 case PA_2: case PA_10: case PB_8: case PB_10: case PC_8: case PB_1: case PB_15: 00042 return &pwm->CCR3; 00043 00044 // Channels 4 : PWMx/4 00045 case PA_3: case PA_11: case PB_9: case PC_9: 00046 return &pwm->CCR4; 00047 default: 00048 /* NOP */ 00049 break; 00050 } 00051 return NULL; 00052 } 00053 #endif 00054 00055 #if defined (TARGET_NUCLEO_F103RB) || (TARGET_DISCO_F100RB) 00056 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { 00057 switch (pin) { 00058 // Channels 1 : PWMx/1 00059 case PA_6: case PA_8: case PA_15: case PB_4: case PC_6: case PB_13: 00060 return &pwm->CCR1; 00061 00062 // Channels 2 : PWMx/2 00063 case PA_1: case PA_7: case PA_9: case PB_3: case PB_5: case PC_7: case PB_14: 00064 return &pwm->CCR2; 00065 00066 // Channels 3 : PWMx/3 00067 case PA_2: case PA_10: case PB_0: case PB_10: case PC_8: case PB_15: 00068 return &pwm->CCR3; 00069 00070 // Channels 4 : PWMx/4 00071 case PA_3: case PA_11: case PB_1: case PB_11: case PC_9: 00072 return &pwm->CCR4; 00073 default: 00074 /* NOP */ 00075 break; 00076 } 00077 return NULL; 00078 } 00079 #endif 00080 00081 #ifdef TARGET_NUCLEO_F334R8 00082 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { 00083 switch (pin) { 00084 // Channels 1 00085 case PA_2: case PA_6: case PA_7: case PA_8: case PA_12: case PB_4: case PB_5: case PB_8: case PB_9: case PB_14: case PC_0: case PC_6: 00086 case PA_1: case PA_13: case PB_6: case PB_13: case PC_13: 00087 return &pwm->CCR1; 00088 00089 // Channels 2 00090 case PA_3: case PA_4: case PA_9: case PB_15: case PC_1: case PC_7: 00091 return &pwm->CCR2; 00092 00093 // Channels 3 00094 case PA_10: case PB_0: case PC_2: case PC_8: 00095 case PF_0: 00096 return &pwm->CCR3; 00097 00098 // Channels 4 00099 case PA_11: case PB_1: case PB_7: case PC_3: case PC_9: 00100 return &pwm->CCR4; 00101 default: 00102 /* NOP */ 00103 break; 00104 } 00105 return NULL; 00106 } 00107 #endif 00108 00109 #if defined TARGET_NUCLEO_F072RB 00110 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { 00111 switch (pin) { 00112 // Channels 1 : PWMx/1 00113 case PA_2: case PA_6: case PA_4: case PA_7: case PA_8: case PB_1: case PB_4: case PB_8: case PB_9: case PB_14: case PC_6: 00114 // Channels 1N : PWMx/1N 00115 case PA_1: case PB_6: case PB_7: case PB_13: 00116 return &pwm->CCR1; 00117 00118 // Channels 2 : PWMx/2 00119 case PA_3: case PA_9: case PB_5: case PC_7: case PB_15: 00120 return &pwm->CCR2; 00121 00122 // Channels 3 : PWMx/3 00123 case PA_10: case PB_0: case PC_8: 00124 return &pwm->CCR3; 00125 00126 // Channels 4 : PWMx/4 00127 case PA_11: case PC_9: 00128 return &pwm->CCR4; 00129 default: 00130 /* NOP */ 00131 break; 00132 } 00133 return NULL; 00134 } 00135 #endif 00136 00137 #if defined (TARGET_NUCLEO_L152RE) 00138 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { 00139 switch (pin) { 00140 // Channels 1 : PWMx/1 00141 case PA_6: case PB_4: case PB_12: case PB_13: case PC_6: 00142 return &pwm->CCR1; 00143 00144 // Channels 2 : PWMx/2 00145 case PA_1: case PA_7: case PB_3: case PB_5: case PB_14: case PB_7: case PC_7: 00146 return &pwm->CCR2; 00147 00148 // Channels 3 : PWMx/3 00149 case PA_2: case PB_0: case PB_8: case PB_10: case PC_8: 00150 return &pwm->CCR3; 00151 00152 // Channels 4 : PWMx/4 00153 case PA_3: case PB_1:case PB_9: case PB_11: case PC_9: 00154 return &pwm->CCR4; 00155 default: 00156 /* NOP */ 00157 break; 00158 } 00159 return NULL; 00160 } 00161 #endif 00162 00163 #ifdef TARGET_DISCO_F303VC 00164 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { 00165 switch (pin) { 00166 // Channels 1 00167 case PA_1: case PA_2: case PA_6: case PA_7: case PA_8: case PA_12: case PA_13: 00168 case PB_3: case PB_4: case PB_5: case PB_6: case PB_7: case PB_8: case PB_9: case PB_13: case PB_14: 00169 case PC_6: case PC_10: 00170 case PD_12: 00171 case PE_0:case PE_1:case PE_2:case PE_8:case PE_9: 00172 return &pwm->CCR1; 00173 00174 // Channels 2 00175 case PA_3: case PA_4: case PA_9: case PA_14: 00176 case PB_0:case PB_15: 00177 case PC_7: 00178 case PD_13: 00179 case PE_3: case PE_10: case PE_11: 00180 return &pwm->CCR2; 00181 00182 // Channels 3 00183 case PA_10: 00184 case PB_1: 00185 case PC_8: case PC_12: 00186 case PD_14: 00187 case PE_4: case PE_12: case PE_13: 00188 case PF_0: 00189 return &pwm->CCR3; 00190 00191 // Channels 4 00192 case PA_11: 00193 case PC_9: case PC_13: 00194 case PD_1: case PD_15: 00195 case PE_5: case PE_14: 00196 return &pwm->CCR4; 00197 default: 00198 /* NOP */ 00199 break; 00200 } 00201 return NULL; 00202 } 00203 #endif 00204 00205 #if defined TARGET_DISCO_F407VG 00206 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { 00207 switch (pin) { 00208 // Channels 1 : PWMx/1 00209 case PA_0: case PA_5: case PA_6: case PA_7: case PA_8: case PA_15: 00210 case PB_4: case PB_6: case PB_13: 00211 case PC_6: 00212 case PD_12: 00213 case PE_5: case PE_8: case PE_9: 00214 case PF_6: case PF_7: case PF_8: case PF_9: 00215 case PH_13: 00216 case PI_5: 00217 return &pwm->CCR1; 00218 00219 // Channels 2 : PWMx/2 00220 case PA_1: case PA_9: 00221 case PB_0: case PB_3: case PB_5: case PB_7: case PB_14: 00222 case PC_7: 00223 case PD_13: 00224 case PE_6: case PE_10: case PE_11: 00225 case PH_14: 00226 case PI_6: 00227 return &pwm->CCR2; 00228 00229 // Channels 3 : PWMx/3 00230 case PA_2: case PA_10: 00231 case PB_1: case PB_8: case PB_10: case PB_15: 00232 case PC_8: 00233 case PD_14: 00234 case PE_12: case PE_13: 00235 case PH_15: 00236 case PI_7: 00237 return &pwm->CCR3; 00238 00239 // Channels 4 : PWMx/4 00240 case PA_3: case PA_11: 00241 case PB_9: case PB_11: 00242 case PC_9: 00243 case PD_15: 00244 case PE_14: 00245 case PI_2: 00246 return &pwm->CCR4; 00247 default: 00248 /* NOP */ 00249 break; 00250 } 00251 return NULL; 00252 } 00253 #endif 00254
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