DDS AD9854, library to configure a AD9854 Serial Interface (SPI)
Dependents: JRO_DDSv2 JRO_DDSv2_rev2019
AD9854.h@1:d81fca2297fb, 2019-09-04 (annotated)
- Committer:
- miguelcordero191
- Date:
- Wed Sep 04 22:26:24 2019 +0000
- Revision:
- 1:d81fca2297fb
- Parent:
- 0:156a9e15919e
04/09/2019
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
miguelcordero191 | 0:156a9e15919e | 1 | #ifndef AD9854_SER_DRIVER |
miguelcordero191 | 0:156a9e15919e | 2 | #define AD9854_SER_DRIVER |
miguelcordero191 | 0:156a9e15919e | 3 | |
miguelcordero191 | 0:156a9e15919e | 4 | #include "mbed.h" |
miguelcordero191 | 0:156a9e15919e | 5 | #include "SerialDriver.h" |
miguelcordero191 | 0:156a9e15919e | 6 | |
miguelcordero191 | 0:156a9e15919e | 7 | #define SPI_BITS 8 |
miguelcordero191 | 0:156a9e15919e | 8 | #define SPI_MODE 0 |
miguelcordero191 | 0:156a9e15919e | 9 | #define SPI_FREQ 1000000 |
miguelcordero191 | 0:156a9e15919e | 10 | |
miguelcordero191 | 1:d81fca2297fb | 11 | #define DDS_CMD_STATUS 0X04 |
miguelcordero191 | 1:d81fca2297fb | 12 | |
miguelcordero191 | 0:156a9e15919e | 13 | #define DDS_CMD_RESET 0X10 |
miguelcordero191 | 0:156a9e15919e | 14 | #define DDS_CMD_ENABLE_RF 0x11 |
miguelcordero191 | 0:156a9e15919e | 15 | #define DDS_CMD_MULTIPLIER 0X12 |
miguelcordero191 | 0:156a9e15919e | 16 | #define DDS_CMD_MODE 0x13 |
miguelcordero191 | 0:156a9e15919e | 17 | #define DDS_CMD_FREQUENCYA 0X14 |
miguelcordero191 | 0:156a9e15919e | 18 | #define DDS_CMD_FREQUENCYB 0x15 |
miguelcordero191 | 0:156a9e15919e | 19 | #define DDS_CMD_PHASEA 0X16 |
miguelcordero191 | 0:156a9e15919e | 20 | #define DDS_CMD_PHASEB 0x17 |
miguelcordero191 | 0:156a9e15919e | 21 | #define DDS_CMD_AMPLITUDE1 0X18 |
miguelcordero191 | 0:156a9e15919e | 22 | #define DDS_CMD_AMPLITUDE2 0x19 |
miguelcordero191 | 1:d81fca2297fb | 23 | #define DDS_CMD_ENABLE_AMP 0x1A |
miguelcordero191 | 1:d81fca2297fb | 24 | #define DDS_CMD_AMP_RAMP_RATE 0x1B |
miguelcordero191 | 1:d81fca2297fb | 25 | #define DDS_CMD_DELTA_FREQ 0x1C |
miguelcordero191 | 1:d81fca2297fb | 26 | #define DDS_CMD_UPD_CLOCK 0x1D |
miguelcordero191 | 1:d81fca2297fb | 27 | #define DDS_CMD_RAMP_RATE_CLOCK 0x1E |
miguelcordero191 | 1:d81fca2297fb | 28 | |
miguelcordero191 | 1:d81fca2297fb | 29 | #define DDS_CMD_WRITE 0x50 |
miguelcordero191 | 0:156a9e15919e | 30 | #define DDS_CMD_READ 0x8000 |
miguelcordero191 | 0:156a9e15919e | 31 | |
miguelcordero191 | 1:d81fca2297fb | 32 | #define MSG_CMD_KO "0:Command not recognized" |
miguelcordero191 | 1:d81fca2297fb | 33 | #define MSG_CMD_OK "1:Configuration received and saved" |
miguelcordero191 | 1:d81fca2297fb | 34 | |
miguelcordero191 | 1:d81fca2297fb | 35 | #define MSG_STATUS_FAIL "0:DDS Clock not connected" |
miguelcordero191 | 1:d81fca2297fb | 36 | #define MSG_STATUS_ON "1:DDS was not programmed" |
miguelcordero191 | 1:d81fca2297fb | 37 | #define MSG_STATUS_RF_DIS "2:RF disabled" |
miguelcordero191 | 1:d81fca2297fb | 38 | #define MSG_STATUS_RF_ENA "3:RF enabled" |
miguelcordero191 | 1:d81fca2297fb | 39 | |
miguelcordero191 | 1:d81fca2297fb | 40 | #define MSG_DISABLED "0:ENABLED" |
miguelcordero191 | 1:d81fca2297fb | 41 | #define MSG_ENABLED "1:DISABLED" |
miguelcordero191 | 1:d81fca2297fb | 42 | |
miguelcordero191 | 1:d81fca2297fb | 43 | |
miguelcordero191 | 0:156a9e15919e | 44 | class DDS{ |
miguelcordero191 | 0:156a9e15919e | 45 | private: |
miguelcordero191 | 0:156a9e15919e | 46 | float clock; // Work frequency in MHz |
miguelcordero191 | 0:156a9e15919e | 47 | char cr_multiplier; // Multiplier 4- 20 |
miguelcordero191 | 0:156a9e15919e | 48 | char cr_mode; // Single, FSK, Ramped FSK, Chirp, BPSK |
miguelcordero191 | 0:156a9e15919e | 49 | bool cr_qdac_pwdn; // Q DAC power down enable: 0 -> disable |
miguelcordero191 | 0:156a9e15919e | 50 | bool cr_ioupdclk; // IO Update clock enable: 0 -> input |
miguelcordero191 | 0:156a9e15919e | 51 | bool cr_inv_sinc; // Inverse sinc filter enable: 0 -> enable |
miguelcordero191 | 0:156a9e15919e | 52 | bool cr_osk_en; // Enable AM: 0 -> disabled |
miguelcordero191 | 0:156a9e15919e | 53 | bool cr_osk_int; // ext/int output shaped control: 0 -> external |
miguelcordero191 | 0:156a9e15919e | 54 | bool cr_msb_lsb; // msb/lsb bit first: 0 -> MSB |
miguelcordero191 | 0:156a9e15919e | 55 | bool cr_sdo; // SDO pin active: 0 -> inactive |
miguelcordero191 | 1:d81fca2297fb | 56 | bool cr_pll_range; |
miguelcordero191 | 1:d81fca2297fb | 57 | bool cr_pll_bypass; |
miguelcordero191 | 1:d81fca2297fb | 58 | |
miguelcordero191 | 1:d81fca2297fb | 59 | bool cr_osk_en_bkp; // Enable AM: 0 -> disabled |
miguelcordero191 | 1:d81fca2297fb | 60 | bool cr_osk_int_bkp; |
miguelcordero191 | 1:d81fca2297fb | 61 | |
miguelcordero191 | 0:156a9e15919e | 62 | char frequency1[6]; |
miguelcordero191 | 0:156a9e15919e | 63 | char frequency2[6]; |
miguelcordero191 | 0:156a9e15919e | 64 | char phase1[2]; |
miguelcordero191 | 0:156a9e15919e | 65 | char phase2[2]; |
miguelcordero191 | 0:156a9e15919e | 66 | char amplitudeI[2]; |
miguelcordero191 | 0:156a9e15919e | 67 | char amplitudeQ[2]; |
miguelcordero191 | 1:d81fca2297fb | 68 | char delta_frequency[6]; |
miguelcordero191 | 1:d81fca2297fb | 69 | char update_clock[4]; |
miguelcordero191 | 1:d81fca2297fb | 70 | char ramp_rate_clock[3]; |
miguelcordero191 | 1:d81fca2297fb | 71 | char amplitude_ramp_rate[1]; |
miguelcordero191 | 1:d81fca2297fb | 72 | |
miguelcordero191 | 0:156a9e15919e | 73 | bool rf_enabled; |
miguelcordero191 | 1:d81fca2297fb | 74 | bool programmed; |
miguelcordero191 | 0:156a9e15919e | 75 | |
miguelcordero191 | 0:156a9e15919e | 76 | double factor_freq1; |
miguelcordero191 | 0:156a9e15919e | 77 | double factor_freq2; |
miguelcordero191 | 0:156a9e15919e | 78 | |
miguelcordero191 | 0:156a9e15919e | 79 | SPI *spi_device; |
miguelcordero191 | 0:156a9e15919e | 80 | //DDS I/O |
miguelcordero191 | 0:156a9e15919e | 81 | DigitalOut *dds_mreset; |
miguelcordero191 | 0:156a9e15919e | 82 | DigitalOut *dds_outramp; |
miguelcordero191 | 0:156a9e15919e | 83 | DigitalOut *dds_sp_mode; |
miguelcordero191 | 0:156a9e15919e | 84 | DigitalOut *dds_cs; |
miguelcordero191 | 0:156a9e15919e | 85 | DigitalOut *dds_io_reset; |
miguelcordero191 | 0:156a9e15919e | 86 | DigitalInOut *dds_updclk; |
miguelcordero191 | 0:156a9e15919e | 87 | |
miguelcordero191 | 0:156a9e15919e | 88 | char* cmd_answer; |
miguelcordero191 | 0:156a9e15919e | 89 | unsigned long cmd_answer_len; |
miguelcordero191 | 0:156a9e15919e | 90 | |
miguelcordero191 | 0:156a9e15919e | 91 | int __writeData(char addr, char ndata, const char* data); |
miguelcordero191 | 0:156a9e15919e | 92 | char* __readData(char addr, char ndata); |
miguelcordero191 | 1:d81fca2297fb | 93 | int __writeDataAndVerify(char addr, char ndata, char* wr_spi_data, SerialDriver *screen=NULL); |
miguelcordero191 | 0:156a9e15919e | 94 | char* __getControlRegister(); |
miguelcordero191 | 0:156a9e15919e | 95 | int __writeControlRegister(); |
miguelcordero191 | 0:156a9e15919e | 96 | |
miguelcordero191 | 0:156a9e15919e | 97 | public: |
miguelcordero191 | 0:156a9e15919e | 98 | bool isConfig; |
miguelcordero191 | 0:156a9e15919e | 99 | |
miguelcordero191 | 0:156a9e15919e | 100 | |
miguelcordero191 | 0:156a9e15919e | 101 | DDS(SPI *spi_dev, DigitalOut *mreset, DigitalOut *outramp, DigitalOut *spmode, DigitalOut *cs, DigitalOut *ioreset, DigitalInOut *updclk); |
miguelcordero191 | 0:156a9e15919e | 102 | int init(); |
miguelcordero191 | 0:156a9e15919e | 103 | int reset(); |
miguelcordero191 | 0:156a9e15919e | 104 | int scanIOUpdate(); |
miguelcordero191 | 0:156a9e15919e | 105 | int find(); |
miguelcordero191 | 0:156a9e15919e | 106 | char* rdMode(); |
miguelcordero191 | 0:156a9e15919e | 107 | char* rdMultiplier(); |
miguelcordero191 | 0:156a9e15919e | 108 | char* rdPhase1(); |
miguelcordero191 | 0:156a9e15919e | 109 | char* rdPhase2(); |
miguelcordero191 | 0:156a9e15919e | 110 | char* rdFrequency1(); |
miguelcordero191 | 0:156a9e15919e | 111 | char* rdFrequency2(); |
miguelcordero191 | 0:156a9e15919e | 112 | char* rdAmplitudeI(); |
miguelcordero191 | 0:156a9e15919e | 113 | char* rdAmplitudeQ(); |
miguelcordero191 | 1:d81fca2297fb | 114 | char* rdDeltaFrequency(); |
miguelcordero191 | 1:d81fca2297fb | 115 | char* rdUpdateClock(); |
miguelcordero191 | 1:d81fca2297fb | 116 | char* rdRampRateClock(); |
miguelcordero191 | 1:d81fca2297fb | 117 | char* rdAmplitudeRampRate(); |
miguelcordero191 | 1:d81fca2297fb | 118 | |
miguelcordero191 | 0:156a9e15919e | 119 | int isRFEnabled(); |
miguelcordero191 | 1:d81fca2297fb | 120 | int isAmplitudeEnabled(); |
miguelcordero191 | 1:d81fca2297fb | 121 | |
miguelcordero191 | 0:156a9e15919e | 122 | int wrMode(char mode); |
miguelcordero191 | 0:156a9e15919e | 123 | int wrMultiplier(char multiplier, float clock=200.0); |
miguelcordero191 | 0:156a9e15919e | 124 | int wrPhase1(char* phase, SerialDriver *screen=NULL); |
miguelcordero191 | 0:156a9e15919e | 125 | int wrPhase2(char* phase, SerialDriver *screen=NULL); |
miguelcordero191 | 0:156a9e15919e | 126 | int wrFrequency1(char* freq, SerialDriver *screen=NULL); |
miguelcordero191 | 0:156a9e15919e | 127 | int wrFrequency2(char* freq, SerialDriver *screen=NULL); |
miguelcordero191 | 0:156a9e15919e | 128 | int wrAmplitudeI(char* amplitude, SerialDriver *screen=NULL); |
miguelcordero191 | 0:156a9e15919e | 129 | int wrAmplitudeQ(char* amplitude, SerialDriver *screen=NULL); |
miguelcordero191 | 1:d81fca2297fb | 130 | int wrDeltaFrequency(char* delta_freq, SerialDriver *screen=NULL); |
miguelcordero191 | 1:d81fca2297fb | 131 | int wrUpdateClock(char* upd_clock, SerialDriver *screen=NULL); |
miguelcordero191 | 1:d81fca2297fb | 132 | int wrRampRateClock(char* rr_clock, SerialDriver *screen=NULL); |
miguelcordero191 | 1:d81fca2297fb | 133 | int wrAmplitudeRampRate(char* ampl_ramp_rate, SerialDriver *screen=NULL); |
miguelcordero191 | 1:d81fca2297fb | 134 | |
miguelcordero191 | 0:156a9e15919e | 135 | int enableRF(); |
miguelcordero191 | 0:156a9e15919e | 136 | int disableRF(); |
miguelcordero191 | 1:d81fca2297fb | 137 | int enableAmplitude(); |
miguelcordero191 | 1:d81fca2297fb | 138 | int disableAmplitude(); |
miguelcordero191 | 1:d81fca2297fb | 139 | |
miguelcordero191 | 0:156a9e15919e | 140 | int defaultSettings(SerialDriver *screen=NULL); |
miguelcordero191 | 0:156a9e15919e | 141 | char* setCommand(unsigned short cmd, char* payload, unsigned long payload_len); |
miguelcordero191 | 0:156a9e15919e | 142 | char* getCmdAnswer(); |
miguelcordero191 | 0:156a9e15919e | 143 | unsigned long getCmdAnswerLen(); |
miguelcordero191 | 1:d81fca2297fb | 144 | |
miguelcordero191 | 0:156a9e15919e | 145 | bool wasInitialized(); |
miguelcordero191 | 0:156a9e15919e | 146 | char getMultiplier(); |
miguelcordero191 | 0:156a9e15919e | 147 | double getFreqFactor1(); |
miguelcordero191 | 0:156a9e15919e | 148 | double getFreqFactor2(); |
miguelcordero191 | 0:156a9e15919e | 149 | char getMode(); |
miguelcordero191 | 0:156a9e15919e | 150 | char* getModeStr(); |
miguelcordero191 | 0:156a9e15919e | 151 | |
miguelcordero191 | 1:d81fca2297fb | 152 | int writeAllDevice(char* payload, SerialDriver *screen=NULL); |
miguelcordero191 | 1:d81fca2297fb | 153 | char* readAllDevice(); |
miguelcordero191 | 1:d81fca2297fb | 154 | |
miguelcordero191 | 0:156a9e15919e | 155 | }; |
miguelcordero191 | 0:156a9e15919e | 156 | |
miguelcordero191 | 0:156a9e15919e | 157 | #endif |