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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_ll_gpio.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
180:96ed750bd169 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 156:95d6b41a828b 1 /**
<> 156:95d6b41a828b 2 ******************************************************************************
<> 156:95d6b41a828b 3 * @file stm32f0xx_ll_gpio.h
<> 156:95d6b41a828b 4 * @author MCD Application Team
<> 156:95d6b41a828b 5 * @brief Header file of GPIO LL module.
<> 156:95d6b41a828b 6 ******************************************************************************
<> 156:95d6b41a828b 7 * @attention
<> 156:95d6b41a828b 8 *
<> 156:95d6b41a828b 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 156:95d6b41a828b 10 *
<> 156:95d6b41a828b 11 * Redistribution and use in source and binary forms, with or without modification,
<> 156:95d6b41a828b 12 * are permitted provided that the following conditions are met:
<> 156:95d6b41a828b 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 156:95d6b41a828b 14 * this list of conditions and the following disclaimer.
<> 156:95d6b41a828b 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 156:95d6b41a828b 16 * this list of conditions and the following disclaimer in the documentation
<> 156:95d6b41a828b 17 * and/or other materials provided with the distribution.
<> 156:95d6b41a828b 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 156:95d6b41a828b 19 * may be used to endorse or promote products derived from this software
<> 156:95d6b41a828b 20 * without specific prior written permission.
<> 156:95d6b41a828b 21 *
<> 156:95d6b41a828b 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 156:95d6b41a828b 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 156:95d6b41a828b 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 156:95d6b41a828b 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 156:95d6b41a828b 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 156:95d6b41a828b 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 156:95d6b41a828b 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 156:95d6b41a828b 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 156:95d6b41a828b 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 156:95d6b41a828b 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 156:95d6b41a828b 32 *
<> 156:95d6b41a828b 33 ******************************************************************************
<> 156:95d6b41a828b 34 */
<> 156:95d6b41a828b 35
<> 156:95d6b41a828b 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 156:95d6b41a828b 37 #ifndef __STM32F0xx_LL_GPIO_H
<> 156:95d6b41a828b 38 #define __STM32F0xx_LL_GPIO_H
<> 156:95d6b41a828b 39
<> 156:95d6b41a828b 40 #ifdef __cplusplus
<> 156:95d6b41a828b 41 extern "C" {
<> 156:95d6b41a828b 42 #endif
<> 156:95d6b41a828b 43
<> 156:95d6b41a828b 44 /* Includes ------------------------------------------------------------------*/
<> 156:95d6b41a828b 45 #include "stm32f0xx.h"
<> 156:95d6b41a828b 46
<> 156:95d6b41a828b 47 /** @addtogroup STM32F0xx_LL_Driver
<> 156:95d6b41a828b 48 * @{
<> 156:95d6b41a828b 49 */
<> 156:95d6b41a828b 50
<> 156:95d6b41a828b 51 #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF)
<> 156:95d6b41a828b 52
<> 156:95d6b41a828b 53 /** @defgroup GPIO_LL GPIO
<> 156:95d6b41a828b 54 * @{
<> 156:95d6b41a828b 55 */
<> 156:95d6b41a828b 56
<> 156:95d6b41a828b 57 /* Private types -------------------------------------------------------------*/
<> 156:95d6b41a828b 58 /* Private variables ---------------------------------------------------------*/
<> 156:95d6b41a828b 59 /* Private constants ---------------------------------------------------------*/
<> 156:95d6b41a828b 60 /* Private macros ------------------------------------------------------------*/
<> 156:95d6b41a828b 61 #if defined(USE_FULL_LL_DRIVER)
<> 156:95d6b41a828b 62 /** @defgroup GPIO_LL_Private_Macros GPIO Private Macros
<> 156:95d6b41a828b 63 * @{
<> 156:95d6b41a828b 64 */
<> 156:95d6b41a828b 65
<> 156:95d6b41a828b 66 /**
<> 156:95d6b41a828b 67 * @}
<> 156:95d6b41a828b 68 */
<> 156:95d6b41a828b 69 #endif /*USE_FULL_LL_DRIVER*/
<> 156:95d6b41a828b 70
<> 156:95d6b41a828b 71 /* Exported types ------------------------------------------------------------*/
<> 156:95d6b41a828b 72 #if defined(USE_FULL_LL_DRIVER)
<> 156:95d6b41a828b 73 /** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures
<> 156:95d6b41a828b 74 * @{
<> 156:95d6b41a828b 75 */
<> 156:95d6b41a828b 76
<> 156:95d6b41a828b 77 /**
<> 156:95d6b41a828b 78 * @brief LL GPIO Init Structure definition
<> 156:95d6b41a828b 79 */
<> 156:95d6b41a828b 80 typedef struct
<> 156:95d6b41a828b 81 {
<> 156:95d6b41a828b 82 uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
<> 156:95d6b41a828b 83 This parameter can be any value of @ref GPIO_LL_EC_PIN */
<> 156:95d6b41a828b 84
<> 156:95d6b41a828b 85 uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
<> 156:95d6b41a828b 86 This parameter can be a value of @ref GPIO_LL_EC_MODE.
<> 156:95d6b41a828b 87
<> 156:95d6b41a828b 88 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/
<> 156:95d6b41a828b 89
<> 156:95d6b41a828b 90 uint32_t Speed; /*!< Specifies the speed for the selected pins.
<> 156:95d6b41a828b 91 This parameter can be a value of @ref GPIO_LL_EC_SPEED.
<> 156:95d6b41a828b 92
<> 156:95d6b41a828b 93 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/
<> 156:95d6b41a828b 94
<> 156:95d6b41a828b 95 uint32_t OutputType; /*!< Specifies the operating output type for the selected pins.
<> 156:95d6b41a828b 96 This parameter can be a value of @ref GPIO_LL_EC_OUTPUT.
<> 156:95d6b41a828b 97
<> 156:95d6b41a828b 98 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/
<> 156:95d6b41a828b 99
<> 156:95d6b41a828b 100 uint32_t Pull; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
<> 156:95d6b41a828b 101 This parameter can be a value of @ref GPIO_LL_EC_PULL.
<> 156:95d6b41a828b 102
<> 156:95d6b41a828b 103 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/
<> 156:95d6b41a828b 104
<> 156:95d6b41a828b 105 uint32_t Alternate; /*!< Specifies the Peripheral to be connected to the selected pins.
<> 156:95d6b41a828b 106 This parameter can be a value of @ref GPIO_LL_EC_AF.
<> 156:95d6b41a828b 107
<> 156:95d6b41a828b 108 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetAFPin_0_7() and LL_GPIO_SetAFPin_8_15().*/
<> 156:95d6b41a828b 109 } LL_GPIO_InitTypeDef;
<> 156:95d6b41a828b 110
<> 156:95d6b41a828b 111 /**
<> 156:95d6b41a828b 112 * @}
<> 156:95d6b41a828b 113 */
<> 156:95d6b41a828b 114 #endif /* USE_FULL_LL_DRIVER */
<> 156:95d6b41a828b 115
<> 156:95d6b41a828b 116 /* Exported constants --------------------------------------------------------*/
<> 156:95d6b41a828b 117 /** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants
<> 156:95d6b41a828b 118 * @{
<> 156:95d6b41a828b 119 */
<> 156:95d6b41a828b 120
<> 156:95d6b41a828b 121 /** @defgroup GPIO_LL_EC_PIN PIN
<> 156:95d6b41a828b 122 * @{
<> 156:95d6b41a828b 123 */
<> 156:95d6b41a828b 124 #define LL_GPIO_PIN_0 GPIO_BSRR_BS_0 /*!< Select pin 0 */
<> 156:95d6b41a828b 125 #define LL_GPIO_PIN_1 GPIO_BSRR_BS_1 /*!< Select pin 1 */
<> 156:95d6b41a828b 126 #define LL_GPIO_PIN_2 GPIO_BSRR_BS_2 /*!< Select pin 2 */
<> 156:95d6b41a828b 127 #define LL_GPIO_PIN_3 GPIO_BSRR_BS_3 /*!< Select pin 3 */
<> 156:95d6b41a828b 128 #define LL_GPIO_PIN_4 GPIO_BSRR_BS_4 /*!< Select pin 4 */
<> 156:95d6b41a828b 129 #define LL_GPIO_PIN_5 GPIO_BSRR_BS_5 /*!< Select pin 5 */
<> 156:95d6b41a828b 130 #define LL_GPIO_PIN_6 GPIO_BSRR_BS_6 /*!< Select pin 6 */
<> 156:95d6b41a828b 131 #define LL_GPIO_PIN_7 GPIO_BSRR_BS_7 /*!< Select pin 7 */
<> 156:95d6b41a828b 132 #define LL_GPIO_PIN_8 GPIO_BSRR_BS_8 /*!< Select pin 8 */
<> 156:95d6b41a828b 133 #define LL_GPIO_PIN_9 GPIO_BSRR_BS_9 /*!< Select pin 9 */
<> 156:95d6b41a828b 134 #define LL_GPIO_PIN_10 GPIO_BSRR_BS_10 /*!< Select pin 10 */
<> 156:95d6b41a828b 135 #define LL_GPIO_PIN_11 GPIO_BSRR_BS_11 /*!< Select pin 11 */
<> 156:95d6b41a828b 136 #define LL_GPIO_PIN_12 GPIO_BSRR_BS_12 /*!< Select pin 12 */
<> 156:95d6b41a828b 137 #define LL_GPIO_PIN_13 GPIO_BSRR_BS_13 /*!< Select pin 13 */
<> 156:95d6b41a828b 138 #define LL_GPIO_PIN_14 GPIO_BSRR_BS_14 /*!< Select pin 14 */
<> 156:95d6b41a828b 139 #define LL_GPIO_PIN_15 GPIO_BSRR_BS_15 /*!< Select pin 15 */
<> 156:95d6b41a828b 140 #define LL_GPIO_PIN_ALL (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1 | GPIO_BSRR_BS_2 | \
<> 156:95d6b41a828b 141 GPIO_BSRR_BS_3 | GPIO_BSRR_BS_4 | GPIO_BSRR_BS_5 | \
<> 156:95d6b41a828b 142 GPIO_BSRR_BS_6 | GPIO_BSRR_BS_7 | GPIO_BSRR_BS_8 | \
<> 156:95d6b41a828b 143 GPIO_BSRR_BS_9 | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
<> 156:95d6b41a828b 144 GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
<> 156:95d6b41a828b 145 GPIO_BSRR_BS_15) /*!< Select all pins */
<> 156:95d6b41a828b 146 /**
<> 156:95d6b41a828b 147 * @}
<> 156:95d6b41a828b 148 */
<> 156:95d6b41a828b 149
<> 156:95d6b41a828b 150 /** @defgroup GPIO_LL_EC_MODE Mode
<> 156:95d6b41a828b 151 * @{
<> 156:95d6b41a828b 152 */
Anna Bridge 180:96ed750bd169 153 #define LL_GPIO_MODE_INPUT (0x00000000U) /*!< Select input mode */
<> 156:95d6b41a828b 154 #define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0 /*!< Select output mode */
<> 156:95d6b41a828b 155 #define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1 /*!< Select alternate function mode */
<> 156:95d6b41a828b 156 #define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0 /*!< Select analog mode */
<> 156:95d6b41a828b 157 /**
<> 156:95d6b41a828b 158 * @}
<> 156:95d6b41a828b 159 */
<> 156:95d6b41a828b 160
<> 156:95d6b41a828b 161 /** @defgroup GPIO_LL_EC_OUTPUT Output Type
<> 156:95d6b41a828b 162 * @{
<> 156:95d6b41a828b 163 */
Anna Bridge 180:96ed750bd169 164 #define LL_GPIO_OUTPUT_PUSHPULL (0x00000000U) /*!< Select push-pull as output type */
<> 156:95d6b41a828b 165 #define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */
<> 156:95d6b41a828b 166 /**
<> 156:95d6b41a828b 167 * @}
<> 156:95d6b41a828b 168 */
<> 156:95d6b41a828b 169
<> 156:95d6b41a828b 170 /** @defgroup GPIO_LL_EC_SPEED Output Speed
<> 156:95d6b41a828b 171 * @{
<> 156:95d6b41a828b 172 */
Anna Bridge 180:96ed750bd169 173 #define LL_GPIO_SPEED_FREQ_LOW (0x00000000U) /*!< Select I/O low output speed */
<> 156:95d6b41a828b 174 #define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDR_OSPEEDR0_0 /*!< Select I/O medium output speed */
Anna Bridge 180:96ed750bd169 175 #define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDR_OSPEEDR0 /*!< Select I/O high output speed */
<> 156:95d6b41a828b 176 /**
<> 156:95d6b41a828b 177 * @}
<> 156:95d6b41a828b 178 */
<> 156:95d6b41a828b 179 #define LL_GPIO_SPEED_LOW LL_GPIO_SPEED_FREQ_LOW
<> 156:95d6b41a828b 180 #define LL_GPIO_SPEED_MEDIUM LL_GPIO_SPEED_FREQ_MEDIUM
Anna Bridge 180:96ed750bd169 181 #define LL_GPIO_SPEED_HIGH LL_GPIO_SPEED_FREQ_HIGH
<> 156:95d6b41a828b 182
<> 156:95d6b41a828b 183 /** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down
<> 156:95d6b41a828b 184 * @{
<> 156:95d6b41a828b 185 */
Anna Bridge 180:96ed750bd169 186 #define LL_GPIO_PULL_NO (0x00000000U) /*!< Select I/O no pull */
<> 156:95d6b41a828b 187 #define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0 /*!< Select I/O pull up */
<> 156:95d6b41a828b 188 #define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1 /*!< Select I/O pull down */
<> 156:95d6b41a828b 189 /**
<> 156:95d6b41a828b 190 * @}
<> 156:95d6b41a828b 191 */
<> 156:95d6b41a828b 192
<> 156:95d6b41a828b 193 /** @defgroup GPIO_LL_EC_AF Alternate Function
<> 156:95d6b41a828b 194 * @{
<> 156:95d6b41a828b 195 */
Anna Bridge 180:96ed750bd169 196 #define LL_GPIO_AF_0 (0x0000000U) /*!< Select alternate function 0 */
Anna Bridge 180:96ed750bd169 197 #define LL_GPIO_AF_1 (0x0000001U) /*!< Select alternate function 1 */
Anna Bridge 180:96ed750bd169 198 #define LL_GPIO_AF_2 (0x0000002U) /*!< Select alternate function 2 */
Anna Bridge 180:96ed750bd169 199 #define LL_GPIO_AF_3 (0x0000003U) /*!< Select alternate function 3 */
Anna Bridge 180:96ed750bd169 200 #define LL_GPIO_AF_4 (0x0000004U) /*!< Select alternate function 4 */
Anna Bridge 180:96ed750bd169 201 #define LL_GPIO_AF_5 (0x0000005U) /*!< Select alternate function 5 */
Anna Bridge 180:96ed750bd169 202 #define LL_GPIO_AF_6 (0x0000006U) /*!< Select alternate function 6 */
Anna Bridge 180:96ed750bd169 203 #define LL_GPIO_AF_7 (0x0000007U) /*!< Select alternate function 7 */
<> 156:95d6b41a828b 204 /**
<> 156:95d6b41a828b 205 * @}
<> 156:95d6b41a828b 206 */
<> 156:95d6b41a828b 207
<> 156:95d6b41a828b 208 /**
<> 156:95d6b41a828b 209 * @}
<> 156:95d6b41a828b 210 */
<> 156:95d6b41a828b 211
<> 156:95d6b41a828b 212 /* Exported macro ------------------------------------------------------------*/
<> 156:95d6b41a828b 213 /** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
<> 156:95d6b41a828b 214 * @{
<> 156:95d6b41a828b 215 */
<> 156:95d6b41a828b 216
<> 156:95d6b41a828b 217 /** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros
<> 156:95d6b41a828b 218 * @{
<> 156:95d6b41a828b 219 */
<> 156:95d6b41a828b 220
<> 156:95d6b41a828b 221 /**
<> 156:95d6b41a828b 222 * @brief Write a value in GPIO register
<> 156:95d6b41a828b 223 * @param __INSTANCE__ GPIO Instance
<> 156:95d6b41a828b 224 * @param __REG__ Register to be written
<> 156:95d6b41a828b 225 * @param __VALUE__ Value to be written in the register
<> 156:95d6b41a828b 226 * @retval None
<> 156:95d6b41a828b 227 */
<> 156:95d6b41a828b 228 #define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<> 156:95d6b41a828b 229
<> 156:95d6b41a828b 230 /**
<> 156:95d6b41a828b 231 * @brief Read a value in GPIO register
<> 156:95d6b41a828b 232 * @param __INSTANCE__ GPIO Instance
<> 156:95d6b41a828b 233 * @param __REG__ Register to be read
<> 156:95d6b41a828b 234 * @retval Register value
<> 156:95d6b41a828b 235 */
<> 156:95d6b41a828b 236 #define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<> 156:95d6b41a828b 237 /**
<> 156:95d6b41a828b 238 * @}
<> 156:95d6b41a828b 239 */
<> 156:95d6b41a828b 240
<> 156:95d6b41a828b 241 /**
<> 156:95d6b41a828b 242 * @}
<> 156:95d6b41a828b 243 */
<> 156:95d6b41a828b 244
<> 156:95d6b41a828b 245 /* Exported functions --------------------------------------------------------*/
<> 156:95d6b41a828b 246 /** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions
<> 156:95d6b41a828b 247 * @{
<> 156:95d6b41a828b 248 */
<> 156:95d6b41a828b 249
<> 156:95d6b41a828b 250 /** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration
<> 156:95d6b41a828b 251 * @{
<> 156:95d6b41a828b 252 */
<> 156:95d6b41a828b 253
<> 156:95d6b41a828b 254 /**
<> 156:95d6b41a828b 255 * @brief Configure gpio mode for a dedicated pin on dedicated port.
<> 156:95d6b41a828b 256 * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
<> 156:95d6b41a828b 257 * @note Warning: only one pin can be passed as parameter.
<> 156:95d6b41a828b 258 * @rmtoll MODER MODEy LL_GPIO_SetPinMode
<> 156:95d6b41a828b 259 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 260 * @param Pin This parameter can be one of the following values:
<> 156:95d6b41a828b 261 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 262 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 263 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 264 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 265 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 266 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 267 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 268 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 269 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 270 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 271 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 272 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 273 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 274 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 275 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 276 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 277 * @param Mode This parameter can be one of the following values:
<> 156:95d6b41a828b 278 * @arg @ref LL_GPIO_MODE_INPUT
<> 156:95d6b41a828b 279 * @arg @ref LL_GPIO_MODE_OUTPUT
<> 156:95d6b41a828b 280 * @arg @ref LL_GPIO_MODE_ALTERNATE
<> 156:95d6b41a828b 281 * @arg @ref LL_GPIO_MODE_ANALOG
<> 156:95d6b41a828b 282 * @retval None
<> 156:95d6b41a828b 283 */
<> 156:95d6b41a828b 284 __STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
<> 156:95d6b41a828b 285 {
<> 156:95d6b41a828b 286 MODIFY_REG(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0), ((Pin * Pin) * Mode));
<> 156:95d6b41a828b 287 }
<> 156:95d6b41a828b 288
<> 156:95d6b41a828b 289 /**
<> 156:95d6b41a828b 290 * @brief Return gpio mode for a dedicated pin on dedicated port.
<> 156:95d6b41a828b 291 * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
<> 156:95d6b41a828b 292 * @note Warning: only one pin can be passed as parameter.
<> 156:95d6b41a828b 293 * @rmtoll MODER MODEy LL_GPIO_GetPinMode
<> 156:95d6b41a828b 294 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 295 * @param Pin This parameter can be one of the following values:
<> 156:95d6b41a828b 296 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 297 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 298 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 299 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 300 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 301 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 302 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 303 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 304 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 305 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 306 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 307 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 308 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 309 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 310 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 311 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 312 * @retval Returned value can be one of the following values:
<> 156:95d6b41a828b 313 * @arg @ref LL_GPIO_MODE_INPUT
<> 156:95d6b41a828b 314 * @arg @ref LL_GPIO_MODE_OUTPUT
<> 156:95d6b41a828b 315 * @arg @ref LL_GPIO_MODE_ALTERNATE
<> 156:95d6b41a828b 316 * @arg @ref LL_GPIO_MODE_ANALOG
<> 156:95d6b41a828b 317 */
<> 156:95d6b41a828b 318 __STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 156:95d6b41a828b 319 {
<> 156:95d6b41a828b 320 return (uint32_t)(READ_BIT(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0)) / (Pin * Pin));
<> 156:95d6b41a828b 321 }
<> 156:95d6b41a828b 322
<> 156:95d6b41a828b 323 /**
<> 156:95d6b41a828b 324 * @brief Configure gpio output type for several pins on dedicated port.
<> 156:95d6b41a828b 325 * @note Output type as to be set when gpio pin is in output or
<> 156:95d6b41a828b 326 * alternate modes. Possible type are Push-pull or Open-drain.
<> 156:95d6b41a828b 327 * @rmtoll OTYPER OTy LL_GPIO_SetPinOutputType
<> 156:95d6b41a828b 328 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 329 * @param PinMask This parameter can be a combination of the following values:
<> 156:95d6b41a828b 330 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 331 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 332 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 333 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 334 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 335 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 336 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 337 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 338 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 339 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 340 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 341 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 342 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 343 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 344 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 345 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 346 * @arg @ref LL_GPIO_PIN_ALL
<> 156:95d6b41a828b 347 * @param OutputType This parameter can be one of the following values:
<> 156:95d6b41a828b 348 * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
<> 156:95d6b41a828b 349 * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
<> 156:95d6b41a828b 350 * @retval None
<> 156:95d6b41a828b 351 */
<> 156:95d6b41a828b 352 __STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
<> 156:95d6b41a828b 353 {
<> 156:95d6b41a828b 354 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
<> 156:95d6b41a828b 355 }
<> 156:95d6b41a828b 356
<> 156:95d6b41a828b 357 /**
<> 156:95d6b41a828b 358 * @brief Return gpio output type for several pins on dedicated port.
<> 156:95d6b41a828b 359 * @note Output type as to be set when gpio pin is in output or
<> 156:95d6b41a828b 360 * alternate modes. Possible type are Push-pull or Open-drain.
<> 156:95d6b41a828b 361 * @note Warning: only one pin can be passed as parameter.
<> 156:95d6b41a828b 362 * @rmtoll OTYPER OTy LL_GPIO_GetPinOutputType
<> 156:95d6b41a828b 363 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 364 * @param Pin This parameter can be one of the following values:
<> 156:95d6b41a828b 365 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 366 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 367 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 368 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 369 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 370 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 371 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 372 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 373 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 374 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 375 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 376 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 377 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 378 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 379 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 380 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 381 * @arg @ref LL_GPIO_PIN_ALL
<> 156:95d6b41a828b 382 * @retval Returned value can be one of the following values:
<> 156:95d6b41a828b 383 * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
<> 156:95d6b41a828b 384 * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
<> 156:95d6b41a828b 385 */
<> 156:95d6b41a828b 386 __STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 156:95d6b41a828b 387 {
<> 156:95d6b41a828b 388 return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) / Pin);
<> 156:95d6b41a828b 389 }
<> 156:95d6b41a828b 390
<> 156:95d6b41a828b 391 /**
<> 156:95d6b41a828b 392 * @brief Configure gpio speed for a dedicated pin on dedicated port.
<> 156:95d6b41a828b 393 * @note I/O speed can be Low, Medium, Fast or High speed.
<> 156:95d6b41a828b 394 * @note Warning: only one pin can be passed as parameter.
<> 156:95d6b41a828b 395 * @note Refer to datasheet for frequency specifications and the power
<> 156:95d6b41a828b 396 * supply and load conditions for each speed.
<> 156:95d6b41a828b 397 * @rmtoll OSPEEDR OSPEEDy LL_GPIO_SetPinSpeed
<> 156:95d6b41a828b 398 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 399 * @param Pin This parameter can be one of the following values:
<> 156:95d6b41a828b 400 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 401 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 402 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 403 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 404 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 405 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 406 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 407 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 408 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 409 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 410 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 411 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 412 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 413 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 414 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 415 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 416 * @param Speed This parameter can be one of the following values:
<> 156:95d6b41a828b 417 * @arg @ref LL_GPIO_SPEED_FREQ_LOW
<> 156:95d6b41a828b 418 * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
<> 156:95d6b41a828b 419 * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
<> 156:95d6b41a828b 420 * @retval None
<> 156:95d6b41a828b 421 */
<> 156:95d6b41a828b 422 __STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
<> 156:95d6b41a828b 423 {
<> 156:95d6b41a828b 424 MODIFY_REG(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDR_OSPEEDR0), ((Pin * Pin) * Speed));
<> 156:95d6b41a828b 425 }
<> 156:95d6b41a828b 426
<> 156:95d6b41a828b 427 /**
<> 156:95d6b41a828b 428 * @brief Return gpio speed for a dedicated pin on dedicated port.
<> 156:95d6b41a828b 429 * @note I/O speed can be Low, Medium, Fast or High speed.
<> 156:95d6b41a828b 430 * @note Warning: only one pin can be passed as parameter.
<> 156:95d6b41a828b 431 * @note Refer to datasheet for frequency specifications and the power
<> 156:95d6b41a828b 432 * supply and load conditions for each speed.
<> 156:95d6b41a828b 433 * @rmtoll OSPEEDR OSPEEDy LL_GPIO_GetPinSpeed
<> 156:95d6b41a828b 434 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 435 * @param Pin This parameter can be one of the following values:
<> 156:95d6b41a828b 436 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 437 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 438 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 439 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 440 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 441 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 442 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 443 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 444 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 445 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 446 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 447 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 448 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 449 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 450 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 451 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 452 * @retval Returned value can be one of the following values:
<> 156:95d6b41a828b 453 * @arg @ref LL_GPIO_SPEED_FREQ_LOW
<> 156:95d6b41a828b 454 * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
<> 156:95d6b41a828b 455 * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
<> 156:95d6b41a828b 456 */
<> 156:95d6b41a828b 457 __STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 156:95d6b41a828b 458 {
<> 156:95d6b41a828b 459 return (uint32_t)(READ_BIT(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDR_OSPEEDR0)) / (Pin * Pin));
<> 156:95d6b41a828b 460 }
<> 156:95d6b41a828b 461
<> 156:95d6b41a828b 462 /**
<> 156:95d6b41a828b 463 * @brief Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port.
<> 156:95d6b41a828b 464 * @note Warning: only one pin can be passed as parameter.
<> 156:95d6b41a828b 465 * @rmtoll PUPDR PUPDy LL_GPIO_SetPinPull
<> 156:95d6b41a828b 466 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 467 * @param Pin This parameter can be one of the following values:
<> 156:95d6b41a828b 468 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 469 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 470 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 471 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 472 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 473 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 474 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 475 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 476 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 477 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 478 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 479 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 480 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 481 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 482 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 483 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 484 * @param Pull This parameter can be one of the following values:
<> 156:95d6b41a828b 485 * @arg @ref LL_GPIO_PULL_NO
<> 156:95d6b41a828b 486 * @arg @ref LL_GPIO_PULL_UP
<> 156:95d6b41a828b 487 * @arg @ref LL_GPIO_PULL_DOWN
<> 156:95d6b41a828b 488 * @retval None
<> 156:95d6b41a828b 489 */
<> 156:95d6b41a828b 490 __STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
<> 156:95d6b41a828b 491 {
<> 156:95d6b41a828b 492 MODIFY_REG(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPDR0), ((Pin * Pin) * Pull));
<> 156:95d6b41a828b 493 }
<> 156:95d6b41a828b 494
<> 156:95d6b41a828b 495 /**
<> 156:95d6b41a828b 496 * @brief Return gpio pull-up or pull-down for a dedicated pin on a dedicated port
<> 156:95d6b41a828b 497 * @note Warning: only one pin can be passed as parameter.
<> 156:95d6b41a828b 498 * @rmtoll PUPDR PUPDy LL_GPIO_GetPinPull
<> 156:95d6b41a828b 499 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 500 * @param Pin This parameter can be one of the following values:
<> 156:95d6b41a828b 501 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 502 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 503 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 504 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 505 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 506 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 507 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 508 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 509 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 510 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 511 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 512 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 513 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 514 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 515 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 516 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 517 * @retval Returned value can be one of the following values:
<> 156:95d6b41a828b 518 * @arg @ref LL_GPIO_PULL_NO
<> 156:95d6b41a828b 519 * @arg @ref LL_GPIO_PULL_UP
<> 156:95d6b41a828b 520 * @arg @ref LL_GPIO_PULL_DOWN
<> 156:95d6b41a828b 521 */
<> 156:95d6b41a828b 522 __STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 156:95d6b41a828b 523 {
<> 156:95d6b41a828b 524 return (uint32_t)(READ_BIT(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPDR0)) / (Pin * Pin));
<> 156:95d6b41a828b 525 }
<> 156:95d6b41a828b 526
<> 156:95d6b41a828b 527 /**
<> 156:95d6b41a828b 528 * @brief Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
<> 156:95d6b41a828b 529 * @note Possible values are from AF0 to AF7 depending on target.
<> 156:95d6b41a828b 530 * @note Warning: only one pin can be passed as parameter.
<> 156:95d6b41a828b 531 * @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7
<> 156:95d6b41a828b 532 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 533 * @param Pin This parameter can be one of the following values:
<> 156:95d6b41a828b 534 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 535 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 536 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 537 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 538 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 539 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 540 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 541 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 542 * @param Alternate This parameter can be one of the following values:
<> 156:95d6b41a828b 543 * @arg @ref LL_GPIO_AF_0
<> 156:95d6b41a828b 544 * @arg @ref LL_GPIO_AF_1
<> 156:95d6b41a828b 545 * @arg @ref LL_GPIO_AF_2
<> 156:95d6b41a828b 546 * @arg @ref LL_GPIO_AF_3
<> 156:95d6b41a828b 547 * @arg @ref LL_GPIO_AF_4
<> 156:95d6b41a828b 548 * @arg @ref LL_GPIO_AF_5
<> 156:95d6b41a828b 549 * @arg @ref LL_GPIO_AF_6
<> 156:95d6b41a828b 550 * @arg @ref LL_GPIO_AF_7
<> 156:95d6b41a828b 551 * @retval None
<> 156:95d6b41a828b 552 */
<> 156:95d6b41a828b 553 __STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 156:95d6b41a828b 554 {
Anna Bridge 180:96ed750bd169 555 MODIFY_REG(GPIOx->AFR[0], ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFSEL0),
<> 156:95d6b41a828b 556 ((((Pin * Pin) * Pin) * Pin) * Alternate));
<> 156:95d6b41a828b 557 }
<> 156:95d6b41a828b 558
<> 156:95d6b41a828b 559 /**
<> 156:95d6b41a828b 560 * @brief Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
<> 156:95d6b41a828b 561 * @rmtoll AFRL AFSELy LL_GPIO_GetAFPin_0_7
<> 156:95d6b41a828b 562 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 563 * @param Pin This parameter can be one of the following values:
<> 156:95d6b41a828b 564 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 565 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 566 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 567 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 568 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 569 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 570 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 571 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 572 * @retval Returned value can be one of the following values:
<> 156:95d6b41a828b 573 * @arg @ref LL_GPIO_AF_0
<> 156:95d6b41a828b 574 * @arg @ref LL_GPIO_AF_1
<> 156:95d6b41a828b 575 * @arg @ref LL_GPIO_AF_2
<> 156:95d6b41a828b 576 * @arg @ref LL_GPIO_AF_3
<> 156:95d6b41a828b 577 * @arg @ref LL_GPIO_AF_4
<> 156:95d6b41a828b 578 * @arg @ref LL_GPIO_AF_5
<> 156:95d6b41a828b 579 * @arg @ref LL_GPIO_AF_6
<> 156:95d6b41a828b 580 * @arg @ref LL_GPIO_AF_7
<> 156:95d6b41a828b 581 */
<> 156:95d6b41a828b 582 __STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 156:95d6b41a828b 583 {
<> 156:95d6b41a828b 584 return (uint32_t)(READ_BIT(GPIOx->AFR[0],
Anna Bridge 180:96ed750bd169 585 ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFSEL0)) / (((Pin * Pin) * Pin) * Pin));
<> 156:95d6b41a828b 586 }
<> 156:95d6b41a828b 587
<> 156:95d6b41a828b 588 /**
<> 156:95d6b41a828b 589 * @brief Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
<> 156:95d6b41a828b 590 * @note Possible values are from AF0 to AF7 depending on target.
<> 156:95d6b41a828b 591 * @note Warning: only one pin can be passed as parameter.
<> 156:95d6b41a828b 592 * @rmtoll AFRH AFSELy LL_GPIO_SetAFPin_8_15
<> 156:95d6b41a828b 593 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 594 * @param Pin This parameter can be one of the following values:
<> 156:95d6b41a828b 595 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 596 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 597 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 598 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 599 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 600 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 601 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 602 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 603 * @param Alternate This parameter can be one of the following values:
<> 156:95d6b41a828b 604 * @arg @ref LL_GPIO_AF_0
<> 156:95d6b41a828b 605 * @arg @ref LL_GPIO_AF_1
<> 156:95d6b41a828b 606 * @arg @ref LL_GPIO_AF_2
<> 156:95d6b41a828b 607 * @arg @ref LL_GPIO_AF_3
<> 156:95d6b41a828b 608 * @arg @ref LL_GPIO_AF_4
<> 156:95d6b41a828b 609 * @arg @ref LL_GPIO_AF_5
<> 156:95d6b41a828b 610 * @arg @ref LL_GPIO_AF_6
<> 156:95d6b41a828b 611 * @arg @ref LL_GPIO_AF_7
<> 156:95d6b41a828b 612 * @retval None
<> 156:95d6b41a828b 613 */
<> 156:95d6b41a828b 614 __STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 156:95d6b41a828b 615 {
Anna Bridge 180:96ed750bd169 616 MODIFY_REG(GPIOx->AFR[1], (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFSEL8),
<> 156:95d6b41a828b 617 (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * Alternate));
<> 156:95d6b41a828b 618 }
<> 156:95d6b41a828b 619
<> 156:95d6b41a828b 620 /**
<> 156:95d6b41a828b 621 * @brief Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
<> 156:95d6b41a828b 622 * @note Possible values are from AF0 to AF7 depending on target.
<> 156:95d6b41a828b 623 * @rmtoll AFRH AFSELy LL_GPIO_GetAFPin_8_15
<> 156:95d6b41a828b 624 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 625 * @param Pin This parameter can be one of the following values:
<> 156:95d6b41a828b 626 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 627 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 628 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 629 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 630 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 631 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 632 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 633 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 634 * @retval Returned value can be one of the following values:
<> 156:95d6b41a828b 635 * @arg @ref LL_GPIO_AF_0
<> 156:95d6b41a828b 636 * @arg @ref LL_GPIO_AF_1
<> 156:95d6b41a828b 637 * @arg @ref LL_GPIO_AF_2
<> 156:95d6b41a828b 638 * @arg @ref LL_GPIO_AF_3
<> 156:95d6b41a828b 639 * @arg @ref LL_GPIO_AF_4
<> 156:95d6b41a828b 640 * @arg @ref LL_GPIO_AF_5
<> 156:95d6b41a828b 641 * @arg @ref LL_GPIO_AF_6
<> 156:95d6b41a828b 642 * @arg @ref LL_GPIO_AF_7
<> 156:95d6b41a828b 643 */
<> 156:95d6b41a828b 644 __STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 156:95d6b41a828b 645 {
<> 156:95d6b41a828b 646 return (uint32_t)(READ_BIT(GPIOx->AFR[1],
Anna Bridge 180:96ed750bd169 647 (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFSEL8)) / ((((Pin >> 8U) *
<> 156:95d6b41a828b 648 (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)));
<> 156:95d6b41a828b 649 }
<> 156:95d6b41a828b 650
<> 156:95d6b41a828b 651
<> 156:95d6b41a828b 652 /**
<> 156:95d6b41a828b 653 * @brief Lock configuration of several pins for a dedicated port.
<> 156:95d6b41a828b 654 * @note When the lock sequence has been applied on a port bit, the
<> 156:95d6b41a828b 655 * value of this port bit can no longer be modified until the
<> 156:95d6b41a828b 656 * next reset.
<> 156:95d6b41a828b 657 * @note Each lock bit freezes a specific configuration register
<> 156:95d6b41a828b 658 * (control and alternate function registers).
<> 156:95d6b41a828b 659 * @rmtoll LCKR LCKK LL_GPIO_LockPin
<> 156:95d6b41a828b 660 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 661 * @param PinMask This parameter can be a combination of the following values:
<> 156:95d6b41a828b 662 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 663 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 664 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 665 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 666 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 667 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 668 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 669 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 670 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 671 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 672 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 673 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 674 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 675 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 676 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 677 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 678 * @arg @ref LL_GPIO_PIN_ALL
<> 156:95d6b41a828b 679 * @retval None
<> 156:95d6b41a828b 680 */
<> 156:95d6b41a828b 681 __STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 156:95d6b41a828b 682 {
<> 156:95d6b41a828b 683 __IO uint32_t temp;
<> 156:95d6b41a828b 684 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
<> 156:95d6b41a828b 685 WRITE_REG(GPIOx->LCKR, PinMask);
<> 156:95d6b41a828b 686 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
<> 156:95d6b41a828b 687 temp = READ_REG(GPIOx->LCKR);
<> 156:95d6b41a828b 688 (void) temp;
<> 156:95d6b41a828b 689 }
<> 156:95d6b41a828b 690
<> 156:95d6b41a828b 691 /**
<> 156:95d6b41a828b 692 * @brief Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0.
<> 156:95d6b41a828b 693 * @rmtoll LCKR LCKy LL_GPIO_IsPinLocked
<> 156:95d6b41a828b 694 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 695 * @param PinMask This parameter can be a combination of the following values:
<> 156:95d6b41a828b 696 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 697 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 698 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 699 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 700 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 701 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 702 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 703 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 704 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 705 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 706 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 707 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 708 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 709 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 710 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 711 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 712 * @arg @ref LL_GPIO_PIN_ALL
<> 156:95d6b41a828b 713 * @retval State of bit (1 or 0).
<> 156:95d6b41a828b 714 */
<> 156:95d6b41a828b 715 __STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 156:95d6b41a828b 716 {
<> 156:95d6b41a828b 717 return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask));
<> 156:95d6b41a828b 718 }
<> 156:95d6b41a828b 719
<> 156:95d6b41a828b 720 /**
<> 156:95d6b41a828b 721 * @brief Return 1 if one of the pin of a dedicated port is locked. else return 0.
<> 156:95d6b41a828b 722 * @rmtoll LCKR LCKK LL_GPIO_IsAnyPinLocked
<> 156:95d6b41a828b 723 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 724 * @retval State of bit (1 or 0).
<> 156:95d6b41a828b 725 */
<> 156:95d6b41a828b 726 __STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
<> 156:95d6b41a828b 727 {
<> 156:95d6b41a828b 728 return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
<> 156:95d6b41a828b 729 }
<> 156:95d6b41a828b 730
<> 156:95d6b41a828b 731 /**
<> 156:95d6b41a828b 732 * @}
<> 156:95d6b41a828b 733 */
<> 156:95d6b41a828b 734
<> 156:95d6b41a828b 735 /** @defgroup GPIO_LL_EF_Data_Access Data Access
<> 156:95d6b41a828b 736 * @{
<> 156:95d6b41a828b 737 */
<> 156:95d6b41a828b 738
<> 156:95d6b41a828b 739 /**
<> 156:95d6b41a828b 740 * @brief Return full input data register value for a dedicated port.
<> 156:95d6b41a828b 741 * @rmtoll IDR IDy LL_GPIO_ReadInputPort
<> 156:95d6b41a828b 742 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 743 * @retval Input data register value of port
<> 156:95d6b41a828b 744 */
<> 156:95d6b41a828b 745 __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
<> 156:95d6b41a828b 746 {
<> 156:95d6b41a828b 747 return (uint32_t)(READ_REG(GPIOx->IDR));
<> 156:95d6b41a828b 748 }
<> 156:95d6b41a828b 749
<> 156:95d6b41a828b 750 /**
<> 156:95d6b41a828b 751 * @brief Return if input data level for several pins of dedicated port is high or low.
<> 156:95d6b41a828b 752 * @rmtoll IDR IDy LL_GPIO_IsInputPinSet
<> 156:95d6b41a828b 753 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 754 * @param PinMask This parameter can be a combination of the following values:
<> 156:95d6b41a828b 755 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 756 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 757 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 758 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 759 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 760 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 761 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 762 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 763 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 764 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 765 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 766 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 767 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 768 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 769 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 770 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 771 * @arg @ref LL_GPIO_PIN_ALL
<> 156:95d6b41a828b 772 * @retval State of bit (1 or 0).
<> 156:95d6b41a828b 773 */
<> 156:95d6b41a828b 774 __STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 156:95d6b41a828b 775 {
<> 156:95d6b41a828b 776 return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask));
<> 156:95d6b41a828b 777 }
<> 156:95d6b41a828b 778
<> 156:95d6b41a828b 779 /**
<> 156:95d6b41a828b 780 * @brief Write output data register for the port.
<> 156:95d6b41a828b 781 * @rmtoll ODR ODy LL_GPIO_WriteOutputPort
<> 156:95d6b41a828b 782 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 783 * @param PortValue Level value for each pin of the port
<> 156:95d6b41a828b 784 * @retval None
<> 156:95d6b41a828b 785 */
<> 156:95d6b41a828b 786 __STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
<> 156:95d6b41a828b 787 {
<> 156:95d6b41a828b 788 WRITE_REG(GPIOx->ODR, PortValue);
<> 156:95d6b41a828b 789 }
<> 156:95d6b41a828b 790
<> 156:95d6b41a828b 791 /**
<> 156:95d6b41a828b 792 * @brief Return full output data register value for a dedicated port.
<> 156:95d6b41a828b 793 * @rmtoll ODR ODy LL_GPIO_ReadOutputPort
<> 156:95d6b41a828b 794 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 795 * @retval Output data register value of port
<> 156:95d6b41a828b 796 */
<> 156:95d6b41a828b 797 __STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
<> 156:95d6b41a828b 798 {
<> 156:95d6b41a828b 799 return (uint32_t)(READ_REG(GPIOx->ODR));
<> 156:95d6b41a828b 800 }
<> 156:95d6b41a828b 801
<> 156:95d6b41a828b 802 /**
<> 156:95d6b41a828b 803 * @brief Return if input data level for several pins of dedicated port is high or low.
<> 156:95d6b41a828b 804 * @rmtoll ODR ODy LL_GPIO_IsOutputPinSet
<> 156:95d6b41a828b 805 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 806 * @param PinMask This parameter can be a combination of the following values:
<> 156:95d6b41a828b 807 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 808 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 809 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 810 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 811 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 812 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 813 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 814 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 815 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 816 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 817 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 818 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 819 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 820 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 821 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 822 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 823 * @arg @ref LL_GPIO_PIN_ALL
<> 156:95d6b41a828b 824 * @retval State of bit (1 or 0).
<> 156:95d6b41a828b 825 */
<> 156:95d6b41a828b 826 __STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 156:95d6b41a828b 827 {
<> 156:95d6b41a828b 828 return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask));
<> 156:95d6b41a828b 829 }
<> 156:95d6b41a828b 830
<> 156:95d6b41a828b 831 /**
<> 156:95d6b41a828b 832 * @brief Set several pins to high level on dedicated gpio port.
<> 156:95d6b41a828b 833 * @rmtoll BSRR BSy LL_GPIO_SetOutputPin
<> 156:95d6b41a828b 834 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 835 * @param PinMask This parameter can be a combination of the following values:
<> 156:95d6b41a828b 836 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 837 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 838 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 839 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 840 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 841 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 842 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 843 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 844 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 845 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 846 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 847 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 848 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 849 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 850 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 851 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 852 * @arg @ref LL_GPIO_PIN_ALL
<> 156:95d6b41a828b 853 * @retval None
<> 156:95d6b41a828b 854 */
<> 156:95d6b41a828b 855 __STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 156:95d6b41a828b 856 {
<> 156:95d6b41a828b 857 WRITE_REG(GPIOx->BSRR, PinMask);
<> 156:95d6b41a828b 858 }
<> 156:95d6b41a828b 859
<> 156:95d6b41a828b 860 /**
<> 156:95d6b41a828b 861 * @brief Set several pins to low level on dedicated gpio port.
<> 156:95d6b41a828b 862 * @rmtoll BRR BRy LL_GPIO_ResetOutputPin
<> 156:95d6b41a828b 863 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 864 * @param PinMask This parameter can be a combination of the following values:
<> 156:95d6b41a828b 865 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 866 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 867 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 868 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 869 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 870 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 871 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 872 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 873 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 874 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 875 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 876 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 877 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 878 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 879 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 880 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 881 * @arg @ref LL_GPIO_PIN_ALL
<> 156:95d6b41a828b 882 * @retval None
<> 156:95d6b41a828b 883 */
<> 156:95d6b41a828b 884 __STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 156:95d6b41a828b 885 {
<> 156:95d6b41a828b 886 WRITE_REG(GPIOx->BRR, PinMask);
<> 156:95d6b41a828b 887 }
<> 156:95d6b41a828b 888
<> 156:95d6b41a828b 889 /**
<> 156:95d6b41a828b 890 * @brief Toggle data value for several pin of dedicated port.
<> 156:95d6b41a828b 891 * @rmtoll ODR ODy LL_GPIO_TogglePin
<> 156:95d6b41a828b 892 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 893 * @param PinMask This parameter can be a combination of the following values:
<> 156:95d6b41a828b 894 * @arg @ref LL_GPIO_PIN_0
<> 156:95d6b41a828b 895 * @arg @ref LL_GPIO_PIN_1
<> 156:95d6b41a828b 896 * @arg @ref LL_GPIO_PIN_2
<> 156:95d6b41a828b 897 * @arg @ref LL_GPIO_PIN_3
<> 156:95d6b41a828b 898 * @arg @ref LL_GPIO_PIN_4
<> 156:95d6b41a828b 899 * @arg @ref LL_GPIO_PIN_5
<> 156:95d6b41a828b 900 * @arg @ref LL_GPIO_PIN_6
<> 156:95d6b41a828b 901 * @arg @ref LL_GPIO_PIN_7
<> 156:95d6b41a828b 902 * @arg @ref LL_GPIO_PIN_8
<> 156:95d6b41a828b 903 * @arg @ref LL_GPIO_PIN_9
<> 156:95d6b41a828b 904 * @arg @ref LL_GPIO_PIN_10
<> 156:95d6b41a828b 905 * @arg @ref LL_GPIO_PIN_11
<> 156:95d6b41a828b 906 * @arg @ref LL_GPIO_PIN_12
<> 156:95d6b41a828b 907 * @arg @ref LL_GPIO_PIN_13
<> 156:95d6b41a828b 908 * @arg @ref LL_GPIO_PIN_14
<> 156:95d6b41a828b 909 * @arg @ref LL_GPIO_PIN_15
<> 156:95d6b41a828b 910 * @arg @ref LL_GPIO_PIN_ALL
<> 156:95d6b41a828b 911 * @retval None
<> 156:95d6b41a828b 912 */
<> 156:95d6b41a828b 913 __STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 156:95d6b41a828b 914 {
<> 156:95d6b41a828b 915 WRITE_REG(GPIOx->ODR, READ_REG(GPIOx->ODR) ^ PinMask);
<> 156:95d6b41a828b 916 }
<> 156:95d6b41a828b 917
<> 156:95d6b41a828b 918 /**
<> 156:95d6b41a828b 919 * @}
<> 156:95d6b41a828b 920 */
<> 156:95d6b41a828b 921
<> 156:95d6b41a828b 922 #if defined(USE_FULL_LL_DRIVER)
<> 156:95d6b41a828b 923 /** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions
<> 156:95d6b41a828b 924 * @{
<> 156:95d6b41a828b 925 */
<> 156:95d6b41a828b 926
<> 156:95d6b41a828b 927 ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
<> 156:95d6b41a828b 928 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
<> 156:95d6b41a828b 929 void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
<> 156:95d6b41a828b 930
<> 156:95d6b41a828b 931 /**
<> 156:95d6b41a828b 932 * @}
<> 156:95d6b41a828b 933 */
<> 156:95d6b41a828b 934 #endif /* USE_FULL_LL_DRIVER */
<> 156:95d6b41a828b 935
<> 156:95d6b41a828b 936 /**
<> 156:95d6b41a828b 937 * @}
<> 156:95d6b41a828b 938 */
<> 156:95d6b41a828b 939
<> 156:95d6b41a828b 940 /**
<> 156:95d6b41a828b 941 * @}
<> 156:95d6b41a828b 942 */
<> 156:95d6b41a828b 943
<> 156:95d6b41a828b 944 #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) */
<> 156:95d6b41a828b 945 /**
<> 156:95d6b41a828b 946 * @}
<> 156:95d6b41a828b 947 */
<> 156:95d6b41a828b 948
<> 156:95d6b41a828b 949 #ifdef __cplusplus
<> 156:95d6b41a828b 950 }
<> 156:95d6b41a828b 951 #endif
<> 156:95d6b41a828b 952
<> 156:95d6b41a828b 953 #endif /* __STM32F0xx_LL_GPIO_H */
<> 156:95d6b41a828b 954
<> 156:95d6b41a828b 955 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/