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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_crc.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
180:96ed750bd169 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_crc.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief Header file of CRC HAL module.
<> 144:ef7eb2e8f9f7 6 ******************************************************************************
<> 144:ef7eb2e8f9f7 7 * @attention
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 12 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 14 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 17 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 19 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 20 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 32 *
<> 144:ef7eb2e8f9f7 33 ******************************************************************************
<> 144:ef7eb2e8f9f7 34 */
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 37 #ifndef __STM32F0xx_HAL_CRC_H
<> 144:ef7eb2e8f9f7 38 #define __STM32F0xx_HAL_CRC_H
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 41 extern "C" {
<> 144:ef7eb2e8f9f7 42 #endif
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 45 #include "stm32f0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 48 * @{
<> 144:ef7eb2e8f9f7 49 */
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /** @addtogroup CRC CRC
<> 144:ef7eb2e8f9f7 52 * @{
<> 144:ef7eb2e8f9f7 53 */
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 56 /** @defgroup CRC_Exported_Types CRC Exported Types
<> 144:ef7eb2e8f9f7 57 * @{
<> 144:ef7eb2e8f9f7 58 */
<> 144:ef7eb2e8f9f7 59 /**
<> 144:ef7eb2e8f9f7 60 * @brief CRC HAL State Structure definition
<> 144:ef7eb2e8f9f7 61 */
<> 144:ef7eb2e8f9f7 62 typedef enum
<> 144:ef7eb2e8f9f7 63 {
<> 156:95d6b41a828b 64 HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */
<> 156:95d6b41a828b 65 HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */
<> 156:95d6b41a828b 66 HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */
<> 156:95d6b41a828b 67 HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */
<> 156:95d6b41a828b 68 HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */
<> 144:ef7eb2e8f9f7 69 }HAL_CRC_StateTypeDef;
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 /**
<> 144:ef7eb2e8f9f7 73 * @brief CRC Init Structure definition
<> 144:ef7eb2e8f9f7 74 */
<> 144:ef7eb2e8f9f7 75 typedef struct
<> 144:ef7eb2e8f9f7 76 {
<> 144:ef7eb2e8f9f7 77 uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used.
<> 144:ef7eb2e8f9f7 78 If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default
<> 144:ef7eb2e8f9f7 79 X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1.
<> 144:ef7eb2e8f9f7 80 In that case, there is no need to set GeneratingPolynomial field.
<> 144:ef7eb2e8f9f7 81 If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and CRCLength fields must be set */
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 uint8_t DefaultInitValueUse; /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used.
<> 144:ef7eb2e8f9f7 84 If set to DEFAULT_INIT_VALUE_ENABLE, resort to default
<> 144:ef7eb2e8f9f7 85 0xFFFFFFFF value. In that case, there is no need to set InitValue field.
<> 144:ef7eb2e8f9f7 86 If otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set */
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial. 7, 8, 16 or 32-bit long value for a polynomial degree
<> 144:ef7eb2e8f9f7 89 respectively equal to 7, 8, 16 or 32. This field is written in normal representation,
<> 144:ef7eb2e8f9f7 90 e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65.
<> 144:ef7eb2e8f9f7 91 No need to specify it if DefaultPolynomialUse is set to DEFAULT_POLYNOMIAL_ENABLE */
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 uint32_t CRCLength; /*!< This parameter is a value of @ref CRCEx_Polynomial_Sizes and indicates CRC length.
<> 144:ef7eb2e8f9f7 94 Value can be either one of
<> 144:ef7eb2e8f9f7 95 CRC_POLYLENGTH_32B (32-bit CRC)
<> 144:ef7eb2e8f9f7 96 CRC_POLYLENGTH_16B (16-bit CRC)
<> 144:ef7eb2e8f9f7 97 CRC_POLYLENGTH_8B (8-bit CRC)
<> 144:ef7eb2e8f9f7 98 CRC_POLYLENGTH_7B (7-bit CRC) */
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 uint32_t InitValue; /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse
<> 144:ef7eb2e8f9f7 101 is set to DEFAULT_INIT_VALUE_ENABLE */
<> 144:ef7eb2e8f9f7 102
<> 144:ef7eb2e8f9f7 103 uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode.
<> 144:ef7eb2e8f9f7 104 Can be either one of the following values
<> 144:ef7eb2e8f9f7 105 CRC_INPUTDATA_INVERSION_NONE no input data inversion
<> 144:ef7eb2e8f9f7 106 CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2
<> 144:ef7eb2e8f9f7 107 CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C
<> 144:ef7eb2e8f9f7 108 CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458 */
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode.
<> 144:ef7eb2e8f9f7 111 Can be either
<> 144:ef7eb2e8f9f7 112 CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion, or
<> 144:ef7eb2e8f9f7 113 CRC_OUTPUTDATA_INVERSION_ENABLE CRC 0x11223344 is converted into 0x22CC4488 */
<> 144:ef7eb2e8f9f7 114 }CRC_InitTypeDef;
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 /**
<> 144:ef7eb2e8f9f7 118 * @brief CRC Handle Structure definition
<> 144:ef7eb2e8f9f7 119 */
<> 144:ef7eb2e8f9f7 120 typedef struct
<> 144:ef7eb2e8f9f7 121 {
<> 144:ef7eb2e8f9f7 122 CRC_TypeDef *Instance; /*!< Register base address */
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 CRC_InitTypeDef Init; /*!< CRC configuration parameters */
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 HAL_LockTypeDef Lock; /*!< CRC Locking object */
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 uint32_t InputDataFormat; /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format.
<> 144:ef7eb2e8f9f7 131 Can be either
<> 144:ef7eb2e8f9f7 132 CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes (8-bit data)
<> 144:ef7eb2e8f9f7 133 CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of half-words (16-bit data)
<> 144:ef7eb2e8f9f7 134 CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words (32-bits data)
<> 144:ef7eb2e8f9f7 135 Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization error
<> 144:ef7eb2e8f9f7 136 must occur if InputBufferFormat is not one of the three values listed above */
<> 144:ef7eb2e8f9f7 137 }CRC_HandleTypeDef;
<> 144:ef7eb2e8f9f7 138 /**
<> 144:ef7eb2e8f9f7 139 * @}
<> 144:ef7eb2e8f9f7 140 */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 143 /** @defgroup CRC_Exported_Constants CRC Exported Constants
<> 144:ef7eb2e8f9f7 144 * @{
<> 144:ef7eb2e8f9f7 145 */
<> 144:ef7eb2e8f9f7 146 /** @defgroup CRC_Default_Polynomial_Value Default CRC generating polynomial
<> 144:ef7eb2e8f9f7 147 * @{
<> 144:ef7eb2e8f9f7 148 */
<> 144:ef7eb2e8f9f7 149 #define DEFAULT_CRC32_POLY 0x04C11DB7
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 /**
<> 144:ef7eb2e8f9f7 152 * @}
<> 144:ef7eb2e8f9f7 153 */
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 /** @defgroup CRC_Default_InitValue Default CRC computation initialization value
<> 144:ef7eb2e8f9f7 156 * @{
<> 144:ef7eb2e8f9f7 157 */
<> 144:ef7eb2e8f9f7 158 #define DEFAULT_CRC_INITVALUE 0xFFFFFFFFU
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 /**
<> 144:ef7eb2e8f9f7 161 * @}
<> 144:ef7eb2e8f9f7 162 */
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 /** @defgroup CRC_Default_Polynomial Indicates whether or not default polynomial is used
<> 144:ef7eb2e8f9f7 165 * @{
<> 144:ef7eb2e8f9f7 166 */
<> 144:ef7eb2e8f9f7 167 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)
<> 156:95d6b41a828b 168 #define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00U)
<> 156:95d6b41a828b 169 #define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01U)
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 #define IS_DEFAULT_POLYNOMIAL(DEFAULT) (((DEFAULT) == DEFAULT_POLYNOMIAL_ENABLE) || \
<> 144:ef7eb2e8f9f7 172 ((DEFAULT) == DEFAULT_POLYNOMIAL_DISABLE))
<> 144:ef7eb2e8f9f7 173 #else
<> 156:95d6b41a828b 174 #define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00U)
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 #define IS_DEFAULT_POLYNOMIAL(DEFAULT) ((DEFAULT) == DEFAULT_POLYNOMIAL_ENABLE)
<> 144:ef7eb2e8f9f7 177 #endif /* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx) */
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 /**
<> 144:ef7eb2e8f9f7 180 * @}
<> 144:ef7eb2e8f9f7 181 */
<> 144:ef7eb2e8f9f7 182
<> 144:ef7eb2e8f9f7 183 /** @defgroup CRC_Default_InitValue_Use Indicates whether or not default init value is used
<> 144:ef7eb2e8f9f7 184 * @{
<> 144:ef7eb2e8f9f7 185 */
<> 156:95d6b41a828b 186 #define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00U)
<> 156:95d6b41a828b 187 #define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01U)
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 #define IS_DEFAULT_INIT_VALUE(VALUE) (((VALUE) == DEFAULT_INIT_VALUE_ENABLE) || \
<> 144:ef7eb2e8f9f7 190 ((VALUE) == DEFAULT_INIT_VALUE_DISABLE))
<> 144:ef7eb2e8f9f7 191 /**
<> 144:ef7eb2e8f9f7 192 * @}
<> 144:ef7eb2e8f9f7 193 */
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 /** @defgroup CRC_Input_Buffer_Format Input Buffer Format
<> 144:ef7eb2e8f9f7 196 * @{
<> 144:ef7eb2e8f9f7 197 */
<> 144:ef7eb2e8f9f7 198 /* WARNING: CRC_INPUT_FORMAT_UNDEFINED is created for reference purposes but
<> 144:ef7eb2e8f9f7 199 * an error is triggered in HAL_CRC_Init() if InputDataFormat field is set
<> 144:ef7eb2e8f9f7 200 * to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for
<> 144:ef7eb2e8f9f7 201 * the CRC APIs to provide a correct result */
<> 156:95d6b41a828b 202 #define CRC_INPUTDATA_FORMAT_UNDEFINED (0x00000000U)
<> 156:95d6b41a828b 203 #define CRC_INPUTDATA_FORMAT_BYTES (0x00000001U)
<> 156:95d6b41a828b 204 #define CRC_INPUTDATA_FORMAT_HALFWORDS (0x00000002U)
<> 156:95d6b41a828b 205 #define CRC_INPUTDATA_FORMAT_WORDS (0x00000003U)
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 #define IS_CRC_INPUTDATA_FORMAT(FORMAT) (((FORMAT) == CRC_INPUTDATA_FORMAT_BYTES) || \
<> 144:ef7eb2e8f9f7 208 ((FORMAT) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \
<> 144:ef7eb2e8f9f7 209 ((FORMAT) == CRC_INPUTDATA_FORMAT_WORDS))
<> 144:ef7eb2e8f9f7 210 /**
<> 144:ef7eb2e8f9f7 211 * @}
<> 144:ef7eb2e8f9f7 212 */
<> 144:ef7eb2e8f9f7 213
<> 144:ef7eb2e8f9f7 214 /**
<> 144:ef7eb2e8f9f7 215 * @}
<> 144:ef7eb2e8f9f7 216 */
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 /** @defgroup CRC_Exported_Macros CRC Exported Macros
<> 144:ef7eb2e8f9f7 221 * @{
<> 144:ef7eb2e8f9f7 222 */
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 /** @brief Reset CRC handle state
Anna Bridge 180:96ed750bd169 225 * @param __HANDLE__ CRC handle.
<> 144:ef7eb2e8f9f7 226 * @retval None
<> 144:ef7eb2e8f9f7 227 */
<> 144:ef7eb2e8f9f7 228 #define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 /**
<> 144:ef7eb2e8f9f7 231 * @brief Reset CRC Data Register.
Anna Bridge 180:96ed750bd169 232 * @param __HANDLE__ CRC handle
<> 144:ef7eb2e8f9f7 233 * @retval None.
<> 144:ef7eb2e8f9f7 234 */
<> 144:ef7eb2e8f9f7 235 #define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 /**
<> 144:ef7eb2e8f9f7 238 * @brief Set CRC INIT non-default value
Anna Bridge 180:96ed750bd169 239 * @param __HANDLE__ CRC handle
Anna Bridge 180:96ed750bd169 240 * @param __INIT__ 32-bit initial value
<> 144:ef7eb2e8f9f7 241 * @retval None.
<> 144:ef7eb2e8f9f7 242 */
<> 144:ef7eb2e8f9f7 243 #define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__))
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 /**
<> 144:ef7eb2e8f9f7 246 * @brief Stores a 8-bit data in the Independent Data(ID) register.
Anna Bridge 180:96ed750bd169 247 * @param __HANDLE__ CRC handle
Anna Bridge 180:96ed750bd169 248 * @param __VALUE__ 8-bit value to be stored in the ID register
<> 144:ef7eb2e8f9f7 249 * @retval None
<> 144:ef7eb2e8f9f7 250 */
<> 144:ef7eb2e8f9f7 251 #define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /**
<> 144:ef7eb2e8f9f7 254 * @brief Returns the 8-bit data stored in the Independent Data(ID) register.
Anna Bridge 180:96ed750bd169 255 * @param __HANDLE__ CRC handle
<> 144:ef7eb2e8f9f7 256 * @retval 8-bit value of the ID register
<> 144:ef7eb2e8f9f7 257 */
<> 144:ef7eb2e8f9f7 258 #define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
<> 144:ef7eb2e8f9f7 259 /**
<> 144:ef7eb2e8f9f7 260 * @}
<> 144:ef7eb2e8f9f7 261 */
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /* Include CRC HAL Extension module */
<> 144:ef7eb2e8f9f7 265 #include "stm32f0xx_hal_crc_ex.h"
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 268 /** @addtogroup CRC_Exported_Functions CRC Exported Functions
<> 144:ef7eb2e8f9f7 269 * @{
<> 144:ef7eb2e8f9f7 270 */
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 /** @addtogroup CRC_Exported_Functions_Group1 Initialization/de-initialization functions
<> 144:ef7eb2e8f9f7 273 * @brief Initialization and Configuration functions.
<> 144:ef7eb2e8f9f7 274 * @{
<> 144:ef7eb2e8f9f7 275 */
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 /* Initialization and de-initialization functions ****************************/
<> 144:ef7eb2e8f9f7 278 HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
<> 144:ef7eb2e8f9f7 279 HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc);
<> 144:ef7eb2e8f9f7 280 void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
<> 144:ef7eb2e8f9f7 281 void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
<> 144:ef7eb2e8f9f7 282 /**
<> 144:ef7eb2e8f9f7 283 * @}
<> 144:ef7eb2e8f9f7 284 */
<> 144:ef7eb2e8f9f7 285
<> 144:ef7eb2e8f9f7 286 /** @addtogroup CRC_Exported_Functions_Group2 Peripheral Control functions
<> 144:ef7eb2e8f9f7 287 * @brief management functions.
<> 144:ef7eb2e8f9f7 288 * @{
<> 144:ef7eb2e8f9f7 289 */
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 /* Peripheral Control functions ***********************************************/
<> 144:ef7eb2e8f9f7 292 uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
<> 144:ef7eb2e8f9f7 293 uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
<> 144:ef7eb2e8f9f7 294 /**
<> 144:ef7eb2e8f9f7 295 * @}
<> 144:ef7eb2e8f9f7 296 */
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298 /** @addtogroup CRC_Exported_Functions_Group3 Peripheral State functions
<> 144:ef7eb2e8f9f7 299 * @brief Peripheral State functions.
<> 144:ef7eb2e8f9f7 300 * @{
<> 144:ef7eb2e8f9f7 301 */
<> 144:ef7eb2e8f9f7 302 /* Peripheral State and Error functions ***************************************/
<> 144:ef7eb2e8f9f7 303 HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
<> 144:ef7eb2e8f9f7 304 /**
<> 144:ef7eb2e8f9f7 305 * @}
<> 144:ef7eb2e8f9f7 306 */
<> 144:ef7eb2e8f9f7 307
<> 144:ef7eb2e8f9f7 308 /**
<> 144:ef7eb2e8f9f7 309 * @}
<> 144:ef7eb2e8f9f7 310 */
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 /** @addtogroup CRC_Exported_Constants CRC Exported Constants
<> 144:ef7eb2e8f9f7 313 * @brief aliases for inter STM32 series compatibility
<> 144:ef7eb2e8f9f7 314 * @{
<> 144:ef7eb2e8f9f7 315 */
<> 144:ef7eb2e8f9f7 316 /** @defgroup CRC_Aliases Aliases for inter STM32 series compatibility
<> 144:ef7eb2e8f9f7 317 * @{
<> 144:ef7eb2e8f9f7 318 */
<> 144:ef7eb2e8f9f7 319 /* Aliases for inter STM32 series compatibility */
<> 144:ef7eb2e8f9f7 320 #define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse
<> 144:ef7eb2e8f9f7 321 #define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse
<> 144:ef7eb2e8f9f7 322 /**
<> 144:ef7eb2e8f9f7 323 * @}
<> 144:ef7eb2e8f9f7 324 */
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 /**
<> 144:ef7eb2e8f9f7 327 * @}
<> 144:ef7eb2e8f9f7 328 */
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /**
<> 144:ef7eb2e8f9f7 331 * @}
<> 144:ef7eb2e8f9f7 332 */
<> 144:ef7eb2e8f9f7 333
<> 144:ef7eb2e8f9f7 334 /**
<> 144:ef7eb2e8f9f7 335 * @}
<> 144:ef7eb2e8f9f7 336 */
<> 144:ef7eb2e8f9f7 337
<> 144:ef7eb2e8f9f7 338 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 339 }
<> 144:ef7eb2e8f9f7 340 #endif
<> 144:ef7eb2e8f9f7 341
<> 144:ef7eb2e8f9f7 342 #endif /* __STM32F0xx_HAL_CRC_H */
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 345