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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_adc_ex.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
180:96ed750bd169 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_adc_ex.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief Header file of ADC HAL Extension module.
<> 144:ef7eb2e8f9f7 6 ******************************************************************************
<> 144:ef7eb2e8f9f7 7 * @attention
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 12 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 14 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 17 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 19 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 20 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 32 *
<> 144:ef7eb2e8f9f7 33 ******************************************************************************
<> 144:ef7eb2e8f9f7 34 */
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 37 #ifndef __STM32F0xx_HAL_ADC_EX_H
<> 144:ef7eb2e8f9f7 38 #define __STM32F0xx_HAL_ADC_EX_H
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 41 extern "C" {
<> 144:ef7eb2e8f9f7 42 #endif
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 45 #include "stm32f0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 48 * @{
<> 144:ef7eb2e8f9f7 49 */
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /** @addtogroup ADCEx
<> 144:ef7eb2e8f9f7 52 * @{
<> 144:ef7eb2e8f9f7 53 */
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 56 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /** @defgroup ADC_Exported_Constants ADC Exported Constants
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 63 #define ADC_CCR_ALL (ADC_CCR_VBATEN | ADC_CCR_TSEN | ADC_CCR_VREFEN)
<> 144:ef7eb2e8f9f7 64 #else
<> 144:ef7eb2e8f9f7 65 #define ADC_CCR_ALL (ADC_CCR_TSEN | ADC_CCR_VREFEN)
<> 144:ef7eb2e8f9f7 66 #endif
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 /** @defgroup ADC_External_trigger_source_Regular ADC External trigger source Regular
<> 144:ef7eb2e8f9f7 69 * @{
<> 144:ef7eb2e8f9f7 70 */
<> 144:ef7eb2e8f9f7 71 /* List of external triggers with generic trigger name, sorted by trigger */
<> 144:ef7eb2e8f9f7 72 /* name: */
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 /* External triggers of regular group for ADC1 */
<> 144:ef7eb2e8f9f7 75 #define ADC_EXTERNALTRIGCONV_T1_TRGO ADC1_2_EXTERNALTRIG_T1_TRGO
<> 144:ef7eb2e8f9f7 76 #define ADC_EXTERNALTRIGCONV_T1_CC4 ADC1_2_EXTERNALTRIG_T1_CC4
<> 144:ef7eb2e8f9f7 77 #define ADC_EXTERNALTRIGCONV_T3_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO
<> 156:95d6b41a828b 78 #define ADC_SOFTWARE_START (ADC_CFGR1_EXTSEL + 1U)
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 81 #define ADC_EXTERNALTRIGCONV_T2_TRGO ADC1_2_EXTERNALTRIG_T2_TRGO
<> 144:ef7eb2e8f9f7 82 #endif
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 #if !defined(STM32F030x6) && !defined(STM32F070x6) && !defined(STM32F042x6)
<> 144:ef7eb2e8f9f7 85 #define ADC_EXTERNALTRIGCONV_T15_TRGO ADC1_2_EXTERNALTRIG_T15_TRGO
<> 144:ef7eb2e8f9f7 86 #endif
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 /**
<> 144:ef7eb2e8f9f7 89 * @}
<> 144:ef7eb2e8f9f7 90 */
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 /** @defgroup ADC_channels ADC channels
<> 144:ef7eb2e8f9f7 94 * @{
<> 144:ef7eb2e8f9f7 95 */
<> 144:ef7eb2e8f9f7 96 /* Note: Depending on devices, some channels may not be available on package */
<> 144:ef7eb2e8f9f7 97 /* pins. Refer to device datasheet for channels availability. */
<> 144:ef7eb2e8f9f7 98 /* Note: Channels are used by bitfields for setting of channel selection */
<> 144:ef7eb2e8f9f7 99 /* (register ADC_CHSELR) and used by number for setting of analog */
<> 144:ef7eb2e8f9f7 100 /* watchdog channel (bits AWDCH in register ADC_CFGR1). */
<> 144:ef7eb2e8f9f7 101 /* Channels are defined with decimal numbers and converted them to */
<> 144:ef7eb2e8f9f7 102 /* bitfields when needed. */
<> 156:95d6b41a828b 103 #define ADC_CHANNEL_0 ( 0x00000000U)
<> 156:95d6b41a828b 104 #define ADC_CHANNEL_1 ( 0x00000001U)
<> 156:95d6b41a828b 105 #define ADC_CHANNEL_2 ( 0x00000002U)
<> 156:95d6b41a828b 106 #define ADC_CHANNEL_3 ( 0x00000003U)
<> 156:95d6b41a828b 107 #define ADC_CHANNEL_4 ( 0x00000004U)
<> 156:95d6b41a828b 108 #define ADC_CHANNEL_5 ( 0x00000005U)
<> 156:95d6b41a828b 109 #define ADC_CHANNEL_6 ( 0x00000006U)
<> 156:95d6b41a828b 110 #define ADC_CHANNEL_7 ( 0x00000007U)
<> 156:95d6b41a828b 111 #define ADC_CHANNEL_8 ( 0x00000008U)
<> 156:95d6b41a828b 112 #define ADC_CHANNEL_9 ( 0x00000009U)
<> 156:95d6b41a828b 113 #define ADC_CHANNEL_10 ( 0x0000000AU)
<> 156:95d6b41a828b 114 #define ADC_CHANNEL_11 ( 0x0000000BU)
<> 156:95d6b41a828b 115 #define ADC_CHANNEL_12 ( 0x0000000CU)
<> 156:95d6b41a828b 116 #define ADC_CHANNEL_13 ( 0x0000000DU)
<> 156:95d6b41a828b 117 #define ADC_CHANNEL_14 ( 0x0000000EU)
<> 156:95d6b41a828b 118 #define ADC_CHANNEL_15 ( 0x0000000FU)
<> 156:95d6b41a828b 119 #define ADC_CHANNEL_16 ( 0x00000010U)
<> 156:95d6b41a828b 120 #define ADC_CHANNEL_17 ( 0x00000011U)
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 #define ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_16
<> 144:ef7eb2e8f9f7 123 #define ADC_CHANNEL_VREFINT ADC_CHANNEL_17
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 156:95d6b41a828b 126 #define ADC_CHANNEL_18 ( 0x00000012U)
<> 144:ef7eb2e8f9f7 127 #define ADC_CHANNEL_VBAT ADC_CHANNEL_18
<> 144:ef7eb2e8f9f7 128 #endif
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /**
<> 144:ef7eb2e8f9f7 131 * @}
<> 144:ef7eb2e8f9f7 132 */
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 /**
<> 144:ef7eb2e8f9f7 135 * @}
<> 144:ef7eb2e8f9f7 136 */
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 /** @defgroup ADCEx_Private_Macros ADCEx Private Macros
<> 144:ef7eb2e8f9f7 144 * @{
<> 144:ef7eb2e8f9f7 145 */
<> 144:ef7eb2e8f9f7 146 /* Macro reserved for internal HAL driver usage, not intended to be used in */
<> 144:ef7eb2e8f9f7 147 /* code of final user. */
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 /**
<> 144:ef7eb2e8f9f7 150 * @brief Test if the selected ADC channel is an internal channel
<> 144:ef7eb2e8f9f7 151 * VrefInt/TempSensor/Vbat
<> 144:ef7eb2e8f9f7 152 * Note: On STM32F0, availability of internal channel Vbat depends on
<> 144:ef7eb2e8f9f7 153 * devices lines.
Anna Bridge 180:96ed750bd169 154 * @param __CHANNEL__ ADC channel
<> 144:ef7eb2e8f9f7 155 * @retval None
<> 144:ef7eb2e8f9f7 156 */
<> 144:ef7eb2e8f9f7 157 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 158 #define ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \
<> 144:ef7eb2e8f9f7 159 (((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) || \
<> 144:ef7eb2e8f9f7 160 ((__CHANNEL__) == ADC_CHANNEL_VREFINT) || \
<> 144:ef7eb2e8f9f7 161 ((__CHANNEL__) == ADC_CHANNEL_VBAT) \
<> 144:ef7eb2e8f9f7 162 )
<> 144:ef7eb2e8f9f7 163 #else
<> 144:ef7eb2e8f9f7 164 #define ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \
<> 144:ef7eb2e8f9f7 165 (((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) || \
<> 144:ef7eb2e8f9f7 166 ((__CHANNEL__) == ADC_CHANNEL_VREFINT) \
<> 144:ef7eb2e8f9f7 167 )
<> 144:ef7eb2e8f9f7 168 #endif
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 /**
<> 144:ef7eb2e8f9f7 171 * @brief Select the internal measurement path to be enabled/disabled
<> 144:ef7eb2e8f9f7 172 * corresponding to the selected ADC internal channel
<> 144:ef7eb2e8f9f7 173 * VrefInt/TempSensor/Vbat.
<> 144:ef7eb2e8f9f7 174 * Note: On STM32F0, availability of internal channel Vbat depends on
<> 144:ef7eb2e8f9f7 175 * devices lines.
Anna Bridge 180:96ed750bd169 176 * @param __CHANNEL__ ADC channel
<> 144:ef7eb2e8f9f7 177 * @retval Bit of register ADC_CCR
<> 144:ef7eb2e8f9f7 178 */
<> 144:ef7eb2e8f9f7 179 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 180 #define ADC_CHANNEL_INTERNAL_PATH(__CHANNEL__) \
<> 144:ef7eb2e8f9f7 181 (( (__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR \
<> 144:ef7eb2e8f9f7 182 )? \
<> 144:ef7eb2e8f9f7 183 (ADC_CCR_TSEN) \
<> 144:ef7eb2e8f9f7 184 : \
<> 144:ef7eb2e8f9f7 185 ( \
<> 144:ef7eb2e8f9f7 186 ( (__CHANNEL__) == ADC_CHANNEL_VREFINT \
<> 144:ef7eb2e8f9f7 187 )? \
<> 144:ef7eb2e8f9f7 188 (ADC_CCR_VREFEN) \
<> 144:ef7eb2e8f9f7 189 : \
<> 144:ef7eb2e8f9f7 190 (ADC_CCR_VBATEN) \
<> 144:ef7eb2e8f9f7 191 ) \
<> 144:ef7eb2e8f9f7 192 )
<> 144:ef7eb2e8f9f7 193 #else
<> 144:ef7eb2e8f9f7 194 #define ADC_CHANNEL_INTERNAL_PATH(__CHANNEL__) \
<> 144:ef7eb2e8f9f7 195 (( (__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR \
<> 144:ef7eb2e8f9f7 196 )? \
<> 144:ef7eb2e8f9f7 197 (ADC_CCR_TSEN) \
<> 144:ef7eb2e8f9f7 198 : \
<> 144:ef7eb2e8f9f7 199 (ADC_CCR_VREFEN) \
<> 144:ef7eb2e8f9f7 200 )
<> 144:ef7eb2e8f9f7 201 #endif
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 #if defined (STM32F030x6) || defined (STM32F070x6)
<> 144:ef7eb2e8f9f7 205 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_TRGO) || \
<> 144:ef7eb2e8f9f7 206 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC4) || \
<> 144:ef7eb2e8f9f7 207 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
<> 144:ef7eb2e8f9f7 208 ((REGTRIG) == ADC_SOFTWARE_START))
<> 144:ef7eb2e8f9f7 209 #elif defined (STM32F042x6)
<> 144:ef7eb2e8f9f7 210 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_TRGO) || \
<> 144:ef7eb2e8f9f7 211 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC4) || \
<> 144:ef7eb2e8f9f7 212 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_TRGO) || \
<> 144:ef7eb2e8f9f7 213 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
<> 144:ef7eb2e8f9f7 214 ((REGTRIG) == ADC_SOFTWARE_START))
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 #elif defined (STM32F030xC) || defined (STM32F070xB) || defined (STM32F030x8)
<> 144:ef7eb2e8f9f7 217 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_TRGO) || \
<> 144:ef7eb2e8f9f7 218 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC4) || \
<> 144:ef7eb2e8f9f7 219 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
<> 144:ef7eb2e8f9f7 220 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T15_TRGO) || \
<> 144:ef7eb2e8f9f7 221 ((REGTRIG) == ADC_SOFTWARE_START))
<> 144:ef7eb2e8f9f7 222 #else
<> 144:ef7eb2e8f9f7 223 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_TRGO) || \
<> 144:ef7eb2e8f9f7 224 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC4) || \
<> 144:ef7eb2e8f9f7 225 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_TRGO) || \
<> 144:ef7eb2e8f9f7 226 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
<> 144:ef7eb2e8f9f7 227 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T15_TRGO) || \
<> 144:ef7eb2e8f9f7 228 ((REGTRIG) == ADC_SOFTWARE_START))
<> 144:ef7eb2e8f9f7 229 #endif
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 232 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) || \
<> 144:ef7eb2e8f9f7 233 ((CHANNEL) == ADC_CHANNEL_1) || \
<> 144:ef7eb2e8f9f7 234 ((CHANNEL) == ADC_CHANNEL_2) || \
<> 144:ef7eb2e8f9f7 235 ((CHANNEL) == ADC_CHANNEL_3) || \
<> 144:ef7eb2e8f9f7 236 ((CHANNEL) == ADC_CHANNEL_4) || \
<> 144:ef7eb2e8f9f7 237 ((CHANNEL) == ADC_CHANNEL_5) || \
<> 144:ef7eb2e8f9f7 238 ((CHANNEL) == ADC_CHANNEL_6) || \
<> 144:ef7eb2e8f9f7 239 ((CHANNEL) == ADC_CHANNEL_7) || \
<> 144:ef7eb2e8f9f7 240 ((CHANNEL) == ADC_CHANNEL_8) || \
<> 144:ef7eb2e8f9f7 241 ((CHANNEL) == ADC_CHANNEL_9) || \
<> 144:ef7eb2e8f9f7 242 ((CHANNEL) == ADC_CHANNEL_10) || \
<> 144:ef7eb2e8f9f7 243 ((CHANNEL) == ADC_CHANNEL_11) || \
<> 144:ef7eb2e8f9f7 244 ((CHANNEL) == ADC_CHANNEL_12) || \
<> 144:ef7eb2e8f9f7 245 ((CHANNEL) == ADC_CHANNEL_13) || \
<> 144:ef7eb2e8f9f7 246 ((CHANNEL) == ADC_CHANNEL_14) || \
<> 144:ef7eb2e8f9f7 247 ((CHANNEL) == ADC_CHANNEL_15) || \
<> 144:ef7eb2e8f9f7 248 ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR) || \
<> 144:ef7eb2e8f9f7 249 ((CHANNEL) == ADC_CHANNEL_VREFINT) || \
<> 144:ef7eb2e8f9f7 250 ((CHANNEL) == ADC_CHANNEL_VBAT) )
<> 144:ef7eb2e8f9f7 251 #else
<> 144:ef7eb2e8f9f7 252 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) || \
<> 144:ef7eb2e8f9f7 253 ((CHANNEL) == ADC_CHANNEL_1) || \
<> 144:ef7eb2e8f9f7 254 ((CHANNEL) == ADC_CHANNEL_2) || \
<> 144:ef7eb2e8f9f7 255 ((CHANNEL) == ADC_CHANNEL_3) || \
<> 144:ef7eb2e8f9f7 256 ((CHANNEL) == ADC_CHANNEL_4) || \
<> 144:ef7eb2e8f9f7 257 ((CHANNEL) == ADC_CHANNEL_5) || \
<> 144:ef7eb2e8f9f7 258 ((CHANNEL) == ADC_CHANNEL_6) || \
<> 144:ef7eb2e8f9f7 259 ((CHANNEL) == ADC_CHANNEL_7) || \
<> 144:ef7eb2e8f9f7 260 ((CHANNEL) == ADC_CHANNEL_8) || \
<> 144:ef7eb2e8f9f7 261 ((CHANNEL) == ADC_CHANNEL_9) || \
<> 144:ef7eb2e8f9f7 262 ((CHANNEL) == ADC_CHANNEL_10) || \
<> 144:ef7eb2e8f9f7 263 ((CHANNEL) == ADC_CHANNEL_11) || \
<> 144:ef7eb2e8f9f7 264 ((CHANNEL) == ADC_CHANNEL_12) || \
<> 144:ef7eb2e8f9f7 265 ((CHANNEL) == ADC_CHANNEL_13) || \
<> 144:ef7eb2e8f9f7 266 ((CHANNEL) == ADC_CHANNEL_14) || \
<> 144:ef7eb2e8f9f7 267 ((CHANNEL) == ADC_CHANNEL_15) || \
<> 144:ef7eb2e8f9f7 268 ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR) || \
<> 144:ef7eb2e8f9f7 269 ((CHANNEL) == ADC_CHANNEL_VREFINT) )
<> 144:ef7eb2e8f9f7 270 #endif
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 /**
<> 144:ef7eb2e8f9f7 273 * @}
<> 144:ef7eb2e8f9f7 274 */
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 278 /** @addtogroup ADCEx_Exported_Functions
<> 144:ef7eb2e8f9f7 279 * @{
<> 144:ef7eb2e8f9f7 280 */
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 /* IO operation functions *****************************************************/
<> 144:ef7eb2e8f9f7 283 /** @addtogroup ADCEx_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 284 * @{
<> 144:ef7eb2e8f9f7 285 */
<> 144:ef7eb2e8f9f7 286
<> 144:ef7eb2e8f9f7 287 /* ADC calibration */
<> 144:ef7eb2e8f9f7 288 HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
<> 144:ef7eb2e8f9f7 289 /**
<> 144:ef7eb2e8f9f7 290 * @}
<> 144:ef7eb2e8f9f7 291 */
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 /**
<> 144:ef7eb2e8f9f7 295 * @}
<> 144:ef7eb2e8f9f7 296 */
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298
<> 144:ef7eb2e8f9f7 299 /**
<> 144:ef7eb2e8f9f7 300 * @}
<> 144:ef7eb2e8f9f7 301 */
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 /**
<> 144:ef7eb2e8f9f7 304 * @}
<> 144:ef7eb2e8f9f7 305 */
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 308 }
<> 144:ef7eb2e8f9f7 309 #endif
<> 144:ef7eb2e8f9f7 310
<> 144:ef7eb2e8f9f7 311 #endif /* __STM32F0xx_HAL_ADC_EX_H */
<> 144:ef7eb2e8f9f7 312
<> 144:ef7eb2e8f9f7 313
<> 144:ef7eb2e8f9f7 314 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 315