Jesus Fausto
This is the SparkFun_VL53L1X_Arduino_Library translated into mbed, with some elements of Ian Kilburn's VL6180x mbed library.
Dependents: Hug2Go_ver_2 Nucleo_rtos_basic_f103rb
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VL53L1X_register_map.h
00001 /******************************************************************************* 00002 Copyright (C) 2016, STMicroelectronics International N.V. 00003 All rights reserved. 00004 Redistribution and use in source and binary forms, with or without 00005 modification, are permitted provided that the following conditions are met: 00006 * Redistributions of source code must retain the above copyright 00007 notice, this list of conditions and the following disclaimer. 00008 * Redistributions in binary form must reproduce the above copyright 00009 notice, this list of conditions and the following disclaimer in the 00010 documentation and/or other materials provided with the distribution. 00011 * Neither the name of STMicroelectronics nor the 00012 names of its contributors may be used to endorse or promote products 00013 derived from this software without specific prior written permission. 00014 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 00015 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 00016 WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND 00017 NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS ARE DISCLAIMED. 00018 IN NO EVENT SHALL STMICROELECTRONICS INTERNATIONAL N.V. BE LIABLE FOR ANY 00019 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 00020 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00021 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 00022 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00023 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 00024 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00025 ******************************************************************************/ 00026 00027 /** 00028 * @file vl53l1_register_map.h 00029 * @brief VL53L1 Register Map definitions 00030 */ 00031 00032 #ifndef _VL53L1_REGISTER_MAP_H_ 00033 #define _VL53L1_REGISTER_MAP_H_ 00034 00035 /** @defgroup VL53L1_register_DefineRegisters_group Define Registers * @brief List of all the defined registers 00036 * @{ 00037 */ 00038 00039 #define VL53L1_SOFT_RESET 0x0000 00040 /*!< 00041 info: \n 00042 - msb = 0 00043 - lsb = 0 00044 - i2c_size = 1 00045 */ 00046 #define VL53L1_I2C_SLAVE__DEVICE_ADDRESS 0x0001 00047 /*!< 00048 type: uint8_t \n 00049 default: EWOK_I2C_DEV_ADDR_DEFAULT \n 00050 info: \n 00051 - msb = 6 00052 - lsb = 0 00053 - i2c_size = 1 00054 groups: \n 00055 ['static_nvm_managed', 'system_config'] 00056 fields: \n 00057 - [6:0] = i2c_slave_device_address 00058 */ 00059 #define VL53L1_ANA_CONFIG__VHV_REF_SEL_VDDPIX 0x0002 00060 /*!< 00061 type: uint8_t \n 00062 default: 0x02 \n 00063 info: \n 00064 - msb = 3 00065 - lsb = 0 00066 - i2c_size = 1 00067 groups: \n 00068 ['static_nvm_managed', 'analog_config'] 00069 fields: \n 00070 - [3:0] = ref_sel_vddpix 00071 */ 00072 #define VL53L1_ANA_CONFIG__VHV_REF_SEL_VQUENCH 0x0003 00073 /*!< 00074 type: uint8_t \n 00075 default: 0x10 \n 00076 info: \n 00077 - msb = 6 00078 - lsb = 3 00079 - i2c_size = 1 00080 groups: \n 00081 ['static_nvm_managed', 'analog_config'] 00082 fields: \n 00083 - [6:3] = ref_sel_vquench 00084 */ 00085 #define VL53L1_ANA_CONFIG__REG_AVDD1V2_SEL 0x0004 00086 /*!< 00087 type: uint8_t \n 00088 default: 0x00 \n 00089 info: \n 00090 - msb = 1 00091 - lsb = 0 00092 - i2c_size = 1 00093 groups: \n 00094 ['static_nvm_managed', 'analog_config'] 00095 fields: \n 00096 - [1:0] = reg_avdd1v2_sel 00097 */ 00098 #define VL53L1_ANA_CONFIG__FAST_OSC__TRIM 0x0005 00099 /*!< 00100 type: uint8_t \n 00101 default: 0x48 \n 00102 info: \n 00103 - msb = 6 00104 - lsb = 0 00105 - i2c_size = 1 00106 groups: \n 00107 ['static_nvm_managed', 'analog_config'] 00108 fields: \n 00109 - [6:0] = fast_osc_trim 00110 */ 00111 #define VL53L1_OSC_MEASURED__FAST_OSC__FREQUENCY 0x0006 00112 /*!< 00113 type: uint16_t \n 00114 default: OSC_FREQUENCY \n 00115 info: \n 00116 - msb = 15 00117 - lsb = 0 00118 - i2c_size = 2 00119 groups: \n 00120 ['static_nvm_managed', 'analog_config'] 00121 fields: \n 00122 - [15:0] = osc_frequency (fixed point 4.12) 00123 */ 00124 #define VL53L1_OSC_MEASURED__FAST_OSC__FREQUENCY_HI 0x0006 00125 /*!< 00126 info: \n 00127 - msb = 0 00128 - lsb = 0 00129 - i2c_size = 1 00130 */ 00131 #define VL53L1_OSC_MEASURED__FAST_OSC__FREQUENCY_LO 0x0007 00132 /*!< 00133 info: \n 00134 - msb = 0 00135 - lsb = 0 00136 - i2c_size = 1 00137 */ 00138 #define VL53L1_VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND 0x0008 00139 /*!< 00140 type: uint8_t \n 00141 default: 0x81 \n 00142 info: \n 00143 - msb = 7 00144 - lsb = 0 00145 - i2c_size = 1 00146 groups: \n 00147 ['static_nvm_managed', 'vhv_config'] 00148 fields: \n 00149 - [1:0] = vhv_timeout__macrop 00150 - [7:2] = vhv_loop_bound 00151 */ 00152 #define VL53L1_VHV_CONFIG__COUNT_THRESH 0x0009 00153 /*!< 00154 type: uint8_t \n 00155 default: 0x80 \n 00156 info: \n 00157 - msb = 7 00158 - lsb = 0 00159 - i2c_size = 1 00160 groups: \n 00161 ['static_nvm_managed', 'vhv_config'] 00162 fields: \n 00163 - [7:0] = vhv_count_thresh 00164 */ 00165 #define VL53L1_VHV_CONFIG__OFFSET 0x000A 00166 /*!< 00167 type: uint8_t \n 00168 default: 0x07 \n 00169 info: \n 00170 - msb = 5 00171 - lsb = 0 00172 - i2c_size = 1 00173 groups: \n 00174 ['static_nvm_managed', 'vhv_config'] 00175 fields: \n 00176 - [5:0] = vhv_step_val 00177 */ 00178 #define VL53L1_VHV_CONFIG__INIT 0x000B 00179 /*!< 00180 type: uint8_t \n 00181 default: 0x20 \n 00182 info: \n 00183 - msb = 7 00184 - lsb = 0 00185 - i2c_size = 1 00186 groups: \n 00187 ['static_nvm_managed', 'vhv_config'] 00188 fields: \n 00189 - [7] = vhv0_init_enable 00190 - [5:0] = vhv0_init_value 00191 */ 00192 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_0 0x000D 00193 /*!< 00194 type: uint8_t \n 00195 default: 0x00 \n 00196 info: \n 00197 - msb = 7 00198 - lsb = 0 00199 - i2c_size = 1 00200 groups: \n 00201 ['customer_nvm_managed', 'ref_spad_en'] 00202 fields: \n 00203 - [7:0] = spad_enables_ref_0 00204 */ 00205 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_1 0x000E 00206 /*!< 00207 type: uint8_t \n 00208 default: 0x00 \n 00209 info: \n 00210 - msb = 7 00211 - lsb = 0 00212 - i2c_size = 1 00213 groups: \n 00214 ['customer_nvm_managed', 'ref_spad_en'] 00215 fields: \n 00216 - [7:0] = spad_enables_ref_1 00217 */ 00218 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_2 0x000F 00219 /*!< 00220 type: uint8_t \n 00221 default: 0x00 \n 00222 info: \n 00223 - msb = 7 00224 - lsb = 0 00225 - i2c_size = 1 00226 groups: \n 00227 ['customer_nvm_managed', 'ref_spad_en'] 00228 fields: \n 00229 - [7:0] = spad_enables_ref_2 00230 */ 00231 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_3 0x0010 00232 /*!< 00233 type: uint8_t \n 00234 default: 0x00 \n 00235 info: \n 00236 - msb = 7 00237 - lsb = 0 00238 - i2c_size = 1 00239 groups: \n 00240 ['customer_nvm_managed', 'ref_spad_en'] 00241 fields: \n 00242 - [7:0] = spad_enables_ref_3 00243 */ 00244 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_4 0x0011 00245 /*!< 00246 type: uint8_t \n 00247 default: 0x00 \n 00248 info: \n 00249 - msb = 7 00250 - lsb = 0 00251 - i2c_size = 1 00252 groups: \n 00253 ['customer_nvm_managed', 'ref_spad_en'] 00254 fields: \n 00255 - [7:0] = spad_enables_ref_4 00256 */ 00257 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_5 0x0012 00258 /*!< 00259 type: uint8_t \n 00260 default: 0x00 \n 00261 info: \n 00262 - msb = 3 00263 - lsb = 0 00264 - i2c_size = 1 00265 groups: \n 00266 ['customer_nvm_managed', 'ref_spad_en'] 00267 fields: \n 00268 - [3:0] = spad_enables_ref_5 00269 */ 00270 #define VL53L1_GLOBAL_CONFIG__REF_EN_START_SELECT 0x0013 00271 /*!< 00272 type: uint8_t \n 00273 default: 0x00 \n 00274 info: \n 00275 - msb = 7 00276 - lsb = 0 00277 - i2c_size = 1 00278 groups: \n 00279 ['customer_nvm_managed', 'ref_spad_start'] 00280 fields: \n 00281 - [7:0] = ref_en_start_select 00282 */ 00283 #define VL53L1_REF_SPAD_MAN__NUM_REQUESTED_REF_SPADS 0x0014 00284 /*!< 00285 type: uint8_t \n 00286 default: 0x2C \n 00287 info: \n 00288 - msb = 5 00289 - lsb = 0 00290 - i2c_size = 1 00291 groups: \n 00292 ['customer_nvm_managed', 'ref_spad_config'] 00293 fields: \n 00294 - [5:0] = ref_spad_man__num_requested_ref_spad 00295 */ 00296 #define VL53L1_REF_SPAD_MAN__REF_LOCATION 0x0015 00297 /*!< 00298 type: uint8_t \n 00299 default: 0x00 \n 00300 info: \n 00301 - msb = 1 00302 - lsb = 0 00303 - i2c_size = 1 00304 groups: \n 00305 ['customer_nvm_managed', 'ref_spad_config'] 00306 fields: \n 00307 - [1:0] = ref_spad_man__ref_location 00308 */ 00309 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x0016 00310 /*!< 00311 type: uint16_t \n 00312 default: 0x0000 \n 00313 info: \n 00314 - msb = 15 00315 - lsb = 0 00316 - i2c_size = 2 00317 groups: \n 00318 ['customer_nvm_managed', 'algo_config'] 00319 fields: \n 00320 - [15:0] = crosstalk_compensation_plane_offset_kcps (fixed point 7.9) 00321 */ 00322 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS_HI 0x0016 00323 /*!< 00324 info: \n 00325 - msb = 0 00326 - lsb = 0 00327 - i2c_size = 1 00328 */ 00329 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS_LO 0x0017 00330 /*!< 00331 info: \n 00332 - msb = 0 00333 - lsb = 0 00334 - i2c_size = 1 00335 */ 00336 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS 0x0018 00337 /*!< 00338 type: int16_t \n 00339 default: 0x0000 \n 00340 info: \n 00341 - msb = 15 00342 - lsb = 0 00343 - i2c_size = 2 00344 groups: \n 00345 ['customer_nvm_managed', 'algo_config'] 00346 fields: \n 00347 - [15:0] = crosstalk_compensation_x_plane_gradient_kcps (fixed point 5.11) 00348 */ 00349 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS_HI 0x0018 00350 /*!< 00351 info: \n 00352 - msb = 0 00353 - lsb = 0 00354 - i2c_size = 1 00355 */ 00356 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS_LO 0x0019 00357 /*!< 00358 info: \n 00359 - msb = 0 00360 - lsb = 0 00361 - i2c_size = 1 00362 */ 00363 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS 0x001A 00364 /*!< 00365 type: int16_t \n 00366 default: 0x0000 \n 00367 info: \n 00368 - msb = 15 00369 - lsb = 0 00370 - i2c_size = 2 00371 groups: \n 00372 ['customer_nvm_managed', 'algo_config'] 00373 fields: \n 00374 - [15:0] = crosstalk_compensation_y_plane_gradient_kcps (fixed point 5.11) 00375 */ 00376 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS_HI 0x001A 00377 /*!< 00378 info: \n 00379 - msb = 0 00380 - lsb = 0 00381 - i2c_size = 1 00382 */ 00383 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS_LO 0x001B 00384 /*!< 00385 info: \n 00386 - msb = 0 00387 - lsb = 0 00388 - i2c_size = 1 00389 */ 00390 #define VL53L1_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS 0x001C 00391 /*!< 00392 type: uint16_t \n 00393 default: 0x0000 \n 00394 info: \n 00395 - msb = 15 00396 - lsb = 0 00397 - i2c_size = 2 00398 groups: \n 00399 ['customer_nvm_managed', 'ref_spad_char'] 00400 fields: \n 00401 - [15:0] = ref_spad_char__total_rate_target_mcps (fixed point 9.7) 00402 */ 00403 #define VL53L1_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS_HI 0x001C 00404 /*!< 00405 info: \n 00406 - msb = 0 00407 - lsb = 0 00408 - i2c_size = 1 00409 */ 00410 #define VL53L1_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS_LO 0x001D 00411 /*!< 00412 info: \n 00413 - msb = 0 00414 - lsb = 0 00415 - i2c_size = 1 00416 */ 00417 #define VL53L1_ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x001E 00418 /*!< 00419 type: int16_t \n 00420 default: 0x0000 \n 00421 info: \n 00422 - msb = 12 00423 - lsb = 0 00424 - i2c_size = 2 00425 groups: \n 00426 ['customer_nvm_managed', 'algo_config'] 00427 fields: \n 00428 - [12:0] = part_to_part_offset_mm (fixed point 11.2) 00429 */ 00430 #define VL53L1_ALGO__PART_TO_PART_RANGE_OFFSET_MM_HI 0x001E 00431 /*!< 00432 info: \n 00433 - msb = 0 00434 - lsb = 0 00435 - i2c_size = 1 00436 */ 00437 #define VL53L1_ALGO__PART_TO_PART_RANGE_OFFSET_MM_LO 0x001F 00438 /*!< 00439 info: \n 00440 - msb = 0 00441 - lsb = 0 00442 - i2c_size = 1 00443 */ 00444 #define VL53L1_MM_CONFIG__INNER_OFFSET_MM 0x0020 00445 /*!< 00446 type: int16_t \n 00447 default: 0x0000 \n 00448 info: \n 00449 - msb = 15 00450 - lsb = 0 00451 - i2c_size = 2 00452 groups: \n 00453 ['customer_nvm_managed', 'mm_config'] 00454 fields: \n 00455 - [15:0] = mm_config__inner_offset_mm 00456 */ 00457 #define VL53L1_MM_CONFIG__INNER_OFFSET_MM_HI 0x0020 00458 /*!< 00459 info: \n 00460 - msb = 0 00461 - lsb = 0 00462 - i2c_size = 1 00463 */ 00464 #define VL53L1_MM_CONFIG__INNER_OFFSET_MM_LO 0x0021 00465 /*!< 00466 info: \n 00467 - msb = 0 00468 - lsb = 0 00469 - i2c_size = 1 00470 */ 00471 #define VL53L1_MM_CONFIG__OUTER_OFFSET_MM 0x0022 00472 /*!< 00473 type: int16_t \n 00474 default: 0x0000 \n 00475 info: \n 00476 - msb = 15 00477 - lsb = 0 00478 - i2c_size = 2 00479 groups: \n 00480 ['customer_nvm_managed', 'mm_config'] 00481 fields: \n 00482 - [15:0] = mm_config__outer_offset_mm 00483 */ 00484 #define VL53L1_MM_CONFIG__OUTER_OFFSET_MM_HI 0x0022 00485 /*!< 00486 info: \n 00487 - msb = 0 00488 - lsb = 0 00489 - i2c_size = 1 00490 */ 00491 #define VL53L1_MM_CONFIG__OUTER_OFFSET_MM_LO 0x0023 00492 /*!< 00493 info: \n 00494 - msb = 0 00495 - lsb = 0 00496 - i2c_size = 1 00497 */ 00498 #define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS 0x0024 00499 /*!< 00500 type: uint16_t \n 00501 default: 0x0380 \n 00502 info: \n 00503 - msb = 15 00504 - lsb = 0 00505 - i2c_size = 2 00506 groups: \n 00507 ['static_config', 'dss_config'] 00508 fields: \n 00509 - [15:0] = dss_config__target_total_rate_mcps (fixed point 9.7) 00510 */ 00511 #define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS_HI 0x0024 00512 /*!< 00513 info: \n 00514 - msb = 0 00515 - lsb = 0 00516 - i2c_size = 1 00517 */ 00518 #define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS_LO 0x0025 00519 /*!< 00520 info: \n 00521 - msb = 0 00522 - lsb = 0 00523 - i2c_size = 1 00524 */ 00525 #define VL53L1_DEBUG__CTRL 0x0026 00526 /*!< 00527 type: uint8_t \n 00528 default: 0x00 \n 00529 info: \n 00530 - msb = 0 00531 - lsb = 0 00532 - i2c_size = 1 00533 groups: \n 00534 ['static_config', 'debug_config'] 00535 fields: \n 00536 - [0] = enable_result_logging 00537 */ 00538 #define VL53L1_TEST_MODE__CTRL 0x0027 00539 /*!< 00540 type: uint8_t \n 00541 default: 0x00 \n 00542 info: \n 00543 - msb = 3 00544 - lsb = 0 00545 - i2c_size = 1 00546 groups: \n 00547 ['static_config', 'test_mode_config'] 00548 fields: \n 00549 - [3:0] = test_mode__cmd 00550 */ 00551 #define VL53L1_CLK_GATING__CTRL 0x0028 00552 /*!< 00553 type: uint8_t \n 00554 default: 0x00 \n 00555 info: \n 00556 - msb = 3 00557 - lsb = 0 00558 - i2c_size = 1 00559 groups: \n 00560 ['static_config', 'clk_config'] 00561 fields: \n 00562 - [0] = clk_gate_en__mcu_bank 00563 - [1] = clk_gate_en__mcu_patch_ctrl 00564 - [2] = clk_gate_en__mcu_timers 00565 - [3] = clk_gate_en__mcu_mult_div 00566 */ 00567 #define VL53L1_NVM_BIST__CTRL 0x0029 00568 /*!< 00569 type: uint8_t \n 00570 default: 0x00 \n 00571 info: \n 00572 - msb = 4 00573 - lsb = 0 00574 - i2c_size = 1 00575 groups: \n 00576 ['static_config', 'nvm_bist_config'] 00577 fields: \n 00578 - [2:0] = nvm_bist__cmd 00579 - [4] = nvm_bist__ctrl 00580 */ 00581 #define VL53L1_NVM_BIST__NUM_NVM_WORDS 0x002A 00582 /*!< 00583 type: uint8_t \n 00584 default: 0x00 \n 00585 info: \n 00586 - msb = 6 00587 - lsb = 0 00588 - i2c_size = 1 00589 groups: \n 00590 ['static_config', 'nvm_bist_config'] 00591 fields: \n 00592 - [6:0] = nvm_bist__num_nvm_words 00593 */ 00594 #define VL53L1_NVM_BIST__START_ADDRESS 0x002B 00595 /*!< 00596 type: uint8_t \n 00597 default: 0x00 \n 00598 info: \n 00599 - msb = 6 00600 - lsb = 0 00601 - i2c_size = 1 00602 groups: \n 00603 ['static_config', 'nvm_bist_config'] 00604 fields: \n 00605 - [6:0] = nvm_bist__start_address 00606 */ 00607 #define VL53L1_HOST_IF__STATUS 0x002C 00608 /*!< 00609 type: uint8_t \n 00610 default: 0x00 \n 00611 info: \n 00612 - msb = 0 00613 - lsb = 0 00614 - i2c_size = 1 00615 groups: \n 00616 ['static_config', 'system_status'] 00617 fields: \n 00618 - [0] = host_interface 00619 */ 00620 #define VL53L1_PAD_I2C_HV__CONFIG 0x002D 00621 /*!< 00622 type: uint8_t \n 00623 default: 0x00 \n 00624 info: \n 00625 - msb = 7 00626 - lsb = 0 00627 - i2c_size = 1 00628 groups: \n 00629 ['static_config', 'gpio_config'] 00630 fields: \n 00631 - [0] = pad_scl_sda__vmodeint_hv 00632 - [1] = i2c_pad__test_hv 00633 - [2] = pad_scl__fpen_hv 00634 - [4:3] = pad_scl__progdel_hv 00635 - [5] = pad_sda__fpen_hv 00636 - [7:6] = pad_sda__progdel_hv 00637 */ 00638 #define VL53L1_PAD_I2C_HV__EXTSUP_CONFIG 0x002E 00639 /*!< 00640 type: uint8_t \n 00641 default: 0x00 \n 00642 info: \n 00643 - msb = 0 00644 - lsb = 0 00645 - i2c_size = 1 00646 groups: \n 00647 ['static_config', 'gpio_config'] 00648 fields: \n 00649 - [0] = pad_scl_sda__extsup_hv 00650 */ 00651 #define VL53L1_GPIO_HV_PAD__CTRL 0x002F 00652 /*!< 00653 type: uint8_t \n 00654 default: 0x00 \n 00655 info: \n 00656 - msb = 1 00657 - lsb = 0 00658 - i2c_size = 1 00659 groups: \n 00660 ['static_config', 'gpio_config'] 00661 fields: \n 00662 - [0] = gpio__extsup_hv 00663 - [1] = gpio__vmodeint_hv 00664 */ 00665 #define VL53L1_GPIO_HV_MUX__CTRL 0x0030 00666 /*!< 00667 type: uint8_t \n 00668 default: 0x11 \n 00669 info: \n 00670 - msb = 4 00671 - lsb = 0 00672 - i2c_size = 1 00673 groups: \n 00674 ['static_config', 'gpio_config'] 00675 fields: \n 00676 - [3:0] = gpio__mux_select_hv 00677 - [4] = gpio__mux_active_high_hv 00678 */ 00679 #define VL53L1_GPIO__TIO_HV_STATUS 0x0031 00680 /*!< 00681 type: uint8_t \n 00682 default: 0x02 \n 00683 info: \n 00684 - msb = 1 00685 - lsb = 0 00686 - i2c_size = 1 00687 groups: \n 00688 ['static_config', 'gpio_config'] 00689 fields: \n 00690 - [0] = gpio__tio_hv 00691 - [1] = fresh_out_of_reset 00692 */ 00693 #define VL53L1_GPIO__FIO_HV_STATUS 0x0032 00694 /*!< 00695 type: uint8_t \n 00696 default: 0x00 \n 00697 info: \n 00698 - msb = 1 00699 - lsb = 1 00700 - i2c_size = 1 00701 groups: \n 00702 ['static_config', 'gpio_config'] 00703 fields: \n 00704 - [1] = gpio__fio_hv 00705 */ 00706 #define VL53L1_ANA_CONFIG__SPAD_SEL_PSWIDTH 0x0033 00707 /*!< 00708 type: uint8_t \n 00709 default: 0x02 \n 00710 info: \n 00711 - msb = 2 00712 - lsb = 0 00713 - i2c_size = 1 00714 groups: \n 00715 ['static_config', 'analog_config'] 00716 fields: \n 00717 - [2:0] = spad_sel_pswidth 00718 */ 00719 #define VL53L1_ANA_CONFIG__VCSEL_PULSE_WIDTH_OFFSET 0x0034 00720 /*!< 00721 type: uint8_t \n 00722 default: 0x08 \n 00723 info: \n 00724 - msb = 4 00725 - lsb = 0 00726 - i2c_size = 1 00727 groups: \n 00728 ['static_config', 'analog_config'] 00729 fields: \n 00730 - [4:0] = vcsel_pulse_width_offset (fixed point 1.4) 00731 */ 00732 #define VL53L1_ANA_CONFIG__FAST_OSC__CONFIG_CTRL 0x0035 00733 /*!< 00734 type: uint8_t \n 00735 default: 0x00 \n 00736 info: \n 00737 - msb = 0 00738 - lsb = 0 00739 - i2c_size = 1 00740 groups: \n 00741 ['static_config', 'analog_config'] 00742 fields: \n 00743 - [0] = osc_config__latch_bypass 00744 */ 00745 #define VL53L1_SIGMA_ESTIMATOR__EFFECTIVE_PULSE_WIDTH_NS 0x0036 00746 /*!< 00747 type: uint8_t \n 00748 default: 0x00 \n 00749 info: \n 00750 - msb = 7 00751 - lsb = 0 00752 - i2c_size = 1 00753 groups: \n 00754 ['static_config', 'algo_config'] 00755 fields: \n 00756 - [7:0] = sigma_estimator__eff_pulse_width 00757 */ 00758 #define VL53L1_SIGMA_ESTIMATOR__EFFECTIVE_AMBIENT_WIDTH_NS 0x0037 00759 /*!< 00760 type: uint8_t \n 00761 default: 0x00 \n 00762 info: \n 00763 - msb = 7 00764 - lsb = 0 00765 - i2c_size = 1 00766 groups: \n 00767 ['static_config', 'algo_config'] 00768 fields: \n 00769 - [7:0] = sigma_estimator__eff_ambient_width 00770 */ 00771 #define VL53L1_SIGMA_ESTIMATOR__SIGMA_REF_MM 0x0038 00772 /*!< 00773 type: uint8_t \n 00774 default: 0x00 \n 00775 info: \n 00776 - msb = 7 00777 - lsb = 0 00778 - i2c_size = 1 00779 groups: \n 00780 ['static_config', 'algo_config'] 00781 fields: \n 00782 - [7:0] = sigma_estimator__sigma_ref 00783 */ 00784 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_VALID_HEIGHT_MM 0x0039 00785 /*!< 00786 type: uint8_t \n 00787 default: 0x14 \n 00788 info: \n 00789 - msb = 7 00790 - lsb = 0 00791 - i2c_size = 1 00792 groups: \n 00793 ['static_config', 'algo_config'] 00794 fields: \n 00795 - [7:0] = crosstalk_compensation_valid_height_mm 00796 */ 00797 #define VL53L1_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_0 0x003A 00798 /*!< 00799 type: uint8_t \n 00800 default: 0x00 \n 00801 info: \n 00802 - msb = 7 00803 - lsb = 0 00804 - i2c_size = 1 00805 groups: \n 00806 ['static_config', 'algo_config'] 00807 fields: \n 00808 - [7:0] = static_config_spare_0 00809 */ 00810 #define VL53L1_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_1 0x003B 00811 /*!< 00812 type: uint8_t \n 00813 default: 0x00 \n 00814 info: \n 00815 - msb = 7 00816 - lsb = 0 00817 - i2c_size = 1 00818 groups: \n 00819 ['static_config', 'algo_config'] 00820 fields: \n 00821 - [7:0] = static_config_spare_1 00822 */ 00823 #define VL53L1_ALGO__RANGE_IGNORE_THRESHOLD_MCPS 0x003C 00824 /*!< 00825 type: uint16_t \n 00826 default: 0x0000 \n 00827 info: \n 00828 - msb = 15 00829 - lsb = 0 00830 - i2c_size = 2 00831 groups: \n 00832 ['static_config', 'algo_config'] 00833 fields: \n 00834 - [15:0] = range_ignore_thresh_mcps (fixed point 3.13) 00835 */ 00836 #define VL53L1_ALGO__RANGE_IGNORE_THRESHOLD_MCPS_HI 0x003C 00837 /*!< 00838 info: \n 00839 - msb = 0 00840 - lsb = 0 00841 - i2c_size = 1 00842 */ 00843 #define VL53L1_ALGO__RANGE_IGNORE_THRESHOLD_MCPS_LO 0x003D 00844 /*!< 00845 info: \n 00846 - msb = 0 00847 - lsb = 0 00848 - i2c_size = 1 00849 */ 00850 #define VL53L1_ALGO__RANGE_IGNORE_VALID_HEIGHT_MM 0x003E 00851 /*!< 00852 type: uint8_t \n 00853 default: 0x00 \n 00854 info: \n 00855 - msb = 7 00856 - lsb = 0 00857 - i2c_size = 1 00858 groups: \n 00859 ['static_config', 'algo_config'] 00860 fields: \n 00861 - [7:0] = range_ignore_height_mm 00862 */ 00863 #define VL53L1_ALGO__RANGE_MIN_CLIP 0x003F 00864 /*!< 00865 type: uint8_t \n 00866 default: 0x8D \n 00867 info: \n 00868 - msb = 7 00869 - lsb = 0 00870 - i2c_size = 1 00871 groups: \n 00872 ['static_config', 'algo_config'] 00873 fields: \n 00874 - [0] = algo__range_min_clip_enable 00875 - [7:1] = algo__range_min_clip_value_mm 00876 */ 00877 #define VL53L1_ALGO__CONSISTENCY_CHECK__TOLERANCE 0x0040 00878 /*!< 00879 type: uint8_t \n 00880 default: 0x08 \n 00881 info: \n 00882 - msb = 3 00883 - lsb = 0 00884 - i2c_size = 1 00885 groups: \n 00886 ['static_config', 'algo_config'] 00887 fields: \n 00888 - [3:0] = consistency_check_tolerance (fixed point 1.3) 00889 */ 00890 #define VL53L1_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_2 0x0041 00891 /*!< 00892 type: uint8_t \n 00893 default: 0x00 \n 00894 info: \n 00895 - msb = 7 00896 - lsb = 0 00897 - i2c_size = 1 00898 groups: \n 00899 ['static_config', 'algo_config'] 00900 fields: \n 00901 - [7:0] = static_config_spare_2 00902 */ 00903 #define VL53L1_SD_CONFIG__RESET_STAGES_MSB 0x0042 00904 /*!< 00905 type: uint8_t \n 00906 default: 0x00 \n 00907 info: \n 00908 - msb = 3 00909 - lsb = 0 00910 - i2c_size = 1 00911 groups: \n 00912 ['static_config', 'sigmadelta_config'] 00913 fields: \n 00914 - [3:0] = loop_init__clear_stage 00915 */ 00916 #define VL53L1_SD_CONFIG__RESET_STAGES_LSB 0x0043 00917 /*!< 00918 type: uint8_t \n 00919 default: 0x00 \n 00920 info: \n 00921 - msb = 7 00922 - lsb = 0 00923 - i2c_size = 1 00924 groups: \n 00925 ['static_config', 'sigmadelta_config'] 00926 fields: \n 00927 - [7:4] = accum_reset__clear_stage 00928 - [3:0] = count_reset__clear_stage 00929 */ 00930 #define VL53L1_GPH_CONFIG__STREAM_COUNT_UPDATE_VALUE 0x0044 00931 /*!< 00932 type: uint8_t \n 00933 default: 0x00 \n 00934 info: \n 00935 - msb = 7 00936 - lsb = 0 00937 - i2c_size = 1 00938 groups: \n 00939 ['general_config', 'roi_config'] 00940 fields: \n 00941 - [7:0] = stream_count_update_value 00942 */ 00943 #define VL53L1_GLOBAL_CONFIG__STREAM_DIVIDER 0x0045 00944 /*!< 00945 type: uint8_t \n 00946 default: 0x00 \n 00947 info: \n 00948 - msb = 7 00949 - lsb = 0 00950 - i2c_size = 1 00951 groups: \n 00952 ['general_config', 'roi_config'] 00953 fields: \n 00954 - [7:0] = stream_count_internal_div 00955 */ 00956 #define VL53L1_SYSTEM__INTERRUPT_CONFIG_GPIO 0x0046 00957 /*!< 00958 type: uint8_t \n 00959 default: 0x00 \n 00960 info: \n 00961 - msb = 7 00962 - lsb = 0 00963 - i2c_size = 1 00964 groups: \n 00965 ['general_config', 'gph_config'] 00966 fields: \n 00967 - [1:0] = int_mode_distance 00968 - [3:2] = int_mode_rate 00969 - [4] = int_spare 00970 - [5] = int_new_measure_ready 00971 - [6] = int_no_target_en 00972 - [7] = int_combined_mode 00973 */ 00974 #define VL53L1_CAL_CONFIG__VCSEL_START 0x0047 00975 /*!< 00976 type: uint8_t \n 00977 default: 0x0B \n 00978 info: \n 00979 - msb = 6 00980 - lsb = 0 00981 - i2c_size = 1 00982 groups: \n 00983 ['general_config', 'cal_config'] 00984 fields: \n 00985 - [6:0] = cal_config__vcsel_start 00986 */ 00987 #define VL53L1_CAL_CONFIG__REPEAT_RATE 0x0048 00988 /*!< 00989 type: uint16_t \n 00990 default: 0x0000 \n 00991 info: \n 00992 - msb = 11 00993 - lsb = 0 00994 - i2c_size = 2 00995 groups: \n 00996 ['general_config', 'cal_config'] 00997 fields: \n 00998 - [11:0] = cal_config__repeat_rate 00999 */ 01000 #define VL53L1_CAL_CONFIG__REPEAT_RATE_HI 0x0048 01001 /*!< 01002 info: \n 01003 - msb = 0 01004 - lsb = 0 01005 - i2c_size = 1 01006 */ 01007 #define VL53L1_CAL_CONFIG__REPEAT_RATE_LO 0x0049 01008 /*!< 01009 info: \n 01010 - msb = 0 01011 - lsb = 0 01012 - i2c_size = 1 01013 */ 01014 #define VL53L1_GLOBAL_CONFIG__VCSEL_WIDTH 0x004A 01015 /*!< 01016 type: uint8_t \n 01017 default: 0x02 \n 01018 info: \n 01019 - msb = 6 01020 - lsb = 0 01021 - i2c_size = 1 01022 groups: \n 01023 ['general_config', 'global_config'] 01024 fields: \n 01025 - [6:0] = global_config__vcsel_width 01026 */ 01027 #define VL53L1_PHASECAL_CONFIG__TIMEOUT_MACROP 0x004B 01028 /*!< 01029 type: uint8_t \n 01030 default: 0x04 \n 01031 info: \n 01032 - msb = 7 01033 - lsb = 0 01034 - i2c_size = 1 01035 groups: \n 01036 ['general_config', 'phasecal_config'] 01037 fields: \n 01038 - [7:0] = phasecal_config__timeout_macrop 01039 */ 01040 #define VL53L1_PHASECAL_CONFIG__TARGET 0x004C 01041 /*!< 01042 type: uint8_t \n 01043 default: 0x21 \n 01044 info: \n 01045 - msb = 7 01046 - lsb = 0 01047 - i2c_size = 1 01048 groups: \n 01049 ['general_config', 'phasecal_config'] 01050 fields: \n 01051 - [7:0] = algo_phasecal_lim 01052 */ 01053 #define VL53L1_PHASECAL_CONFIG__OVERRIDE 0x004D 01054 /*!< 01055 type: uint8_t \n 01056 default: 0x00 \n 01057 info: \n 01058 - msb = 0 01059 - lsb = 0 01060 - i2c_size = 1 01061 groups: \n 01062 ['general_config', 'phasecal_config'] 01063 fields: \n 01064 - [0] = phasecal_config__override 01065 */ 01066 #define VL53L1_DSS_CONFIG__ROI_MODE_CONTROL 0x004F 01067 /*!< 01068 type: uint8_t \n 01069 default: 0x01 \n 01070 info: \n 01071 - msb = 2 01072 - lsb = 0 01073 - i2c_size = 1 01074 groups: \n 01075 ['general_config', 'dss_config'] 01076 fields: \n 01077 - [1:0] = dss_config__input_mode 01078 - [2] = calculate_roi_enable 01079 */ 01080 #define VL53L1_SYSTEM__THRESH_RATE_HIGH 0x0050 01081 /*!< 01082 type: uint16_t \n 01083 default: 0x0000 \n 01084 info: \n 01085 - msb = 15 01086 - lsb = 0 01087 - i2c_size = 2 01088 groups: \n 01089 ['general_config', 'gph_config'] 01090 fields: \n 01091 - [15:0] = thresh_rate_high (fixed point 9.7) 01092 */ 01093 #define VL53L1_SYSTEM__THRESH_RATE_HIGH_HI 0x0050 01094 /*!< 01095 info: \n 01096 - msb = 0 01097 - lsb = 0 01098 - i2c_size = 1 01099 */ 01100 #define VL53L1_SYSTEM__THRESH_RATE_HIGH_LO 0x0051 01101 /*!< 01102 info: \n 01103 - msb = 0 01104 - lsb = 0 01105 - i2c_size = 1 01106 */ 01107 #define VL53L1_SYSTEM__THRESH_RATE_LOW 0x0052 01108 /*!< 01109 type: uint16_t \n 01110 default: 0x0000 \n 01111 info: \n 01112 - msb = 15 01113 - lsb = 0 01114 - i2c_size = 2 01115 groups: \n 01116 ['general_config', 'gph_config'] 01117 fields: \n 01118 - [15:0] = thresh_rate_low (fixed point 9.7) 01119 */ 01120 #define VL53L1_SYSTEM__THRESH_RATE_LOW_HI 0x0052 01121 /*!< 01122 info: \n 01123 - msb = 0 01124 - lsb = 0 01125 - i2c_size = 1 01126 */ 01127 #define VL53L1_SYSTEM__THRESH_RATE_LOW_LO 0x0053 01128 /*!< 01129 info: \n 01130 - msb = 0 01131 - lsb = 0 01132 - i2c_size = 1 01133 */ 01134 #define VL53L1_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT 0x0054 01135 /*!< 01136 type: uint16_t \n 01137 default: 0x0000 \n 01138 info: \n 01139 - msb = 15 01140 - lsb = 0 01141 - i2c_size = 2 01142 groups: \n 01143 ['general_config', 'dss_config'] 01144 fields: \n 01145 - [15:0] = dss_config__manual_effective_spads_select 01146 */ 01147 #define VL53L1_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_HI 0x0054 01148 /*!< 01149 info: \n 01150 - msb = 0 01151 - lsb = 0 01152 - i2c_size = 1 01153 */ 01154 #define VL53L1_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_LO 0x0055 01155 /*!< 01156 info: \n 01157 - msb = 0 01158 - lsb = 0 01159 - i2c_size = 1 01160 */ 01161 #define VL53L1_DSS_CONFIG__MANUAL_BLOCK_SELECT 0x0056 01162 /*!< 01163 type: uint8_t \n 01164 default: 0x00 \n 01165 info: \n 01166 - msb = 7 01167 - lsb = 0 01168 - i2c_size = 1 01169 groups: \n 01170 ['general_config', 'dss_config'] 01171 fields: \n 01172 - [7:0] = dss_config__manual_block_select 01173 */ 01174 #define VL53L1_DSS_CONFIG__APERTURE_ATTENUATION 0x0057 01175 /*!< 01176 type: uint8_t \n 01177 default: 0x33 \n 01178 info: \n 01179 - msb = 7 01180 - lsb = 0 01181 - i2c_size = 1 01182 groups: \n 01183 ['general_config', 'dss_config'] 01184 fields: \n 01185 - [7:0] = dss_config__aperture_attenuation 01186 */ 01187 #define VL53L1_DSS_CONFIG__MAX_SPADS_LIMIT 0x0058 01188 /*!< 01189 type: uint8_t \n 01190 default: 0xFF \n 01191 info: \n 01192 - msb = 7 01193 - lsb = 0 01194 - i2c_size = 1 01195 groups: \n 01196 ['general_config', 'dss_config'] 01197 fields: \n 01198 - [7:0] = dss_config__max_spads_limit 01199 */ 01200 #define VL53L1_DSS_CONFIG__MIN_SPADS_LIMIT 0x0059 01201 /*!< 01202 type: uint8_t \n 01203 default: 0x01 \n 01204 info: \n 01205 - msb = 7 01206 - lsb = 0 01207 - i2c_size = 1 01208 groups: \n 01209 ['general_config', 'dss_config'] 01210 fields: \n 01211 - [7:0] = dss_config__min_spads_limit 01212 */ 01213 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_A_HI 0x005A 01214 /*!< 01215 type: uint8_t \n 01216 default: 0x00 \n 01217 info: \n 01218 - msb = 3 01219 - lsb = 0 01220 - i2c_size = 1 01221 groups: \n 01222 ['timing_config', 'mm_config'] 01223 fields: \n 01224 - [3:0] = mm_config__config_timeout_macrop_a_hi 01225 */ 01226 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_A_LO 0x005B 01227 /*!< 01228 type: uint8_t \n 01229 default: 0x06 \n 01230 info: \n 01231 - msb = 7 01232 - lsb = 0 01233 - i2c_size = 1 01234 groups: \n 01235 ['timing_config', 'mm_config'] 01236 fields: \n 01237 - [7:0] = mm_config__config_timeout_macrop_a_lo 01238 */ 01239 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_B_HI 0x005C 01240 /*!< 01241 type: uint8_t \n 01242 default: 0x00 \n 01243 info: \n 01244 - msb = 3 01245 - lsb = 0 01246 - i2c_size = 1 01247 groups: \n 01248 ['timing_config', 'mm_config'] 01249 fields: \n 01250 - [3:0] = mm_config__config_timeout_macrop_b_hi 01251 */ 01252 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_B_LO 0x005D 01253 /*!< 01254 type: uint8_t \n 01255 default: 0x06 \n 01256 info: \n 01257 - msb = 7 01258 - lsb = 0 01259 - i2c_size = 1 01260 groups: \n 01261 ['timing_config', 'mm_config'] 01262 fields: \n 01263 - [7:0] = mm_config__config_timeout_macrop_b_lo 01264 */ 01265 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_A_HI 0x005E 01266 /*!< 01267 type: uint8_t \n 01268 default: 0x01 \n 01269 info: \n 01270 - msb = 3 01271 - lsb = 0 01272 - i2c_size = 1 01273 groups: \n 01274 ['timing_config', 'range_config'] 01275 fields: \n 01276 - [3:0] = range_timeout_overall_periods_macrop_a_hi 01277 */ 01278 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_A_LO 0x005F 01279 /*!< 01280 type: uint8_t \n 01281 default: 0x92 \n 01282 info: \n 01283 - msb = 7 01284 - lsb = 0 01285 - i2c_size = 1 01286 groups: \n 01287 ['timing_config', 'range_config'] 01288 fields: \n 01289 - [7:0] = range_timeout_overall_periods_macrop_a_lo 01290 */ 01291 #define VL53L1_RANGE_CONFIG__VCSEL_PERIOD_A 0x0060 01292 /*!< 01293 type: uint8_t \n 01294 default: 0x0B \n 01295 info: \n 01296 - msb = 5 01297 - lsb = 0 01298 - i2c_size = 1 01299 groups: \n 01300 ['timing_config', 'range_config'] 01301 fields: \n 01302 - [5:0] = range_config__vcsel_period_a 01303 */ 01304 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_B_HI 0x0061 01305 /*!< 01306 type: uint8_t \n 01307 default: 0x01 \n 01308 info: \n 01309 - msb = 3 01310 - lsb = 0 01311 - i2c_size = 1 01312 groups: \n 01313 ['timing_config', 'range_config'] 01314 fields: \n 01315 - [3:0] = range_timeout_overall_periods_macrop_b_hi 01316 */ 01317 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_B_LO 0x0062 01318 /*!< 01319 type: uint8_t \n 01320 default: 0x92 \n 01321 info: \n 01322 - msb = 7 01323 - lsb = 0 01324 - i2c_size = 1 01325 groups: \n 01326 ['timing_config', 'range_config'] 01327 fields: \n 01328 - [7:0] = range_timeout_overall_periods_macrop_b_lo 01329 */ 01330 #define VL53L1_RANGE_CONFIG__VCSEL_PERIOD_B 0x0063 01331 /*!< 01332 type: uint8_t \n 01333 default: 0x09 \n 01334 info: \n 01335 - msb = 5 01336 - lsb = 0 01337 - i2c_size = 1 01338 groups: \n 01339 ['timing_config', 'range_config'] 01340 fields: \n 01341 - [5:0] = range_config__vcsel_period_b 01342 */ 01343 #define VL53L1_RANGE_CONFIG__SIGMA_THRESH 0x0064 01344 /*!< 01345 type: uint16_t \n 01346 default: 0x0080 \n 01347 info: \n 01348 - msb = 15 01349 - lsb = 0 01350 - i2c_size = 2 01351 groups: \n 01352 ['timing_config', 'range_config'] 01353 fields: \n 01354 - [15:0] = range_config__sigma_thresh (fixed point 14.2) 01355 */ 01356 #define VL53L1_RANGE_CONFIG__SIGMA_THRESH_HI 0x0064 01357 /*!< 01358 info: \n 01359 - msb = 0 01360 - lsb = 0 01361 - i2c_size = 1 01362 */ 01363 #define VL53L1_RANGE_CONFIG__SIGMA_THRESH_LO 0x0065 01364 /*!< 01365 info: \n 01366 - msb = 0 01367 - lsb = 0 01368 - i2c_size = 1 01369 */ 01370 #define VL53L1_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS 0x0066 01371 /*!< 01372 type: uint16_t \n 01373 default: 0x0000 \n 01374 info: \n 01375 - msb = 15 01376 - lsb = 0 01377 - i2c_size = 2 01378 groups: \n 01379 ['timing_config', 'range_config'] 01380 fields: \n 01381 - [15:0] = range_config__min_count_rate_rtn_limit_mcps (fixed point 9.7) 01382 */ 01383 #define VL53L1_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_HI 0x0066 01384 /*!< 01385 info: \n 01386 - msb = 0 01387 - lsb = 0 01388 - i2c_size = 1 01389 */ 01390 #define VL53L1_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_LO 0x0067 01391 /*!< 01392 info: \n 01393 - msb = 0 01394 - lsb = 0 01395 - i2c_size = 1 01396 */ 01397 #define VL53L1_RANGE_CONFIG__VALID_PHASE_LOW 0x0068 01398 /*!< 01399 type: uint8_t \n 01400 default: 0x08 \n 01401 info: \n 01402 - msb = 7 01403 - lsb = 0 01404 - i2c_size = 1 01405 groups: \n 01406 ['timing_config', 'range_config'] 01407 fields: \n 01408 - [7:0] = range_config__valid_phase_low (fixed point 5.3) 01409 */ 01410 #define VL53L1_RANGE_CONFIG__VALID_PHASE_HIGH 0x0069 01411 /*!< 01412 type: uint8_t \n 01413 default: 0x80 \n 01414 info: \n 01415 - msb = 7 01416 - lsb = 0 01417 - i2c_size = 1 01418 groups: \n 01419 ['timing_config', 'range_config'] 01420 fields: \n 01421 - [7:0] = range_config__valid_phase_high (fixed point 5.3) 01422 */ 01423 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD 0x006C 01424 /*!< 01425 type: uint32_t \n 01426 default: 0x00000000 \n 01427 info: \n 01428 - msb = 31 01429 - lsb = 0 01430 - i2c_size = 4 01431 groups: \n 01432 ['timing_config', 'system_config'] 01433 fields: \n 01434 - [31:0] = intermeasurement_period 01435 */ 01436 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_3 0x006C 01437 /*!< 01438 info: \n 01439 - msb = 0 01440 - lsb = 0 01441 - i2c_size = 1 01442 */ 01443 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_2 0x006D 01444 /*!< 01445 info: \n 01446 - msb = 0 01447 - lsb = 0 01448 - i2c_size = 1 01449 */ 01450 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_1 0x006E 01451 /*!< 01452 info: \n 01453 - msb = 0 01454 - lsb = 0 01455 - i2c_size = 1 01456 */ 01457 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_0 0x006F 01458 /*!< 01459 info: \n 01460 - msb = 0 01461 - lsb = 0 01462 - i2c_size = 1 01463 */ 01464 #define VL53L1_SYSTEM__FRACTIONAL_ENABLE 0x0070 01465 /*!< 01466 type: uint8_t \n 01467 default: 0x00 \n 01468 info: \n 01469 - msb = 0 01470 - lsb = 0 01471 - i2c_size = 1 01472 groups: \n 01473 ['timing_config', 'system_config'] 01474 fields: \n 01475 - [0] = range_fractional_enable 01476 */ 01477 #define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD_0 0x0071 01478 /*!< 01479 type: uint8_t \n 01480 default: 0x00 \n 01481 info: \n 01482 - msb = 1 01483 - lsb = 0 01484 - i2c_size = 1 01485 groups: \n 01486 ['dynamic_config', 'gph_config'] 01487 fields: \n 01488 - [0] = grouped_parameter_hold 01489 - [1] = grouped_parameter_hold_id 01490 */ 01491 #define VL53L1_SYSTEM__THRESH_HIGH 0x0072 01492 /*!< 01493 type: uint16_t \n 01494 default: 0x0000 \n 01495 info: \n 01496 - msb = 15 01497 - lsb = 0 01498 - i2c_size = 2 01499 groups: \n 01500 ['dynamic_config', 'gph_config'] 01501 fields: \n 01502 - [15:0] = thresh_high 01503 */ 01504 #define VL53L1_SYSTEM__THRESH_HIGH_HI 0x0072 01505 /*!< 01506 info: \n 01507 - msb = 0 01508 - lsb = 0 01509 - i2c_size = 1 01510 */ 01511 #define VL53L1_SYSTEM__THRESH_HIGH_LO 0x0073 01512 /*!< 01513 info: \n 01514 - msb = 0 01515 - lsb = 0 01516 - i2c_size = 1 01517 */ 01518 #define VL53L1_SYSTEM__THRESH_LOW 0x0074 01519 /*!< 01520 type: uint16_t \n 01521 default: 0x0000 \n 01522 info: \n 01523 - msb = 15 01524 - lsb = 0 01525 - i2c_size = 2 01526 groups: \n 01527 ['dynamic_config', 'gph_config'] 01528 fields: \n 01529 - [15:0] = thresh_low 01530 */ 01531 #define VL53L1_SYSTEM__THRESH_LOW_HI 0x0074 01532 /*!< 01533 info: \n 01534 - msb = 0 01535 - lsb = 0 01536 - i2c_size = 1 01537 */ 01538 #define VL53L1_SYSTEM__THRESH_LOW_LO 0x0075 01539 /*!< 01540 info: \n 01541 - msb = 0 01542 - lsb = 0 01543 - i2c_size = 1 01544 */ 01545 #define VL53L1_SYSTEM__ENABLE_XTALK_PER_QUADRANT 0x0076 01546 /*!< 01547 type: uint8_t \n 01548 default: 0x00 \n 01549 info: \n 01550 - msb = 0 01551 - lsb = 0 01552 - i2c_size = 1 01553 groups: \n 01554 ['dynamic_config', 'gph_config'] 01555 fields: \n 01556 - [0] = system__enable_xtalk_per_quadrant 01557 */ 01558 #define VL53L1_SYSTEM__SEED_CONFIG 0x0077 01559 /*!< 01560 type: uint8_t \n 01561 default: 0x00 \n 01562 info: \n 01563 - msb = 2 01564 - lsb = 0 01565 - i2c_size = 1 01566 groups: \n 01567 ['dynamic_config', 'gph_config'] 01568 fields: \n 01569 - [1:0] = system__seed_config 01570 - [2] = system__fw_pause_ctrl 01571 */ 01572 #define VL53L1_SD_CONFIG__WOI_SD0 0x0078 01573 /*!< 01574 type: uint8_t \n 01575 default: 0x04 \n 01576 info: \n 01577 - msb = 7 01578 - lsb = 0 01579 - i2c_size = 1 01580 groups: \n 01581 ['dynamic_config', 'gph_config'] 01582 fields: \n 01583 - [7:0] = sd_config__woi_sd0 01584 */ 01585 #define VL53L1_SD_CONFIG__WOI_SD1 0x0079 01586 /*!< 01587 type: uint8_t \n 01588 default: 0x04 \n 01589 info: \n 01590 - msb = 7 01591 - lsb = 0 01592 - i2c_size = 1 01593 groups: \n 01594 ['dynamic_config', 'gph_config'] 01595 fields: \n 01596 - [7:0] = sd_config__woi_sd1 01597 */ 01598 #define VL53L1_SD_CONFIG__INITIAL_PHASE_SD0 0x007A 01599 /*!< 01600 type: uint8_t \n 01601 default: 0x03 \n 01602 info: \n 01603 - msb = 6 01604 - lsb = 0 01605 - i2c_size = 1 01606 groups: \n 01607 ['dynamic_config', 'gph_config'] 01608 fields: \n 01609 - [6:0] = sd_config__initial_phase_sd0 01610 */ 01611 #define VL53L1_SD_CONFIG__INITIAL_PHASE_SD1 0x007B 01612 /*!< 01613 type: uint8_t \n 01614 default: 0x03 \n 01615 info: \n 01616 - msb = 6 01617 - lsb = 0 01618 - i2c_size = 1 01619 groups: \n 01620 ['dynamic_config', 'gph_config'] 01621 fields: \n 01622 - [6:0] = sd_config__initial_phase_sd1 01623 */ 01624 #define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD_1 0x007C 01625 /*!< 01626 type: uint8_t \n 01627 default: 0x00 \n 01628 info: \n 01629 - msb = 1 01630 - lsb = 0 01631 - i2c_size = 1 01632 groups: \n 01633 ['dynamic_config', 'gph_config'] 01634 fields: \n 01635 - [0] = grouped_parameter_hold 01636 - [1] = grouped_parameter_hold_id 01637 */ 01638 #define VL53L1_SD_CONFIG__FIRST_ORDER_SELECT 0x007D 01639 /*!< 01640 type: uint8_t \n 01641 default: 0x00 \n 01642 info: \n 01643 - msb = 1 01644 - lsb = 0 01645 - i2c_size = 1 01646 groups: \n 01647 ['dynamic_config', 'gph_config'] 01648 fields: \n 01649 - [0] = sd_config__first_order_select_rtn 01650 - [1] = sd_config__first_order_select_ref 01651 */ 01652 #define VL53L1_SD_CONFIG__QUANTIFIER 0x007E 01653 /*!< 01654 type: uint8_t \n 01655 default: 0x00 \n 01656 info: \n 01657 - msb = 3 01658 - lsb = 0 01659 - i2c_size = 1 01660 groups: \n 01661 ['dynamic_config', 'gph_config'] 01662 fields: \n 01663 - [3:0] = sd_config__quantifier 01664 */ 01665 #define VL53L1_ROI_CONFIG__USER_ROI_CENTRE_SPAD 0x007F 01666 /*!< 01667 type: uint8_t \n 01668 default: 0x00 \n 01669 info: \n 01670 - msb = 7 01671 - lsb = 0 01672 - i2c_size = 1 01673 groups: \n 01674 ['dynamic_config', 'gph_config'] 01675 fields: \n 01676 - [7:0] = user_roi_center_spad 01677 */ 01678 #define VL53L1_ROI_CONFIG__USER_ROI_REQUESTED_GLOBAL_XY_SIZE 0x0080 01679 /*!< 01680 type: uint8_t \n 01681 default: 0x00 \n 01682 info: \n 01683 - msb = 7 01684 - lsb = 0 01685 - i2c_size = 1 01686 groups: \n 01687 ['dynamic_config', 'gph_config'] 01688 fields: \n 01689 - [7:0] = roi_config__user_roi_requested_global_xy_size 01690 */ 01691 #define VL53L1_SYSTEM__SEQUENCE_CONFIG 0x0081 01692 /*!< 01693 type: uint8_t \n 01694 default: 0xFF \n 01695 info: \n 01696 - msb = 7 01697 - lsb = 0 01698 - i2c_size = 1 01699 groups: \n 01700 ['dynamic_config', 'gph_config'] 01701 fields: \n 01702 - [0] = sequence_vhv_en 01703 - [1] = sequence_phasecal_en 01704 - [2] = sequence_reference_phase_en 01705 - [3] = sequence_dss1_en 01706 - [4] = sequence_dss2_en 01707 - [5] = sequence_mm1_en 01708 - [6] = sequence_mm2_en 01709 - [7] = sequence_range_en 01710 */ 01711 #define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD 0x0082 01712 /*!< 01713 type: uint8_t \n 01714 default: 0x00 \n 01715 info: \n 01716 - msb = 1 01717 - lsb = 0 01718 - i2c_size = 1 01719 groups: \n 01720 ['dynamic_config', 'gph_config'] 01721 fields: \n 01722 - [0] = grouped_parameter_hold 01723 - [1] = grouped_parameter_hold_id 01724 */ 01725 #define VL53L1_POWER_MANAGEMENT__GO1_POWER_FORCE 0x0083 01726 /*!< 01727 type: uint8_t \n 01728 default: 0x00 \n 01729 info: \n 01730 - msb = 0 01731 - lsb = 0 01732 - i2c_size = 1 01733 groups: \n 01734 ['system_control', 'pwrman_ctrl'] 01735 fields: \n 01736 - [0] = go1_dig_powerforce 01737 */ 01738 #define VL53L1_SYSTEM__STREAM_COUNT_CTRL 0x0084 01739 /*!< 01740 type: uint8_t \n 01741 default: 0x00 \n 01742 info: \n 01743 - msb = 0 01744 - lsb = 0 01745 - i2c_size = 1 01746 groups: \n 01747 ['system_control', 'stream_ctrl'] 01748 fields: \n 01749 - [0] = retain_stream_count 01750 */ 01751 #define VL53L1_FIRMWARE__ENABLE 0x0085 01752 /*!< 01753 type: uint8_t \n 01754 default: 0x01 \n 01755 info: \n 01756 - msb = 0 01757 - lsb = 0 01758 - i2c_size = 1 01759 groups: \n 01760 ['system_control', 'firmware_ctrl'] 01761 fields: \n 01762 - [0] = firmware_enable 01763 */ 01764 #define VL53L1_SYSTEM__INTERRUPT_CLEAR 0x0086 01765 /*!< 01766 type: uint8_t \n 01767 default: 0x00 \n 01768 info: \n 01769 - msb = 1 01770 - lsb = 0 01771 - i2c_size = 1 01772 groups: \n 01773 ['system_control', 'system_int_clr'] 01774 fields: \n 01775 - [0] = sys_interrupt_clear_range 01776 - [1] = sys_interrupt_clear_error 01777 */ 01778 #define VL53L1_SYSTEM__MODE_START 0x0087 01779 /*!< 01780 type: uint8_t \n 01781 default: 0x00 \n 01782 info: \n 01783 - msb = 7 01784 - lsb = 0 01785 - i2c_size = 1 01786 groups: \n 01787 ['system_control', 'system_start'] 01788 fields: \n 01789 - [1:0] = scheduler_mode 01790 - [3:2] = readout_mode 01791 - [4] = mode_range__single_shot 01792 - [5] = mode_range__back_to_back 01793 - [6] = mode_range__timed 01794 - [7] = mode_range__abort 01795 */ 01796 #define VL53L1_RESULT__INTERRUPT_STATUS 0x0088 01797 /*!< 01798 type: uint8_t \n 01799 default: 0x00 \n 01800 info: \n 01801 - msb = 5 01802 - lsb = 0 01803 - i2c_size = 1 01804 groups: \n 01805 ['system_results', 'results'] 01806 fields: \n 01807 - [2:0] = int_status 01808 - [4:3] = int_error_status 01809 - [5] = gph_id_gpio_status 01810 */ 01811 #define VL53L1_RESULT__RANGE_STATUS 0x0089 01812 /*!< 01813 type: uint8_t \n 01814 default: 0x00 \n 01815 info: \n 01816 - msb = 7 01817 - lsb = 0 01818 - i2c_size = 1 01819 groups: \n 01820 ['system_results', 'results'] 01821 fields: \n 01822 - [4:0] = range_status 01823 - [5] = max_threshold_hit 01824 - [6] = min_threshold_hit 01825 - [7] = gph_id_range_status 01826 */ 01827 #define VL53L1_RESULT__REPORT_STATUS 0x008A 01828 /*!< 01829 type: uint8_t \n 01830 default: 0x00 \n 01831 info: \n 01832 - msb = 3 01833 - lsb = 0 01834 - i2c_size = 1 01835 groups: \n 01836 ['system_results', 'results'] 01837 fields: \n 01838 - [3:0] = report_status 01839 */ 01840 #define VL53L1_RESULT__STREAM_COUNT 0x008B 01841 /*!< 01842 type: uint8_t \n 01843 default: 0x00 \n 01844 info: \n 01845 - msb = 7 01846 - lsb = 0 01847 - i2c_size = 1 01848 groups: \n 01849 ['system_results', 'results'] 01850 fields: \n 01851 - [7:0] = result__stream_count 01852 */ 01853 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x008C 01854 /*!< 01855 type: uint16_t \n 01856 default: 0x0000 \n 01857 info: \n 01858 - msb = 15 01859 - lsb = 0 01860 - i2c_size = 2 01861 groups: \n 01862 ['system_results', 'results'] 01863 fields: \n 01864 - [15:0] = result__dss_actual_effective_spads_sd0 (fixed point 8.8) 01865 */ 01866 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x008C 01867 /*!< 01868 info: \n 01869 - msb = 0 01870 - lsb = 0 01871 - i2c_size = 1 01872 */ 01873 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x008D 01874 /*!< 01875 info: \n 01876 - msb = 0 01877 - lsb = 0 01878 - i2c_size = 1 01879 */ 01880 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x008E 01881 /*!< 01882 type: uint16_t \n 01883 default: 0x0000 \n 01884 info: \n 01885 - msb = 15 01886 - lsb = 0 01887 - i2c_size = 2 01888 groups: \n 01889 ['system_results', 'results'] 01890 fields: \n 01891 - [15:0] = result__peak_signal_count_rate_mcps_sd0 (fixed point 9.7) 01892 */ 01893 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x008E 01894 /*!< 01895 info: \n 01896 - msb = 0 01897 - lsb = 0 01898 - i2c_size = 1 01899 */ 01900 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x008F 01901 /*!< 01902 info: \n 01903 - msb = 0 01904 - lsb = 0 01905 - i2c_size = 1 01906 */ 01907 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0090 01908 /*!< 01909 type: uint16_t \n 01910 default: 0x0000 \n 01911 info: \n 01912 - msb = 15 01913 - lsb = 0 01914 - i2c_size = 2 01915 groups: \n 01916 ['system_results', 'results'] 01917 fields: \n 01918 - [15:0] = result__ambient_count_rate_mcps_sd0 (fixed point 9.7) 01919 */ 01920 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0090 01921 /*!< 01922 info: \n 01923 - msb = 0 01924 - lsb = 0 01925 - i2c_size = 1 01926 */ 01927 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0091 01928 /*!< 01929 info: \n 01930 - msb = 0 01931 - lsb = 0 01932 - i2c_size = 1 01933 */ 01934 #define VL53L1_RESULT__SIGMA_SD0 0x0092 01935 /*!< 01936 type: uint16_t \n 01937 default: 0x0000 \n 01938 info: \n 01939 - msb = 15 01940 - lsb = 0 01941 - i2c_size = 2 01942 groups: \n 01943 ['system_results', 'results'] 01944 fields: \n 01945 - [15:0] = result__sigma_sd0 (fixed point 14.2) 01946 */ 01947 #define VL53L1_RESULT__SIGMA_SD0_HI 0x0092 01948 /*!< 01949 info: \n 01950 - msb = 0 01951 - lsb = 0 01952 - i2c_size = 1 01953 */ 01954 #define VL53L1_RESULT__SIGMA_SD0_LO 0x0093 01955 /*!< 01956 info: \n 01957 - msb = 0 01958 - lsb = 0 01959 - i2c_size = 1 01960 */ 01961 #define VL53L1_RESULT__PHASE_SD0 0x0094 01962 /*!< 01963 type: uint16_t \n 01964 default: 0x0000 \n 01965 info: \n 01966 - msb = 15 01967 - lsb = 0 01968 - i2c_size = 2 01969 groups: \n 01970 ['system_results', 'results'] 01971 fields: \n 01972 - [15:0] = result__phase_sd0 (fixed point 5.11) 01973 */ 01974 #define VL53L1_RESULT__PHASE_SD0_HI 0x0094 01975 /*!< 01976 info: \n 01977 - msb = 0 01978 - lsb = 0 01979 - i2c_size = 1 01980 */ 01981 #define VL53L1_RESULT__PHASE_SD0_LO 0x0095 01982 /*!< 01983 info: \n 01984 - msb = 0 01985 - lsb = 0 01986 - i2c_size = 1 01987 */ 01988 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0096 01989 /*!< 01990 type: uint16_t \n 01991 default: 0x0000 \n 01992 info: \n 01993 - msb = 15 01994 - lsb = 0 01995 - i2c_size = 2 01996 groups: \n 01997 ['system_results', 'results'] 01998 fields: \n 01999 - [15:0] = result__final_crosstalk_corrected_range_mm_sd0 02000 */ 02001 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0096 02002 /*!< 02003 info: \n 02004 - msb = 0 02005 - lsb = 0 02006 - i2c_size = 1 02007 */ 02008 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0097 02009 /*!< 02010 info: \n 02011 - msb = 0 02012 - lsb = 0 02013 - i2c_size = 1 02014 */ 02015 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0098 02016 /*!< 02017 type: uint16_t \n 02018 default: 0x0000 \n 02019 info: \n 02020 - msb = 15 02021 - lsb = 0 02022 - i2c_size = 2 02023 groups: \n 02024 ['system_results', 'results'] 02025 fields: \n 02026 - [15:0] = result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0 (fixed point 9.7) 02027 */ 02028 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0098 02029 /*!< 02030 info: \n 02031 - msb = 0 02032 - lsb = 0 02033 - i2c_size = 1 02034 */ 02035 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0099 02036 /*!< 02037 info: \n 02038 - msb = 0 02039 - lsb = 0 02040 - i2c_size = 1 02041 */ 02042 #define VL53L1_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x009A 02043 /*!< 02044 type: uint16_t \n 02045 default: 0x0000 \n 02046 info: \n 02047 - msb = 15 02048 - lsb = 0 02049 - i2c_size = 2 02050 groups: \n 02051 ['system_results', 'results'] 02052 fields: \n 02053 - [15:0] = result__mm_inner_actual_effective_spads_sd0 (fixed point 8.8) 02054 */ 02055 #define VL53L1_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x009A 02056 /*!< 02057 info: \n 02058 - msb = 0 02059 - lsb = 0 02060 - i2c_size = 1 02061 */ 02062 #define VL53L1_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x009B 02063 /*!< 02064 info: \n 02065 - msb = 0 02066 - lsb = 0 02067 - i2c_size = 1 02068 */ 02069 #define VL53L1_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x009C 02070 /*!< 02071 type: uint16_t \n 02072 default: 0x0000 \n 02073 info: \n 02074 - msb = 15 02075 - lsb = 0 02076 - i2c_size = 2 02077 groups: \n 02078 ['system_results', 'results'] 02079 fields: \n 02080 - [15:0] = result__mm_outer_actual_effective_spads_sd0 (fixed point 8.8) 02081 */ 02082 #define VL53L1_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x009C 02083 /*!< 02084 info: \n 02085 - msb = 0 02086 - lsb = 0 02087 - i2c_size = 1 02088 */ 02089 #define VL53L1_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x009D 02090 /*!< 02091 info: \n 02092 - msb = 0 02093 - lsb = 0 02094 - i2c_size = 1 02095 */ 02096 #define VL53L1_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x009E 02097 /*!< 02098 type: uint16_t \n 02099 default: 0x0000 \n 02100 info: \n 02101 - msb = 15 02102 - lsb = 0 02103 - i2c_size = 2 02104 groups: \n 02105 ['system_results', 'results'] 02106 fields: \n 02107 - [15:0] = result__avg_signal_count_rate_mcps_sd0 (fixed point 9.7) 02108 */ 02109 #define VL53L1_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x009E 02110 /*!< 02111 info: \n 02112 - msb = 0 02113 - lsb = 0 02114 - i2c_size = 1 02115 */ 02116 #define VL53L1_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x009F 02117 /*!< 02118 info: \n 02119 - msb = 0 02120 - lsb = 0 02121 - i2c_size = 1 02122 */ 02123 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x00A0 02124 /*!< 02125 type: uint16_t \n 02126 default: 0x0000 \n 02127 info: \n 02128 - msb = 15 02129 - lsb = 0 02130 - i2c_size = 2 02131 groups: \n 02132 ['system_results', 'results'] 02133 fields: \n 02134 - [15:0] = result__dss_actual_effective_spads_sd1 (fixed point 8.8) 02135 */ 02136 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x00A0 02137 /*!< 02138 info: \n 02139 - msb = 0 02140 - lsb = 0 02141 - i2c_size = 1 02142 */ 02143 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x00A1 02144 /*!< 02145 info: \n 02146 - msb = 0 02147 - lsb = 0 02148 - i2c_size = 1 02149 */ 02150 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x00A2 02151 /*!< 02152 type: uint16_t \n 02153 default: 0x0000 \n 02154 info: \n 02155 - msb = 15 02156 - lsb = 0 02157 - i2c_size = 2 02158 groups: \n 02159 ['system_results', 'results'] 02160 fields: \n 02161 - [15:0] = result__peak_signal_count_rate_mcps_sd1 (fixed point 9.7) 02162 */ 02163 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x00A2 02164 /*!< 02165 info: \n 02166 - msb = 0 02167 - lsb = 0 02168 - i2c_size = 1 02169 */ 02170 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x00A3 02171 /*!< 02172 info: \n 02173 - msb = 0 02174 - lsb = 0 02175 - i2c_size = 1 02176 */ 02177 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x00A4 02178 /*!< 02179 type: uint16_t \n 02180 default: 0x0000 \n 02181 info: \n 02182 - msb = 15 02183 - lsb = 0 02184 - i2c_size = 2 02185 groups: \n 02186 ['system_results', 'results'] 02187 fields: \n 02188 - [15:0] = result__ambient_count_rate_mcps_sd1 (fixed point 9.7) 02189 */ 02190 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x00A4 02191 /*!< 02192 info: \n 02193 - msb = 0 02194 - lsb = 0 02195 - i2c_size = 1 02196 */ 02197 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x00A5 02198 /*!< 02199 info: \n 02200 - msb = 0 02201 - lsb = 0 02202 - i2c_size = 1 02203 */ 02204 #define VL53L1_RESULT__SIGMA_SD1 0x00A6 02205 /*!< 02206 type: uint16_t \n 02207 default: 0x0000 \n 02208 info: \n 02209 - msb = 15 02210 - lsb = 0 02211 - i2c_size = 2 02212 groups: \n 02213 ['system_results', 'results'] 02214 fields: \n 02215 - [15:0] = result__sigma_sd1 (fixed point 14.2) 02216 */ 02217 #define VL53L1_RESULT__SIGMA_SD1_HI 0x00A6 02218 /*!< 02219 info: \n 02220 - msb = 0 02221 - lsb = 0 02222 - i2c_size = 1 02223 */ 02224 #define VL53L1_RESULT__SIGMA_SD1_LO 0x00A7 02225 /*!< 02226 info: \n 02227 - msb = 0 02228 - lsb = 0 02229 - i2c_size = 1 02230 */ 02231 #define VL53L1_RESULT__PHASE_SD1 0x00A8 02232 /*!< 02233 type: uint16_t \n 02234 default: 0x0000 \n 02235 info: \n 02236 - msb = 15 02237 - lsb = 0 02238 - i2c_size = 2 02239 groups: \n 02240 ['system_results', 'results'] 02241 fields: \n 02242 - [15:0] = result__phase_sd1 (fixed point 5.11) 02243 */ 02244 #define VL53L1_RESULT__PHASE_SD1_HI 0x00A8 02245 /*!< 02246 info: \n 02247 - msb = 0 02248 - lsb = 0 02249 - i2c_size = 1 02250 */ 02251 #define VL53L1_RESULT__PHASE_SD1_LO 0x00A9 02252 /*!< 02253 info: \n 02254 - msb = 0 02255 - lsb = 0 02256 - i2c_size = 1 02257 */ 02258 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x00AA 02259 /*!< 02260 type: uint16_t \n 02261 default: 0x0000 \n 02262 info: \n 02263 - msb = 15 02264 - lsb = 0 02265 - i2c_size = 2 02266 groups: \n 02267 ['system_results', 'results'] 02268 fields: \n 02269 - [15:0] = result__final_crosstalk_corrected_range_mm_sd1 02270 */ 02271 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x00AA 02272 /*!< 02273 info: \n 02274 - msb = 0 02275 - lsb = 0 02276 - i2c_size = 1 02277 */ 02278 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x00AB 02279 /*!< 02280 info: \n 02281 - msb = 0 02282 - lsb = 0 02283 - i2c_size = 1 02284 */ 02285 #define VL53L1_RESULT__SPARE_0_SD1 0x00AC 02286 /*!< 02287 type: uint16_t \n 02288 default: 0x0000 \n 02289 info: \n 02290 - msb = 15 02291 - lsb = 0 02292 - i2c_size = 2 02293 groups: \n 02294 ['system_results', 'results'] 02295 fields: \n 02296 - [15:0] = result__spare_0_sd1 02297 */ 02298 #define VL53L1_RESULT__SPARE_0_SD1_HI 0x00AC 02299 /*!< 02300 info: \n 02301 - msb = 0 02302 - lsb = 0 02303 - i2c_size = 1 02304 */ 02305 #define VL53L1_RESULT__SPARE_0_SD1_LO 0x00AD 02306 /*!< 02307 info: \n 02308 - msb = 0 02309 - lsb = 0 02310 - i2c_size = 1 02311 */ 02312 #define VL53L1_RESULT__SPARE_1_SD1 0x00AE 02313 /*!< 02314 type: uint16_t \n 02315 default: 0x0000 \n 02316 info: \n 02317 - msb = 15 02318 - lsb = 0 02319 - i2c_size = 2 02320 groups: \n 02321 ['system_results', 'results'] 02322 fields: \n 02323 - [15:0] = result__spare_1_sd1 02324 */ 02325 #define VL53L1_RESULT__SPARE_1_SD1_HI 0x00AE 02326 /*!< 02327 info: \n 02328 - msb = 0 02329 - lsb = 0 02330 - i2c_size = 1 02331 */ 02332 #define VL53L1_RESULT__SPARE_1_SD1_LO 0x00AF 02333 /*!< 02334 info: \n 02335 - msb = 0 02336 - lsb = 0 02337 - i2c_size = 1 02338 */ 02339 #define VL53L1_RESULT__SPARE_2_SD1 0x00B0 02340 /*!< 02341 type: uint16_t \n 02342 default: 0x0000 \n 02343 info: \n 02344 - msb = 15 02345 - lsb = 0 02346 - i2c_size = 2 02347 groups: \n 02348 ['system_results', 'results'] 02349 fields: \n 02350 - [15:0] = result__spare_2_sd1 02351 */ 02352 #define VL53L1_RESULT__SPARE_2_SD1_HI 0x00B0 02353 /*!< 02354 info: \n 02355 - msb = 0 02356 - lsb = 0 02357 - i2c_size = 1 02358 */ 02359 #define VL53L1_RESULT__SPARE_2_SD1_LO 0x00B1 02360 /*!< 02361 info: \n 02362 - msb = 0 02363 - lsb = 0 02364 - i2c_size = 1 02365 */ 02366 #define VL53L1_RESULT__SPARE_3_SD1 0x00B2 02367 /*!< 02368 type: uint8_t \n 02369 default: 0x00 \n 02370 info: \n 02371 - msb = 7 02372 - lsb = 0 02373 - i2c_size = 1 02374 groups: \n 02375 ['system_results', 'results'] 02376 fields: \n 02377 - [7:0] = result__spare_3_sd1 02378 */ 02379 #define VL53L1_RESULT__THRESH_INFO 0x00B3 02380 /*!< 02381 type: uint8_t \n 02382 default: 0x00 \n 02383 info: \n 02384 - msb = 7 02385 - lsb = 0 02386 - i2c_size = 1 02387 groups: \n 02388 ['system_results', 'results'] 02389 fields: \n 02390 - [3:0] = result__distance_int_info 02391 - [7:4] = result__rate_int_info 02392 */ 02393 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x00B4 02394 /*!< 02395 type: uint32_t \n 02396 default: 0x00000000 \n 02397 info: \n 02398 - msb = 31 02399 - lsb = 0 02400 - i2c_size = 4 02401 groups: \n 02402 ['core_results', 'ranging_core_results'] 02403 fields: \n 02404 - [31:0] = result_core__ambient_window_events_sd0 02405 */ 02406 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x00B4 02407 /*!< 02408 info: \n 02409 - msb = 0 02410 - lsb = 0 02411 - i2c_size = 1 02412 */ 02413 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x00B5 02414 /*!< 02415 info: \n 02416 - msb = 0 02417 - lsb = 0 02418 - i2c_size = 1 02419 */ 02420 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x00B6 02421 /*!< 02422 info: \n 02423 - msb = 0 02424 - lsb = 0 02425 - i2c_size = 1 02426 */ 02427 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x00B7 02428 /*!< 02429 info: \n 02430 - msb = 0 02431 - lsb = 0 02432 - i2c_size = 1 02433 */ 02434 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x00B8 02435 /*!< 02436 type: uint32_t \n 02437 default: 0x00000000 \n 02438 info: \n 02439 - msb = 31 02440 - lsb = 0 02441 - i2c_size = 4 02442 groups: \n 02443 ['core_results', 'ranging_core_results'] 02444 fields: \n 02445 - [31:0] = result_core__ranging_total_events_sd0 02446 */ 02447 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x00B8 02448 /*!< 02449 info: \n 02450 - msb = 0 02451 - lsb = 0 02452 - i2c_size = 1 02453 */ 02454 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x00B9 02455 /*!< 02456 info: \n 02457 - msb = 0 02458 - lsb = 0 02459 - i2c_size = 1 02460 */ 02461 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x00BA 02462 /*!< 02463 info: \n 02464 - msb = 0 02465 - lsb = 0 02466 - i2c_size = 1 02467 */ 02468 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x00BB 02469 /*!< 02470 info: \n 02471 - msb = 0 02472 - lsb = 0 02473 - i2c_size = 1 02474 */ 02475 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x00BC 02476 /*!< 02477 type: int32_t \n 02478 default: 0x00000000 \n 02479 info: \n 02480 - msb = 31 02481 - lsb = 0 02482 - i2c_size = 4 02483 groups: \n 02484 ['core_results', 'ranging_core_results'] 02485 fields: \n 02486 - [31:0] = result_core__signal_total_events_sd0 02487 */ 02488 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x00BC 02489 /*!< 02490 info: \n 02491 - msb = 0 02492 - lsb = 0 02493 - i2c_size = 1 02494 */ 02495 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x00BD 02496 /*!< 02497 info: \n 02498 - msb = 0 02499 - lsb = 0 02500 - i2c_size = 1 02501 */ 02502 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x00BE 02503 /*!< 02504 info: \n 02505 - msb = 0 02506 - lsb = 0 02507 - i2c_size = 1 02508 */ 02509 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x00BF 02510 /*!< 02511 info: \n 02512 - msb = 0 02513 - lsb = 0 02514 - i2c_size = 1 02515 */ 02516 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x00C0 02517 /*!< 02518 type: uint32_t \n 02519 default: 0x00000000 \n 02520 info: \n 02521 - msb = 31 02522 - lsb = 0 02523 - i2c_size = 4 02524 groups: \n 02525 ['core_results', 'ranging_core_results'] 02526 fields: \n 02527 - [31:0] = result_core__total_periods_elapsed_sd0 02528 */ 02529 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x00C0 02530 /*!< 02531 info: \n 02532 - msb = 0 02533 - lsb = 0 02534 - i2c_size = 1 02535 */ 02536 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x00C1 02537 /*!< 02538 info: \n 02539 - msb = 0 02540 - lsb = 0 02541 - i2c_size = 1 02542 */ 02543 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x00C2 02544 /*!< 02545 info: \n 02546 - msb = 0 02547 - lsb = 0 02548 - i2c_size = 1 02549 */ 02550 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x00C3 02551 /*!< 02552 info: \n 02553 - msb = 0 02554 - lsb = 0 02555 - i2c_size = 1 02556 */ 02557 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x00C4 02558 /*!< 02559 type: uint32_t \n 02560 default: 0x00000000 \n 02561 info: \n 02562 - msb = 31 02563 - lsb = 0 02564 - i2c_size = 4 02565 groups: \n 02566 ['core_results', 'ranging_core_results'] 02567 fields: \n 02568 - [31:0] = result_core__ambient_window_events_sd1 02569 */ 02570 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x00C4 02571 /*!< 02572 info: \n 02573 - msb = 0 02574 - lsb = 0 02575 - i2c_size = 1 02576 */ 02577 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x00C5 02578 /*!< 02579 info: \n 02580 - msb = 0 02581 - lsb = 0 02582 - i2c_size = 1 02583 */ 02584 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x00C6 02585 /*!< 02586 info: \n 02587 - msb = 0 02588 - lsb = 0 02589 - i2c_size = 1 02590 */ 02591 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x00C7 02592 /*!< 02593 info: \n 02594 - msb = 0 02595 - lsb = 0 02596 - i2c_size = 1 02597 */ 02598 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x00C8 02599 /*!< 02600 type: uint32_t \n 02601 default: 0x00000000 \n 02602 info: \n 02603 - msb = 31 02604 - lsb = 0 02605 - i2c_size = 4 02606 groups: \n 02607 ['core_results', 'ranging_core_results'] 02608 fields: \n 02609 - [31:0] = result_core__ranging_total_events_sd1 02610 */ 02611 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x00C8 02612 /*!< 02613 info: \n 02614 - msb = 0 02615 - lsb = 0 02616 - i2c_size = 1 02617 */ 02618 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x00C9 02619 /*!< 02620 info: \n 02621 - msb = 0 02622 - lsb = 0 02623 - i2c_size = 1 02624 */ 02625 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x00CA 02626 /*!< 02627 info: \n 02628 - msb = 0 02629 - lsb = 0 02630 - i2c_size = 1 02631 */ 02632 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x00CB 02633 /*!< 02634 info: \n 02635 - msb = 0 02636 - lsb = 0 02637 - i2c_size = 1 02638 */ 02639 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x00CC 02640 /*!< 02641 type: int32_t \n 02642 default: 0x00000000 \n 02643 info: \n 02644 - msb = 31 02645 - lsb = 0 02646 - i2c_size = 4 02647 groups: \n 02648 ['core_results', 'ranging_core_results'] 02649 fields: \n 02650 - [31:0] = result_core__signal_total_events_sd1 02651 */ 02652 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x00CC 02653 /*!< 02654 info: \n 02655 - msb = 0 02656 - lsb = 0 02657 - i2c_size = 1 02658 */ 02659 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x00CD 02660 /*!< 02661 info: \n 02662 - msb = 0 02663 - lsb = 0 02664 - i2c_size = 1 02665 */ 02666 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x00CE 02667 /*!< 02668 info: \n 02669 - msb = 0 02670 - lsb = 0 02671 - i2c_size = 1 02672 */ 02673 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x00CF 02674 /*!< 02675 info: \n 02676 - msb = 0 02677 - lsb = 0 02678 - i2c_size = 1 02679 */ 02680 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x00D0 02681 /*!< 02682 type: uint32_t \n 02683 default: 0x00000000 \n 02684 info: \n 02685 - msb = 31 02686 - lsb = 0 02687 - i2c_size = 4 02688 groups: \n 02689 ['core_results', 'ranging_core_results'] 02690 fields: \n 02691 - [31:0] = result_core__total_periods_elapsed_sd1 02692 */ 02693 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x00D0 02694 /*!< 02695 info: \n 02696 - msb = 0 02697 - lsb = 0 02698 - i2c_size = 1 02699 */ 02700 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x00D1 02701 /*!< 02702 info: \n 02703 - msb = 0 02704 - lsb = 0 02705 - i2c_size = 1 02706 */ 02707 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x00D2 02708 /*!< 02709 info: \n 02710 - msb = 0 02711 - lsb = 0 02712 - i2c_size = 1 02713 */ 02714 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x00D3 02715 /*!< 02716 info: \n 02717 - msb = 0 02718 - lsb = 0 02719 - i2c_size = 1 02720 */ 02721 #define VL53L1_RESULT_CORE__SPARE_0 0x00D4 02722 /*!< 02723 type: uint8_t \n 02724 default: 0x00 \n 02725 info: \n 02726 - msb = 7 02727 - lsb = 0 02728 - i2c_size = 1 02729 groups: \n 02730 ['core_results', 'ranging_core_results'] 02731 fields: \n 02732 - [7:0] = result_core__spare_0 02733 */ 02734 #define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE 0x00D6 02735 /*!< 02736 type: uint16_t \n 02737 default: 0x0000 \n 02738 info: \n 02739 - msb = 15 02740 - lsb = 0 02741 - i2c_size = 2 02742 groups: \n 02743 ['debug_results', 'phasecal_results'] 02744 fields: \n 02745 - [15:0] = result_phasecal__reference_phase (fixed point 5.11) 02746 */ 02747 #define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE_HI 0x00D6 02748 /*!< 02749 info: \n 02750 - msb = 0 02751 - lsb = 0 02752 - i2c_size = 1 02753 */ 02754 #define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE_LO 0x00D7 02755 /*!< 02756 info: \n 02757 - msb = 0 02758 - lsb = 0 02759 - i2c_size = 1 02760 */ 02761 #define VL53L1_PHASECAL_RESULT__VCSEL_START 0x00D8 02762 /*!< 02763 type: uint8_t \n 02764 default: 0x00 \n 02765 info: \n 02766 - msb = 6 02767 - lsb = 0 02768 - i2c_size = 1 02769 groups: \n 02770 ['debug_results', 'phasecal_results'] 02771 fields: \n 02772 - [6:0] = result_phasecal__vcsel_start 02773 */ 02774 #define VL53L1_REF_SPAD_CHAR_RESULT__NUM_ACTUAL_REF_SPADS 0x00D9 02775 /*!< 02776 type: uint8_t \n 02777 default: 0x00 \n 02778 info: \n 02779 - msb = 5 02780 - lsb = 0 02781 - i2c_size = 1 02782 groups: \n 02783 ['debug_results', 'ref_spad_status'] 02784 fields: \n 02785 - [5:0] = ref_spad_char_result__num_actual_ref_spads 02786 */ 02787 #define VL53L1_REF_SPAD_CHAR_RESULT__REF_LOCATION 0x00DA 02788 /*!< 02789 type: uint8_t \n 02790 default: 0x00 \n 02791 info: \n 02792 - msb = 1 02793 - lsb = 0 02794 - i2c_size = 1 02795 groups: \n 02796 ['debug_results', 'ref_spad_status'] 02797 fields: \n 02798 - [1:0] = ref_spad_char_result__ref_location 02799 */ 02800 #define VL53L1_VHV_RESULT__COLDBOOT_STATUS 0x00DB 02801 /*!< 02802 type: uint8_t \n 02803 default: 0x00 \n 02804 info: \n 02805 - msb = 0 02806 - lsb = 0 02807 - i2c_size = 1 02808 groups: \n 02809 ['debug_results', 'vhv_results'] 02810 fields: \n 02811 - [0] = vhv_result__coldboot_status 02812 */ 02813 #define VL53L1_VHV_RESULT__SEARCH_RESULT 0x00DC 02814 /*!< 02815 type: uint8_t \n 02816 default: 0x00 \n 02817 info: \n 02818 - msb = 5 02819 - lsb = 0 02820 - i2c_size = 1 02821 groups: \n 02822 ['debug_results', 'vhv_results'] 02823 fields: \n 02824 - [5:0] = cp_sel_result 02825 */ 02826 #define VL53L1_VHV_RESULT__LATEST_SETTING 0x00DD 02827 /*!< 02828 type: uint8_t \n 02829 default: 0x00 \n 02830 info: \n 02831 - msb = 5 02832 - lsb = 0 02833 - i2c_size = 1 02834 groups: \n 02835 ['debug_results', 'vhv_results'] 02836 fields: \n 02837 - [5:0] = cp_sel_latest_setting 02838 */ 02839 #define VL53L1_RESULT__OSC_CALIBRATE_VAL 0x00DE 02840 /*!< 02841 type: uint16_t \n 02842 default: 0x0000 \n 02843 info: \n 02844 - msb = 9 02845 - lsb = 0 02846 - i2c_size = 2 02847 groups: \n 02848 ['debug_results', 'misc_results'] 02849 fields: \n 02850 - [9:0] = osc_calibrate_val 02851 */ 02852 #define VL53L1_RESULT__OSC_CALIBRATE_VAL_HI 0x00DE 02853 /*!< 02854 info: \n 02855 - msb = 0 02856 - lsb = 0 02857 - i2c_size = 1 02858 */ 02859 #define VL53L1_RESULT__OSC_CALIBRATE_VAL_LO 0x00DF 02860 /*!< 02861 info: \n 02862 - msb = 0 02863 - lsb = 0 02864 - i2c_size = 1 02865 */ 02866 #define VL53L1_ANA_CONFIG__POWERDOWN_GO1 0x00E0 02867 /*!< 02868 type: uint8_t \n 02869 default: 0x02 \n 02870 info: \n 02871 - msb = 1 02872 - lsb = 0 02873 - i2c_size = 1 02874 groups: \n 02875 ['debug_results', 'analog_config'] 02876 fields: \n 02877 - [0] = go2_ref_bg_disable_avdd 02878 - [1] = go2_regdvdd1v2_enable_avdd 02879 */ 02880 #define VL53L1_ANA_CONFIG__REF_BG_CTRL 0x00E1 02881 /*!< 02882 type: uint8_t \n 02883 default: 0x00 \n 02884 info: \n 02885 - msb = 1 02886 - lsb = 0 02887 - i2c_size = 1 02888 groups: \n 02889 ['debug_results', 'analog_config'] 02890 fields: \n 02891 - [0] = go2_ref_overdrvbg_avdd 02892 - [1] = go2_ref_forcebgison_avdd 02893 */ 02894 #define VL53L1_ANA_CONFIG__REGDVDD1V2_CTRL 0x00E2 02895 /*!< 02896 type: uint8_t \n 02897 default: 0x01 \n 02898 info: \n 02899 - msb = 3 02900 - lsb = 0 02901 - i2c_size = 1 02902 groups: \n 02903 ['debug_results', 'analog_config'] 02904 fields: \n 02905 - [0] = go2_regdvdd1v2_sel_pulldown_avdd 02906 - [1] = go2_regdvdd1v2_sel_boost_avdd 02907 - [3:2] = go2_regdvdd1v2_selv_avdd 02908 */ 02909 #define VL53L1_ANA_CONFIG__OSC_SLOW_CTRL 0x00E3 02910 /*!< 02911 type: uint8_t \n 02912 default: 0x02 \n 02913 info: \n 02914 - msb = 2 02915 - lsb = 0 02916 - i2c_size = 1 02917 groups: \n 02918 ['debug_results', 'analog_config'] 02919 fields: \n 02920 - [0] = osc_slow_en 02921 - [1] = osc_slow_op_en 02922 - [2] = osc_slow_freq_sel 02923 */ 02924 #define VL53L1_TEST_MODE__STATUS 0x00E4 02925 /*!< 02926 type: uint8_t \n 02927 default: 0x00 \n 02928 info: \n 02929 - msb = 0 02930 - lsb = 0 02931 - i2c_size = 1 02932 groups: \n 02933 ['debug_results', 'test_mode_status'] 02934 fields: \n 02935 - [0] = test_mode_status 02936 */ 02937 #define VL53L1_FIRMWARE__SYSTEM_STATUS 0x00E5 02938 /*!< 02939 type: uint8_t \n 02940 default: 0x02 \n 02941 info: \n 02942 - msb = 1 02943 - lsb = 0 02944 - i2c_size = 1 02945 groups: \n 02946 ['debug_results', 'firmware_status'] 02947 fields: \n 02948 - [0] = firmware_bootup 02949 - [1] = firmware_first_range 02950 */ 02951 #define VL53L1_FIRMWARE__MODE_STATUS 0x00E6 02952 /*!< 02953 type: uint8_t \n 02954 default: 0x00 \n 02955 info: \n 02956 - msb = 7 02957 - lsb = 0 02958 - i2c_size = 1 02959 groups: \n 02960 ['debug_results', 'firmware_status'] 02961 fields: \n 02962 - [7:0] = firmware_mode_status 02963 */ 02964 #define VL53L1_FIRMWARE__SECONDARY_MODE_STATUS 0x00E7 02965 /*!< 02966 type: uint8_t \n 02967 default: 0x00 \n 02968 info: \n 02969 - msb = 7 02970 - lsb = 0 02971 - i2c_size = 1 02972 groups: \n 02973 ['debug_results', 'firmware_status'] 02974 fields: \n 02975 - [7:0] = fw_secondary_mode_status 02976 */ 02977 #define VL53L1_FIRMWARE__CAL_REPEAT_RATE_COUNTER 0x00E8 02978 /*!< 02979 type: uint16_t \n 02980 default: 0x0000 \n 02981 info: \n 02982 - msb = 11 02983 - lsb = 0 02984 - i2c_size = 2 02985 groups: \n 02986 ['debug_results', 'firmware_status'] 02987 fields: \n 02988 - [11:0] = firmware_cal_repeat_rate 02989 */ 02990 #define VL53L1_FIRMWARE__CAL_REPEAT_RATE_COUNTER_HI 0x00E8 02991 /*!< 02992 info: \n 02993 - msb = 0 02994 - lsb = 0 02995 - i2c_size = 1 02996 */ 02997 #define VL53L1_FIRMWARE__CAL_REPEAT_RATE_COUNTER_LO 0x00E9 02998 /*!< 02999 info: \n 03000 - msb = 0 03001 - lsb = 0 03002 - i2c_size = 1 03003 */ 03004 #define VL53L1_FIRMWARE__HISTOGRAM_BIN 0x00EA 03005 /*!< 03006 info: \n 03007 - msb = 0 03008 - lsb = 0 03009 - i2c_size = 1 03010 */ 03011 #define VL53L1_GPH__SYSTEM__THRESH_HIGH 0x00EC 03012 /*!< 03013 type: uint16_t \n 03014 default: 0x0000 \n 03015 info: \n 03016 - msb = 15 03017 - lsb = 0 03018 - i2c_size = 2 03019 groups: \n 03020 ['debug_results', 'gph_actual'] 03021 fields: \n 03022 - [15:0] = shadow_thresh_high 03023 */ 03024 #define VL53L1_GPH__SYSTEM__THRESH_HIGH_HI 0x00EC 03025 /*!< 03026 info: \n 03027 - msb = 0 03028 - lsb = 0 03029 - i2c_size = 1 03030 */ 03031 #define VL53L1_GPH__SYSTEM__THRESH_HIGH_LO 0x00ED 03032 /*!< 03033 info: \n 03034 - msb = 0 03035 - lsb = 0 03036 - i2c_size = 1 03037 */ 03038 #define VL53L1_GPH__SYSTEM__THRESH_LOW 0x00EE 03039 /*!< 03040 type: uint16_t \n 03041 default: 0x0000 \n 03042 info: \n 03043 - msb = 15 03044 - lsb = 0 03045 - i2c_size = 2 03046 groups: \n 03047 ['debug_results', 'gph_actual'] 03048 fields: \n 03049 - [15:0] = shadow_thresh_low 03050 */ 03051 #define VL53L1_GPH__SYSTEM__THRESH_LOW_HI 0x00EE 03052 /*!< 03053 info: \n 03054 - msb = 0 03055 - lsb = 0 03056 - i2c_size = 1 03057 */ 03058 #define VL53L1_GPH__SYSTEM__THRESH_LOW_LO 0x00EF 03059 /*!< 03060 info: \n 03061 - msb = 0 03062 - lsb = 0 03063 - i2c_size = 1 03064 */ 03065 #define VL53L1_GPH__SYSTEM__ENABLE_XTALK_PER_QUADRANT 0x00F0 03066 /*!< 03067 type: uint8_t \n 03068 default: 0x00 \n 03069 info: \n 03070 - msb = 0 03071 - lsb = 0 03072 - i2c_size = 1 03073 groups: \n 03074 ['debug_results', 'gph_actual'] 03075 fields: \n 03076 - [0] = shadow__enable_xtalk_per_quadrant 03077 */ 03078 #define VL53L1_GPH__SPARE_0 0x00F1 03079 /*!< 03080 type: uint8_t \n 03081 default: 0x00 \n 03082 info: \n 03083 - msb = 2 03084 - lsb = 0 03085 - i2c_size = 1 03086 groups: \n 03087 ['debug_results', 'gph_actual'] 03088 fields: \n 03089 - [0] = fw_safe_to_disable 03090 - [1] = shadow__spare_0 03091 - [2] = shadow__spare_1 03092 */ 03093 #define VL53L1_GPH__SD_CONFIG__WOI_SD0 0x00F2 03094 /*!< 03095 type: uint8_t \n 03096 default: 0x04 \n 03097 info: \n 03098 - msb = 7 03099 - lsb = 0 03100 - i2c_size = 1 03101 groups: \n 03102 ['debug_results', 'gph_actual'] 03103 fields: \n 03104 - [7:0] = shadow_sd_config__woi_sd0 03105 */ 03106 #define VL53L1_GPH__SD_CONFIG__WOI_SD1 0x00F3 03107 /*!< 03108 type: uint8_t \n 03109 default: 0x04 \n 03110 info: \n 03111 - msb = 7 03112 - lsb = 0 03113 - i2c_size = 1 03114 groups: \n 03115 ['debug_results', 'gph_actual'] 03116 fields: \n 03117 - [7:0] = shadow_sd_config__woi_sd1 03118 */ 03119 #define VL53L1_GPH__SD_CONFIG__INITIAL_PHASE_SD0 0x00F4 03120 /*!< 03121 type: uint8_t \n 03122 default: 0x03 \n 03123 info: \n 03124 - msb = 6 03125 - lsb = 0 03126 - i2c_size = 1 03127 groups: \n 03128 ['debug_results', 'gph_actual'] 03129 fields: \n 03130 - [6:0] = shadow_sd_config__initial_phase_sd0 03131 */ 03132 #define VL53L1_GPH__SD_CONFIG__INITIAL_PHASE_SD1 0x00F5 03133 /*!< 03134 type: uint8_t \n 03135 default: 0x03 \n 03136 info: \n 03137 - msb = 6 03138 - lsb = 0 03139 - i2c_size = 1 03140 groups: \n 03141 ['debug_results', 'gph_actual'] 03142 fields: \n 03143 - [6:0] = shadow_sd_config__initial_phase_sd1 03144 */ 03145 #define VL53L1_GPH__SD_CONFIG__FIRST_ORDER_SELECT 0x00F6 03146 /*!< 03147 type: uint8_t \n 03148 default: 0x00 \n 03149 info: \n 03150 - msb = 1 03151 - lsb = 0 03152 - i2c_size = 1 03153 groups: \n 03154 ['debug_results', 'gph_actual'] 03155 fields: \n 03156 - [0] = shadow_sd_config__first_order_select_rtn 03157 - [1] = shadow_sd_config__first_order_select_ref 03158 */ 03159 #define VL53L1_GPH__SD_CONFIG__QUANTIFIER 0x00F7 03160 /*!< 03161 type: uint8_t \n 03162 default: 0x00 \n 03163 info: \n 03164 - msb = 3 03165 - lsb = 0 03166 - i2c_size = 1 03167 groups: \n 03168 ['debug_results', 'gph_actual'] 03169 fields: \n 03170 - [3:0] = shadow_sd_config__quantifier 03171 */ 03172 #define VL53L1_GPH__ROI_CONFIG__USER_ROI_CENTRE_SPAD 0x00F8 03173 /*!< 03174 type: uint8_t \n 03175 default: 0x00 \n 03176 info: \n 03177 - msb = 7 03178 - lsb = 0 03179 - i2c_size = 1 03180 groups: \n 03181 ['debug_results', 'gph_actual'] 03182 fields: \n 03183 - [7:0] = shadow_user_roi_center_spad_q0 03184 */ 03185 #define VL53L1_GPH__ROI_CONFIG__USER_ROI_REQUESTED_GLOBAL_XY_SIZE 0x00F9 03186 /*!< 03187 type: uint8_t \n 03188 default: 0x00 \n 03189 info: \n 03190 - msb = 7 03191 - lsb = 0 03192 - i2c_size = 1 03193 groups: \n 03194 ['debug_results', 'gph_actual'] 03195 fields: \n 03196 - [7:0] = shadow_user_roi_requested_global_xy_size 03197 */ 03198 #define VL53L1_GPH__SYSTEM__SEQUENCE_CONFIG 0x00FA 03199 /*!< 03200 type: uint8_t \n 03201 default: 0x00 \n 03202 info: \n 03203 - msb = 7 03204 - lsb = 0 03205 - i2c_size = 1 03206 groups: \n 03207 ['debug_results', 'gph_actual'] 03208 fields: \n 03209 - [0] = shadow_sequence_vhv_en 03210 - [1] = shadow_sequence_phasecal_en 03211 - [2] = shadow_sequence_reference_phase_en 03212 - [3] = shadow_sequence_dss1_en 03213 - [4] = shadow_sequence_dss2_en 03214 - [5] = shadow_sequence_mm1_en 03215 - [6] = shadow_sequence_mm2_en 03216 - [7] = shadow_sequence_range_en 03217 */ 03218 #define VL53L1_GPH__GPH_ID 0x00FB 03219 /*!< 03220 type: uint8_t \n 03221 default: 0x00 \n 03222 info: \n 03223 - msb = 0 03224 - lsb = 0 03225 - i2c_size = 1 03226 groups: \n 03227 ['debug_results', 'gph_actual'] 03228 fields: \n 03229 - [0] = shadow_gph_id 03230 */ 03231 #define VL53L1_SYSTEM__INTERRUPT_SET 0x00FC 03232 /*!< 03233 type: uint8_t \n 03234 default: 0x00 \n 03235 info: \n 03236 - msb = 1 03237 - lsb = 0 03238 - i2c_size = 1 03239 groups: \n 03240 ['debug_results', 'system_int_set'] 03241 fields: \n 03242 - [0] = sys_interrupt_set_range 03243 - [1] = sys_interrupt_set_error 03244 */ 03245 #define VL53L1_INTERRUPT_MANAGER__ENABLES 0x00FD 03246 /*!< 03247 type: uint8_t \n 03248 default: 0x00 \n 03249 info: \n 03250 - msb = 4 03251 - lsb = 0 03252 - i2c_size = 1 03253 groups: \n 03254 ['debug_results', 'interrupt_manager'] 03255 fields: \n 03256 - [0] = interrupt_enable__single_shot 03257 - [1] = interrupt_enable__back_to_back 03258 - [2] = interrupt_enable__timed 03259 - [3] = interrupt_enable__abort 03260 - [4] = interrupt_enable__test 03261 */ 03262 #define VL53L1_INTERRUPT_MANAGER__CLEAR 0x00FE 03263 /*!< 03264 type: uint8_t \n 03265 default: 0x00 \n 03266 info: \n 03267 - msb = 4 03268 - lsb = 0 03269 - i2c_size = 1 03270 groups: \n 03271 ['debug_results', 'interrupt_manager'] 03272 fields: \n 03273 - [0] = interrupt_clear__single_shot 03274 - [1] = interrupt_clear__back_to_back 03275 - [2] = interrupt_clear__timed 03276 - [3] = interrupt_clear__abort 03277 - [4] = interrupt_clear__test 03278 */ 03279 #define VL53L1_INTERRUPT_MANAGER__STATUS 0x00FF 03280 /*!< 03281 type: uint8_t \n 03282 default: 0x00 \n 03283 info: \n 03284 - msb = 4 03285 - lsb = 0 03286 - i2c_size = 1 03287 groups: \n 03288 ['debug_results', 'interrupt_manager'] 03289 fields: \n 03290 - [0] = interrupt_status__single_shot 03291 - [1] = interrupt_status__back_to_back 03292 - [2] = interrupt_status__timed 03293 - [3] = interrupt_status__abort 03294 - [4] = interrupt_status__test 03295 */ 03296 #define VL53L1_MCU_TO_HOST_BANK__WR_ACCESS_EN 0x0100 03297 /*!< 03298 type: uint8_t \n 03299 default: 0x00 \n 03300 info: \n 03301 - msb = 0 03302 - lsb = 0 03303 - i2c_size = 1 03304 groups: \n 03305 ['debug_results', 'host_bank_ctrl'] 03306 fields: \n 03307 - [0] = mcu_to_host_bank_wr_en 03308 */ 03309 #define VL53L1_POWER_MANAGEMENT__GO1_RESET_STATUS 0x0101 03310 /*!< 03311 type: uint8_t \n 03312 default: 0x00 \n 03313 info: \n 03314 - msb = 0 03315 - lsb = 0 03316 - i2c_size = 1 03317 groups: \n 03318 ['debug_results', 'power_man_status'] 03319 fields: \n 03320 - [0] = go1_status 03321 */ 03322 #define VL53L1_PAD_STARTUP_MODE__VALUE_RO 0x0102 03323 /*!< 03324 type: uint8_t \n 03325 default: 0x00 \n 03326 info: \n 03327 - msb = 1 03328 - lsb = 0 03329 - i2c_size = 1 03330 groups: \n 03331 ['debug_results', 'pad_config'] 03332 fields: \n 03333 - [0] = pad_atest1_val_ro 03334 - [1] = pad_atest2_val_ro 03335 */ 03336 #define VL53L1_PAD_STARTUP_MODE__VALUE_CTRL 0x0103 03337 /*!< 03338 type: uint8_t \n 03339 default: 0x30 \n 03340 info: \n 03341 - msb = 5 03342 - lsb = 0 03343 - i2c_size = 1 03344 groups: \n 03345 ['debug_results', 'pad_config'] 03346 fields: \n 03347 - [0] = pad_atest1_val 03348 - [1] = pad_atest2_val 03349 - [4] = pad_atest1_dig_enable 03350 - [5] = pad_atest2_dig_enable 03351 */ 03352 #define VL53L1_PLL_PERIOD_US 0x0104 03353 /*!< 03354 type: uint32_t \n 03355 default: 0x00000000 \n 03356 info: \n 03357 - msb = 17 03358 - lsb = 0 03359 - i2c_size = 4 03360 groups: \n 03361 ['debug_results', 'pll_config'] 03362 fields: \n 03363 - [17:0] = pll_period_us (fixed point 0.24) 03364 */ 03365 #define VL53L1_PLL_PERIOD_US_3 0x0104 03366 /*!< 03367 info: \n 03368 - msb = 0 03369 - lsb = 0 03370 - i2c_size = 1 03371 */ 03372 #define VL53L1_PLL_PERIOD_US_2 0x0105 03373 /*!< 03374 info: \n 03375 - msb = 0 03376 - lsb = 0 03377 - i2c_size = 1 03378 */ 03379 #define VL53L1_PLL_PERIOD_US_1 0x0106 03380 /*!< 03381 info: \n 03382 - msb = 0 03383 - lsb = 0 03384 - i2c_size = 1 03385 */ 03386 #define VL53L1_PLL_PERIOD_US_0 0x0107 03387 /*!< 03388 info: \n 03389 - msb = 0 03390 - lsb = 0 03391 - i2c_size = 1 03392 */ 03393 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT 0x0108 03394 /*!< 03395 type: uint32_t \n 03396 default: 0x00000000 \n 03397 info: \n 03398 - msb = 31 03399 - lsb = 0 03400 - i2c_size = 4 03401 groups: \n 03402 ['debug_results', 'debug_timer'] 03403 fields: \n 03404 - [31:0] = interrupt_scheduler_data_out 03405 */ 03406 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_3 0x0108 03407 /*!< 03408 info: \n 03409 - msb = 0 03410 - lsb = 0 03411 - i2c_size = 1 03412 */ 03413 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_2 0x0109 03414 /*!< 03415 info: \n 03416 - msb = 0 03417 - lsb = 0 03418 - i2c_size = 1 03419 */ 03420 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_1 0x010A 03421 /*!< 03422 info: \n 03423 - msb = 0 03424 - lsb = 0 03425 - i2c_size = 1 03426 */ 03427 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_0 0x010B 03428 /*!< 03429 info: \n 03430 - msb = 0 03431 - lsb = 0 03432 - i2c_size = 1 03433 */ 03434 #define VL53L1_NVM_BIST__COMPLETE 0x010C 03435 /*!< 03436 type: uint8_t \n 03437 default: 0x00 \n 03438 info: \n 03439 - msb = 0 03440 - lsb = 0 03441 - i2c_size = 1 03442 groups: \n 03443 ['debug_results', 'nvm_bist_status'] 03444 fields: \n 03445 - [0] = nvm_bist__complete 03446 */ 03447 #define VL53L1_NVM_BIST__STATUS 0x010D 03448 /*!< 03449 type: uint8_t \n 03450 default: 0x00 \n 03451 info: \n 03452 - msb = 0 03453 - lsb = 0 03454 - i2c_size = 1 03455 groups: \n 03456 ['debug_results', 'nvm_bist_status'] 03457 fields: \n 03458 - [0] = nvm_bist__status 03459 */ 03460 #define VL53L1_IDENTIFICATION__MODEL_ID 0x010F 03461 /*!< 03462 type: uint8_t \n 03463 default: 0xEA \n 03464 info: \n 03465 - msb = 7 03466 - lsb = 0 03467 - i2c_size = 1 03468 groups: \n 03469 ['nvm_copy_data', 'identification'] 03470 fields: \n 03471 - [7:0] = model_id 03472 */ 03473 #define VL53L1_IDENTIFICATION__MODULE_TYPE 0x0110 03474 /*!< 03475 type: uint8_t \n 03476 default: 0xAA \n 03477 info: \n 03478 - msb = 7 03479 - lsb = 0 03480 - i2c_size = 1 03481 groups: \n 03482 ['nvm_copy_data', 'identification'] 03483 fields: \n 03484 - [7:0] = module_type 03485 */ 03486 #define VL53L1_IDENTIFICATION__REVISION_ID 0x0111 03487 /*!< 03488 type: uint8_t \n 03489 default: 0x00 \n 03490 info: \n 03491 - msb = 7 03492 - lsb = 0 03493 - i2c_size = 1 03494 groups: \n 03495 ['nvm_copy_data', 'identification'] 03496 fields: \n 03497 - [3:0] = nvm_revision_id 03498 - [7:4] = mask_revision_id 03499 */ 03500 #define VL53L1_IDENTIFICATION__MODULE_ID 0x0112 03501 /*!< 03502 type: uint16_t \n 03503 default: 0x0000 \n 03504 info: \n 03505 - msb = 15 03506 - lsb = 0 03507 - i2c_size = 2 03508 groups: \n 03509 ['nvm_copy_data', 'identification'] 03510 fields: \n 03511 - [15:0] = module_id 03512 */ 03513 #define VL53L1_IDENTIFICATION__MODULE_ID_HI 0x0112 03514 /*!< 03515 info: \n 03516 - msb = 0 03517 - lsb = 0 03518 - i2c_size = 1 03519 */ 03520 #define VL53L1_IDENTIFICATION__MODULE_ID_LO 0x0113 03521 /*!< 03522 info: \n 03523 - msb = 0 03524 - lsb = 0 03525 - i2c_size = 1 03526 */ 03527 #define VL53L1_ANA_CONFIG__FAST_OSC__TRIM_MAX 0x0114 03528 /*!< 03529 type: uint8_t \n 03530 default: OSC_TRIM_DEFAULT \n 03531 info: \n 03532 - msb = 6 03533 - lsb = 0 03534 - i2c_size = 1 03535 groups: \n 03536 ['nvm_copy_data', 'analog_config'] 03537 fields: \n 03538 - [6:0] = osc_trim_max 03539 */ 03540 #define VL53L1_ANA_CONFIG__FAST_OSC__FREQ_SET 0x0115 03541 /*!< 03542 type: uint8_t \n 03543 default: OSC_FREQ_SET_DEFAULT \n 03544 info: \n 03545 - msb = 2 03546 - lsb = 0 03547 - i2c_size = 1 03548 groups: \n 03549 ['nvm_copy_data', 'analog_config'] 03550 fields: \n 03551 - [2:0] = osc_freq_set 03552 */ 03553 #define VL53L1_ANA_CONFIG__VCSEL_TRIM 0x0116 03554 /*!< 03555 type: uint8_t \n 03556 default: 0x00 \n 03557 info: \n 03558 - msb = 2 03559 - lsb = 0 03560 - i2c_size = 1 03561 groups: \n 03562 ['nvm_copy_data', 'analog_config'] 03563 fields: \n 03564 - [2:0] = vcsel_trim 03565 */ 03566 #define VL53L1_ANA_CONFIG__VCSEL_SELION 0x0117 03567 /*!< 03568 type: uint8_t \n 03569 default: 0x00 \n 03570 info: \n 03571 - msb = 5 03572 - lsb = 0 03573 - i2c_size = 1 03574 groups: \n 03575 ['nvm_copy_data', 'analog_config'] 03576 fields: \n 03577 - [5:0] = vcsel_selion 03578 */ 03579 #define VL53L1_ANA_CONFIG__VCSEL_SELION_MAX 0x0118 03580 /*!< 03581 type: uint8_t \n 03582 default: 0x00 \n 03583 info: \n 03584 - msb = 5 03585 - lsb = 0 03586 - i2c_size = 1 03587 groups: \n 03588 ['nvm_copy_data', 'analog_config'] 03589 fields: \n 03590 - [5:0] = vcsel_selion_max 03591 */ 03592 #define VL53L1_PROTECTED_LASER_SAFETY__LOCK_BIT 0x0119 03593 /*!< 03594 type: uint8_t \n 03595 default: 0x00 \n 03596 info: \n 03597 - msb = 0 03598 - lsb = 0 03599 - i2c_size = 1 03600 groups: \n 03601 ['nvm_copy_data', 'laser_safety'] 03602 fields: \n 03603 - [0] = laser_safety__lock_bit 03604 */ 03605 #define VL53L1_LASER_SAFETY__KEY 0x011A 03606 /*!< 03607 type: uint8_t \n 03608 default: 0x00 \n 03609 info: \n 03610 - msb = 6 03611 - lsb = 0 03612 - i2c_size = 1 03613 groups: \n 03614 ['nvm_copy_data', 'laser_safety'] 03615 fields: \n 03616 - [6:0] = laser_safety__key 03617 */ 03618 #define VL53L1_LASER_SAFETY__KEY_RO 0x011B 03619 /*!< 03620 type: uint8_t \n 03621 default: 0x00 \n 03622 info: \n 03623 - msb = 0 03624 - lsb = 0 03625 - i2c_size = 1 03626 groups: \n 03627 ['nvm_copy_data', 'laser_safety'] 03628 fields: \n 03629 - [0] = laser_safety__key_ro 03630 */ 03631 #define VL53L1_LASER_SAFETY__CLIP 0x011C 03632 /*!< 03633 type: uint8_t \n 03634 default: 0x02 \n 03635 info: \n 03636 - msb = 5 03637 - lsb = 0 03638 - i2c_size = 1 03639 groups: \n 03640 ['nvm_copy_data', 'laser_safety'] 03641 fields: \n 03642 - [5:0] = vcsel_pulse_width_clip 03643 */ 03644 #define VL53L1_LASER_SAFETY__MULT 0x011D 03645 /*!< 03646 type: uint8_t \n 03647 default: 0x32 \n 03648 info: \n 03649 - msb = 5 03650 - lsb = 0 03651 - i2c_size = 1 03652 groups: \n 03653 ['nvm_copy_data', 'laser_safety'] 03654 fields: \n 03655 - [5:0] = vcsel_pulse_width_mult 03656 */ 03657 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_0 0x011E 03658 /*!< 03659 type: uint8_t \n 03660 default: 0x00 \n 03661 info: \n 03662 - msb = 7 03663 - lsb = 0 03664 - i2c_size = 1 03665 groups: \n 03666 ['nvm_copy_data', 'ret_spad_config'] 03667 fields: \n 03668 - [7:0] = spad_enables_rtn_0 03669 */ 03670 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_1 0x011F 03671 /*!< 03672 type: uint8_t \n 03673 default: 0x00 \n 03674 info: \n 03675 - msb = 7 03676 - lsb = 0 03677 - i2c_size = 1 03678 groups: \n 03679 ['nvm_copy_data', 'ret_spad_config'] 03680 fields: \n 03681 - [7:0] = spad_enables_rtn_1 03682 */ 03683 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_2 0x0120 03684 /*!< 03685 type: uint8_t \n 03686 default: 0x00 \n 03687 info: \n 03688 - msb = 7 03689 - lsb = 0 03690 - i2c_size = 1 03691 groups: \n 03692 ['nvm_copy_data', 'ret_spad_config'] 03693 fields: \n 03694 - [7:0] = spad_enables_rtn_2 03695 */ 03696 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_3 0x0121 03697 /*!< 03698 type: uint8_t \n 03699 default: 0x00 \n 03700 info: \n 03701 - msb = 7 03702 - lsb = 0 03703 - i2c_size = 1 03704 groups: \n 03705 ['nvm_copy_data', 'ret_spad_config'] 03706 fields: \n 03707 - [7:0] = spad_enables_rtn_3 03708 */ 03709 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_4 0x0122 03710 /*!< 03711 type: uint8_t \n 03712 default: 0x00 \n 03713 info: \n 03714 - msb = 7 03715 - lsb = 0 03716 - i2c_size = 1 03717 groups: \n 03718 ['nvm_copy_data', 'ret_spad_config'] 03719 fields: \n 03720 - [7:0] = spad_enables_rtn_4 03721 */ 03722 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_5 0x0123 03723 /*!< 03724 type: uint8_t \n 03725 default: 0x00 \n 03726 info: \n 03727 - msb = 7 03728 - lsb = 0 03729 - i2c_size = 1 03730 groups: \n 03731 ['nvm_copy_data', 'ret_spad_config'] 03732 fields: \n 03733 - [7:0] = spad_enables_rtn_5 03734 */ 03735 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_6 0x0124 03736 /*!< 03737 type: uint8_t \n 03738 default: 0x00 \n 03739 info: \n 03740 - msb = 7 03741 - lsb = 0 03742 - i2c_size = 1 03743 groups: \n 03744 ['nvm_copy_data', 'ret_spad_config'] 03745 fields: \n 03746 - [7:0] = spad_enables_rtn_6 03747 */ 03748 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_7 0x0125 03749 /*!< 03750 type: uint8_t \n 03751 default: 0x00 \n 03752 info: \n 03753 - msb = 7 03754 - lsb = 0 03755 - i2c_size = 1 03756 groups: \n 03757 ['nvm_copy_data', 'ret_spad_config'] 03758 fields: \n 03759 - [7:0] = spad_enables_rtn_7 03760 */ 03761 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_8 0x0126 03762 /*!< 03763 type: uint8_t \n 03764 default: 0x00 \n 03765 info: \n 03766 - msb = 7 03767 - lsb = 0 03768 - i2c_size = 1 03769 groups: \n 03770 ['nvm_copy_data', 'ret_spad_config'] 03771 fields: \n 03772 - [7:0] = spad_enables_rtn_8 03773 */ 03774 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_9 0x0127 03775 /*!< 03776 type: uint8_t \n 03777 default: 0x00 \n 03778 info: \n 03779 - msb = 7 03780 - lsb = 0 03781 - i2c_size = 1 03782 groups: \n 03783 ['nvm_copy_data', 'ret_spad_config'] 03784 fields: \n 03785 - [7:0] = spad_enables_rtn_9 03786 */ 03787 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_10 0x0128 03788 /*!< 03789 type: uint8_t \n 03790 default: 0x00 \n 03791 info: \n 03792 - msb = 7 03793 - lsb = 0 03794 - i2c_size = 1 03795 groups: \n 03796 ['nvm_copy_data', 'ret_spad_config'] 03797 fields: \n 03798 - [7:0] = spad_enables_rtn_10 03799 */ 03800 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_11 0x0129 03801 /*!< 03802 type: uint8_t \n 03803 default: 0x00 \n 03804 info: \n 03805 - msb = 7 03806 - lsb = 0 03807 - i2c_size = 1 03808 groups: \n 03809 ['nvm_copy_data', 'ret_spad_config'] 03810 fields: \n 03811 - [7:0] = spad_enables_rtn_11 03812 */ 03813 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_12 0x012A 03814 /*!< 03815 type: uint8_t \n 03816 default: 0x00 \n 03817 info: \n 03818 - msb = 7 03819 - lsb = 0 03820 - i2c_size = 1 03821 groups: \n 03822 ['nvm_copy_data', 'ret_spad_config'] 03823 fields: \n 03824 - [7:0] = spad_enables_rtn_12 03825 */ 03826 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_13 0x012B 03827 /*!< 03828 type: uint8_t \n 03829 default: 0x00 \n 03830 info: \n 03831 - msb = 7 03832 - lsb = 0 03833 - i2c_size = 1 03834 groups: \n 03835 ['nvm_copy_data', 'ret_spad_config'] 03836 fields: \n 03837 - [7:0] = spad_enables_rtn_13 03838 */ 03839 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_14 0x012C 03840 /*!< 03841 type: uint8_t \n 03842 default: 0x00 \n 03843 info: \n 03844 - msb = 7 03845 - lsb = 0 03846 - i2c_size = 1 03847 groups: \n 03848 ['nvm_copy_data', 'ret_spad_config'] 03849 fields: \n 03850 - [7:0] = spad_enables_rtn_14 03851 */ 03852 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_15 0x012D 03853 /*!< 03854 type: uint8_t \n 03855 default: 0x00 \n 03856 info: \n 03857 - msb = 7 03858 - lsb = 0 03859 - i2c_size = 1 03860 groups: \n 03861 ['nvm_copy_data', 'ret_spad_config'] 03862 fields: \n 03863 - [7:0] = spad_enables_rtn_15 03864 */ 03865 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_16 0x012E 03866 /*!< 03867 type: uint8_t \n 03868 default: 0x00 \n 03869 info: \n 03870 - msb = 7 03871 - lsb = 0 03872 - i2c_size = 1 03873 groups: \n 03874 ['nvm_copy_data', 'ret_spad_config'] 03875 fields: \n 03876 - [7:0] = spad_enables_rtn_16 03877 */ 03878 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_17 0x012F 03879 /*!< 03880 type: uint8_t \n 03881 default: 0x00 \n 03882 info: \n 03883 - msb = 7 03884 - lsb = 0 03885 - i2c_size = 1 03886 groups: \n 03887 ['nvm_copy_data', 'ret_spad_config'] 03888 fields: \n 03889 - [7:0] = spad_enables_rtn_17 03890 */ 03891 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_18 0x0130 03892 /*!< 03893 type: uint8_t \n 03894 default: 0x00 \n 03895 info: \n 03896 - msb = 7 03897 - lsb = 0 03898 - i2c_size = 1 03899 groups: \n 03900 ['nvm_copy_data', 'ret_spad_config'] 03901 fields: \n 03902 - [7:0] = spad_enables_rtn_18 03903 */ 03904 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_19 0x0131 03905 /*!< 03906 type: uint8_t \n 03907 default: 0x00 \n 03908 info: \n 03909 - msb = 7 03910 - lsb = 0 03911 - i2c_size = 1 03912 groups: \n 03913 ['nvm_copy_data', 'ret_spad_config'] 03914 fields: \n 03915 - [7:0] = spad_enables_rtn_19 03916 */ 03917 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_20 0x0132 03918 /*!< 03919 type: uint8_t \n 03920 default: 0x00 \n 03921 info: \n 03922 - msb = 7 03923 - lsb = 0 03924 - i2c_size = 1 03925 groups: \n 03926 ['nvm_copy_data', 'ret_spad_config'] 03927 fields: \n 03928 - [7:0] = spad_enables_rtn_20 03929 */ 03930 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_21 0x0133 03931 /*!< 03932 type: uint8_t \n 03933 default: 0x00 \n 03934 info: \n 03935 - msb = 7 03936 - lsb = 0 03937 - i2c_size = 1 03938 groups: \n 03939 ['nvm_copy_data', 'ret_spad_config'] 03940 fields: \n 03941 - [7:0] = spad_enables_rtn_21 03942 */ 03943 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_22 0x0134 03944 /*!< 03945 type: uint8_t \n 03946 default: 0x00 \n 03947 info: \n 03948 - msb = 7 03949 - lsb = 0 03950 - i2c_size = 1 03951 groups: \n 03952 ['nvm_copy_data', 'ret_spad_config'] 03953 fields: \n 03954 - [7:0] = spad_enables_rtn_22 03955 */ 03956 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_23 0x0135 03957 /*!< 03958 type: uint8_t \n 03959 default: 0x00 \n 03960 info: \n 03961 - msb = 7 03962 - lsb = 0 03963 - i2c_size = 1 03964 groups: \n 03965 ['nvm_copy_data', 'ret_spad_config'] 03966 fields: \n 03967 - [7:0] = spad_enables_rtn_23 03968 */ 03969 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_24 0x0136 03970 /*!< 03971 type: uint8_t \n 03972 default: 0x00 \n 03973 info: \n 03974 - msb = 7 03975 - lsb = 0 03976 - i2c_size = 1 03977 groups: \n 03978 ['nvm_copy_data', 'ret_spad_config'] 03979 fields: \n 03980 - [7:0] = spad_enables_rtn_24 03981 */ 03982 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_25 0x0137 03983 /*!< 03984 type: uint8_t \n 03985 default: 0x00 \n 03986 info: \n 03987 - msb = 7 03988 - lsb = 0 03989 - i2c_size = 1 03990 groups: \n 03991 ['nvm_copy_data', 'ret_spad_config'] 03992 fields: \n 03993 - [7:0] = spad_enables_rtn_25 03994 */ 03995 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_26 0x0138 03996 /*!< 03997 type: uint8_t \n 03998 default: 0x00 \n 03999 info: \n 04000 - msb = 7 04001 - lsb = 0 04002 - i2c_size = 1 04003 groups: \n 04004 ['nvm_copy_data', 'ret_spad_config'] 04005 fields: \n 04006 - [7:0] = spad_enables_rtn_26 04007 */ 04008 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_27 0x0139 04009 /*!< 04010 type: uint8_t \n 04011 default: 0x00 \n 04012 info: \n 04013 - msb = 7 04014 - lsb = 0 04015 - i2c_size = 1 04016 groups: \n 04017 ['nvm_copy_data', 'ret_spad_config'] 04018 fields: \n 04019 - [7:0] = spad_enables_rtn_27 04020 */ 04021 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_28 0x013A 04022 /*!< 04023 type: uint8_t \n 04024 default: 0x00 \n 04025 info: \n 04026 - msb = 7 04027 - lsb = 0 04028 - i2c_size = 1 04029 groups: \n 04030 ['nvm_copy_data', 'ret_spad_config'] 04031 fields: \n 04032 - [7:0] = spad_enables_rtn_28 04033 */ 04034 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_29 0x013B 04035 /*!< 04036 type: uint8_t \n 04037 default: 0x00 \n 04038 info: \n 04039 - msb = 7 04040 - lsb = 0 04041 - i2c_size = 1 04042 groups: \n 04043 ['nvm_copy_data', 'ret_spad_config'] 04044 fields: \n 04045 - [7:0] = spad_enables_rtn_29 04046 */ 04047 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_30 0x013C 04048 /*!< 04049 type: uint8_t \n 04050 default: 0x00 \n 04051 info: \n 04052 - msb = 7 04053 - lsb = 0 04054 - i2c_size = 1 04055 groups: \n 04056 ['nvm_copy_data', 'ret_spad_config'] 04057 fields: \n 04058 - [7:0] = spad_enables_rtn_30 04059 */ 04060 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_31 0x013D 04061 /*!< 04062 type: uint8_t \n 04063 default: 0x00 \n 04064 info: \n 04065 - msb = 7 04066 - lsb = 0 04067 - i2c_size = 1 04068 groups: \n 04069 ['nvm_copy_data', 'ret_spad_config'] 04070 fields: \n 04071 - [7:0] = spad_enables_rtn_31 04072 */ 04073 #define VL53L1_ROI_CONFIG__MODE_ROI_CENTRE_SPAD 0x013E 04074 /*!< 04075 type: uint8_t \n 04076 default: 0x00 \n 04077 info: \n 04078 - msb = 7 04079 - lsb = 0 04080 - i2c_size = 1 04081 groups: \n 04082 ['nvm_copy_data', 'roi_config'] 04083 fields: \n 04084 - [7:0] = mode_roi_center_spad 04085 */ 04086 #define VL53L1_ROI_CONFIG__MODE_ROI_XY_SIZE 0x013F 04087 /*!< 04088 type: uint8_t \n 04089 default: 0x00 \n 04090 info: \n 04091 - msb = 7 04092 - lsb = 0 04093 - i2c_size = 1 04094 groups: \n 04095 ['nvm_copy_data', 'roi_config'] 04096 fields: \n 04097 - [7:0] = mode_roi_xy_size 04098 */ 04099 #define VL53L1_GO2_HOST_BANK_ACCESS__OVERRIDE 0x0300 04100 /*!< 04101 info: \n 04102 - msb = 0 04103 - lsb = 0 04104 - i2c_size = 1 04105 */ 04106 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND 0x0400 04107 /*!< 04108 info: \n 04109 - msb = 0 04110 - lsb = 0 04111 - i2c_size = 1 04112 */ 04113 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_3 0x0400 04114 /*!< 04115 info: \n 04116 - msb = 0 04117 - lsb = 0 04118 - i2c_size = 1 04119 */ 04120 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_2 0x0401 04121 /*!< 04122 info: \n 04123 - msb = 0 04124 - lsb = 0 04125 - i2c_size = 1 04126 */ 04127 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_1 0x0402 04128 /*!< 04129 info: \n 04130 - msb = 0 04131 - lsb = 0 04132 - i2c_size = 1 04133 */ 04134 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_0 0x0403 04135 /*!< 04136 info: \n 04137 - msb = 0 04138 - lsb = 0 04139 - i2c_size = 1 04140 */ 04141 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER 0x0404 04142 /*!< 04143 info: \n 04144 - msb = 0 04145 - lsb = 0 04146 - i2c_size = 1 04147 */ 04148 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_3 0x0404 04149 /*!< 04150 info: \n 04151 - msb = 0 04152 - lsb = 0 04153 - i2c_size = 1 04154 */ 04155 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_2 0x0405 04156 /*!< 04157 info: \n 04158 - msb = 0 04159 - lsb = 0 04160 - i2c_size = 1 04161 */ 04162 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_1 0x0406 04163 /*!< 04164 info: \n 04165 - msb = 0 04166 - lsb = 0 04167 - i2c_size = 1 04168 */ 04169 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_0 0x0407 04170 /*!< 04171 info: \n 04172 - msb = 0 04173 - lsb = 0 04174 - i2c_size = 1 04175 */ 04176 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI 0x0408 04177 /*!< 04178 info: \n 04179 - msb = 0 04180 - lsb = 0 04181 - i2c_size = 1 04182 */ 04183 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_3 0x0408 04184 /*!< 04185 info: \n 04186 - msb = 0 04187 - lsb = 0 04188 - i2c_size = 1 04189 */ 04190 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_2 0x0409 04191 /*!< 04192 info: \n 04193 - msb = 0 04194 - lsb = 0 04195 - i2c_size = 1 04196 */ 04197 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_1 0x040A 04198 /*!< 04199 info: \n 04200 - msb = 0 04201 - lsb = 0 04202 - i2c_size = 1 04203 */ 04204 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_0 0x040B 04205 /*!< 04206 info: \n 04207 - msb = 0 04208 - lsb = 0 04209 - i2c_size = 1 04210 */ 04211 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO 0x040C 04212 /*!< 04213 info: \n 04214 - msb = 0 04215 - lsb = 0 04216 - i2c_size = 1 04217 */ 04218 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_3 0x040C 04219 /*!< 04220 info: \n 04221 - msb = 0 04222 - lsb = 0 04223 - i2c_size = 1 04224 */ 04225 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_2 0x040D 04226 /*!< 04227 info: \n 04228 - msb = 0 04229 - lsb = 0 04230 - i2c_size = 1 04231 */ 04232 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_1 0x040E 04233 /*!< 04234 info: \n 04235 - msb = 0 04236 - lsb = 0 04237 - i2c_size = 1 04238 */ 04239 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_0 0x040F 04240 /*!< 04241 info: \n 04242 - msb = 0 04243 - lsb = 0 04244 - i2c_size = 1 04245 */ 04246 #define VL53L1_MCU_UTIL_MULTIPLIER__START 0x0410 04247 /*!< 04248 info: \n 04249 - msb = 0 04250 - lsb = 0 04251 - i2c_size = 1 04252 */ 04253 #define VL53L1_MCU_UTIL_MULTIPLIER__STATUS 0x0411 04254 /*!< 04255 info: \n 04256 - msb = 0 04257 - lsb = 0 04258 - i2c_size = 1 04259 */ 04260 #define VL53L1_MCU_UTIL_DIVIDER__START 0x0412 04261 /*!< 04262 info: \n 04263 - msb = 0 04264 - lsb = 0 04265 - i2c_size = 1 04266 */ 04267 #define VL53L1_MCU_UTIL_DIVIDER__STATUS 0x0413 04268 /*!< 04269 info: \n 04270 - msb = 0 04271 - lsb = 0 04272 - i2c_size = 1 04273 */ 04274 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND 0x0414 04275 /*!< 04276 info: \n 04277 - msb = 0 04278 - lsb = 0 04279 - i2c_size = 1 04280 */ 04281 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_3 0x0414 04282 /*!< 04283 info: \n 04284 - msb = 0 04285 - lsb = 0 04286 - i2c_size = 1 04287 */ 04288 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_2 0x0415 04289 /*!< 04290 info: \n 04291 - msb = 0 04292 - lsb = 0 04293 - i2c_size = 1 04294 */ 04295 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_1 0x0416 04296 /*!< 04297 info: \n 04298 - msb = 0 04299 - lsb = 0 04300 - i2c_size = 1 04301 */ 04302 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_0 0x0417 04303 /*!< 04304 info: \n 04305 - msb = 0 04306 - lsb = 0 04307 - i2c_size = 1 04308 */ 04309 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR 0x0418 04310 /*!< 04311 info: \n 04312 - msb = 0 04313 - lsb = 0 04314 - i2c_size = 1 04315 */ 04316 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_3 0x0418 04317 /*!< 04318 info: \n 04319 - msb = 0 04320 - lsb = 0 04321 - i2c_size = 1 04322 */ 04323 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_2 0x0419 04324 /*!< 04325 info: \n 04326 - msb = 0 04327 - lsb = 0 04328 - i2c_size = 1 04329 */ 04330 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_1 0x041A 04331 /*!< 04332 info: \n 04333 - msb = 0 04334 - lsb = 0 04335 - i2c_size = 1 04336 */ 04337 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_0 0x041B 04338 /*!< 04339 info: \n 04340 - msb = 0 04341 - lsb = 0 04342 - i2c_size = 1 04343 */ 04344 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT 0x041C 04345 /*!< 04346 info: \n 04347 - msb = 0 04348 - lsb = 0 04349 - i2c_size = 1 04350 */ 04351 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_3 0x041C 04352 /*!< 04353 info: \n 04354 - msb = 0 04355 - lsb = 0 04356 - i2c_size = 1 04357 */ 04358 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_2 0x041D 04359 /*!< 04360 info: \n 04361 - msb = 0 04362 - lsb = 0 04363 - i2c_size = 1 04364 */ 04365 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_1 0x041E 04366 /*!< 04367 info: \n 04368 - msb = 0 04369 - lsb = 0 04370 - i2c_size = 1 04371 */ 04372 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_0 0x041F 04373 /*!< 04374 info: \n 04375 - msb = 0 04376 - lsb = 0 04377 - i2c_size = 1 04378 */ 04379 #define VL53L1_TIMER0__VALUE_IN 0x0420 04380 /*!< 04381 info: \n 04382 - msb = 0 04383 - lsb = 0 04384 - i2c_size = 1 04385 */ 04386 #define VL53L1_TIMER0__VALUE_IN_3 0x0420 04387 /*!< 04388 info: \n 04389 - msb = 0 04390 - lsb = 0 04391 - i2c_size = 1 04392 */ 04393 #define VL53L1_TIMER0__VALUE_IN_2 0x0421 04394 /*!< 04395 info: \n 04396 - msb = 0 04397 - lsb = 0 04398 - i2c_size = 1 04399 */ 04400 #define VL53L1_TIMER0__VALUE_IN_1 0x0422 04401 /*!< 04402 info: \n 04403 - msb = 0 04404 - lsb = 0 04405 - i2c_size = 1 04406 */ 04407 #define VL53L1_TIMER0__VALUE_IN_0 0x0423 04408 /*!< 04409 info: \n 04410 - msb = 0 04411 - lsb = 0 04412 - i2c_size = 1 04413 */ 04414 #define VL53L1_TIMER1__VALUE_IN 0x0424 04415 /*!< 04416 info: \n 04417 - msb = 0 04418 - lsb = 0 04419 - i2c_size = 1 04420 */ 04421 #define VL53L1_TIMER1__VALUE_IN_3 0x0424 04422 /*!< 04423 info: \n 04424 - msb = 0 04425 - lsb = 0 04426 - i2c_size = 1 04427 */ 04428 #define VL53L1_TIMER1__VALUE_IN_2 0x0425 04429 /*!< 04430 info: \n 04431 - msb = 0 04432 - lsb = 0 04433 - i2c_size = 1 04434 */ 04435 #define VL53L1_TIMER1__VALUE_IN_1 0x0426 04436 /*!< 04437 info: \n 04438 - msb = 0 04439 - lsb = 0 04440 - i2c_size = 1 04441 */ 04442 #define VL53L1_TIMER1__VALUE_IN_0 0x0427 04443 /*!< 04444 info: \n 04445 - msb = 0 04446 - lsb = 0 04447 - i2c_size = 1 04448 */ 04449 #define VL53L1_TIMER0__CTRL 0x0428 04450 /*!< 04451 info: \n 04452 - msb = 0 04453 - lsb = 0 04454 - i2c_size = 1 04455 */ 04456 #define VL53L1_TIMER1__CTRL 0x0429 04457 /*!< 04458 info: \n 04459 - msb = 0 04460 - lsb = 0 04461 - i2c_size = 1 04462 */ 04463 #define VL53L1_MCU_GENERAL_PURPOSE__GP_0 0x042C 04464 /*!< 04465 type: uint8_t \n 04466 default: 0x00 \n 04467 info: \n 04468 - msb = 7 04469 - lsb = 0 04470 - i2c_size = 1 04471 groups: \n 04472 [''] 04473 fields: \n 04474 - [7:0] = mcu_gp_0 04475 */ 04476 #define VL53L1_MCU_GENERAL_PURPOSE__GP_1 0x042D 04477 /*!< 04478 type: uint8_t \n 04479 default: 0x00 \n 04480 info: \n 04481 - msb = 7 04482 - lsb = 0 04483 - i2c_size = 1 04484 groups: \n 04485 [''] 04486 fields: \n 04487 - [7:0] = mcu_gp_1 04488 */ 04489 #define VL53L1_MCU_GENERAL_PURPOSE__GP_2 0x042E 04490 /*!< 04491 type: uint8_t \n 04492 default: 0x00 \n 04493 info: \n 04494 - msb = 7 04495 - lsb = 0 04496 - i2c_size = 1 04497 groups: \n 04498 [''] 04499 fields: \n 04500 - [7:0] = mcu_gp_2 04501 */ 04502 #define VL53L1_MCU_GENERAL_PURPOSE__GP_3 0x042F 04503 /*!< 04504 type: uint8_t \n 04505 default: 0x00 \n 04506 info: \n 04507 - msb = 7 04508 - lsb = 0 04509 - i2c_size = 1 04510 groups: \n 04511 [''] 04512 fields: \n 04513 - [7:0] = mcu_gp_3 04514 */ 04515 #define VL53L1_MCU_RANGE_CALC__CONFIG 0x0430 04516 /*!< 04517 type: uint8_t \n 04518 default: 0x00 \n 04519 info: \n 04520 - msb = 7 04521 - lsb = 0 04522 - i2c_size = 1 04523 groups: \n 04524 [''] 04525 fields: \n 04526 - [0] = fw_calc__sigma_delta_sel 04527 - [2] = fw_calc__phase_output_en 04528 - [3] = fw_calc__peak_signal_rate_en 04529 - [4] = fw_calc__ambient_rate_en 04530 - [5] = fw_calc__total_rate_per_spad_en 04531 - [6] = fw_calc__snr_avg_signal_rate_en 04532 - [7] = fw_calc__sigma_en 04533 */ 04534 #define VL53L1_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE 0x0432 04535 /*!< 04536 type: uint16_t \n 04537 default: 0x0000 \n 04538 info: \n 04539 - msb = 15 04540 - lsb = 0 04541 - i2c_size = 2 04542 groups: \n 04543 [''] 04544 fields: \n 04545 - [15:0] = offset_corrected_range 04546 */ 04547 #define VL53L1_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE_HI 0x0432 04548 /*!< 04549 info: \n 04550 - msb = 0 04551 - lsb = 0 04552 - i2c_size = 1 04553 */ 04554 #define VL53L1_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE_LO 0x0433 04555 /*!< 04556 info: \n 04557 - msb = 0 04558 - lsb = 0 04559 - i2c_size = 1 04560 */ 04561 #define VL53L1_MCU_RANGE_CALC__SPARE_4 0x0434 04562 /*!< 04563 type: uint32_t \n 04564 default: 0x00000000 \n 04565 info: \n 04566 - msb = 16 04567 - lsb = 0 04568 - i2c_size = 4 04569 groups: \n 04570 [''] 04571 fields: \n 04572 - [16:0] = mcu_calc__spare_4 04573 */ 04574 #define VL53L1_MCU_RANGE_CALC__SPARE_4_3 0x0434 04575 /*!< 04576 info: \n 04577 - msb = 0 04578 - lsb = 0 04579 - i2c_size = 1 04580 */ 04581 #define VL53L1_MCU_RANGE_CALC__SPARE_4_2 0x0435 04582 /*!< 04583 info: \n 04584 - msb = 0 04585 - lsb = 0 04586 - i2c_size = 1 04587 */ 04588 #define VL53L1_MCU_RANGE_CALC__SPARE_4_1 0x0436 04589 /*!< 04590 info: \n 04591 - msb = 0 04592 - lsb = 0 04593 - i2c_size = 1 04594 */ 04595 #define VL53L1_MCU_RANGE_CALC__SPARE_4_0 0x0437 04596 /*!< 04597 info: \n 04598 - msb = 0 04599 - lsb = 0 04600 - i2c_size = 1 04601 */ 04602 #define VL53L1_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC 0x0438 04603 /*!< 04604 type: uint16_t \n 04605 default: 0x0000 \n 04606 info: \n 04607 - msb = 13 04608 - lsb = 0 04609 - i2c_size = 2 04610 groups: \n 04611 [''] 04612 fields: \n 04613 - [13:0] = ambient_duration_prec_calc 04614 */ 04615 #define VL53L1_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC_HI 0x0438 04616 /*!< 04617 info: \n 04618 - msb = 0 04619 - lsb = 0 04620 - i2c_size = 1 04621 */ 04622 #define VL53L1_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC_LO 0x0439 04623 /*!< 04624 info: \n 04625 - msb = 0 04626 - lsb = 0 04627 - i2c_size = 1 04628 */ 04629 #define VL53L1_MCU_RANGE_CALC__ALGO_VCSEL_PERIOD 0x043C 04630 /*!< 04631 type: uint8_t \n 04632 default: 0x00 \n 04633 info: \n 04634 - msb = 7 04635 - lsb = 0 04636 - i2c_size = 1 04637 groups: \n 04638 [''] 04639 fields: \n 04640 - [7:0] = algo_vcsel_period 04641 */ 04642 #define VL53L1_MCU_RANGE_CALC__SPARE_5 0x043D 04643 /*!< 04644 type: uint8_t \n 04645 default: 0x00 \n 04646 info: \n 04647 - msb = 7 04648 - lsb = 0 04649 - i2c_size = 1 04650 groups: \n 04651 [''] 04652 fields: \n 04653 - [7:0] = mcu_calc__spare_5 04654 */ 04655 #define VL53L1_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS 0x043E 04656 /*!< 04657 type: uint16_t \n 04658 default: 0x0000 \n 04659 info: \n 04660 - msb = 15 04661 - lsb = 0 04662 - i2c_size = 2 04663 groups: \n 04664 [''] 04665 fields: \n 04666 - [15:0] = algo_total_periods 04667 */ 04668 #define VL53L1_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS_HI 0x043E 04669 /*!< 04670 info: \n 04671 - msb = 0 04672 - lsb = 0 04673 - i2c_size = 1 04674 */ 04675 #define VL53L1_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS_LO 0x043F 04676 /*!< 04677 info: \n 04678 - msb = 0 04679 - lsb = 0 04680 - i2c_size = 1 04681 */ 04682 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE 0x0440 04683 /*!< 04684 type: uint32_t \n 04685 default: 0x00000000 \n 04686 info: \n 04687 - msb = 31 04688 - lsb = 0 04689 - i2c_size = 4 04690 groups: \n 04691 [''] 04692 fields: \n 04693 - [31:0] = algo_accum_phase 04694 */ 04695 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_3 0x0440 04696 /*!< 04697 info: \n 04698 - msb = 0 04699 - lsb = 0 04700 - i2c_size = 1 04701 */ 04702 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_2 0x0441 04703 /*!< 04704 info: \n 04705 - msb = 0 04706 - lsb = 0 04707 - i2c_size = 1 04708 */ 04709 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_1 0x0442 04710 /*!< 04711 info: \n 04712 - msb = 0 04713 - lsb = 0 04714 - i2c_size = 1 04715 */ 04716 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_0 0x0443 04717 /*!< 04718 info: \n 04719 - msb = 0 04720 - lsb = 0 04721 - i2c_size = 1 04722 */ 04723 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS 0x0444 04724 /*!< 04725 type: uint32_t \n 04726 default: 0x00000000 \n 04727 info: \n 04728 - msb = 31 04729 - lsb = 0 04730 - i2c_size = 4 04731 groups: \n 04732 [''] 04733 fields: \n 04734 - [31:0] = algo_signal_events 04735 */ 04736 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_3 0x0444 04737 /*!< 04738 info: \n 04739 - msb = 0 04740 - lsb = 0 04741 - i2c_size = 1 04742 */ 04743 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_2 0x0445 04744 /*!< 04745 info: \n 04746 - msb = 0 04747 - lsb = 0 04748 - i2c_size = 1 04749 */ 04750 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_1 0x0446 04751 /*!< 04752 info: \n 04753 - msb = 0 04754 - lsb = 0 04755 - i2c_size = 1 04756 */ 04757 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_0 0x0447 04758 /*!< 04759 info: \n 04760 - msb = 0 04761 - lsb = 0 04762 - i2c_size = 1 04763 */ 04764 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS 0x0448 04765 /*!< 04766 type: uint32_t \n 04767 default: 0x00000000 \n 04768 info: \n 04769 - msb = 31 04770 - lsb = 0 04771 - i2c_size = 4 04772 groups: \n 04773 [''] 04774 fields: \n 04775 - [31:0] = algo_ambient_events 04776 */ 04777 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_3 0x0448 04778 /*!< 04779 info: \n 04780 - msb = 0 04781 - lsb = 0 04782 - i2c_size = 1 04783 */ 04784 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_2 0x0449 04785 /*!< 04786 info: \n 04787 - msb = 0 04788 - lsb = 0 04789 - i2c_size = 1 04790 */ 04791 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_1 0x044A 04792 /*!< 04793 info: \n 04794 - msb = 0 04795 - lsb = 0 04796 - i2c_size = 1 04797 */ 04798 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_0 0x044B 04799 /*!< 04800 info: \n 04801 - msb = 0 04802 - lsb = 0 04803 - i2c_size = 1 04804 */ 04805 #define VL53L1_MCU_RANGE_CALC__SPARE_6 0x044C 04806 /*!< 04807 type: uint16_t \n 04808 default: 0x0000 \n 04809 info: \n 04810 - msb = 15 04811 - lsb = 0 04812 - i2c_size = 2 04813 groups: \n 04814 [''] 04815 fields: \n 04816 - [15:0] = mcu_calc__spare_6 04817 */ 04818 #define VL53L1_MCU_RANGE_CALC__SPARE_6_HI 0x044C 04819 /*!< 04820 info: \n 04821 - msb = 0 04822 - lsb = 0 04823 - i2c_size = 1 04824 */ 04825 #define VL53L1_MCU_RANGE_CALC__SPARE_6_LO 0x044D 04826 /*!< 04827 info: \n 04828 - msb = 0 04829 - lsb = 0 04830 - i2c_size = 1 04831 */ 04832 #define VL53L1_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD 0x044E 04833 /*!< 04834 type: uint16_t \n 04835 default: 0x0000 \n 04836 info: \n 04837 - msb = 15 04838 - lsb = 0 04839 - i2c_size = 2 04840 groups: \n 04841 [''] 04842 fields: \n 04843 - [15:0] = algo_adjust_vcsel_period 04844 */ 04845 #define VL53L1_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD_HI 0x044E 04846 /*!< 04847 info: \n 04848 - msb = 0 04849 - lsb = 0 04850 - i2c_size = 1 04851 */ 04852 #define VL53L1_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD_LO 0x044F 04853 /*!< 04854 info: \n 04855 - msb = 0 04856 - lsb = 0 04857 - i2c_size = 1 04858 */ 04859 #define VL53L1_MCU_RANGE_CALC__NUM_SPADS 0x0450 04860 /*!< 04861 type: uint16_t \n 04862 default: 0x0000 \n 04863 info: \n 04864 - msb = 15 04865 - lsb = 0 04866 - i2c_size = 2 04867 groups: \n 04868 [''] 04869 fields: \n 04870 - [15:0] = num_spads 04871 */ 04872 #define VL53L1_MCU_RANGE_CALC__NUM_SPADS_HI 0x0450 04873 /*!< 04874 info: \n 04875 - msb = 0 04876 - lsb = 0 04877 - i2c_size = 1 04878 */ 04879 #define VL53L1_MCU_RANGE_CALC__NUM_SPADS_LO 0x0451 04880 /*!< 04881 info: \n 04882 - msb = 0 04883 - lsb = 0 04884 - i2c_size = 1 04885 */ 04886 #define VL53L1_MCU_RANGE_CALC__PHASE_OUTPUT 0x0452 04887 /*!< 04888 type: uint16_t \n 04889 default: 0x0000 \n 04890 info: \n 04891 - msb = 15 04892 - lsb = 0 04893 - i2c_size = 2 04894 groups: \n 04895 [''] 04896 fields: \n 04897 - [15:0] = phase_output 04898 */ 04899 #define VL53L1_MCU_RANGE_CALC__PHASE_OUTPUT_HI 0x0452 04900 /*!< 04901 info: \n 04902 - msb = 0 04903 - lsb = 0 04904 - i2c_size = 1 04905 */ 04906 #define VL53L1_MCU_RANGE_CALC__PHASE_OUTPUT_LO 0x0453 04907 /*!< 04908 info: \n 04909 - msb = 0 04910 - lsb = 0 04911 - i2c_size = 1 04912 */ 04913 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS 0x0454 04914 /*!< 04915 type: uint32_t \n 04916 default: 0x00000000 \n 04917 info: \n 04918 - msb = 19 04919 - lsb = 0 04920 - i2c_size = 4 04921 groups: \n 04922 [''] 04923 fields: \n 04924 - [19:0] = rate_per_spad_mcps 04925 */ 04926 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_3 0x0454 04927 /*!< 04928 info: \n 04929 - msb = 0 04930 - lsb = 0 04931 - i2c_size = 1 04932 */ 04933 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_2 0x0455 04934 /*!< 04935 info: \n 04936 - msb = 0 04937 - lsb = 0 04938 - i2c_size = 1 04939 */ 04940 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_1 0x0456 04941 /*!< 04942 info: \n 04943 - msb = 0 04944 - lsb = 0 04945 - i2c_size = 1 04946 */ 04947 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_0 0x0457 04948 /*!< 04949 info: \n 04950 - msb = 0 04951 - lsb = 0 04952 - i2c_size = 1 04953 */ 04954 #define VL53L1_MCU_RANGE_CALC__SPARE_7 0x0458 04955 /*!< 04956 type: uint8_t \n 04957 default: 0x00 \n 04958 info: \n 04959 - msb = 7 04960 - lsb = 0 04961 - i2c_size = 1 04962 groups: \n 04963 [''] 04964 fields: \n 04965 - [7:0] = mcu_calc__spare_7 04966 */ 04967 #define VL53L1_MCU_RANGE_CALC__SPARE_8 0x0459 04968 /*!< 04969 type: uint8_t \n 04970 default: 0x00 \n 04971 info: \n 04972 - msb = 7 04973 - lsb = 0 04974 - i2c_size = 1 04975 groups: \n 04976 [''] 04977 fields: \n 04978 - [7:0] = mcu_calc__spare_8 04979 */ 04980 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS 0x045A 04981 /*!< 04982 type: uint16_t \n 04983 default: 0x0000 \n 04984 info: \n 04985 - msb = 15 04986 - lsb = 0 04987 - i2c_size = 2 04988 groups: \n 04989 [''] 04990 fields: \n 04991 - [15:0] = peak_signal_rate 04992 */ 04993 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS_HI 0x045A 04994 /*!< 04995 info: \n 04996 - msb = 0 04997 - lsb = 0 04998 - i2c_size = 1 04999 */ 05000 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS_LO 0x045B 05001 /*!< 05002 info: \n 05003 - msb = 0 05004 - lsb = 0 05005 - i2c_size = 1 05006 */ 05007 #define VL53L1_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS 0x045C 05008 /*!< 05009 type: uint16_t \n 05010 default: 0x0000 \n 05011 info: \n 05012 - msb = 15 05013 - lsb = 0 05014 - i2c_size = 2 05015 groups: \n 05016 [''] 05017 fields: \n 05018 - [15:0] = avg_signal_rate 05019 */ 05020 #define VL53L1_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS_HI 0x045C 05021 /*!< 05022 info: \n 05023 - msb = 0 05024 - lsb = 0 05025 - i2c_size = 1 05026 */ 05027 #define VL53L1_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS_LO 0x045D 05028 /*!< 05029 info: \n 05030 - msb = 0 05031 - lsb = 0 05032 - i2c_size = 1 05033 */ 05034 #define VL53L1_MCU_RANGE_CALC__AMBIENT_RATE_MCPS 0x045E 05035 /*!< 05036 type: uint16_t \n 05037 default: 0x0000 \n 05038 info: \n 05039 - msb = 15 05040 - lsb = 0 05041 - i2c_size = 2 05042 groups: \n 05043 [''] 05044 fields: \n 05045 - [15:0] = ambient_rate 05046 */ 05047 #define VL53L1_MCU_RANGE_CALC__AMBIENT_RATE_MCPS_HI 0x045E 05048 /*!< 05049 info: \n 05050 - msb = 0 05051 - lsb = 0 05052 - i2c_size = 1 05053 */ 05054 #define VL53L1_MCU_RANGE_CALC__AMBIENT_RATE_MCPS_LO 0x045F 05055 /*!< 05056 info: \n 05057 - msb = 0 05058 - lsb = 0 05059 - i2c_size = 1 05060 */ 05061 #define VL53L1_MCU_RANGE_CALC__XTALK 0x0460 05062 /*!< 05063 type: uint16_t \n 05064 default: 0x0000 \n 05065 info: \n 05066 - msb = 15 05067 - lsb = 0 05068 - i2c_size = 2 05069 groups: \n 05070 [''] 05071 fields: \n 05072 - [15:0] = crosstalk (fixed point 9.7) 05073 */ 05074 #define VL53L1_MCU_RANGE_CALC__XTALK_HI 0x0460 05075 /*!< 05076 info: \n 05077 - msb = 0 05078 - lsb = 0 05079 - i2c_size = 1 05080 */ 05081 #define VL53L1_MCU_RANGE_CALC__XTALK_LO 0x0461 05082 /*!< 05083 info: \n 05084 - msb = 0 05085 - lsb = 0 05086 - i2c_size = 1 05087 */ 05088 #define VL53L1_MCU_RANGE_CALC__CALC_STATUS 0x0462 05089 /*!< 05090 type: uint8_t \n 05091 default: 0x00 \n 05092 info: \n 05093 - msb = 7 05094 - lsb = 0 05095 - i2c_size = 1 05096 groups: \n 05097 [''] 05098 fields: \n 05099 - [7:0] = calc_status 05100 */ 05101 #define VL53L1_MCU_RANGE_CALC__DEBUG 0x0463 05102 /*!< 05103 type: uint8_t \n 05104 default: 0x00 \n 05105 info: \n 05106 - msb = 0 05107 - lsb = 0 05108 - i2c_size = 1 05109 groups: \n 05110 [''] 05111 fields: \n 05112 - [0] = calc_debug__divide_by_zero 05113 */ 05114 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS 0x0464 05115 /*!< 05116 type: uint16_t \n 05117 default: 0x0000 \n 05118 info: \n 05119 - msb = 15 05120 - lsb = 0 05121 - i2c_size = 2 05122 groups: \n 05123 [''] 05124 fields: \n 05125 - [15:0] = peak_signal_rate_xtalk_corr 05126 */ 05127 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS_HI 0x0464 05128 /*!< 05129 info: \n 05130 - msb = 0 05131 - lsb = 0 05132 - i2c_size = 1 05133 */ 05134 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS_LO 0x0465 05135 /*!< 05136 info: \n 05137 - msb = 0 05138 - lsb = 0 05139 - i2c_size = 1 05140 */ 05141 #define VL53L1_MCU_RANGE_CALC__SPARE_0 0x0468 05142 /*!< 05143 type: uint8_t \n 05144 default: 0x00 \n 05145 info: \n 05146 - msb = 7 05147 - lsb = 0 05148 - i2c_size = 1 05149 groups: \n 05150 [''] 05151 fields: \n 05152 - [7:0] = mcu_calc__spare_0 05153 */ 05154 #define VL53L1_MCU_RANGE_CALC__SPARE_1 0x0469 05155 /*!< 05156 type: uint8_t \n 05157 default: 0x00 \n 05158 info: \n 05159 - msb = 7 05160 - lsb = 0 05161 - i2c_size = 1 05162 groups: \n 05163 [''] 05164 fields: \n 05165 - [7:0] = mcu_calc__spare_1 05166 */ 05167 #define VL53L1_MCU_RANGE_CALC__SPARE_2 0x046A 05168 /*!< 05169 type: uint8_t \n 05170 default: 0x00 \n 05171 info: \n 05172 - msb = 7 05173 - lsb = 0 05174 - i2c_size = 1 05175 groups: \n 05176 [''] 05177 fields: \n 05178 - [7:0] = mcu_calc__spare_2 05179 */ 05180 #define VL53L1_MCU_RANGE_CALC__SPARE_3 0x046B 05181 /*!< 05182 type: uint8_t \n 05183 default: 0x00 \n 05184 info: \n 05185 - msb = 7 05186 - lsb = 0 05187 - i2c_size = 1 05188 groups: \n 05189 [''] 05190 fields: \n 05191 - [7:0] = mcu_calc__spare_3 05192 */ 05193 #define VL53L1_PATCH__CTRL 0x0470 05194 /*!< 05195 info: \n 05196 - msb = 0 05197 - lsb = 0 05198 - i2c_size = 1 05199 */ 05200 #define VL53L1_PATCH__JMP_ENABLES 0x0472 05201 /*!< 05202 info: \n 05203 - msb = 0 05204 - lsb = 0 05205 - i2c_size = 1 05206 */ 05207 #define VL53L1_PATCH__JMP_ENABLES_HI 0x0472 05208 /*!< 05209 info: \n 05210 - msb = 0 05211 - lsb = 0 05212 - i2c_size = 1 05213 */ 05214 #define VL53L1_PATCH__JMP_ENABLES_LO 0x0473 05215 /*!< 05216 info: \n 05217 - msb = 0 05218 - lsb = 0 05219 - i2c_size = 1 05220 */ 05221 #define VL53L1_PATCH__DATA_ENABLES 0x0474 05222 /*!< 05223 info: \n 05224 - msb = 0 05225 - lsb = 0 05226 - i2c_size = 1 05227 */ 05228 #define VL53L1_PATCH__DATA_ENABLES_HI 0x0474 05229 /*!< 05230 info: \n 05231 - msb = 0 05232 - lsb = 0 05233 - i2c_size = 1 05234 */ 05235 #define VL53L1_PATCH__DATA_ENABLES_LO 0x0475 05236 /*!< 05237 info: \n 05238 - msb = 0 05239 - lsb = 0 05240 - i2c_size = 1 05241 */ 05242 #define VL53L1_PATCH__OFFSET_0 0x0476 05243 /*!< 05244 info: \n 05245 - msb = 0 05246 - lsb = 0 05247 - i2c_size = 1 05248 */ 05249 #define VL53L1_PATCH__OFFSET_0_HI 0x0476 05250 /*!< 05251 info: \n 05252 - msb = 0 05253 - lsb = 0 05254 - i2c_size = 1 05255 */ 05256 #define VL53L1_PATCH__OFFSET_0_LO 0x0477 05257 /*!< 05258 info: \n 05259 - msb = 0 05260 - lsb = 0 05261 - i2c_size = 1 05262 */ 05263 #define VL53L1_PATCH__OFFSET_1 0x0478 05264 /*!< 05265 info: \n 05266 - msb = 0 05267 - lsb = 0 05268 - i2c_size = 1 05269 */ 05270 #define VL53L1_PATCH__OFFSET_1_HI 0x0478 05271 /*!< 05272 info: \n 05273 - msb = 0 05274 - lsb = 0 05275 - i2c_size = 1 05276 */ 05277 #define VL53L1_PATCH__OFFSET_1_LO 0x0479 05278 /*!< 05279 info: \n 05280 - msb = 0 05281 - lsb = 0 05282 - i2c_size = 1 05283 */ 05284 #define VL53L1_PATCH__OFFSET_2 0x047A 05285 /*!< 05286 info: \n 05287 - msb = 0 05288 - lsb = 0 05289 - i2c_size = 1 05290 */ 05291 #define VL53L1_PATCH__OFFSET_2_HI 0x047A 05292 /*!< 05293 info: \n 05294 - msb = 0 05295 - lsb = 0 05296 - i2c_size = 1 05297 */ 05298 #define VL53L1_PATCH__OFFSET_2_LO 0x047B 05299 /*!< 05300 info: \n 05301 - msb = 0 05302 - lsb = 0 05303 - i2c_size = 1 05304 */ 05305 #define VL53L1_PATCH__OFFSET_3 0x047C 05306 /*!< 05307 info: \n 05308 - msb = 0 05309 - lsb = 0 05310 - i2c_size = 1 05311 */ 05312 #define VL53L1_PATCH__OFFSET_3_HI 0x047C 05313 /*!< 05314 info: \n 05315 - msb = 0 05316 - lsb = 0 05317 - i2c_size = 1 05318 */ 05319 #define VL53L1_PATCH__OFFSET_3_LO 0x047D 05320 /*!< 05321 info: \n 05322 - msb = 0 05323 - lsb = 0 05324 - i2c_size = 1 05325 */ 05326 #define VL53L1_PATCH__OFFSET_4 0x047E 05327 /*!< 05328 info: \n 05329 - msb = 0 05330 - lsb = 0 05331 - i2c_size = 1 05332 */ 05333 #define VL53L1_PATCH__OFFSET_4_HI 0x047E 05334 /*!< 05335 info: \n 05336 - msb = 0 05337 - lsb = 0 05338 - i2c_size = 1 05339 */ 05340 #define VL53L1_PATCH__OFFSET_4_LO 0x047F 05341 /*!< 05342 info: \n 05343 - msb = 0 05344 - lsb = 0 05345 - i2c_size = 1 05346 */ 05347 #define VL53L1_PATCH__OFFSET_5 0x0480 05348 /*!< 05349 info: \n 05350 - msb = 0 05351 - lsb = 0 05352 - i2c_size = 1 05353 */ 05354 #define VL53L1_PATCH__OFFSET_5_HI 0x0480 05355 /*!< 05356 info: \n 05357 - msb = 0 05358 - lsb = 0 05359 - i2c_size = 1 05360 */ 05361 #define VL53L1_PATCH__OFFSET_5_LO 0x0481 05362 /*!< 05363 info: \n 05364 - msb = 0 05365 - lsb = 0 05366 - i2c_size = 1 05367 */ 05368 #define VL53L1_PATCH__OFFSET_6 0x0482 05369 /*!< 05370 info: \n 05371 - msb = 0 05372 - lsb = 0 05373 - i2c_size = 1 05374 */ 05375 #define VL53L1_PATCH__OFFSET_6_HI 0x0482 05376 /*!< 05377 info: \n 05378 - msb = 0 05379 - lsb = 0 05380 - i2c_size = 1 05381 */ 05382 #define VL53L1_PATCH__OFFSET_6_LO 0x0483 05383 /*!< 05384 info: \n 05385 - msb = 0 05386 - lsb = 0 05387 - i2c_size = 1 05388 */ 05389 #define VL53L1_PATCH__OFFSET_7 0x0484 05390 /*!< 05391 info: \n 05392 - msb = 0 05393 - lsb = 0 05394 - i2c_size = 1 05395 */ 05396 #define VL53L1_PATCH__OFFSET_7_HI 0x0484 05397 /*!< 05398 info: \n 05399 - msb = 0 05400 - lsb = 0 05401 - i2c_size = 1 05402 */ 05403 #define VL53L1_PATCH__OFFSET_7_LO 0x0485 05404 /*!< 05405 info: \n 05406 - msb = 0 05407 - lsb = 0 05408 - i2c_size = 1 05409 */ 05410 #define VL53L1_PATCH__OFFSET_8 0x0486 05411 /*!< 05412 info: \n 05413 - msb = 0 05414 - lsb = 0 05415 - i2c_size = 1 05416 */ 05417 #define VL53L1_PATCH__OFFSET_8_HI 0x0486 05418 /*!< 05419 info: \n 05420 - msb = 0 05421 - lsb = 0 05422 - i2c_size = 1 05423 */ 05424 #define VL53L1_PATCH__OFFSET_8_LO 0x0487 05425 /*!< 05426 info: \n 05427 - msb = 0 05428 - lsb = 0 05429 - i2c_size = 1 05430 */ 05431 #define VL53L1_PATCH__OFFSET_9 0x0488 05432 /*!< 05433 info: \n 05434 - msb = 0 05435 - lsb = 0 05436 - i2c_size = 1 05437 */ 05438 #define VL53L1_PATCH__OFFSET_9_HI 0x0488 05439 /*!< 05440 info: \n 05441 - msb = 0 05442 - lsb = 0 05443 - i2c_size = 1 05444 */ 05445 #define VL53L1_PATCH__OFFSET_9_LO 0x0489 05446 /*!< 05447 info: \n 05448 - msb = 0 05449 - lsb = 0 05450 - i2c_size = 1 05451 */ 05452 #define VL53L1_PATCH__OFFSET_10 0x048A 05453 /*!< 05454 info: \n 05455 - msb = 0 05456 - lsb = 0 05457 - i2c_size = 1 05458 */ 05459 #define VL53L1_PATCH__OFFSET_10_HI 0x048A 05460 /*!< 05461 info: \n 05462 - msb = 0 05463 - lsb = 0 05464 - i2c_size = 1 05465 */ 05466 #define VL53L1_PATCH__OFFSET_10_LO 0x048B 05467 /*!< 05468 info: \n 05469 - msb = 0 05470 - lsb = 0 05471 - i2c_size = 1 05472 */ 05473 #define VL53L1_PATCH__OFFSET_11 0x048C 05474 /*!< 05475 info: \n 05476 - msb = 0 05477 - lsb = 0 05478 - i2c_size = 1 05479 */ 05480 #define VL53L1_PATCH__OFFSET_11_HI 0x048C 05481 /*!< 05482 info: \n 05483 - msb = 0 05484 - lsb = 0 05485 - i2c_size = 1 05486 */ 05487 #define VL53L1_PATCH__OFFSET_11_LO 0x048D 05488 /*!< 05489 info: \n 05490 - msb = 0 05491 - lsb = 0 05492 - i2c_size = 1 05493 */ 05494 #define VL53L1_PATCH__OFFSET_12 0x048E 05495 /*!< 05496 info: \n 05497 - msb = 0 05498 - lsb = 0 05499 - i2c_size = 1 05500 */ 05501 #define VL53L1_PATCH__OFFSET_12_HI 0x048E 05502 /*!< 05503 info: \n 05504 - msb = 0 05505 - lsb = 0 05506 - i2c_size = 1 05507 */ 05508 #define VL53L1_PATCH__OFFSET_12_LO 0x048F 05509 /*!< 05510 info: \n 05511 - msb = 0 05512 - lsb = 0 05513 - i2c_size = 1 05514 */ 05515 #define VL53L1_PATCH__OFFSET_13 0x0490 05516 /*!< 05517 info: \n 05518 - msb = 0 05519 - lsb = 0 05520 - i2c_size = 1 05521 */ 05522 #define VL53L1_PATCH__OFFSET_13_HI 0x0490 05523 /*!< 05524 info: \n 05525 - msb = 0 05526 - lsb = 0 05527 - i2c_size = 1 05528 */ 05529 #define VL53L1_PATCH__OFFSET_13_LO 0x0491 05530 /*!< 05531 info: \n 05532 - msb = 0 05533 - lsb = 0 05534 - i2c_size = 1 05535 */ 05536 #define VL53L1_PATCH__OFFSET_14 0x0492 05537 /*!< 05538 info: \n 05539 - msb = 0 05540 - lsb = 0 05541 - i2c_size = 1 05542 */ 05543 #define VL53L1_PATCH__OFFSET_14_HI 0x0492 05544 /*!< 05545 info: \n 05546 - msb = 0 05547 - lsb = 0 05548 - i2c_size = 1 05549 */ 05550 #define VL53L1_PATCH__OFFSET_14_LO 0x0493 05551 /*!< 05552 info: \n 05553 - msb = 0 05554 - lsb = 0 05555 - i2c_size = 1 05556 */ 05557 #define VL53L1_PATCH__OFFSET_15 0x0494 05558 /*!< 05559 info: \n 05560 - msb = 0 05561 - lsb = 0 05562 - i2c_size = 1 05563 */ 05564 #define VL53L1_PATCH__OFFSET_15_HI 0x0494 05565 /*!< 05566 info: \n 05567 - msb = 0 05568 - lsb = 0 05569 - i2c_size = 1 05570 */ 05571 #define VL53L1_PATCH__OFFSET_15_LO 0x0495 05572 /*!< 05573 info: \n 05574 - msb = 0 05575 - lsb = 0 05576 - i2c_size = 1 05577 */ 05578 #define VL53L1_PATCH__ADDRESS_0 0x0496 05579 /*!< 05580 info: \n 05581 - msb = 0 05582 - lsb = 0 05583 - i2c_size = 1 05584 */ 05585 #define VL53L1_PATCH__ADDRESS_0_HI 0x0496 05586 /*!< 05587 info: \n 05588 - msb = 0 05589 - lsb = 0 05590 - i2c_size = 1 05591 */ 05592 #define VL53L1_PATCH__ADDRESS_0_LO 0x0497 05593 /*!< 05594 info: \n 05595 - msb = 0 05596 - lsb = 0 05597 - i2c_size = 1 05598 */ 05599 #define VL53L1_PATCH__ADDRESS_1 0x0498 05600 /*!< 05601 info: \n 05602 - msb = 0 05603 - lsb = 0 05604 - i2c_size = 1 05605 */ 05606 #define VL53L1_PATCH__ADDRESS_1_HI 0x0498 05607 /*!< 05608 info: \n 05609 - msb = 0 05610 - lsb = 0 05611 - i2c_size = 1 05612 */ 05613 #define VL53L1_PATCH__ADDRESS_1_LO 0x0499 05614 /*!< 05615 info: \n 05616 - msb = 0 05617 - lsb = 0 05618 - i2c_size = 1 05619 */ 05620 #define VL53L1_PATCH__ADDRESS_2 0x049A 05621 /*!< 05622 info: \n 05623 - msb = 0 05624 - lsb = 0 05625 - i2c_size = 1 05626 */ 05627 #define VL53L1_PATCH__ADDRESS_2_HI 0x049A 05628 /*!< 05629 info: \n 05630 - msb = 0 05631 - lsb = 0 05632 - i2c_size = 1 05633 */ 05634 #define VL53L1_PATCH__ADDRESS_2_LO 0x049B 05635 /*!< 05636 info: \n 05637 - msb = 0 05638 - lsb = 0 05639 - i2c_size = 1 05640 */ 05641 #define VL53L1_PATCH__ADDRESS_3 0x049C 05642 /*!< 05643 info: \n 05644 - msb = 0 05645 - lsb = 0 05646 - i2c_size = 1 05647 */ 05648 #define VL53L1_PATCH__ADDRESS_3_HI 0x049C 05649 /*!< 05650 info: \n 05651 - msb = 0 05652 - lsb = 0 05653 - i2c_size = 1 05654 */ 05655 #define VL53L1_PATCH__ADDRESS_3_LO 0x049D 05656 /*!< 05657 info: \n 05658 - msb = 0 05659 - lsb = 0 05660 - i2c_size = 1 05661 */ 05662 #define VL53L1_PATCH__ADDRESS_4 0x049E 05663 /*!< 05664 info: \n 05665 - msb = 0 05666 - lsb = 0 05667 - i2c_size = 1 05668 */ 05669 #define VL53L1_PATCH__ADDRESS_4_HI 0x049E 05670 /*!< 05671 info: \n 05672 - msb = 0 05673 - lsb = 0 05674 - i2c_size = 1 05675 */ 05676 #define VL53L1_PATCH__ADDRESS_4_LO 0x049F 05677 /*!< 05678 info: \n 05679 - msb = 0 05680 - lsb = 0 05681 - i2c_size = 1 05682 */ 05683 #define VL53L1_PATCH__ADDRESS_5 0x04A0 05684 /*!< 05685 info: \n 05686 - msb = 0 05687 - lsb = 0 05688 - i2c_size = 1 05689 */ 05690 #define VL53L1_PATCH__ADDRESS_5_HI 0x04A0 05691 /*!< 05692 info: \n 05693 - msb = 0 05694 - lsb = 0 05695 - i2c_size = 1 05696 */ 05697 #define VL53L1_PATCH__ADDRESS_5_LO 0x04A1 05698 /*!< 05699 info: \n 05700 - msb = 0 05701 - lsb = 0 05702 - i2c_size = 1 05703 */ 05704 #define VL53L1_PATCH__ADDRESS_6 0x04A2 05705 /*!< 05706 info: \n 05707 - msb = 0 05708 - lsb = 0 05709 - i2c_size = 1 05710 */ 05711 #define VL53L1_PATCH__ADDRESS_6_HI 0x04A2 05712 /*!< 05713 info: \n 05714 - msb = 0 05715 - lsb = 0 05716 - i2c_size = 1 05717 */ 05718 #define VL53L1_PATCH__ADDRESS_6_LO 0x04A3 05719 /*!< 05720 info: \n 05721 - msb = 0 05722 - lsb = 0 05723 - i2c_size = 1 05724 */ 05725 #define VL53L1_PATCH__ADDRESS_7 0x04A4 05726 /*!< 05727 info: \n 05728 - msb = 0 05729 - lsb = 0 05730 - i2c_size = 1 05731 */ 05732 #define VL53L1_PATCH__ADDRESS_7_HI 0x04A4 05733 /*!< 05734 info: \n 05735 - msb = 0 05736 - lsb = 0 05737 - i2c_size = 1 05738 */ 05739 #define VL53L1_PATCH__ADDRESS_7_LO 0x04A5 05740 /*!< 05741 info: \n 05742 - msb = 0 05743 - lsb = 0 05744 - i2c_size = 1 05745 */ 05746 #define VL53L1_PATCH__ADDRESS_8 0x04A6 05747 /*!< 05748 info: \n 05749 - msb = 0 05750 - lsb = 0 05751 - i2c_size = 1 05752 */ 05753 #define VL53L1_PATCH__ADDRESS_8_HI 0x04A6 05754 /*!< 05755 info: \n 05756 - msb = 0 05757 - lsb = 0 05758 - i2c_size = 1 05759 */ 05760 #define VL53L1_PATCH__ADDRESS_8_LO 0x04A7 05761 /*!< 05762 info: \n 05763 - msb = 0 05764 - lsb = 0 05765 - i2c_size = 1 05766 */ 05767 #define VL53L1_PATCH__ADDRESS_9 0x04A8 05768 /*!< 05769 info: \n 05770 - msb = 0 05771 - lsb = 0 05772 - i2c_size = 1 05773 */ 05774 #define VL53L1_PATCH__ADDRESS_9_HI 0x04A8 05775 /*!< 05776 info: \n 05777 - msb = 0 05778 - lsb = 0 05779 - i2c_size = 1 05780 */ 05781 #define VL53L1_PATCH__ADDRESS_9_LO 0x04A9 05782 /*!< 05783 info: \n 05784 - msb = 0 05785 - lsb = 0 05786 - i2c_size = 1 05787 */ 05788 #define VL53L1_PATCH__ADDRESS_10 0x04AA 05789 /*!< 05790 info: \n 05791 - msb = 0 05792 - lsb = 0 05793 - i2c_size = 1 05794 */ 05795 #define VL53L1_PATCH__ADDRESS_10_HI 0x04AA 05796 /*!< 05797 info: \n 05798 - msb = 0 05799 - lsb = 0 05800 - i2c_size = 1 05801 */ 05802 #define VL53L1_PATCH__ADDRESS_10_LO 0x04AB 05803 /*!< 05804 info: \n 05805 - msb = 0 05806 - lsb = 0 05807 - i2c_size = 1 05808 */ 05809 #define VL53L1_PATCH__ADDRESS_11 0x04AC 05810 /*!< 05811 info: \n 05812 - msb = 0 05813 - lsb = 0 05814 - i2c_size = 1 05815 */ 05816 #define VL53L1_PATCH__ADDRESS_11_HI 0x04AC 05817 /*!< 05818 info: \n 05819 - msb = 0 05820 - lsb = 0 05821 - i2c_size = 1 05822 */ 05823 #define VL53L1_PATCH__ADDRESS_11_LO 0x04AD 05824 /*!< 05825 info: \n 05826 - msb = 0 05827 - lsb = 0 05828 - i2c_size = 1 05829 */ 05830 #define VL53L1_PATCH__ADDRESS_12 0x04AE 05831 /*!< 05832 info: \n 05833 - msb = 0 05834 - lsb = 0 05835 - i2c_size = 1 05836 */ 05837 #define VL53L1_PATCH__ADDRESS_12_HI 0x04AE 05838 /*!< 05839 info: \n 05840 - msb = 0 05841 - lsb = 0 05842 - i2c_size = 1 05843 */ 05844 #define VL53L1_PATCH__ADDRESS_12_LO 0x04AF 05845 /*!< 05846 info: \n 05847 - msb = 0 05848 - lsb = 0 05849 - i2c_size = 1 05850 */ 05851 #define VL53L1_PATCH__ADDRESS_13 0x04B0 05852 /*!< 05853 info: \n 05854 - msb = 0 05855 - lsb = 0 05856 - i2c_size = 1 05857 */ 05858 #define VL53L1_PATCH__ADDRESS_13_HI 0x04B0 05859 /*!< 05860 info: \n 05861 - msb = 0 05862 - lsb = 0 05863 - i2c_size = 1 05864 */ 05865 #define VL53L1_PATCH__ADDRESS_13_LO 0x04B1 05866 /*!< 05867 info: \n 05868 - msb = 0 05869 - lsb = 0 05870 - i2c_size = 1 05871 */ 05872 #define VL53L1_PATCH__ADDRESS_14 0x04B2 05873 /*!< 05874 info: \n 05875 - msb = 0 05876 - lsb = 0 05877 - i2c_size = 1 05878 */ 05879 #define VL53L1_PATCH__ADDRESS_14_HI 0x04B2 05880 /*!< 05881 info: \n 05882 - msb = 0 05883 - lsb = 0 05884 - i2c_size = 1 05885 */ 05886 #define VL53L1_PATCH__ADDRESS_14_LO 0x04B3 05887 /*!< 05888 info: \n 05889 - msb = 0 05890 - lsb = 0 05891 - i2c_size = 1 05892 */ 05893 #define VL53L1_PATCH__ADDRESS_15 0x04B4 05894 /*!< 05895 info: \n 05896 - msb = 0 05897 - lsb = 0 05898 - i2c_size = 1 05899 */ 05900 #define VL53L1_PATCH__ADDRESS_15_HI 0x04B4 05901 /*!< 05902 info: \n 05903 - msb = 0 05904 - lsb = 0 05905 - i2c_size = 1 05906 */ 05907 #define VL53L1_PATCH__ADDRESS_15_LO 0x04B5 05908 /*!< 05909 info: \n 05910 - msb = 0 05911 - lsb = 0 05912 - i2c_size = 1 05913 */ 05914 #define VL53L1_SPI_ASYNC_MUX__CTRL 0x04C0 05915 /*!< 05916 info: \n 05917 - msb = 0 05918 - lsb = 0 05919 - i2c_size = 1 05920 */ 05921 #define VL53L1_CLK__CONFIG 0x04C4 05922 /*!< 05923 type: uint8_t \n 05924 default: 0x01 \n 05925 info: \n 05926 - msb = 0 05927 - lsb = 0 05928 - i2c_size = 1 05929 groups: \n 05930 [''] 05931 fields: \n 05932 - [0] = clk_mcu_en 05933 */ 05934 #define VL53L1_GPIO_LV_MUX__CTRL 0x04CC 05935 /*!< 05936 type: uint8_t \n 05937 default: 0x08 \n 05938 info: \n 05939 - msb = 4 05940 - lsb = 0 05941 - i2c_size = 1 05942 groups: \n 05943 [''] 05944 fields: \n 05945 - [3:0] = gpio__mux_select_lv 05946 - [4] = gpio__mux_active_high_lv 05947 */ 05948 #define VL53L1_GPIO_LV_PAD__CTRL 0x04CD 05949 /*!< 05950 type: uint8_t \n 05951 default: 0x00 \n 05952 info: \n 05953 - msb = 0 05954 - lsb = 0 05955 - i2c_size = 1 05956 groups: \n 05957 [''] 05958 fields: \n 05959 - [0] = gpio__extsup_lv 05960 */ 05961 #define VL53L1_PAD_I2C_LV__CONFIG 0x04D0 05962 /*!< 05963 info: \n 05964 - msb = 0 05965 - lsb = 0 05966 - i2c_size = 1 05967 */ 05968 #define VL53L1_PAD_STARTUP_MODE__VALUE_RO_GO1 0x04D4 05969 /*!< 05970 type: uint8_t \n 05971 default: 0x00 \n 05972 info: \n 05973 - msb = 0 05974 - lsb = 0 05975 - i2c_size = 1 05976 groups: \n 05977 [''] 05978 fields: \n 05979 - [0] = pad_spi_csn_val_ro 05980 */ 05981 #define VL53L1_HOST_IF__STATUS_GO1 0x04D5 05982 /*!< 05983 type: uint8_t \n 05984 default: 0x00 \n 05985 info: \n 05986 - msb = 0 05987 - lsb = 0 05988 - i2c_size = 1 05989 groups: \n 05990 [''] 05991 fields: \n 05992 - [0] = host_interface_lv 05993 */ 05994 #define VL53L1_MCU_CLK_GATING__CTRL 0x04D8 05995 /*!< 05996 type: uint8_t \n 05997 default: 0x00 \n 05998 info: \n 05999 - msb = 3 06000 - lsb = 0 06001 - i2c_size = 1 06002 groups: \n 06003 [''] 06004 fields: \n 06005 - [0] = clk_gate_en__go1_mcu_bank 06006 - [1] = clk_gate_en__go1_mcu_patch_ctrl 06007 - [2] = clk_gate_en__go1_mcu_timers 06008 - [3] = clk_gate_en__go1_mcu_mult_div 06009 */ 06010 #define VL53L1_TEST__BIST_ROM_CTRL 0x04E0 06011 /*!< 06012 info: \n 06013 - msb = 0 06014 - lsb = 0 06015 - i2c_size = 1 06016 */ 06017 #define VL53L1_TEST__BIST_ROM_RESULT 0x04E1 06018 /*!< 06019 info: \n 06020 - msb = 0 06021 - lsb = 0 06022 - i2c_size = 1 06023 */ 06024 #define VL53L1_TEST__BIST_ROM_MCU_SIG 0x04E2 06025 /*!< 06026 info: \n 06027 - msb = 0 06028 - lsb = 0 06029 - i2c_size = 1 06030 */ 06031 #define VL53L1_TEST__BIST_ROM_MCU_SIG_HI 0x04E2 06032 /*!< 06033 info: \n 06034 - msb = 0 06035 - lsb = 0 06036 - i2c_size = 1 06037 */ 06038 #define VL53L1_TEST__BIST_ROM_MCU_SIG_LO 0x04E3 06039 /*!< 06040 info: \n 06041 - msb = 0 06042 - lsb = 0 06043 - i2c_size = 1 06044 */ 06045 #define VL53L1_TEST__BIST_RAM_CTRL 0x04E4 06046 /*!< 06047 info: \n 06048 - msb = 0 06049 - lsb = 0 06050 - i2c_size = 1 06051 */ 06052 #define VL53L1_TEST__BIST_RAM_RESULT 0x04E5 06053 /*!< 06054 info: \n 06055 - msb = 0 06056 - lsb = 0 06057 - i2c_size = 1 06058 */ 06059 #define VL53L1_TEST__TMC 0x04E8 06060 /*!< 06061 info: \n 06062 - msb = 0 06063 - lsb = 0 06064 - i2c_size = 1 06065 */ 06066 #define VL53L1_TEST__PLL_BIST_MIN_THRESHOLD 0x04F0 06067 /*!< 06068 info: \n 06069 - msb = 0 06070 - lsb = 0 06071 - i2c_size = 1 06072 */ 06073 #define VL53L1_TEST__PLL_BIST_MIN_THRESHOLD_HI 0x04F0 06074 /*!< 06075 info: \n 06076 - msb = 0 06077 - lsb = 0 06078 - i2c_size = 1 06079 */ 06080 #define VL53L1_TEST__PLL_BIST_MIN_THRESHOLD_LO 0x04F1 06081 /*!< 06082 info: \n 06083 - msb = 0 06084 - lsb = 0 06085 - i2c_size = 1 06086 */ 06087 #define VL53L1_TEST__PLL_BIST_MAX_THRESHOLD 0x04F2 06088 /*!< 06089 info: \n 06090 - msb = 0 06091 - lsb = 0 06092 - i2c_size = 1 06093 */ 06094 #define VL53L1_TEST__PLL_BIST_MAX_THRESHOLD_HI 0x04F2 06095 /*!< 06096 info: \n 06097 - msb = 0 06098 - lsb = 0 06099 - i2c_size = 1 06100 */ 06101 #define VL53L1_TEST__PLL_BIST_MAX_THRESHOLD_LO 0x04F3 06102 /*!< 06103 info: \n 06104 - msb = 0 06105 - lsb = 0 06106 - i2c_size = 1 06107 */ 06108 #define VL53L1_TEST__PLL_BIST_COUNT_OUT 0x04F4 06109 /*!< 06110 info: \n 06111 - msb = 0 06112 - lsb = 0 06113 - i2c_size = 1 06114 */ 06115 #define VL53L1_TEST__PLL_BIST_COUNT_OUT_HI 0x04F4 06116 /*!< 06117 info: \n 06118 - msb = 0 06119 - lsb = 0 06120 - i2c_size = 1 06121 */ 06122 #define VL53L1_TEST__PLL_BIST_COUNT_OUT_LO 0x04F5 06123 /*!< 06124 info: \n 06125 - msb = 0 06126 - lsb = 0 06127 - i2c_size = 1 06128 */ 06129 #define VL53L1_TEST__PLL_BIST_GONOGO 0x04F6 06130 /*!< 06131 info: \n 06132 - msb = 0 06133 - lsb = 0 06134 - i2c_size = 1 06135 */ 06136 #define VL53L1_TEST__PLL_BIST_CTRL 0x04F7 06137 /*!< 06138 info: \n 06139 - msb = 0 06140 - lsb = 0 06141 - i2c_size = 1 06142 */ 06143 #define VL53L1_RANGING_CORE__DEVICE_ID 0x0680 06144 /*!< 06145 info: \n 06146 - msb = 0 06147 - lsb = 0 06148 - i2c_size = 1 06149 */ 06150 #define VL53L1_RANGING_CORE__REVISION_ID 0x0681 06151 /*!< 06152 info: \n 06153 - msb = 0 06154 - lsb = 0 06155 - i2c_size = 1 06156 */ 06157 #define VL53L1_RANGING_CORE__CLK_CTRL1 0x0683 06158 /*!< 06159 info: \n 06160 - msb = 0 06161 - lsb = 0 06162 - i2c_size = 1 06163 */ 06164 #define VL53L1_RANGING_CORE__CLK_CTRL2 0x0684 06165 /*!< 06166 info: \n 06167 - msb = 0 06168 - lsb = 0 06169 - i2c_size = 1 06170 */ 06171 #define VL53L1_RANGING_CORE__WOI_1 0x0685 06172 /*!< 06173 info: \n 06174 - msb = 0 06175 - lsb = 0 06176 - i2c_size = 1 06177 */ 06178 #define VL53L1_RANGING_CORE__WOI_REF_1 0x0686 06179 /*!< 06180 info: \n 06181 - msb = 0 06182 - lsb = 0 06183 - i2c_size = 1 06184 */ 06185 #define VL53L1_RANGING_CORE__START_RANGING 0x0687 06186 /*!< 06187 info: \n 06188 - msb = 0 06189 - lsb = 0 06190 - i2c_size = 1 06191 */ 06192 #define VL53L1_RANGING_CORE__LOW_LIMIT_1 0x0690 06193 /*!< 06194 info: \n 06195 - msb = 0 06196 - lsb = 0 06197 - i2c_size = 1 06198 */ 06199 #define VL53L1_RANGING_CORE__HIGH_LIMIT_1 0x0691 06200 /*!< 06201 info: \n 06202 - msb = 0 06203 - lsb = 0 06204 - i2c_size = 1 06205 */ 06206 #define VL53L1_RANGING_CORE__LOW_LIMIT_REF_1 0x0692 06207 /*!< 06208 info: \n 06209 - msb = 0 06210 - lsb = 0 06211 - i2c_size = 1 06212 */ 06213 #define VL53L1_RANGING_CORE__HIGH_LIMIT_REF_1 0x0693 06214 /*!< 06215 info: \n 06216 - msb = 0 06217 - lsb = 0 06218 - i2c_size = 1 06219 */ 06220 #define VL53L1_RANGING_CORE__QUANTIFIER_1_MSB 0x0694 06221 /*!< 06222 info: \n 06223 - msb = 0 06224 - lsb = 0 06225 - i2c_size = 1 06226 */ 06227 #define VL53L1_RANGING_CORE__QUANTIFIER_1_LSB 0x0695 06228 /*!< 06229 info: \n 06230 - msb = 0 06231 - lsb = 0 06232 - i2c_size = 1 06233 */ 06234 #define VL53L1_RANGING_CORE__QUANTIFIER_REF_1_MSB 0x0696 06235 /*!< 06236 info: \n 06237 - msb = 0 06238 - lsb = 0 06239 - i2c_size = 1 06240 */ 06241 #define VL53L1_RANGING_CORE__QUANTIFIER_REF_1_LSB 0x0697 06242 /*!< 06243 info: \n 06244 - msb = 0 06245 - lsb = 0 06246 - i2c_size = 1 06247 */ 06248 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_1_MSB 0x0698 06249 /*!< 06250 info: \n 06251 - msb = 0 06252 - lsb = 0 06253 - i2c_size = 1 06254 */ 06255 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_1_LSB 0x0699 06256 /*!< 06257 info: \n 06258 - msb = 0 06259 - lsb = 0 06260 - i2c_size = 1 06261 */ 06262 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_REF_1_MSB 0x069A 06263 /*!< 06264 info: \n 06265 - msb = 0 06266 - lsb = 0 06267 - i2c_size = 1 06268 */ 06269 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_REF_1_LSB 0x069B 06270 /*!< 06271 info: \n 06272 - msb = 0 06273 - lsb = 0 06274 - i2c_size = 1 06275 */ 06276 #define VL53L1_RANGING_CORE__FILTER_STRENGTH_1 0x069C 06277 /*!< 06278 info: \n 06279 - msb = 0 06280 - lsb = 0 06281 - i2c_size = 1 06282 */ 06283 #define VL53L1_RANGING_CORE__FILTER_STRENGTH_REF_1 0x069D 06284 /*!< 06285 info: \n 06286 - msb = 0 06287 - lsb = 0 06288 - i2c_size = 1 06289 */ 06290 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_1_MSB 0x069E 06291 /*!< 06292 info: \n 06293 - msb = 0 06294 - lsb = 0 06295 - i2c_size = 1 06296 */ 06297 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_1_LSB 0x069F 06298 /*!< 06299 info: \n 06300 - msb = 0 06301 - lsb = 0 06302 - i2c_size = 1 06303 */ 06304 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_REF_1_MSB 0x06A0 06305 /*!< 06306 info: \n 06307 - msb = 0 06308 - lsb = 0 06309 - i2c_size = 1 06310 */ 06311 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_REF_1_LSB 0x06A1 06312 /*!< 06313 info: \n 06314 - msb = 0 06315 - lsb = 0 06316 - i2c_size = 1 06317 */ 06318 #define VL53L1_RANGING_CORE__TIMEOUT_OVERALL_PERIODS_MSB 0x06A4 06319 /*!< 06320 info: \n 06321 - msb = 0 06322 - lsb = 0 06323 - i2c_size = 1 06324 */ 06325 #define VL53L1_RANGING_CORE__TIMEOUT_OVERALL_PERIODS_LSB 0x06A5 06326 /*!< 06327 info: \n 06328 - msb = 0 06329 - lsb = 0 06330 - i2c_size = 1 06331 */ 06332 #define VL53L1_RANGING_CORE__INVERT_HW 0x06A6 06333 /*!< 06334 info: \n 06335 - msb = 0 06336 - lsb = 0 06337 - i2c_size = 1 06338 */ 06339 #define VL53L1_RANGING_CORE__FORCE_HW 0x06A7 06340 /*!< 06341 info: \n 06342 - msb = 0 06343 - lsb = 0 06344 - i2c_size = 1 06345 */ 06346 #define VL53L1_RANGING_CORE__STATIC_HW_VALUE 0x06A8 06347 /*!< 06348 info: \n 06349 - msb = 0 06350 - lsb = 0 06351 - i2c_size = 1 06352 */ 06353 #define VL53L1_RANGING_CORE__FORCE_CONTINUOUS_AMBIENT 0x06A9 06354 /*!< 06355 info: \n 06356 - msb = 0 06357 - lsb = 0 06358 - i2c_size = 1 06359 */ 06360 #define VL53L1_RANGING_CORE__TEST_PHASE_SELECT_TO_FILTER 0x06AA 06361 /*!< 06362 info: \n 06363 - msb = 0 06364 - lsb = 0 06365 - i2c_size = 1 06366 */ 06367 #define VL53L1_RANGING_CORE__TEST_PHASE_SELECT_TO_TIMING_GEN 0x06AB 06368 /*!< 06369 info: \n 06370 - msb = 0 06371 - lsb = 0 06372 - i2c_size = 1 06373 */ 06374 #define VL53L1_RANGING_CORE__INITIAL_PHASE_VALUE_1 0x06AC 06375 /*!< 06376 info: \n 06377 - msb = 0 06378 - lsb = 0 06379 - i2c_size = 1 06380 */ 06381 #define VL53L1_RANGING_CORE__INITIAL_PHASE_VALUE_REF_1 0x06AD 06382 /*!< 06383 info: \n 06384 - msb = 0 06385 - lsb = 0 06386 - i2c_size = 1 06387 */ 06388 #define VL53L1_RANGING_CORE__FORCE_UP_IN 0x06AE 06389 /*!< 06390 info: \n 06391 - msb = 0 06392 - lsb = 0 06393 - i2c_size = 1 06394 */ 06395 #define VL53L1_RANGING_CORE__FORCE_DN_IN 0x06AF 06396 /*!< 06397 info: \n 06398 - msb = 0 06399 - lsb = 0 06400 - i2c_size = 1 06401 */ 06402 #define VL53L1_RANGING_CORE__STATIC_UP_VALUE_1 0x06B0 06403 /*!< 06404 info: \n 06405 - msb = 0 06406 - lsb = 0 06407 - i2c_size = 1 06408 */ 06409 #define VL53L1_RANGING_CORE__STATIC_UP_VALUE_REF_1 0x06B1 06410 /*!< 06411 info: \n 06412 - msb = 0 06413 - lsb = 0 06414 - i2c_size = 1 06415 */ 06416 #define VL53L1_RANGING_CORE__STATIC_DN_VALUE_1 0x06B2 06417 /*!< 06418 info: \n 06419 - msb = 0 06420 - lsb = 0 06421 - i2c_size = 1 06422 */ 06423 #define VL53L1_RANGING_CORE__STATIC_DN_VALUE_REF_1 0x06B3 06424 /*!< 06425 info: \n 06426 - msb = 0 06427 - lsb = 0 06428 - i2c_size = 1 06429 */ 06430 #define VL53L1_RANGING_CORE__MONITOR_UP_DN 0x06B4 06431 /*!< 06432 info: \n 06433 - msb = 0 06434 - lsb = 0 06435 - i2c_size = 1 06436 */ 06437 #define VL53L1_RANGING_CORE__INVERT_UP_DN 0x06B5 06438 /*!< 06439 info: \n 06440 - msb = 0 06441 - lsb = 0 06442 - i2c_size = 1 06443 */ 06444 #define VL53L1_RANGING_CORE__CPUMP_1 0x06B6 06445 /*!< 06446 info: \n 06447 - msb = 0 06448 - lsb = 0 06449 - i2c_size = 1 06450 */ 06451 #define VL53L1_RANGING_CORE__CPUMP_2 0x06B7 06452 /*!< 06453 info: \n 06454 - msb = 0 06455 - lsb = 0 06456 - i2c_size = 1 06457 */ 06458 #define VL53L1_RANGING_CORE__CPUMP_3 0x06B8 06459 /*!< 06460 info: \n 06461 - msb = 0 06462 - lsb = 0 06463 - i2c_size = 1 06464 */ 06465 #define VL53L1_RANGING_CORE__OSC_1 0x06B9 06466 /*!< 06467 info: \n 06468 - msb = 0 06469 - lsb = 0 06470 - i2c_size = 1 06471 */ 06472 #define VL53L1_RANGING_CORE__PLL_1 0x06BB 06473 /*!< 06474 info: \n 06475 - msb = 0 06476 - lsb = 0 06477 - i2c_size = 1 06478 */ 06479 #define VL53L1_RANGING_CORE__PLL_2 0x06BC 06480 /*!< 06481 info: \n 06482 - msb = 0 06483 - lsb = 0 06484 - i2c_size = 1 06485 */ 06486 #define VL53L1_RANGING_CORE__REFERENCE_1 0x06BD 06487 /*!< 06488 info: \n 06489 - msb = 0 06490 - lsb = 0 06491 - i2c_size = 1 06492 */ 06493 #define VL53L1_RANGING_CORE__REFERENCE_3 0x06BF 06494 /*!< 06495 info: \n 06496 - msb = 0 06497 - lsb = 0 06498 - i2c_size = 1 06499 */ 06500 #define VL53L1_RANGING_CORE__REFERENCE_4 0x06C0 06501 /*!< 06502 info: \n 06503 - msb = 0 06504 - lsb = 0 06505 - i2c_size = 1 06506 */ 06507 #define VL53L1_RANGING_CORE__REFERENCE_5 0x06C1 06508 /*!< 06509 info: \n 06510 - msb = 0 06511 - lsb = 0 06512 - i2c_size = 1 06513 */ 06514 #define VL53L1_RANGING_CORE__REGAVDD1V2 0x06C3 06515 /*!< 06516 info: \n 06517 - msb = 0 06518 - lsb = 0 06519 - i2c_size = 1 06520 */ 06521 #define VL53L1_RANGING_CORE__CALIB_1 0x06C4 06522 /*!< 06523 info: \n 06524 - msb = 0 06525 - lsb = 0 06526 - i2c_size = 1 06527 */ 06528 #define VL53L1_RANGING_CORE__CALIB_2 0x06C5 06529 /*!< 06530 info: \n 06531 - msb = 0 06532 - lsb = 0 06533 - i2c_size = 1 06534 */ 06535 #define VL53L1_RANGING_CORE__CALIB_3 0x06C6 06536 /*!< 06537 info: \n 06538 - msb = 0 06539 - lsb = 0 06540 - i2c_size = 1 06541 */ 06542 #define VL53L1_RANGING_CORE__TST_MUX_SEL1 0x06C9 06543 /*!< 06544 info: \n 06545 - msb = 0 06546 - lsb = 0 06547 - i2c_size = 1 06548 */ 06549 #define VL53L1_RANGING_CORE__TST_MUX_SEL2 0x06CA 06550 /*!< 06551 info: \n 06552 - msb = 0 06553 - lsb = 0 06554 - i2c_size = 1 06555 */ 06556 #define VL53L1_RANGING_CORE__TST_MUX 0x06CB 06557 /*!< 06558 info: \n 06559 - msb = 0 06560 - lsb = 0 06561 - i2c_size = 1 06562 */ 06563 #define VL53L1_RANGING_CORE__GPIO_OUT_TESTMUX 0x06CC 06564 /*!< 06565 info: \n 06566 - msb = 0 06567 - lsb = 0 06568 - i2c_size = 1 06569 */ 06570 #define VL53L1_RANGING_CORE__CUSTOM_FE 0x06CD 06571 /*!< 06572 info: \n 06573 - msb = 0 06574 - lsb = 0 06575 - i2c_size = 1 06576 */ 06577 #define VL53L1_RANGING_CORE__CUSTOM_FE_2 0x06CE 06578 /*!< 06579 info: \n 06580 - msb = 0 06581 - lsb = 0 06582 - i2c_size = 1 06583 */ 06584 #define VL53L1_RANGING_CORE__SPAD_READOUT 0x06CF 06585 /*!< 06586 info: \n 06587 - msb = 0 06588 - lsb = 0 06589 - i2c_size = 1 06590 */ 06591 #define VL53L1_RANGING_CORE__SPAD_READOUT_1 0x06D0 06592 /*!< 06593 info: \n 06594 - msb = 0 06595 - lsb = 0 06596 - i2c_size = 1 06597 */ 06598 #define VL53L1_RANGING_CORE__SPAD_READOUT_2 0x06D1 06599 /*!< 06600 info: \n 06601 - msb = 0 06602 - lsb = 0 06603 - i2c_size = 1 06604 */ 06605 #define VL53L1_RANGING_CORE__SPAD_PS 0x06D2 06606 /*!< 06607 info: \n 06608 - msb = 0 06609 - lsb = 0 06610 - i2c_size = 1 06611 */ 06612 #define VL53L1_RANGING_CORE__LASER_SAFETY_2 0x06D4 06613 /*!< 06614 info: \n 06615 - msb = 0 06616 - lsb = 0 06617 - i2c_size = 1 06618 */ 06619 #define VL53L1_RANGING_CORE__NVM_CTRL__MODE 0x0780 06620 /*!< 06621 info: \n 06622 - msb = 0 06623 - lsb = 0 06624 - i2c_size = 1 06625 */ 06626 #define VL53L1_RANGING_CORE__NVM_CTRL__PDN 0x0781 06627 /*!< 06628 info: \n 06629 - msb = 0 06630 - lsb = 0 06631 - i2c_size = 1 06632 */ 06633 #define VL53L1_RANGING_CORE__NVM_CTRL__PROGN 0x0782 06634 /*!< 06635 info: \n 06636 - msb = 0 06637 - lsb = 0 06638 - i2c_size = 1 06639 */ 06640 #define VL53L1_RANGING_CORE__NVM_CTRL__READN 0x0783 06641 /*!< 06642 info: \n 06643 - msb = 0 06644 - lsb = 0 06645 - i2c_size = 1 06646 */ 06647 #define VL53L1_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_MSB 0x0784 06648 /*!< 06649 info: \n 06650 - msb = 0 06651 - lsb = 0 06652 - i2c_size = 1 06653 */ 06654 #define VL53L1_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_LSB 0x0785 06655 /*!< 06656 info: \n 06657 - msb = 0 06658 - lsb = 0 06659 - i2c_size = 1 06660 */ 06661 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_RISE_MSB 0x0786 06662 /*!< 06663 info: \n 06664 - msb = 0 06665 - lsb = 0 06666 - i2c_size = 1 06667 */ 06668 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_RISE_LSB 0x0787 06669 /*!< 06670 info: \n 06671 - msb = 0 06672 - lsb = 0 06673 - i2c_size = 1 06674 */ 06675 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_FALL_MSB 0x0788 06676 /*!< 06677 info: \n 06678 - msb = 0 06679 - lsb = 0 06680 - i2c_size = 1 06681 */ 06682 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_FALL_LSB 0x0789 06683 /*!< 06684 info: \n 06685 - msb = 0 06686 - lsb = 0 06687 - i2c_size = 1 06688 */ 06689 #define VL53L1_RANGING_CORE__NVM_CTRL__TST 0x078A 06690 /*!< 06691 info: \n 06692 - msb = 0 06693 - lsb = 0 06694 - i2c_size = 1 06695 */ 06696 #define VL53L1_RANGING_CORE__NVM_CTRL__TESTREAD 0x078B 06697 /*!< 06698 info: \n 06699 - msb = 0 06700 - lsb = 0 06701 - i2c_size = 1 06702 */ 06703 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_MMM 0x078C 06704 /*!< 06705 info: \n 06706 - msb = 0 06707 - lsb = 0 06708 - i2c_size = 1 06709 */ 06710 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_LMM 0x078D 06711 /*!< 06712 info: \n 06713 - msb = 0 06714 - lsb = 0 06715 - i2c_size = 1 06716 */ 06717 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_LLM 0x078E 06718 /*!< 06719 info: \n 06720 - msb = 0 06721 - lsb = 0 06722 - i2c_size = 1 06723 */ 06724 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_LLL 0x078F 06725 /*!< 06726 info: \n 06727 - msb = 0 06728 - lsb = 0 06729 - i2c_size = 1 06730 */ 06731 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_MMM 0x0790 06732 /*!< 06733 info: \n 06734 - msb = 0 06735 - lsb = 0 06736 - i2c_size = 1 06737 */ 06738 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_LMM 0x0791 06739 /*!< 06740 info: \n 06741 - msb = 0 06742 - lsb = 0 06743 - i2c_size = 1 06744 */ 06745 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_LLM 0x0792 06746 /*!< 06747 info: \n 06748 - msb = 0 06749 - lsb = 0 06750 - i2c_size = 1 06751 */ 06752 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_LLL 0x0793 06753 /*!< 06754 info: \n 06755 - msb = 0 06756 - lsb = 0 06757 - i2c_size = 1 06758 */ 06759 #define VL53L1_RANGING_CORE__NVM_CTRL__ADDR 0x0794 06760 /*!< 06761 info: \n 06762 - msb = 0 06763 - lsb = 0 06764 - i2c_size = 1 06765 */ 06766 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_ECC 0x0795 06767 /*!< 06768 info: \n 06769 - msb = 0 06770 - lsb = 0 06771 - i2c_size = 1 06772 */ 06773 #define VL53L1_RANGING_CORE__RET_SPAD_EN_0 0x0796 06774 /*!< 06775 info: \n 06776 - msb = 0 06777 - lsb = 0 06778 - i2c_size = 1 06779 */ 06780 #define VL53L1_RANGING_CORE__RET_SPAD_EN_1 0x0797 06781 /*!< 06782 info: \n 06783 - msb = 0 06784 - lsb = 0 06785 - i2c_size = 1 06786 */ 06787 #define VL53L1_RANGING_CORE__RET_SPAD_EN_2 0x0798 06788 /*!< 06789 info: \n 06790 - msb = 0 06791 - lsb = 0 06792 - i2c_size = 1 06793 */ 06794 #define VL53L1_RANGING_CORE__RET_SPAD_EN_3 0x0799 06795 /*!< 06796 info: \n 06797 - msb = 0 06798 - lsb = 0 06799 - i2c_size = 1 06800 */ 06801 #define VL53L1_RANGING_CORE__RET_SPAD_EN_4 0x079A 06802 /*!< 06803 info: \n 06804 - msb = 0 06805 - lsb = 0 06806 - i2c_size = 1 06807 */ 06808 #define VL53L1_RANGING_CORE__RET_SPAD_EN_5 0x079B 06809 /*!< 06810 info: \n 06811 - msb = 0 06812 - lsb = 0 06813 - i2c_size = 1 06814 */ 06815 #define VL53L1_RANGING_CORE__RET_SPAD_EN_6 0x079C 06816 /*!< 06817 info: \n 06818 - msb = 0 06819 - lsb = 0 06820 - i2c_size = 1 06821 */ 06822 #define VL53L1_RANGING_CORE__RET_SPAD_EN_7 0x079D 06823 /*!< 06824 info: \n 06825 - msb = 0 06826 - lsb = 0 06827 - i2c_size = 1 06828 */ 06829 #define VL53L1_RANGING_CORE__RET_SPAD_EN_8 0x079E 06830 /*!< 06831 info: \n 06832 - msb = 0 06833 - lsb = 0 06834 - i2c_size = 1 06835 */ 06836 #define VL53L1_RANGING_CORE__RET_SPAD_EN_9 0x079F 06837 /*!< 06838 info: \n 06839 - msb = 0 06840 - lsb = 0 06841 - i2c_size = 1 06842 */ 06843 #define VL53L1_RANGING_CORE__RET_SPAD_EN_10 0x07A0 06844 /*!< 06845 info: \n 06846 - msb = 0 06847 - lsb = 0 06848 - i2c_size = 1 06849 */ 06850 #define VL53L1_RANGING_CORE__RET_SPAD_EN_11 0x07A1 06851 /*!< 06852 info: \n 06853 - msb = 0 06854 - lsb = 0 06855 - i2c_size = 1 06856 */ 06857 #define VL53L1_RANGING_CORE__RET_SPAD_EN_12 0x07A2 06858 /*!< 06859 info: \n 06860 - msb = 0 06861 - lsb = 0 06862 - i2c_size = 1 06863 */ 06864 #define VL53L1_RANGING_CORE__RET_SPAD_EN_13 0x07A3 06865 /*!< 06866 info: \n 06867 - msb = 0 06868 - lsb = 0 06869 - i2c_size = 1 06870 */ 06871 #define VL53L1_RANGING_CORE__RET_SPAD_EN_14 0x07A4 06872 /*!< 06873 info: \n 06874 - msb = 0 06875 - lsb = 0 06876 - i2c_size = 1 06877 */ 06878 #define VL53L1_RANGING_CORE__RET_SPAD_EN_15 0x07A5 06879 /*!< 06880 info: \n 06881 - msb = 0 06882 - lsb = 0 06883 - i2c_size = 1 06884 */ 06885 #define VL53L1_RANGING_CORE__RET_SPAD_EN_16 0x07A6 06886 /*!< 06887 info: \n 06888 - msb = 0 06889 - lsb = 0 06890 - i2c_size = 1 06891 */ 06892 #define VL53L1_RANGING_CORE__RET_SPAD_EN_17 0x07A7 06893 /*!< 06894 info: \n 06895 - msb = 0 06896 - lsb = 0 06897 - i2c_size = 1 06898 */ 06899 #define VL53L1_RANGING_CORE__SPAD_SHIFT_EN 0x07BA 06900 /*!< 06901 info: \n 06902 - msb = 0 06903 - lsb = 0 06904 - i2c_size = 1 06905 */ 06906 #define VL53L1_RANGING_CORE__SPAD_DISABLE_CTRL 0x07BB 06907 /*!< 06908 info: \n 06909 - msb = 0 06910 - lsb = 0 06911 - i2c_size = 1 06912 */ 06913 #define VL53L1_RANGING_CORE__SPAD_EN_SHIFT_OUT_DEBUG 0x07BC 06914 /*!< 06915 info: \n 06916 - msb = 0 06917 - lsb = 0 06918 - i2c_size = 1 06919 */ 06920 #define VL53L1_RANGING_CORE__SPI_MODE 0x07BD 06921 /*!< 06922 info: \n 06923 - msb = 0 06924 - lsb = 0 06925 - i2c_size = 1 06926 */ 06927 #define VL53L1_RANGING_CORE__GPIO_DIR 0x07BE 06928 /*!< 06929 info: \n 06930 - msb = 0 06931 - lsb = 0 06932 - i2c_size = 1 06933 */ 06934 #define VL53L1_RANGING_CORE__VCSEL_PERIOD 0x0880 06935 /*!< 06936 info: \n 06937 - msb = 0 06938 - lsb = 0 06939 - i2c_size = 1 06940 */ 06941 #define VL53L1_RANGING_CORE__VCSEL_START 0x0881 06942 /*!< 06943 info: \n 06944 - msb = 0 06945 - lsb = 0 06946 - i2c_size = 1 06947 */ 06948 #define VL53L1_RANGING_CORE__VCSEL_STOP 0x0882 06949 /*!< 06950 info: \n 06951 - msb = 0 06952 - lsb = 0 06953 - i2c_size = 1 06954 */ 06955 #define VL53L1_RANGING_CORE__VCSEL_1 0x0885 06956 /*!< 06957 info: \n 06958 - msb = 0 06959 - lsb = 0 06960 - i2c_size = 1 06961 */ 06962 #define VL53L1_RANGING_CORE__VCSEL_STATUS 0x088D 06963 /*!< 06964 info: \n 06965 - msb = 0 06966 - lsb = 0 06967 - i2c_size = 1 06968 */ 06969 #define VL53L1_RANGING_CORE__STATUS 0x0980 06970 /*!< 06971 info: \n 06972 - msb = 0 06973 - lsb = 0 06974 - i2c_size = 1 06975 */ 06976 #define VL53L1_RANGING_CORE__LASER_CONTINUITY_STATE 0x0981 06977 /*!< 06978 info: \n 06979 - msb = 0 06980 - lsb = 0 06981 - i2c_size = 1 06982 */ 06983 #define VL53L1_RANGING_CORE__RANGE_1_MMM 0x0982 06984 /*!< 06985 info: \n 06986 - msb = 0 06987 - lsb = 0 06988 - i2c_size = 1 06989 */ 06990 #define VL53L1_RANGING_CORE__RANGE_1_LMM 0x0983 06991 /*!< 06992 info: \n 06993 - msb = 0 06994 - lsb = 0 06995 - i2c_size = 1 06996 */ 06997 #define VL53L1_RANGING_CORE__RANGE_1_LLM 0x0984 06998 /*!< 06999 info: \n 07000 - msb = 0 07001 - lsb = 0 07002 - i2c_size = 1 07003 */ 07004 #define VL53L1_RANGING_CORE__RANGE_1_LLL 0x0985 07005 /*!< 07006 info: \n 07007 - msb = 0 07008 - lsb = 0 07009 - i2c_size = 1 07010 */ 07011 #define VL53L1_RANGING_CORE__RANGE_REF_1_MMM 0x0986 07012 /*!< 07013 info: \n 07014 - msb = 0 07015 - lsb = 0 07016 - i2c_size = 1 07017 */ 07018 #define VL53L1_RANGING_CORE__RANGE_REF_1_LMM 0x0987 07019 /*!< 07020 info: \n 07021 - msb = 0 07022 - lsb = 0 07023 - i2c_size = 1 07024 */ 07025 #define VL53L1_RANGING_CORE__RANGE_REF_1_LLM 0x0988 07026 /*!< 07027 info: \n 07028 - msb = 0 07029 - lsb = 0 07030 - i2c_size = 1 07031 */ 07032 #define VL53L1_RANGING_CORE__RANGE_REF_1_LLL 0x0989 07033 /*!< 07034 info: \n 07035 - msb = 0 07036 - lsb = 0 07037 - i2c_size = 1 07038 */ 07039 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_MMM 0x098A 07040 /*!< 07041 info: \n 07042 - msb = 0 07043 - lsb = 0 07044 - i2c_size = 1 07045 */ 07046 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LMM 0x098B 07047 /*!< 07048 info: \n 07049 - msb = 0 07050 - lsb = 0 07051 - i2c_size = 1 07052 */ 07053 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LLM 0x098C 07054 /*!< 07055 info: \n 07056 - msb = 0 07057 - lsb = 0 07058 - i2c_size = 1 07059 */ 07060 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LLL 0x098D 07061 /*!< 07062 info: \n 07063 - msb = 0 07064 - lsb = 0 07065 - i2c_size = 1 07066 */ 07067 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_MMM 0x098E 07068 /*!< 07069 info: \n 07070 - msb = 0 07071 - lsb = 0 07072 - i2c_size = 1 07073 */ 07074 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LMM 0x098F 07075 /*!< 07076 info: \n 07077 - msb = 0 07078 - lsb = 0 07079 - i2c_size = 1 07080 */ 07081 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LLM 0x0990 07082 /*!< 07083 info: \n 07084 - msb = 0 07085 - lsb = 0 07086 - i2c_size = 1 07087 */ 07088 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LLL 0x0991 07089 /*!< 07090 info: \n 07091 - msb = 0 07092 - lsb = 0 07093 - i2c_size = 1 07094 */ 07095 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_MMM 0x0992 07096 /*!< 07097 info: \n 07098 - msb = 0 07099 - lsb = 0 07100 - i2c_size = 1 07101 */ 07102 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LMM 0x0993 07103 /*!< 07104 info: \n 07105 - msb = 0 07106 - lsb = 0 07107 - i2c_size = 1 07108 */ 07109 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LLM 0x0994 07110 /*!< 07111 info: \n 07112 - msb = 0 07113 - lsb = 0 07114 - i2c_size = 1 07115 */ 07116 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LLL 0x0995 07117 /*!< 07118 info: \n 07119 - msb = 0 07120 - lsb = 0 07121 - i2c_size = 1 07122 */ 07123 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_MM 0x0996 07124 /*!< 07125 info: \n 07126 - msb = 0 07127 - lsb = 0 07128 - i2c_size = 1 07129 */ 07130 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_LM 0x0997 07131 /*!< 07132 info: \n 07133 - msb = 0 07134 - lsb = 0 07135 - i2c_size = 1 07136 */ 07137 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_LL 0x0998 07138 /*!< 07139 info: \n 07140 - msb = 0 07141 - lsb = 0 07142 - i2c_size = 1 07143 */ 07144 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_MM 0x0999 07145 /*!< 07146 info: \n 07147 - msb = 0 07148 - lsb = 0 07149 - i2c_size = 1 07150 */ 07151 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_LM 0x099A 07152 /*!< 07153 info: \n 07154 - msb = 0 07155 - lsb = 0 07156 - i2c_size = 1 07157 */ 07158 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_LL 0x099B 07159 /*!< 07160 info: \n 07161 - msb = 0 07162 - lsb = 0 07163 - i2c_size = 1 07164 */ 07165 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_MMM 0x099C 07166 /*!< 07167 info: \n 07168 - msb = 0 07169 - lsb = 0 07170 - i2c_size = 1 07171 */ 07172 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LMM 0x099D 07173 /*!< 07174 info: \n 07175 - msb = 0 07176 - lsb = 0 07177 - i2c_size = 1 07178 */ 07179 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LLM 0x099E 07180 /*!< 07181 info: \n 07182 - msb = 0 07183 - lsb = 0 07184 - i2c_size = 1 07185 */ 07186 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LLL 0x099F 07187 /*!< 07188 info: \n 07189 - msb = 0 07190 - lsb = 0 07191 - i2c_size = 1 07192 */ 07193 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_MMM 0x09A0 07194 /*!< 07195 info: \n 07196 - msb = 0 07197 - lsb = 0 07198 - i2c_size = 1 07199 */ 07200 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LMM 0x09A1 07201 /*!< 07202 info: \n 07203 - msb = 0 07204 - lsb = 0 07205 - i2c_size = 1 07206 */ 07207 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LLM 0x09A2 07208 /*!< 07209 info: \n 07210 - msb = 0 07211 - lsb = 0 07212 - i2c_size = 1 07213 */ 07214 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LLL 0x09A3 07215 /*!< 07216 info: \n 07217 - msb = 0 07218 - lsb = 0 07219 - i2c_size = 1 07220 */ 07221 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_MMM 0x09A4 07222 /*!< 07223 info: \n 07224 - msb = 0 07225 - lsb = 0 07226 - i2c_size = 1 07227 */ 07228 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LMM 0x09A5 07229 /*!< 07230 info: \n 07231 - msb = 0 07232 - lsb = 0 07233 - i2c_size = 1 07234 */ 07235 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LLM 0x09A6 07236 /*!< 07237 info: \n 07238 - msb = 0 07239 - lsb = 0 07240 - i2c_size = 1 07241 */ 07242 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LLL 0x09A7 07243 /*!< 07244 info: \n 07245 - msb = 0 07246 - lsb = 0 07247 - i2c_size = 1 07248 */ 07249 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_MM 0x09A8 07250 /*!< 07251 info: \n 07252 - msb = 0 07253 - lsb = 0 07254 - i2c_size = 1 07255 */ 07256 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_LM 0x09A9 07257 /*!< 07258 info: \n 07259 - msb = 0 07260 - lsb = 0 07261 - i2c_size = 1 07262 */ 07263 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_LL 0x09AA 07264 /*!< 07265 info: \n 07266 - msb = 0 07267 - lsb = 0 07268 - i2c_size = 1 07269 */ 07270 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_REF_MM 0x09AB 07271 /*!< 07272 info: \n 07273 - msb = 0 07274 - lsb = 0 07275 - i2c_size = 1 07276 */ 07277 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_REF_LM 0x09AC 07278 /*!< 07279 info: \n 07280 - msb = 0 07281 - lsb = 0 07282 - i2c_size = 1 07283 */ 07284 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_REF_LL 0x09AD 07285 /*!< 07286 info: \n 07287 - msb = 0 07288 - lsb = 0 07289 - i2c_size = 1 07290 */ 07291 #define VL53L1_RANGING_CORE__GPIO_CONFIG__A0 0x0A00 07292 /*!< 07293 info: \n 07294 - msb = 0 07295 - lsb = 0 07296 - i2c_size = 1 07297 */ 07298 #define VL53L1_RANGING_CORE__RESET_CONTROL__A0 0x0A01 07299 /*!< 07300 info: \n 07301 - msb = 0 07302 - lsb = 0 07303 - i2c_size = 1 07304 */ 07305 #define VL53L1_RANGING_CORE__INTR_MANAGER__A0 0x0A02 07306 /*!< 07307 info: \n 07308 - msb = 0 07309 - lsb = 0 07310 - i2c_size = 1 07311 */ 07312 #define VL53L1_RANGING_CORE__POWER_FSM_TIME_OSC__A0 0x0A06 07313 /*!< 07314 info: \n 07315 - msb = 0 07316 - lsb = 0 07317 - i2c_size = 1 07318 */ 07319 #define VL53L1_RANGING_CORE__VCSEL_ATEST__A0 0x0A07 07320 /*!< 07321 info: \n 07322 - msb = 0 07323 - lsb = 0 07324 - i2c_size = 1 07325 */ 07326 #define VL53L1_RANGING_CORE__VCSEL_PERIOD_CLIPPED__A0 0x0A08 07327 /*!< 07328 info: \n 07329 - msb = 0 07330 - lsb = 0 07331 - i2c_size = 1 07332 */ 07333 #define VL53L1_RANGING_CORE__VCSEL_STOP_CLIPPED__A0 0x0A09 07334 /*!< 07335 info: \n 07336 - msb = 0 07337 - lsb = 0 07338 - i2c_size = 1 07339 */ 07340 #define VL53L1_RANGING_CORE__CALIB_2__A0 0x0A0A 07341 /*!< 07342 info: \n 07343 - msb = 0 07344 - lsb = 0 07345 - i2c_size = 1 07346 */ 07347 #define VL53L1_RANGING_CORE__STOP_CONDITION__A0 0x0A0B 07348 /*!< 07349 info: \n 07350 - msb = 0 07351 - lsb = 0 07352 - i2c_size = 1 07353 */ 07354 #define VL53L1_RANGING_CORE__STATUS_RESET__A0 0x0A0C 07355 /*!< 07356 info: \n 07357 - msb = 0 07358 - lsb = 0 07359 - i2c_size = 1 07360 */ 07361 #define VL53L1_RANGING_CORE__READOUT_CFG__A0 0x0A0D 07362 /*!< 07363 info: \n 07364 - msb = 0 07365 - lsb = 0 07366 - i2c_size = 1 07367 */ 07368 #define VL53L1_RANGING_CORE__WINDOW_SETTING__A0 0x0A0E 07369 /*!< 07370 info: \n 07371 - msb = 0 07372 - lsb = 0 07373 - i2c_size = 1 07374 */ 07375 #define VL53L1_RANGING_CORE__VCSEL_DELAY__A0 0x0A1A 07376 /*!< 07377 info: \n 07378 - msb = 0 07379 - lsb = 0 07380 - i2c_size = 1 07381 */ 07382 #define VL53L1_RANGING_CORE__REFERENCE_2__A0 0x0A1B 07383 /*!< 07384 info: \n 07385 - msb = 0 07386 - lsb = 0 07387 - i2c_size = 1 07388 */ 07389 #define VL53L1_RANGING_CORE__REGAVDD1V2__A0 0x0A1D 07390 /*!< 07391 info: \n 07392 - msb = 0 07393 - lsb = 0 07394 - i2c_size = 1 07395 */ 07396 #define VL53L1_RANGING_CORE__TST_MUX__A0 0x0A1F 07397 /*!< 07398 info: \n 07399 - msb = 0 07400 - lsb = 0 07401 - i2c_size = 1 07402 */ 07403 #define VL53L1_RANGING_CORE__CUSTOM_FE_2__A0 0x0A20 07404 /*!< 07405 info: \n 07406 - msb = 0 07407 - lsb = 0 07408 - i2c_size = 1 07409 */ 07410 #define VL53L1_RANGING_CORE__SPAD_READOUT__A0 0x0A21 07411 /*!< 07412 info: \n 07413 - msb = 0 07414 - lsb = 0 07415 - i2c_size = 1 07416 */ 07417 #define VL53L1_RANGING_CORE__CPUMP_1__A0 0x0A22 07418 /*!< 07419 info: \n 07420 - msb = 0 07421 - lsb = 0 07422 - i2c_size = 1 07423 */ 07424 #define VL53L1_RANGING_CORE__SPARE_REGISTER__A0 0x0A23 07425 /*!< 07426 info: \n 07427 - msb = 0 07428 - lsb = 0 07429 - i2c_size = 1 07430 */ 07431 #define VL53L1_RANGING_CORE__VCSEL_CONT_STAGE5_BYPASS__A0 0x0A24 07432 /*!< 07433 info: \n 07434 - msb = 0 07435 - lsb = 0 07436 - i2c_size = 1 07437 */ 07438 #define VL53L1_RANGING_CORE__RET_SPAD_EN_18 0x0A25 07439 /*!< 07440 info: \n 07441 - msb = 0 07442 - lsb = 0 07443 - i2c_size = 1 07444 */ 07445 #define VL53L1_RANGING_CORE__RET_SPAD_EN_19 0x0A26 07446 /*!< 07447 info: \n 07448 - msb = 0 07449 - lsb = 0 07450 - i2c_size = 1 07451 */ 07452 #define VL53L1_RANGING_CORE__RET_SPAD_EN_20 0x0A27 07453 /*!< 07454 info: \n 07455 - msb = 0 07456 - lsb = 0 07457 - i2c_size = 1 07458 */ 07459 #define VL53L1_RANGING_CORE__RET_SPAD_EN_21 0x0A28 07460 /*!< 07461 info: \n 07462 - msb = 0 07463 - lsb = 0 07464 - i2c_size = 1 07465 */ 07466 #define VL53L1_RANGING_CORE__RET_SPAD_EN_22 0x0A29 07467 /*!< 07468 info: \n 07469 - msb = 0 07470 - lsb = 0 07471 - i2c_size = 1 07472 */ 07473 #define VL53L1_RANGING_CORE__RET_SPAD_EN_23 0x0A2A 07474 /*!< 07475 info: \n 07476 - msb = 0 07477 - lsb = 0 07478 - i2c_size = 1 07479 */ 07480 #define VL53L1_RANGING_CORE__RET_SPAD_EN_24 0x0A2B 07481 /*!< 07482 info: \n 07483 - msb = 0 07484 - lsb = 0 07485 - i2c_size = 1 07486 */ 07487 #define VL53L1_RANGING_CORE__RET_SPAD_EN_25 0x0A2C 07488 /*!< 07489 info: \n 07490 - msb = 0 07491 - lsb = 0 07492 - i2c_size = 1 07493 */ 07494 #define VL53L1_RANGING_CORE__RET_SPAD_EN_26 0x0A2D 07495 /*!< 07496 info: \n 07497 - msb = 0 07498 - lsb = 0 07499 - i2c_size = 1 07500 */ 07501 #define VL53L1_RANGING_CORE__RET_SPAD_EN_27 0x0A2E 07502 /*!< 07503 info: \n 07504 - msb = 0 07505 - lsb = 0 07506 - i2c_size = 1 07507 */ 07508 #define VL53L1_RANGING_CORE__RET_SPAD_EN_28 0x0A2F 07509 /*!< 07510 info: \n 07511 - msb = 0 07512 - lsb = 0 07513 - i2c_size = 1 07514 */ 07515 #define VL53L1_RANGING_CORE__RET_SPAD_EN_29 0x0A30 07516 /*!< 07517 info: \n 07518 - msb = 0 07519 - lsb = 0 07520 - i2c_size = 1 07521 */ 07522 #define VL53L1_RANGING_CORE__RET_SPAD_EN_30 0x0A31 07523 /*!< 07524 info: \n 07525 - msb = 0 07526 - lsb = 0 07527 - i2c_size = 1 07528 */ 07529 #define VL53L1_RANGING_CORE__RET_SPAD_EN_31 0x0A32 07530 /*!< 07531 info: \n 07532 - msb = 0 07533 - lsb = 0 07534 - i2c_size = 1 07535 */ 07536 #define VL53L1_RANGING_CORE__REF_SPAD_EN_0__EWOK 0x0A33 07537 /*!< 07538 info: \n 07539 - msb = 0 07540 - lsb = 0 07541 - i2c_size = 1 07542 */ 07543 #define VL53L1_RANGING_CORE__REF_SPAD_EN_1__EWOK 0x0A34 07544 /*!< 07545 info: \n 07546 - msb = 0 07547 - lsb = 0 07548 - i2c_size = 1 07549 */ 07550 #define VL53L1_RANGING_CORE__REF_SPAD_EN_2__EWOK 0x0A35 07551 /*!< 07552 info: \n 07553 - msb = 0 07554 - lsb = 0 07555 - i2c_size = 1 07556 */ 07557 #define VL53L1_RANGING_CORE__REF_SPAD_EN_3__EWOK 0x0A36 07558 /*!< 07559 info: \n 07560 - msb = 0 07561 - lsb = 0 07562 - i2c_size = 1 07563 */ 07564 #define VL53L1_RANGING_CORE__REF_SPAD_EN_4__EWOK 0x0A37 07565 /*!< 07566 info: \n 07567 - msb = 0 07568 - lsb = 0 07569 - i2c_size = 1 07570 */ 07571 #define VL53L1_RANGING_CORE__REF_SPAD_EN_5__EWOK 0x0A38 07572 /*!< 07573 info: \n 07574 - msb = 0 07575 - lsb = 0 07576 - i2c_size = 1 07577 */ 07578 #define VL53L1_RANGING_CORE__REF_EN_START_SELECT 0x0A39 07579 /*!< 07580 info: \n 07581 - msb = 0 07582 - lsb = 0 07583 - i2c_size = 1 07584 */ 07585 #define VL53L1_RANGING_CORE__REGDVDD1V2_ATEST__EWOK 0x0A41 07586 /*!< 07587 info: \n 07588 - msb = 0 07589 - lsb = 0 07590 - i2c_size = 1 07591 */ 07592 #define VL53L1_SOFT_RESET_GO1 0x0B00 07593 /*!< 07594 info: \n 07595 - msb = 0 07596 - lsb = 0 07597 - i2c_size = 1 07598 */ 07599 #define VL53L1_PRIVATE__PATCH_BASE_ADDR_RSLV 0x0E00 07600 /*!< 07601 info: \n 07602 - msb = 0 07603 - lsb = 0 07604 - i2c_size = 1 07605 */ 07606 #define VL53L1_PREV_SHADOW_RESULT__INTERRUPT_STATUS 0x0ED0 07607 /*!< 07608 type: uint8_t \n 07609 default: 0x00 \n 07610 info: \n 07611 - msb = 5 07612 - lsb = 0 07613 - i2c_size = 1 07614 groups: \n 07615 ['prev_shadow_system_results', 'results'] 07616 fields: \n 07617 - [2:0] = prev_shadow_int_status 07618 - [4:3] = prev_shadow_int_error_status 07619 - [5] = prev_shadow_gph_id_gpio_status 07620 */ 07621 #define VL53L1_PREV_SHADOW_RESULT__RANGE_STATUS 0x0ED1 07622 /*!< 07623 type: uint8_t \n 07624 default: 0x00 \n 07625 info: \n 07626 - msb = 7 07627 - lsb = 0 07628 - i2c_size = 1 07629 groups: \n 07630 ['prev_shadow_system_results', 'results'] 07631 fields: \n 07632 - [4:0] = prev_shadow_range_status 07633 - [5] = prev_shadow_max_threshold_hit 07634 - [6] = prev_shadow_min_threshold_hit 07635 - [7] = prev_shadow_gph_id_range_status 07636 */ 07637 #define VL53L1_PREV_SHADOW_RESULT__REPORT_STATUS 0x0ED2 07638 /*!< 07639 type: uint8_t \n 07640 default: 0x00 \n 07641 info: \n 07642 - msb = 3 07643 - lsb = 0 07644 - i2c_size = 1 07645 groups: \n 07646 ['prev_shadow_system_results', 'results'] 07647 fields: \n 07648 - [3:0] = prev_shadow_report_status 07649 */ 07650 #define VL53L1_PREV_SHADOW_RESULT__STREAM_COUNT 0x0ED3 07651 /*!< 07652 type: uint8_t \n 07653 default: 0x00 \n 07654 info: \n 07655 - msb = 7 07656 - lsb = 0 07657 - i2c_size = 1 07658 groups: \n 07659 ['prev_shadow_system_results', 'results'] 07660 fields: \n 07661 - [7:0] = prev_shadow_result__stream_count 07662 */ 07663 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x0ED4 07664 /*!< 07665 type: uint16_t \n 07666 default: 0x0000 \n 07667 info: \n 07668 - msb = 15 07669 - lsb = 0 07670 - i2c_size = 2 07671 groups: \n 07672 ['prev_shadow_system_results', 'results'] 07673 fields: \n 07674 - [15:0] = prev_shadow_result__dss_actual_effective_spads_sd0 (fixed point 8.8) 07675 */ 07676 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0ED4 07677 /*!< 07678 info: \n 07679 - msb = 0 07680 - lsb = 0 07681 - i2c_size = 1 07682 */ 07683 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0ED5 07684 /*!< 07685 info: \n 07686 - msb = 0 07687 - lsb = 0 07688 - i2c_size = 1 07689 */ 07690 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x0ED6 07691 /*!< 07692 type: uint16_t \n 07693 default: 0x0000 \n 07694 info: \n 07695 - msb = 15 07696 - lsb = 0 07697 - i2c_size = 2 07698 groups: \n 07699 ['prev_shadow_system_results', 'results'] 07700 fields: \n 07701 - [15:0] = prev_shadow_result__peak_signal_count_rate_mcps_sd0 (fixed point 9.7) 07702 */ 07703 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0ED6 07704 /*!< 07705 info: \n 07706 - msb = 0 07707 - lsb = 0 07708 - i2c_size = 1 07709 */ 07710 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0ED7 07711 /*!< 07712 info: \n 07713 - msb = 0 07714 - lsb = 0 07715 - i2c_size = 1 07716 */ 07717 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0ED8 07718 /*!< 07719 type: uint16_t \n 07720 default: 0x0000 \n 07721 info: \n 07722 - msb = 15 07723 - lsb = 0 07724 - i2c_size = 2 07725 groups: \n 07726 ['prev_shadow_system_results', 'results'] 07727 fields: \n 07728 - [15:0] = prev_shadow_result__ambient_count_rate_mcps_sd0 (fixed point 9.7) 07729 */ 07730 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0ED8 07731 /*!< 07732 info: \n 07733 - msb = 0 07734 - lsb = 0 07735 - i2c_size = 1 07736 */ 07737 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0ED9 07738 /*!< 07739 info: \n 07740 - msb = 0 07741 - lsb = 0 07742 - i2c_size = 1 07743 */ 07744 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD0 0x0EDA 07745 /*!< 07746 type: uint16_t \n 07747 default: 0x0000 \n 07748 info: \n 07749 - msb = 15 07750 - lsb = 0 07751 - i2c_size = 2 07752 groups: \n 07753 ['prev_shadow_system_results', 'results'] 07754 fields: \n 07755 - [15:0] = prev_shadow_result__sigma_sd0 (fixed point 14.2) 07756 */ 07757 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD0_HI 0x0EDA 07758 /*!< 07759 info: \n 07760 - msb = 0 07761 - lsb = 0 07762 - i2c_size = 1 07763 */ 07764 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD0_LO 0x0EDB 07765 /*!< 07766 info: \n 07767 - msb = 0 07768 - lsb = 0 07769 - i2c_size = 1 07770 */ 07771 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD0 0x0EDC 07772 /*!< 07773 type: uint16_t \n 07774 default: 0x0000 \n 07775 info: \n 07776 - msb = 15 07777 - lsb = 0 07778 - i2c_size = 2 07779 groups: \n 07780 ['prev_shadow_system_results', 'results'] 07781 fields: \n 07782 - [15:0] = prev_shadow_result__phase_sd0 (fixed point 5.11) 07783 */ 07784 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD0_HI 0x0EDC 07785 /*!< 07786 info: \n 07787 - msb = 0 07788 - lsb = 0 07789 - i2c_size = 1 07790 */ 07791 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD0_LO 0x0EDD 07792 /*!< 07793 info: \n 07794 - msb = 0 07795 - lsb = 0 07796 - i2c_size = 1 07797 */ 07798 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0EDE 07799 /*!< 07800 type: uint16_t \n 07801 default: 0x0000 \n 07802 info: \n 07803 - msb = 15 07804 - lsb = 0 07805 - i2c_size = 2 07806 groups: \n 07807 ['prev_shadow_system_results', 'results'] 07808 fields: \n 07809 - [15:0] = prev_shadow_result__final_crosstalk_corrected_range_mm_sd0 07810 */ 07811 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0EDE 07812 /*!< 07813 info: \n 07814 - msb = 0 07815 - lsb = 0 07816 - i2c_size = 1 07817 */ 07818 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0EDF 07819 /*!< 07820 info: \n 07821 - msb = 0 07822 - lsb = 0 07823 - i2c_size = 1 07824 */ 07825 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0EE0 07826 /*!< 07827 type: uint16_t \n 07828 default: 0x0000 \n 07829 info: \n 07830 - msb = 15 07831 - lsb = 0 07832 - i2c_size = 2 07833 groups: \n 07834 ['prev_shadow_system_results', 'results'] 07835 fields: \n 07836 - [15:0] = prev_shadow_result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0 (fixed point 9.7) 07837 */ 07838 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0EE0 07839 /*!< 07840 info: \n 07841 - msb = 0 07842 - lsb = 0 07843 - i2c_size = 1 07844 */ 07845 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0EE1 07846 /*!< 07847 info: \n 07848 - msb = 0 07849 - lsb = 0 07850 - i2c_size = 1 07851 */ 07852 #define VL53L1_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0EE2 07853 /*!< 07854 type: uint16_t \n 07855 default: 0x0000 \n 07856 info: \n 07857 - msb = 15 07858 - lsb = 0 07859 - i2c_size = 2 07860 groups: \n 07861 ['prev_shadow_system_results', 'results'] 07862 fields: \n 07863 - [15:0] = prev_shadow_result__mm_inner_actual_effective_spads_sd0 (fixed point 8.8) 07864 */ 07865 #define VL53L1_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0EE2 07866 /*!< 07867 info: \n 07868 - msb = 0 07869 - lsb = 0 07870 - i2c_size = 1 07871 */ 07872 #define VL53L1_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0EE3 07873 /*!< 07874 info: \n 07875 - msb = 0 07876 - lsb = 0 07877 - i2c_size = 1 07878 */ 07879 #define VL53L1_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0EE4 07880 /*!< 07881 type: uint16_t \n 07882 default: 0x0000 \n 07883 info: \n 07884 - msb = 15 07885 - lsb = 0 07886 - i2c_size = 2 07887 groups: \n 07888 ['prev_shadow_system_results', 'results'] 07889 fields: \n 07890 - [15:0] = prev_shadow_result__mm_outer_actual_effective_spads_sd0 (fixed point 8.8) 07891 */ 07892 #define VL53L1_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0EE4 07893 /*!< 07894 info: \n 07895 - msb = 0 07896 - lsb = 0 07897 - i2c_size = 1 07898 */ 07899 #define VL53L1_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0EE5 07900 /*!< 07901 info: \n 07902 - msb = 0 07903 - lsb = 0 07904 - i2c_size = 1 07905 */ 07906 #define VL53L1_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x0EE6 07907 /*!< 07908 type: uint16_t \n 07909 default: 0x0000 \n 07910 info: \n 07911 - msb = 15 07912 - lsb = 0 07913 - i2c_size = 2 07914 groups: \n 07915 ['prev_shadow_system_results', 'results'] 07916 fields: \n 07917 - [15:0] = prev_shadow_result__avg_signal_count_rate_mcps_sd0 (fixed point 9.7) 07918 */ 07919 #define VL53L1_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0EE6 07920 /*!< 07921 info: \n 07922 - msb = 0 07923 - lsb = 0 07924 - i2c_size = 1 07925 */ 07926 #define VL53L1_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0EE7 07927 /*!< 07928 info: \n 07929 - msb = 0 07930 - lsb = 0 07931 - i2c_size = 1 07932 */ 07933 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x0EE8 07934 /*!< 07935 type: uint16_t \n 07936 default: 0x0000 \n 07937 info: \n 07938 - msb = 15 07939 - lsb = 0 07940 - i2c_size = 2 07941 groups: \n 07942 ['prev_shadow_system_results', 'results'] 07943 fields: \n 07944 - [15:0] = prev_shadow_result__dss_actual_effective_spads_sd1 (fixed point 8.8) 07945 */ 07946 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x0EE8 07947 /*!< 07948 info: \n 07949 - msb = 0 07950 - lsb = 0 07951 - i2c_size = 1 07952 */ 07953 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x0EE9 07954 /*!< 07955 info: \n 07956 - msb = 0 07957 - lsb = 0 07958 - i2c_size = 1 07959 */ 07960 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x0EEA 07961 /*!< 07962 type: uint16_t \n 07963 default: 0x0000 \n 07964 info: \n 07965 - msb = 15 07966 - lsb = 0 07967 - i2c_size = 2 07968 groups: \n 07969 ['prev_shadow_system_results', 'results'] 07970 fields: \n 07971 - [15:0] = prev_shadow_result__peak_signal_count_rate_mcps_sd1 (fixed point 9.7) 07972 */ 07973 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x0EEA 07974 /*!< 07975 info: \n 07976 - msb = 0 07977 - lsb = 0 07978 - i2c_size = 1 07979 */ 07980 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x0EEB 07981 /*!< 07982 info: \n 07983 - msb = 0 07984 - lsb = 0 07985 - i2c_size = 1 07986 */ 07987 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x0EEC 07988 /*!< 07989 type: uint16_t \n 07990 default: 0x0000 \n 07991 info: \n 07992 - msb = 15 07993 - lsb = 0 07994 - i2c_size = 2 07995 groups: \n 07996 ['prev_shadow_system_results', 'results'] 07997 fields: \n 07998 - [15:0] = prev_shadow_result__ambient_count_rate_mcps_sd1 (fixed point 9.7) 07999 */ 08000 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x0EEC 08001 /*!< 08002 info: \n 08003 - msb = 0 08004 - lsb = 0 08005 - i2c_size = 1 08006 */ 08007 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x0EED 08008 /*!< 08009 info: \n 08010 - msb = 0 08011 - lsb = 0 08012 - i2c_size = 1 08013 */ 08014 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD1 0x0EEE 08015 /*!< 08016 type: uint16_t \n 08017 default: 0x0000 \n 08018 info: \n 08019 - msb = 15 08020 - lsb = 0 08021 - i2c_size = 2 08022 groups: \n 08023 ['prev_shadow_system_results', 'results'] 08024 fields: \n 08025 - [15:0] = prev_shadow_result__sigma_sd1 (fixed point 14.2) 08026 */ 08027 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD1_HI 0x0EEE 08028 /*!< 08029 info: \n 08030 - msb = 0 08031 - lsb = 0 08032 - i2c_size = 1 08033 */ 08034 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD1_LO 0x0EEF 08035 /*!< 08036 info: \n 08037 - msb = 0 08038 - lsb = 0 08039 - i2c_size = 1 08040 */ 08041 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD1 0x0EF0 08042 /*!< 08043 type: uint16_t \n 08044 default: 0x0000 \n 08045 info: \n 08046 - msb = 15 08047 - lsb = 0 08048 - i2c_size = 2 08049 groups: \n 08050 ['prev_shadow_system_results', 'results'] 08051 fields: \n 08052 - [15:0] = prev_shadow_result__phase_sd1 (fixed point 5.11) 08053 */ 08054 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD1_HI 0x0EF0 08055 /*!< 08056 info: \n 08057 - msb = 0 08058 - lsb = 0 08059 - i2c_size = 1 08060 */ 08061 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD1_LO 0x0EF1 08062 /*!< 08063 info: \n 08064 - msb = 0 08065 - lsb = 0 08066 - i2c_size = 1 08067 */ 08068 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x0EF2 08069 /*!< 08070 type: uint16_t \n 08071 default: 0x0000 \n 08072 info: \n 08073 - msb = 15 08074 - lsb = 0 08075 - i2c_size = 2 08076 groups: \n 08077 ['prev_shadow_system_results', 'results'] 08078 fields: \n 08079 - [15:0] = prev_shadow_result__final_crosstalk_corrected_range_mm_sd1 08080 */ 08081 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x0EF2 08082 /*!< 08083 info: \n 08084 - msb = 0 08085 - lsb = 0 08086 - i2c_size = 1 08087 */ 08088 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x0EF3 08089 /*!< 08090 info: \n 08091 - msb = 0 08092 - lsb = 0 08093 - i2c_size = 1 08094 */ 08095 #define VL53L1_PREV_SHADOW_RESULT__SPARE_0_SD1 0x0EF4 08096 /*!< 08097 type: uint16_t \n 08098 default: 0x0000 \n 08099 info: \n 08100 - msb = 15 08101 - lsb = 0 08102 - i2c_size = 2 08103 groups: \n 08104 ['prev_shadow_system_results', 'results'] 08105 fields: \n 08106 - [15:0] = prev_shadow_result__spare_0_sd1 08107 */ 08108 #define VL53L1_PREV_SHADOW_RESULT__SPARE_0_SD1_HI 0x0EF4 08109 /*!< 08110 info: \n 08111 - msb = 0 08112 - lsb = 0 08113 - i2c_size = 1 08114 */ 08115 #define VL53L1_PREV_SHADOW_RESULT__SPARE_0_SD1_LO 0x0EF5 08116 /*!< 08117 info: \n 08118 - msb = 0 08119 - lsb = 0 08120 - i2c_size = 1 08121 */ 08122 #define VL53L1_PREV_SHADOW_RESULT__SPARE_1_SD1 0x0EF6 08123 /*!< 08124 type: uint16_t \n 08125 default: 0x0000 \n 08126 info: \n 08127 - msb = 15 08128 - lsb = 0 08129 - i2c_size = 2 08130 groups: \n 08131 ['prev_shadow_system_results', 'results'] 08132 fields: \n 08133 - [15:0] = prev_shadow_result__spare_1_sd1 08134 */ 08135 #define VL53L1_PREV_SHADOW_RESULT__SPARE_1_SD1_HI 0x0EF6 08136 /*!< 08137 info: \n 08138 - msb = 0 08139 - lsb = 0 08140 - i2c_size = 1 08141 */ 08142 #define VL53L1_PREV_SHADOW_RESULT__SPARE_1_SD1_LO 0x0EF7 08143 /*!< 08144 info: \n 08145 - msb = 0 08146 - lsb = 0 08147 - i2c_size = 1 08148 */ 08149 #define VL53L1_PREV_SHADOW_RESULT__SPARE_2_SD1 0x0EF8 08150 /*!< 08151 type: uint16_t \n 08152 default: 0x0000 \n 08153 info: \n 08154 - msb = 15 08155 - lsb = 0 08156 - i2c_size = 2 08157 groups: \n 08158 ['prev_shadow_system_results', 'results'] 08159 fields: \n 08160 - [15:0] = prev_shadow_result__spare_2_sd1 08161 */ 08162 #define VL53L1_PREV_SHADOW_RESULT__SPARE_2_SD1_HI 0x0EF8 08163 /*!< 08164 info: \n 08165 - msb = 0 08166 - lsb = 0 08167 - i2c_size = 1 08168 */ 08169 #define VL53L1_PREV_SHADOW_RESULT__SPARE_2_SD1_LO 0x0EF9 08170 /*!< 08171 info: \n 08172 - msb = 0 08173 - lsb = 0 08174 - i2c_size = 1 08175 */ 08176 #define VL53L1_PREV_SHADOW_RESULT__SPARE_3_SD1 0x0EFA 08177 /*!< 08178 type: uint16_t \n 08179 default: 0x0000 \n 08180 info: \n 08181 - msb = 15 08182 - lsb = 0 08183 - i2c_size = 2 08184 groups: \n 08185 ['prev_shadow_system_results', 'results'] 08186 fields: \n 08187 - [15:0] = prev_shadow_result__spare_3_sd1 08188 */ 08189 #define VL53L1_PREV_SHADOW_RESULT__SPARE_3_SD1_HI 0x0EFA 08190 /*!< 08191 info: \n 08192 - msb = 0 08193 - lsb = 0 08194 - i2c_size = 1 08195 */ 08196 #define VL53L1_PREV_SHADOW_RESULT__SPARE_3_SD1_LO 0x0EFB 08197 /*!< 08198 info: \n 08199 - msb = 0 08200 - lsb = 0 08201 - i2c_size = 1 08202 */ 08203 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x0EFC 08204 /*!< 08205 type: uint32_t \n 08206 default: 0x00000000 \n 08207 info: \n 08208 - msb = 31 08209 - lsb = 0 08210 - i2c_size = 4 08211 groups: \n 08212 ['prev_shadow_core_results', 'ranging_core_results'] 08213 fields: \n 08214 - [31:0] = prev_shadow_result_core__ambient_window_events_sd0 08215 */ 08216 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x0EFC 08217 /*!< 08218 info: \n 08219 - msb = 0 08220 - lsb = 0 08221 - i2c_size = 1 08222 */ 08223 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x0EFD 08224 /*!< 08225 info: \n 08226 - msb = 0 08227 - lsb = 0 08228 - i2c_size = 1 08229 */ 08230 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x0EFE 08231 /*!< 08232 info: \n 08233 - msb = 0 08234 - lsb = 0 08235 - i2c_size = 1 08236 */ 08237 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x0EFF 08238 /*!< 08239 info: \n 08240 - msb = 0 08241 - lsb = 0 08242 - i2c_size = 1 08243 */ 08244 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x0F00 08245 /*!< 08246 type: uint32_t \n 08247 default: 0x00000000 \n 08248 info: \n 08249 - msb = 31 08250 - lsb = 0 08251 - i2c_size = 4 08252 groups: \n 08253 ['prev_shadow_core_results', 'ranging_core_results'] 08254 fields: \n 08255 - [31:0] = prev_shadow_result_core__ranging_total_events_sd0 08256 */ 08257 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x0F00 08258 /*!< 08259 info: \n 08260 - msb = 0 08261 - lsb = 0 08262 - i2c_size = 1 08263 */ 08264 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x0F01 08265 /*!< 08266 info: \n 08267 - msb = 0 08268 - lsb = 0 08269 - i2c_size = 1 08270 */ 08271 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x0F02 08272 /*!< 08273 info: \n 08274 - msb = 0 08275 - lsb = 0 08276 - i2c_size = 1 08277 */ 08278 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x0F03 08279 /*!< 08280 info: \n 08281 - msb = 0 08282 - lsb = 0 08283 - i2c_size = 1 08284 */ 08285 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x0F04 08286 /*!< 08287 type: int32_t \n 08288 default: 0x00000000 \n 08289 info: \n 08290 - msb = 31 08291 - lsb = 0 08292 - i2c_size = 4 08293 groups: \n 08294 ['prev_shadow_core_results', 'ranging_core_results'] 08295 fields: \n 08296 - [31:0] = prev_shadow_result_core__signal_total_events_sd0 08297 */ 08298 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x0F04 08299 /*!< 08300 info: \n 08301 - msb = 0 08302 - lsb = 0 08303 - i2c_size = 1 08304 */ 08305 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x0F05 08306 /*!< 08307 info: \n 08308 - msb = 0 08309 - lsb = 0 08310 - i2c_size = 1 08311 */ 08312 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x0F06 08313 /*!< 08314 info: \n 08315 - msb = 0 08316 - lsb = 0 08317 - i2c_size = 1 08318 */ 08319 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x0F07 08320 /*!< 08321 info: \n 08322 - msb = 0 08323 - lsb = 0 08324 - i2c_size = 1 08325 */ 08326 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x0F08 08327 /*!< 08328 type: uint32_t \n 08329 default: 0x00000000 \n 08330 info: \n 08331 - msb = 31 08332 - lsb = 0 08333 - i2c_size = 4 08334 groups: \n 08335 ['prev_shadow_core_results', 'ranging_core_results'] 08336 fields: \n 08337 - [31:0] = prev_shadow_result_core__total_periods_elapsed_sd0 08338 */ 08339 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x0F08 08340 /*!< 08341 info: \n 08342 - msb = 0 08343 - lsb = 0 08344 - i2c_size = 1 08345 */ 08346 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x0F09 08347 /*!< 08348 info: \n 08349 - msb = 0 08350 - lsb = 0 08351 - i2c_size = 1 08352 */ 08353 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x0F0A 08354 /*!< 08355 info: \n 08356 - msb = 0 08357 - lsb = 0 08358 - i2c_size = 1 08359 */ 08360 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x0F0B 08361 /*!< 08362 info: \n 08363 - msb = 0 08364 - lsb = 0 08365 - i2c_size = 1 08366 */ 08367 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x0F0C 08368 /*!< 08369 type: uint32_t \n 08370 default: 0x00000000 \n 08371 info: \n 08372 - msb = 31 08373 - lsb = 0 08374 - i2c_size = 4 08375 groups: \n 08376 ['prev_shadow_core_results', 'ranging_core_results'] 08377 fields: \n 08378 - [31:0] = prev_shadow_result_core__ambient_window_events_sd1 08379 */ 08380 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x0F0C 08381 /*!< 08382 info: \n 08383 - msb = 0 08384 - lsb = 0 08385 - i2c_size = 1 08386 */ 08387 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x0F0D 08388 /*!< 08389 info: \n 08390 - msb = 0 08391 - lsb = 0 08392 - i2c_size = 1 08393 */ 08394 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x0F0E 08395 /*!< 08396 info: \n 08397 - msb = 0 08398 - lsb = 0 08399 - i2c_size = 1 08400 */ 08401 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x0F0F 08402 /*!< 08403 info: \n 08404 - msb = 0 08405 - lsb = 0 08406 - i2c_size = 1 08407 */ 08408 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x0F10 08409 /*!< 08410 type: uint32_t \n 08411 default: 0x00000000 \n 08412 info: \n 08413 - msb = 31 08414 - lsb = 0 08415 - i2c_size = 4 08416 groups: \n 08417 ['prev_shadow_core_results', 'ranging_core_results'] 08418 fields: \n 08419 - [31:0] = prev_shadow_result_core__ranging_total_events_sd1 08420 */ 08421 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x0F10 08422 /*!< 08423 info: \n 08424 - msb = 0 08425 - lsb = 0 08426 - i2c_size = 1 08427 */ 08428 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x0F11 08429 /*!< 08430 info: \n 08431 - msb = 0 08432 - lsb = 0 08433 - i2c_size = 1 08434 */ 08435 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x0F12 08436 /*!< 08437 info: \n 08438 - msb = 0 08439 - lsb = 0 08440 - i2c_size = 1 08441 */ 08442 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x0F13 08443 /*!< 08444 info: \n 08445 - msb = 0 08446 - lsb = 0 08447 - i2c_size = 1 08448 */ 08449 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x0F14 08450 /*!< 08451 type: int32_t \n 08452 default: 0x00000000 \n 08453 info: \n 08454 - msb = 31 08455 - lsb = 0 08456 - i2c_size = 4 08457 groups: \n 08458 ['prev_shadow_core_results', 'ranging_core_results'] 08459 fields: \n 08460 - [31:0] = prev_shadow_result_core__signal_total_events_sd1 08461 */ 08462 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x0F14 08463 /*!< 08464 info: \n 08465 - msb = 0 08466 - lsb = 0 08467 - i2c_size = 1 08468 */ 08469 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x0F15 08470 /*!< 08471 info: \n 08472 - msb = 0 08473 - lsb = 0 08474 - i2c_size = 1 08475 */ 08476 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x0F16 08477 /*!< 08478 info: \n 08479 - msb = 0 08480 - lsb = 0 08481 - i2c_size = 1 08482 */ 08483 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x0F17 08484 /*!< 08485 info: \n 08486 - msb = 0 08487 - lsb = 0 08488 - i2c_size = 1 08489 */ 08490 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x0F18 08491 /*!< 08492 type: uint32_t \n 08493 default: 0x00000000 \n 08494 info: \n 08495 - msb = 31 08496 - lsb = 0 08497 - i2c_size = 4 08498 groups: \n 08499 ['prev_shadow_core_results', 'ranging_core_results'] 08500 fields: \n 08501 - [31:0] = prev_shadow_result_core__total_periods_elapsed_sd1 08502 */ 08503 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x0F18 08504 /*!< 08505 info: \n 08506 - msb = 0 08507 - lsb = 0 08508 - i2c_size = 1 08509 */ 08510 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x0F19 08511 /*!< 08512 info: \n 08513 - msb = 0 08514 - lsb = 0 08515 - i2c_size = 1 08516 */ 08517 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x0F1A 08518 /*!< 08519 info: \n 08520 - msb = 0 08521 - lsb = 0 08522 - i2c_size = 1 08523 */ 08524 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x0F1B 08525 /*!< 08526 info: \n 08527 - msb = 0 08528 - lsb = 0 08529 - i2c_size = 1 08530 */ 08531 #define VL53L1_PREV_SHADOW_RESULT_CORE__SPARE_0 0x0F1C 08532 /*!< 08533 type: uint8_t \n 08534 default: 0x00 \n 08535 info: \n 08536 - msb = 7 08537 - lsb = 0 08538 - i2c_size = 1 08539 groups: \n 08540 ['prev_shadow_core_results', 'ranging_core_results'] 08541 fields: \n 08542 - [7:0] = prev_shadow_result_core__spare_0 08543 */ 08544 #define VL53L1_RESULT__DEBUG_STATUS 0x0F20 08545 /*!< 08546 type: uint8_t \n 08547 default: 0x00 \n 08548 info: \n 08549 - msb = 7 08550 - lsb = 0 08551 - i2c_size = 1 08552 groups: \n 08553 ['patch_debug', 'misc_results'] 08554 fields: \n 08555 - [7:0] = result_debug_status 08556 */ 08557 #define VL53L1_RESULT__DEBUG_STAGE 0x0F21 08558 /*!< 08559 type: uint8_t \n 08560 default: 0x00 \n 08561 info: \n 08562 - msb = 7 08563 - lsb = 0 08564 - i2c_size = 1 08565 groups: \n 08566 ['patch_debug', 'misc_results'] 08567 fields: \n 08568 - [7:0] = result_debug_stage 08569 */ 08570 #define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH 0x0F24 08571 /*!< 08572 type: uint16_t \n 08573 default: 0x0000 \n 08574 info: \n 08575 - msb = 15 08576 - lsb = 0 08577 - i2c_size = 2 08578 groups: \n 08579 ['gph_general_config', 'dss_config'] 08580 fields: \n 08581 - [15:0] = gph__system_thresh_rate_high (fixed point 9.7) 08582 */ 08583 #define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH_HI 0x0F24 08584 /*!< 08585 info: \n 08586 - msb = 0 08587 - lsb = 0 08588 - i2c_size = 1 08589 */ 08590 #define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH_LO 0x0F25 08591 /*!< 08592 info: \n 08593 - msb = 0 08594 - lsb = 0 08595 - i2c_size = 1 08596 */ 08597 #define VL53L1_GPH__SYSTEM__THRESH_RATE_LOW 0x0F26 08598 /*!< 08599 type: uint16_t \n 08600 default: 0x0000 \n 08601 info: \n 08602 - msb = 15 08603 - lsb = 0 08604 - i2c_size = 2 08605 groups: \n 08606 ['gph_general_config', 'dss_config'] 08607 fields: \n 08608 - [15:0] = gph__system_thresh_rate_low (fixed point 9.7) 08609 */ 08610 #define VL53L1_GPH__SYSTEM__THRESH_RATE_LOW_HI 0x0F26 08611 /*!< 08612 info: \n 08613 - msb = 0 08614 - lsb = 0 08615 - i2c_size = 1 08616 */ 08617 #define VL53L1_GPH__SYSTEM__THRESH_RATE_LOW_LO 0x0F27 08618 /*!< 08619 info: \n 08620 - msb = 0 08621 - lsb = 0 08622 - i2c_size = 1 08623 */ 08624 #define VL53L1_GPH__SYSTEM__INTERRUPT_CONFIG_GPIO 0x0F28 08625 /*!< 08626 type: uint8_t \n 08627 default: 0x00 \n 08628 info: \n 08629 - msb = 7 08630 - lsb = 0 08631 - i2c_size = 1 08632 groups: \n 08633 ['gph_general_config', 'gph_config'] 08634 fields: \n 08635 - [1:0] = gph__int_mode_distance 08636 - [3:2] = gph__int_mode_rate 08637 - [4] = gph__int_spare 08638 - [5] = gph__int_new_measure_ready 08639 - [6] = gph__int_no_target_en 08640 - [7] = gph__int_combined_mode 08641 */ 08642 #define VL53L1_GPH__DSS_CONFIG__ROI_MODE_CONTROL 0x0F2F 08643 /*!< 08644 type: uint8_t \n 08645 default: 0x01 \n 08646 info: \n 08647 - msb = 2 08648 - lsb = 0 08649 - i2c_size = 1 08650 groups: \n 08651 ['gph_static_config', 'dss_config'] 08652 fields: \n 08653 - [1:0] = gph__dss_config__input_mode 08654 - [2] = gph__calculate_roi_enable 08655 */ 08656 #define VL53L1_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT 0x0F30 08657 /*!< 08658 type: uint16_t \n 08659 default: 0x0000 \n 08660 info: \n 08661 - msb = 15 08662 - lsb = 0 08663 - i2c_size = 2 08664 groups: \n 08665 ['gph_static_config', 'dss_config'] 08666 fields: \n 08667 - [15:0] = gph__dss_config__manual_effective_spads_select 08668 */ 08669 #define VL53L1_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_HI 0x0F30 08670 /*!< 08671 info: \n 08672 - msb = 0 08673 - lsb = 0 08674 - i2c_size = 1 08675 */ 08676 #define VL53L1_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_LO 0x0F31 08677 /*!< 08678 info: \n 08679 - msb = 0 08680 - lsb = 0 08681 - i2c_size = 1 08682 */ 08683 #define VL53L1_GPH__DSS_CONFIG__MANUAL_BLOCK_SELECT 0x0F32 08684 /*!< 08685 type: uint8_t \n 08686 default: 0x00 \n 08687 info: \n 08688 - msb = 7 08689 - lsb = 0 08690 - i2c_size = 1 08691 groups: \n 08692 ['gph_static_config', 'dss_config'] 08693 fields: \n 08694 - [7:0] = gph__dss_config__manual_block_select 08695 */ 08696 #define VL53L1_GPH__DSS_CONFIG__MAX_SPADS_LIMIT 0x0F33 08697 /*!< 08698 type: uint8_t \n 08699 default: 0xFF \n 08700 info: \n 08701 - msb = 7 08702 - lsb = 0 08703 - i2c_size = 1 08704 groups: \n 08705 ['gph_static_config', 'dss_config'] 08706 fields: \n 08707 - [7:0] = gph__dss_config__max_spads_limit 08708 */ 08709 #define VL53L1_GPH__DSS_CONFIG__MIN_SPADS_LIMIT 0x0F34 08710 /*!< 08711 type: uint8_t \n 08712 default: 0x01 \n 08713 info: \n 08714 - msb = 7 08715 - lsb = 0 08716 - i2c_size = 1 08717 groups: \n 08718 ['gph_static_config', 'dss_config'] 08719 fields: \n 08720 - [7:0] = gph__dss_config__min_spads_limit 08721 */ 08722 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_A_HI 0x0F36 08723 /*!< 08724 type: uint8_t \n 08725 default: 0x00 \n 08726 info: \n 08727 - msb = 3 08728 - lsb = 0 08729 - i2c_size = 1 08730 groups: \n 08731 ['gph_timing_config', 'mm_config'] 08732 fields: \n 08733 - [3:0] = gph_mm_config__config_timeout_macrop_a_hi 08734 */ 08735 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_A_LO 0x0F37 08736 /*!< 08737 type: uint8_t \n 08738 default: 0x06 \n 08739 info: \n 08740 - msb = 7 08741 - lsb = 0 08742 - i2c_size = 1 08743 groups: \n 08744 ['gph_timing_config', 'mm_config'] 08745 fields: \n 08746 - [7:0] = gph_mm_config__config_timeout_macrop_a_lo 08747 */ 08748 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_B_HI 0x0F38 08749 /*!< 08750 type: uint8_t \n 08751 default: 0x00 \n 08752 info: \n 08753 - msb = 3 08754 - lsb = 0 08755 - i2c_size = 1 08756 groups: \n 08757 ['gph_timing_config', 'mm_config'] 08758 fields: \n 08759 - [3:0] = gph_mm_config__config_timeout_macrop_b_hi 08760 */ 08761 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_B_LO 0x0F39 08762 /*!< 08763 type: uint8_t \n 08764 default: 0x06 \n 08765 info: \n 08766 - msb = 7 08767 - lsb = 0 08768 - i2c_size = 1 08769 groups: \n 08770 ['gph_timing_config', 'mm_config'] 08771 fields: \n 08772 - [7:0] = gph_mm_config__config_timeout_macrop_b_lo 08773 */ 08774 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_A_HI 0x0F3A 08775 /*!< 08776 type: uint8_t \n 08777 default: 0x01 \n 08778 info: \n 08779 - msb = 3 08780 - lsb = 0 08781 - i2c_size = 1 08782 groups: \n 08783 ['gph_timing_config', 'range_config'] 08784 fields: \n 08785 - [3:0] = gph_range_timeout_overall_periods_macrop_a_hi 08786 */ 08787 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_A_LO 0x0F3B 08788 /*!< 08789 type: uint8_t \n 08790 default: 0x92 \n 08791 info: \n 08792 - msb = 7 08793 - lsb = 0 08794 - i2c_size = 1 08795 groups: \n 08796 ['gph_timing_config', 'range_config'] 08797 fields: \n 08798 - [7:0] = gph_range_timeout_overall_periods_macrop_a_lo 08799 */ 08800 #define VL53L1_GPH__RANGE_CONFIG__VCSEL_PERIOD_A 0x0F3C 08801 /*!< 08802 type: uint8_t \n 08803 default: 0x0B \n 08804 info: \n 08805 - msb = 5 08806 - lsb = 0 08807 - i2c_size = 1 08808 groups: \n 08809 ['gph_timing_config', 'range_config'] 08810 fields: \n 08811 - [5:0] = gph_range_config__vcsel_period_a 08812 */ 08813 #define VL53L1_GPH__RANGE_CONFIG__VCSEL_PERIOD_B 0x0F3D 08814 /*!< 08815 type: uint8_t \n 08816 default: 0x09 \n 08817 info: \n 08818 - msb = 5 08819 - lsb = 0 08820 - i2c_size = 1 08821 groups: \n 08822 ['gph_timing_config', 'range_config'] 08823 fields: \n 08824 - [5:0] = gph_range_config__vcsel_period_b 08825 */ 08826 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_B_HI 0x0F3E 08827 /*!< 08828 type: uint8_t \n 08829 default: 0x01 \n 08830 info: \n 08831 - msb = 3 08832 - lsb = 0 08833 - i2c_size = 1 08834 groups: \n 08835 ['gph_timing_config', 'range_config'] 08836 fields: \n 08837 - [3:0] = gph_range_timeout_overall_periods_macrop_b_hi 08838 */ 08839 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_B_LO 0x0F3F 08840 /*!< 08841 type: uint8_t \n 08842 default: 0x92 \n 08843 info: \n 08844 - msb = 7 08845 - lsb = 0 08846 - i2c_size = 1 08847 groups: \n 08848 ['gph_timing_config', 'range_config'] 08849 fields: \n 08850 - [7:0] = gph_range_timeout_overall_periods_macrop_b_lo 08851 */ 08852 #define VL53L1_GPH__RANGE_CONFIG__SIGMA_THRESH 0x0F40 08853 /*!< 08854 type: uint16_t \n 08855 default: 0x0080 \n 08856 info: \n 08857 - msb = 15 08858 - lsb = 0 08859 - i2c_size = 2 08860 groups: \n 08861 ['gph_timing_config', 'range_config'] 08862 fields: \n 08863 - [15:0] = gph_range_config__sigma_thresh (fixed point 14.2) 08864 */ 08865 #define VL53L1_GPH__RANGE_CONFIG__SIGMA_THRESH_HI 0x0F40 08866 /*!< 08867 info: \n 08868 - msb = 0 08869 - lsb = 0 08870 - i2c_size = 1 08871 */ 08872 #define VL53L1_GPH__RANGE_CONFIG__SIGMA_THRESH_LO 0x0F41 08873 /*!< 08874 info: \n 08875 - msb = 0 08876 - lsb = 0 08877 - i2c_size = 1 08878 */ 08879 #define VL53L1_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS 0x0F42 08880 /*!< 08881 type: uint16_t \n 08882 default: 0x0000 \n 08883 info: \n 08884 - msb = 15 08885 - lsb = 0 08886 - i2c_size = 2 08887 groups: \n 08888 ['gph_timing_config', 'range_config'] 08889 fields: \n 08890 - [15:0] = gph_range_config__min_count_rate_rtn_limit_mcps (fixed point 9.7) 08891 */ 08892 #define VL53L1_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_HI 0x0F42 08893 /*!< 08894 info: \n 08895 - msb = 0 08896 - lsb = 0 08897 - i2c_size = 1 08898 */ 08899 #define VL53L1_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_LO 0x0F43 08900 /*!< 08901 info: \n 08902 - msb = 0 08903 - lsb = 0 08904 - i2c_size = 1 08905 */ 08906 #define VL53L1_GPH__RANGE_CONFIG__VALID_PHASE_LOW 0x0F44 08907 /*!< 08908 type: uint8_t \n 08909 default: 0x08 \n 08910 info: \n 08911 - msb = 7 08912 - lsb = 0 08913 - i2c_size = 1 08914 groups: \n 08915 ['gph_timing_config', 'range_config'] 08916 fields: \n 08917 - [7:0] = gph_range_config__valid_phase_low (fixed point 5.3) 08918 */ 08919 #define VL53L1_GPH__RANGE_CONFIG__VALID_PHASE_HIGH 0x0F45 08920 /*!< 08921 type: uint8_t \n 08922 default: 0x80 \n 08923 info: \n 08924 - msb = 7 08925 - lsb = 0 08926 - i2c_size = 1 08927 groups: \n 08928 ['gph_timing_config', 'range_config'] 08929 fields: \n 08930 - [7:0] = gph_range_config__valid_phase_high (fixed point 5.3) 08931 */ 08932 #define VL53L1_FIRMWARE__INTERNAL_STREAM_COUNT_DIV 0x0F46 08933 /*!< 08934 type: uint8_t \n 08935 default: 0x00 \n 08936 info: \n 08937 - msb = 7 08938 - lsb = 0 08939 - i2c_size = 1 08940 groups: \n 08941 ['fw_internal'] 08942 fields: \n 08943 - [7:0] = fw__internal_stream_count_div 08944 */ 08945 #define VL53L1_FIRMWARE__INTERNAL_STREAM_COUNTER_VAL 0x0F47 08946 /*!< 08947 type: uint8_t \n 08948 default: 0x00 \n 08949 info: \n 08950 - msb = 7 08951 - lsb = 0 08952 - i2c_size = 1 08953 groups: \n 08954 ['fw_internal'] 08955 fields: \n 08956 - [7:0] = fw__internal_stream_counter_val 08957 */ 08958 #define VL53L1_DSS_CALC__ROI_CTRL 0x0F54 08959 /*!< 08960 type: uint8_t \n 08961 default: 0x00 \n 08962 info: \n 08963 - msb = 1 08964 - lsb = 0 08965 - i2c_size = 1 08966 groups: \n 08967 ['patch_results', 'dss_calc'] 08968 fields: \n 08969 - [0] = dss_calc__roi_intersect_enable 08970 - [1] = dss_calc__roi_subtract_enable 08971 */ 08972 #define VL53L1_DSS_CALC__SPARE_1 0x0F55 08973 /*!< 08974 type: uint8_t \n 08975 default: 0x00 \n 08976 info: \n 08977 - msb = 7 08978 - lsb = 0 08979 - i2c_size = 1 08980 groups: \n 08981 ['patch_results', 'dss_calc'] 08982 fields: \n 08983 - [7:0] = dss_calc__spare_1 08984 */ 08985 #define VL53L1_DSS_CALC__SPARE_2 0x0F56 08986 /*!< 08987 type: uint8_t \n 08988 default: 0x00 \n 08989 info: \n 08990 - msb = 7 08991 - lsb = 0 08992 - i2c_size = 1 08993 groups: \n 08994 ['patch_results', 'dss_calc'] 08995 fields: \n 08996 - [7:0] = dss_calc__spare_2 08997 */ 08998 #define VL53L1_DSS_CALC__SPARE_3 0x0F57 08999 /*!< 09000 type: uint8_t \n 09001 default: 0x00 \n 09002 info: \n 09003 - msb = 7 09004 - lsb = 0 09005 - i2c_size = 1 09006 groups: \n 09007 ['patch_results', 'dss_calc'] 09008 fields: \n 09009 - [7:0] = dss_calc__spare_3 09010 */ 09011 #define VL53L1_DSS_CALC__SPARE_4 0x0F58 09012 /*!< 09013 type: uint8_t \n 09014 default: 0x00 \n 09015 info: \n 09016 - msb = 7 09017 - lsb = 0 09018 - i2c_size = 1 09019 groups: \n 09020 ['patch_results', 'dss_calc'] 09021 fields: \n 09022 - [7:0] = dss_calc__spare_4 09023 */ 09024 #define VL53L1_DSS_CALC__SPARE_5 0x0F59 09025 /*!< 09026 type: uint8_t \n 09027 default: 0x00 \n 09028 info: \n 09029 - msb = 7 09030 - lsb = 0 09031 - i2c_size = 1 09032 groups: \n 09033 ['patch_results', 'dss_calc'] 09034 fields: \n 09035 - [7:0] = dss_calc__spare_5 09036 */ 09037 #define VL53L1_DSS_CALC__SPARE_6 0x0F5A 09038 /*!< 09039 type: uint8_t \n 09040 default: 0x00 \n 09041 info: \n 09042 - msb = 7 09043 - lsb = 0 09044 - i2c_size = 1 09045 groups: \n 09046 ['patch_results', 'dss_calc'] 09047 fields: \n 09048 - [7:0] = dss_calc__spare_6 09049 */ 09050 #define VL53L1_DSS_CALC__SPARE_7 0x0F5B 09051 /*!< 09052 type: uint8_t \n 09053 default: 0x00 \n 09054 info: \n 09055 - msb = 7 09056 - lsb = 0 09057 - i2c_size = 1 09058 groups: \n 09059 ['patch_results', 'dss_calc'] 09060 fields: \n 09061 - [7:0] = dss_calc__spare_7 09062 */ 09063 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_0 0x0F5C 09064 /*!< 09065 type: uint8_t \n 09066 default: 0x00 \n 09067 info: \n 09068 - msb = 7 09069 - lsb = 0 09070 - i2c_size = 1 09071 groups: \n 09072 ['patch_results', 'dss_calc'] 09073 fields: \n 09074 - [7:0] = dss_calc__user_roi_spad_en_0 09075 */ 09076 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_1 0x0F5D 09077 /*!< 09078 type: uint8_t \n 09079 default: 0x00 \n 09080 info: \n 09081 - msb = 7 09082 - lsb = 0 09083 - i2c_size = 1 09084 groups: \n 09085 ['patch_results', 'dss_calc'] 09086 fields: \n 09087 - [7:0] = dss_calc__user_roi_spad_en_1 09088 */ 09089 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_2 0x0F5E 09090 /*!< 09091 type: uint8_t \n 09092 default: 0x00 \n 09093 info: \n 09094 - msb = 7 09095 - lsb = 0 09096 - i2c_size = 1 09097 groups: \n 09098 ['patch_results', 'dss_calc'] 09099 fields: \n 09100 - [7:0] = dss_calc__user_roi_spad_en_2 09101 */ 09102 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_3 0x0F5F 09103 /*!< 09104 type: uint8_t \n 09105 default: 0x00 \n 09106 info: \n 09107 - msb = 7 09108 - lsb = 0 09109 - i2c_size = 1 09110 groups: \n 09111 ['patch_results', 'dss_calc'] 09112 fields: \n 09113 - [7:0] = dss_calc__user_roi_spad_en_3 09114 */ 09115 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_4 0x0F60 09116 /*!< 09117 type: uint8_t \n 09118 default: 0x00 \n 09119 info: \n 09120 - msb = 7 09121 - lsb = 0 09122 - i2c_size = 1 09123 groups: \n 09124 ['patch_results', 'dss_calc'] 09125 fields: \n 09126 - [7:0] = dss_calc__user_roi_spad_en_4 09127 */ 09128 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_5 0x0F61 09129 /*!< 09130 type: uint8_t \n 09131 default: 0x00 \n 09132 info: \n 09133 - msb = 7 09134 - lsb = 0 09135 - i2c_size = 1 09136 groups: \n 09137 ['patch_results', 'dss_calc'] 09138 fields: \n 09139 - [7:0] = dss_calc__user_roi_spad_en_5 09140 */ 09141 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_6 0x0F62 09142 /*!< 09143 type: uint8_t \n 09144 default: 0x00 \n 09145 info: \n 09146 - msb = 7 09147 - lsb = 0 09148 - i2c_size = 1 09149 groups: \n 09150 ['patch_results', 'dss_calc'] 09151 fields: \n 09152 - [7:0] = dss_calc__user_roi_spad_en_6 09153 */ 09154 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_7 0x0F63 09155 /*!< 09156 type: uint8_t \n 09157 default: 0x00 \n 09158 info: \n 09159 - msb = 7 09160 - lsb = 0 09161 - i2c_size = 1 09162 groups: \n 09163 ['patch_results', 'dss_calc'] 09164 fields: \n 09165 - [7:0] = dss_calc__user_roi_spad_en_7 09166 */ 09167 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_8 0x0F64 09168 /*!< 09169 type: uint8_t \n 09170 default: 0x00 \n 09171 info: \n 09172 - msb = 7 09173 - lsb = 0 09174 - i2c_size = 1 09175 groups: \n 09176 ['patch_results', 'dss_calc'] 09177 fields: \n 09178 - [7:0] = dss_calc__user_roi_spad_en_8 09179 */ 09180 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_9 0x0F65 09181 /*!< 09182 type: uint8_t \n 09183 default: 0x00 \n 09184 info: \n 09185 - msb = 7 09186 - lsb = 0 09187 - i2c_size = 1 09188 groups: \n 09189 ['patch_results', 'dss_calc'] 09190 fields: \n 09191 - [7:0] = dss_calc__user_roi_spad_en_9 09192 */ 09193 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_10 0x0F66 09194 /*!< 09195 type: uint8_t \n 09196 default: 0x00 \n 09197 info: \n 09198 - msb = 7 09199 - lsb = 0 09200 - i2c_size = 1 09201 groups: \n 09202 ['patch_results', 'dss_calc'] 09203 fields: \n 09204 - [7:0] = dss_calc__user_roi_spad_en_10 09205 */ 09206 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_11 0x0F67 09207 /*!< 09208 type: uint8_t \n 09209 default: 0x00 \n 09210 info: \n 09211 - msb = 7 09212 - lsb = 0 09213 - i2c_size = 1 09214 groups: \n 09215 ['patch_results', 'dss_calc'] 09216 fields: \n 09217 - [7:0] = dss_calc__user_roi_spad_en_11 09218 */ 09219 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_12 0x0F68 09220 /*!< 09221 type: uint8_t \n 09222 default: 0x00 \n 09223 info: \n 09224 - msb = 7 09225 - lsb = 0 09226 - i2c_size = 1 09227 groups: \n 09228 ['patch_results', 'dss_calc'] 09229 fields: \n 09230 - [7:0] = dss_calc__user_roi_spad_en_12 09231 */ 09232 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_13 0x0F69 09233 /*!< 09234 type: uint8_t \n 09235 default: 0x00 \n 09236 info: \n 09237 - msb = 7 09238 - lsb = 0 09239 - i2c_size = 1 09240 groups: \n 09241 ['patch_results', 'dss_calc'] 09242 fields: \n 09243 - [7:0] = dss_calc__user_roi_spad_en_13 09244 */ 09245 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_14 0x0F6A 09246 /*!< 09247 type: uint8_t \n 09248 default: 0x00 \n 09249 info: \n 09250 - msb = 7 09251 - lsb = 0 09252 - i2c_size = 1 09253 groups: \n 09254 ['patch_results', 'dss_calc'] 09255 fields: \n 09256 - [7:0] = dss_calc__user_roi_spad_en_14 09257 */ 09258 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_15 0x0F6B 09259 /*!< 09260 type: uint8_t \n 09261 default: 0x00 \n 09262 info: \n 09263 - msb = 7 09264 - lsb = 0 09265 - i2c_size = 1 09266 groups: \n 09267 ['patch_results', 'dss_calc'] 09268 fields: \n 09269 - [7:0] = dss_calc__user_roi_spad_en_15 09270 */ 09271 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_16 0x0F6C 09272 /*!< 09273 type: uint8_t \n 09274 default: 0x00 \n 09275 info: \n 09276 - msb = 7 09277 - lsb = 0 09278 - i2c_size = 1 09279 groups: \n 09280 ['patch_results', 'dss_calc'] 09281 fields: \n 09282 - [7:0] = dss_calc__user_roi_spad_en_16 09283 */ 09284 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_17 0x0F6D 09285 /*!< 09286 type: uint8_t \n 09287 default: 0x00 \n 09288 info: \n 09289 - msb = 7 09290 - lsb = 0 09291 - i2c_size = 1 09292 groups: \n 09293 ['patch_results', 'dss_calc'] 09294 fields: \n 09295 - [7:0] = dss_calc__user_roi_spad_en_17 09296 */ 09297 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_18 0x0F6E 09298 /*!< 09299 type: uint8_t \n 09300 default: 0x00 \n 09301 info: \n 09302 - msb = 7 09303 - lsb = 0 09304 - i2c_size = 1 09305 groups: \n 09306 ['patch_results', 'dss_calc'] 09307 fields: \n 09308 - [7:0] = dss_calc__user_roi_spad_en_18 09309 */ 09310 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_19 0x0F6F 09311 /*!< 09312 type: uint8_t \n 09313 default: 0x00 \n 09314 info: \n 09315 - msb = 7 09316 - lsb = 0 09317 - i2c_size = 1 09318 groups: \n 09319 ['patch_results', 'dss_calc'] 09320 fields: \n 09321 - [7:0] = dss_calc__user_roi_spad_en_19 09322 */ 09323 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_20 0x0F70 09324 /*!< 09325 type: uint8_t \n 09326 default: 0x00 \n 09327 info: \n 09328 - msb = 7 09329 - lsb = 0 09330 - i2c_size = 1 09331 groups: \n 09332 ['patch_results', 'dss_calc'] 09333 fields: \n 09334 - [7:0] = dss_calc__user_roi_spad_en_20 09335 */ 09336 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_21 0x0F71 09337 /*!< 09338 type: uint8_t \n 09339 default: 0x00 \n 09340 info: \n 09341 - msb = 7 09342 - lsb = 0 09343 - i2c_size = 1 09344 groups: \n 09345 ['patch_results', 'dss_calc'] 09346 fields: \n 09347 - [7:0] = dss_calc__user_roi_spad_en_21 09348 */ 09349 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_22 0x0F72 09350 /*!< 09351 type: uint8_t \n 09352 default: 0x00 \n 09353 info: \n 09354 - msb = 7 09355 - lsb = 0 09356 - i2c_size = 1 09357 groups: \n 09358 ['patch_results', 'dss_calc'] 09359 fields: \n 09360 - [7:0] = dss_calc__user_roi_spad_en_22 09361 */ 09362 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_23 0x0F73 09363 /*!< 09364 type: uint8_t \n 09365 default: 0x00 \n 09366 info: \n 09367 - msb = 7 09368 - lsb = 0 09369 - i2c_size = 1 09370 groups: \n 09371 ['patch_results', 'dss_calc'] 09372 fields: \n 09373 - [7:0] = dss_calc__user_roi_spad_en_23 09374 */ 09375 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_24 0x0F74 09376 /*!< 09377 type: uint8_t \n 09378 default: 0x00 \n 09379 info: \n 09380 - msb = 7 09381 - lsb = 0 09382 - i2c_size = 1 09383 groups: \n 09384 ['patch_results', 'dss_calc'] 09385 fields: \n 09386 - [7:0] = dss_calc__user_roi_spad_en_24 09387 */ 09388 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_25 0x0F75 09389 /*!< 09390 type: uint8_t \n 09391 default: 0x00 \n 09392 info: \n 09393 - msb = 7 09394 - lsb = 0 09395 - i2c_size = 1 09396 groups: \n 09397 ['patch_results', 'dss_calc'] 09398 fields: \n 09399 - [7:0] = dss_calc__user_roi_spad_en_25 09400 */ 09401 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_26 0x0F76 09402 /*!< 09403 type: uint8_t \n 09404 default: 0x00 \n 09405 info: \n 09406 - msb = 7 09407 - lsb = 0 09408 - i2c_size = 1 09409 groups: \n 09410 ['patch_results', 'dss_calc'] 09411 fields: \n 09412 - [7:0] = dss_calc__user_roi_spad_en_26 09413 */ 09414 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_27 0x0F77 09415 /*!< 09416 type: uint8_t \n 09417 default: 0x00 \n 09418 info: \n 09419 - msb = 7 09420 - lsb = 0 09421 - i2c_size = 1 09422 groups: \n 09423 ['patch_results', 'dss_calc'] 09424 fields: \n 09425 - [7:0] = dss_calc__user_roi_spad_en_27 09426 */ 09427 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_28 0x0F78 09428 /*!< 09429 type: uint8_t \n 09430 default: 0x00 \n 09431 info: \n 09432 - msb = 7 09433 - lsb = 0 09434 - i2c_size = 1 09435 groups: \n 09436 ['patch_results', 'dss_calc'] 09437 fields: \n 09438 - [7:0] = dss_calc__user_roi_spad_en_28 09439 */ 09440 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_29 0x0F79 09441 /*!< 09442 type: uint8_t \n 09443 default: 0x00 \n 09444 info: \n 09445 - msb = 7 09446 - lsb = 0 09447 - i2c_size = 1 09448 groups: \n 09449 ['patch_results', 'dss_calc'] 09450 fields: \n 09451 - [7:0] = dss_calc__user_roi_spad_en_29 09452 */ 09453 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_30 0x0F7A 09454 /*!< 09455 type: uint8_t \n 09456 default: 0x00 \n 09457 info: \n 09458 - msb = 7 09459 - lsb = 0 09460 - i2c_size = 1 09461 groups: \n 09462 ['patch_results', 'dss_calc'] 09463 fields: \n 09464 - [7:0] = dss_calc__user_roi_spad_en_30 09465 */ 09466 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_31 0x0F7B 09467 /*!< 09468 type: uint8_t \n 09469 default: 0x00 \n 09470 info: \n 09471 - msb = 7 09472 - lsb = 0 09473 - i2c_size = 1 09474 groups: \n 09475 ['patch_results', 'dss_calc'] 09476 fields: \n 09477 - [7:0] = dss_calc__user_roi_spad_en_31 09478 */ 09479 #define VL53L1_DSS_CALC__USER_ROI_0 0x0F7C 09480 /*!< 09481 type: uint8_t \n 09482 default: 0x00 \n 09483 info: \n 09484 - msb = 7 09485 - lsb = 0 09486 - i2c_size = 1 09487 groups: \n 09488 ['patch_results', 'dss_calc'] 09489 fields: \n 09490 - [7:0] = dss_calc__user_roi_0 09491 */ 09492 #define VL53L1_DSS_CALC__USER_ROI_1 0x0F7D 09493 /*!< 09494 type: uint8_t \n 09495 default: 0x00 \n 09496 info: \n 09497 - msb = 7 09498 - lsb = 0 09499 - i2c_size = 1 09500 groups: \n 09501 ['patch_results', 'dss_calc'] 09502 fields: \n 09503 - [7:0] = dss_calc__user_roi_1 09504 */ 09505 #define VL53L1_DSS_CALC__MODE_ROI_0 0x0F7E 09506 /*!< 09507 type: uint8_t \n 09508 default: 0x00 \n 09509 info: \n 09510 - msb = 7 09511 - lsb = 0 09512 - i2c_size = 1 09513 groups: \n 09514 ['patch_results', 'dss_calc'] 09515 fields: \n 09516 - [7:0] = dss_calc__mode_roi_0 09517 */ 09518 #define VL53L1_DSS_CALC__MODE_ROI_1 0x0F7F 09519 /*!< 09520 type: uint8_t \n 09521 default: 0x00 \n 09522 info: \n 09523 - msb = 7 09524 - lsb = 0 09525 - i2c_size = 1 09526 groups: \n 09527 ['patch_results', 'dss_calc'] 09528 fields: \n 09529 - [7:0] = dss_calc__mode_roi_1 09530 */ 09531 #define VL53L1_SIGMA_ESTIMATOR_CALC__SPARE_0 0x0F80 09532 /*!< 09533 type: uint8_t \n 09534 default: 0x00 \n 09535 info: \n 09536 - msb = 7 09537 - lsb = 0 09538 - i2c_size = 1 09539 groups: \n 09540 ['patch_results', 'sigma_est_spare'] 09541 fields: \n 09542 - [7:0] = sigma_estimator_calc__spare_0 09543 */ 09544 #define VL53L1_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS 0x0F82 09545 /*!< 09546 type: uint16_t \n 09547 default: 0x0000 \n 09548 info: \n 09549 - msb = 15 09550 - lsb = 0 09551 - i2c_size = 2 09552 groups: \n 09553 ['patch_results', 'vhv_results'] 09554 fields: \n 09555 - [15:0] = vhv_result__peak_signal_rate_mcps 09556 */ 09557 #define VL53L1_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS_HI 0x0F82 09558 /*!< 09559 info: \n 09560 - msb = 0 09561 - lsb = 0 09562 - i2c_size = 1 09563 */ 09564 #define VL53L1_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS_LO 0x0F83 09565 /*!< 09566 info: \n 09567 - msb = 0 09568 - lsb = 0 09569 - i2c_size = 1 09570 */ 09571 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF 0x0F84 09572 /*!< 09573 type: uint32_t \n 09574 default: 0x00000000 \n 09575 info: \n 09576 - msb = 31 09577 - lsb = 0 09578 - i2c_size = 4 09579 groups: \n 09580 ['patch_results', 'vhv_results'] 09581 fields: \n 09582 - [31:0] = vhv_result__signal_total_events_ref 09583 */ 09584 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_3 0x0F84 09585 /*!< 09586 info: \n 09587 - msb = 0 09588 - lsb = 0 09589 - i2c_size = 1 09590 */ 09591 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_2 0x0F85 09592 /*!< 09593 info: \n 09594 - msb = 0 09595 - lsb = 0 09596 - i2c_size = 1 09597 */ 09598 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_1 0x0F86 09599 /*!< 09600 info: \n 09601 - msb = 0 09602 - lsb = 0 09603 - i2c_size = 1 09604 */ 09605 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_0 0x0F87 09606 /*!< 09607 info: \n 09608 - msb = 0 09609 - lsb = 0 09610 - i2c_size = 1 09611 */ 09612 #define VL53L1_PHASECAL_RESULT__PHASE_OUTPUT_REF 0x0F88 09613 /*!< 09614 type: uint16_t \n 09615 default: 0x0000 \n 09616 info: \n 09617 - msb = 15 09618 - lsb = 0 09619 - i2c_size = 2 09620 groups: \n 09621 ['patch_results', 'phasecal_results'] 09622 fields: \n 09623 - [15:0] = phasecal_result__normalised_phase_ref 09624 */ 09625 #define VL53L1_PHASECAL_RESULT__PHASE_OUTPUT_REF_HI 0x0F88 09626 /*!< 09627 info: \n 09628 - msb = 0 09629 - lsb = 0 09630 - i2c_size = 1 09631 */ 09632 #define VL53L1_PHASECAL_RESULT__PHASE_OUTPUT_REF_LO 0x0F89 09633 /*!< 09634 info: \n 09635 - msb = 0 09636 - lsb = 0 09637 - i2c_size = 1 09638 */ 09639 #define VL53L1_DSS_RESULT__TOTAL_RATE_PER_SPAD 0x0F8A 09640 /*!< 09641 type: uint16_t \n 09642 default: 0x0000 \n 09643 info: \n 09644 - msb = 15 09645 - lsb = 0 09646 - i2c_size = 2 09647 groups: \n 09648 ['patch_results', 'dss_results'] 09649 fields: \n 09650 - [15:0] = dss_result__total_rate_per_spad 09651 */ 09652 #define VL53L1_DSS_RESULT__TOTAL_RATE_PER_SPAD_HI 0x0F8A 09653 /*!< 09654 info: \n 09655 - msb = 0 09656 - lsb = 0 09657 - i2c_size = 1 09658 */ 09659 #define VL53L1_DSS_RESULT__TOTAL_RATE_PER_SPAD_LO 0x0F8B 09660 /*!< 09661 info: \n 09662 - msb = 0 09663 - lsb = 0 09664 - i2c_size = 1 09665 */ 09666 #define VL53L1_DSS_RESULT__ENABLED_BLOCKS 0x0F8C 09667 /*!< 09668 type: uint8_t \n 09669 default: 0x00 \n 09670 info: \n 09671 - msb = 7 09672 - lsb = 0 09673 - i2c_size = 1 09674 groups: \n 09675 ['patch_results', 'dss_results'] 09676 fields: \n 09677 - [7:0] = dss_result__enabled_blocks 09678 */ 09679 #define VL53L1_DSS_RESULT__NUM_REQUESTED_SPADS 0x0F8E 09680 /*!< 09681 type: uint16_t \n 09682 default: 0x0000 \n 09683 info: \n 09684 - msb = 15 09685 - lsb = 0 09686 - i2c_size = 2 09687 groups: \n 09688 ['patch_results', 'dss_results'] 09689 fields: \n 09690 - [15:0] = dss_result__num_requested_spads (fixed point 8.8) 09691 */ 09692 #define VL53L1_DSS_RESULT__NUM_REQUESTED_SPADS_HI 0x0F8E 09693 /*!< 09694 info: \n 09695 - msb = 0 09696 - lsb = 0 09697 - i2c_size = 1 09698 */ 09699 #define VL53L1_DSS_RESULT__NUM_REQUESTED_SPADS_LO 0x0F8F 09700 /*!< 09701 info: \n 09702 - msb = 0 09703 - lsb = 0 09704 - i2c_size = 1 09705 */ 09706 #define VL53L1_MM_RESULT__INNER_INTERSECTION_RATE 0x0F92 09707 /*!< 09708 type: uint16_t \n 09709 default: 0x0000 \n 09710 info: \n 09711 - msb = 15 09712 - lsb = 0 09713 - i2c_size = 2 09714 groups: \n 09715 ['patch_results', 'mm_results'] 09716 fields: \n 09717 - [15:0] = mm_result__inner_intersection_rate 09718 */ 09719 #define VL53L1_MM_RESULT__INNER_INTERSECTION_RATE_HI 0x0F92 09720 /*!< 09721 info: \n 09722 - msb = 0 09723 - lsb = 0 09724 - i2c_size = 1 09725 */ 09726 #define VL53L1_MM_RESULT__INNER_INTERSECTION_RATE_LO 0x0F93 09727 /*!< 09728 info: \n 09729 - msb = 0 09730 - lsb = 0 09731 - i2c_size = 1 09732 */ 09733 #define VL53L1_MM_RESULT__OUTER_COMPLEMENT_RATE 0x0F94 09734 /*!< 09735 type: uint16_t \n 09736 default: 0x0000 \n 09737 info: \n 09738 - msb = 15 09739 - lsb = 0 09740 - i2c_size = 2 09741 groups: \n 09742 ['patch_results', 'mm_results'] 09743 fields: \n 09744 - [15:0] = mm_result__outer_complement_rate 09745 */ 09746 #define VL53L1_MM_RESULT__OUTER_COMPLEMENT_RATE_HI 0x0F94 09747 /*!< 09748 info: \n 09749 - msb = 0 09750 - lsb = 0 09751 - i2c_size = 1 09752 */ 09753 #define VL53L1_MM_RESULT__OUTER_COMPLEMENT_RATE_LO 0x0F95 09754 /*!< 09755 info: \n 09756 - msb = 0 09757 - lsb = 0 09758 - i2c_size = 1 09759 */ 09760 #define VL53L1_MM_RESULT__TOTAL_OFFSET 0x0F96 09761 /*!< 09762 type: uint16_t \n 09763 default: 0x0000 \n 09764 info: \n 09765 - msb = 15 09766 - lsb = 0 09767 - i2c_size = 2 09768 groups: \n 09769 ['patch_results', 'mm_results'] 09770 fields: \n 09771 - [15:0] = mm_result__total_offset 09772 */ 09773 #define VL53L1_MM_RESULT__TOTAL_OFFSET_HI 0x0F96 09774 /*!< 09775 info: \n 09776 - msb = 0 09777 - lsb = 0 09778 - i2c_size = 1 09779 */ 09780 #define VL53L1_MM_RESULT__TOTAL_OFFSET_LO 0x0F97 09781 /*!< 09782 info: \n 09783 - msb = 0 09784 - lsb = 0 09785 - i2c_size = 1 09786 */ 09787 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS 0x0F98 09788 /*!< 09789 type: uint32_t \n 09790 default: 0x00000000 \n 09791 info: \n 09792 - msb = 23 09793 - lsb = 0 09794 - i2c_size = 4 09795 groups: \n 09796 ['patch_results', 'xtalk_calc'] 09797 fields: \n 09798 - [23:0] = xtalk_calc__xtalk_for_enabled_spads (fixed point 11.13) 09799 */ 09800 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_3 0x0F98 09801 /*!< 09802 info: \n 09803 - msb = 0 09804 - lsb = 0 09805 - i2c_size = 1 09806 */ 09807 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_2 0x0F99 09808 /*!< 09809 info: \n 09810 - msb = 0 09811 - lsb = 0 09812 - i2c_size = 1 09813 */ 09814 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_1 0x0F9A 09815 /*!< 09816 info: \n 09817 - msb = 0 09818 - lsb = 0 09819 - i2c_size = 1 09820 */ 09821 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_0 0x0F9B 09822 /*!< 09823 info: \n 09824 - msb = 0 09825 - lsb = 0 09826 - i2c_size = 1 09827 */ 09828 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS 0x0F9C 09829 /*!< 09830 type: uint32_t \n 09831 default: 0x00000000 \n 09832 info: \n 09833 - msb = 23 09834 - lsb = 0 09835 - i2c_size = 4 09836 groups: \n 09837 ['patch_results', 'xtalk_results'] 09838 fields: \n 09839 - [23:0] = xtalk_result__avg_xtalk_user_roi_kcps (fixed point 11.13) 09840 */ 09841 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_3 0x0F9C 09842 /*!< 09843 info: \n 09844 - msb = 0 09845 - lsb = 0 09846 - i2c_size = 1 09847 */ 09848 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_2 0x0F9D 09849 /*!< 09850 info: \n 09851 - msb = 0 09852 - lsb = 0 09853 - i2c_size = 1 09854 */ 09855 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_1 0x0F9E 09856 /*!< 09857 info: \n 09858 - msb = 0 09859 - lsb = 0 09860 - i2c_size = 1 09861 */ 09862 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_0 0x0F9F 09863 /*!< 09864 info: \n 09865 - msb = 0 09866 - lsb = 0 09867 - i2c_size = 1 09868 */ 09869 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS 0x0FA0 09870 /*!< 09871 type: uint32_t \n 09872 default: 0x00000000 \n 09873 info: \n 09874 - msb = 23 09875 - lsb = 0 09876 - i2c_size = 4 09877 groups: \n 09878 ['patch_results', 'xtalk_results'] 09879 fields: \n 09880 - [23:0] = xtalk_result__avg_xtalk_mm_inner_roi_kcps (fixed point 11.13) 09881 */ 09882 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_3 0x0FA0 09883 /*!< 09884 info: \n 09885 - msb = 0 09886 - lsb = 0 09887 - i2c_size = 1 09888 */ 09889 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_2 0x0FA1 09890 /*!< 09891 info: \n 09892 - msb = 0 09893 - lsb = 0 09894 - i2c_size = 1 09895 */ 09896 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_1 0x0FA2 09897 /*!< 09898 info: \n 09899 - msb = 0 09900 - lsb = 0 09901 - i2c_size = 1 09902 */ 09903 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_0 0x0FA3 09904 /*!< 09905 info: \n 09906 - msb = 0 09907 - lsb = 0 09908 - i2c_size = 1 09909 */ 09910 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS 0x0FA4 09911 /*!< 09912 type: uint32_t \n 09913 default: 0x00000000 \n 09914 info: \n 09915 - msb = 23 09916 - lsb = 0 09917 - i2c_size = 4 09918 groups: \n 09919 ['patch_results', 'xtalk_results'] 09920 fields: \n 09921 - [23:0] = xtalk_result__avg_xtalk_mm_outer_roi_kcps (fixed point 11.13) 09922 */ 09923 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_3 0x0FA4 09924 /*!< 09925 info: \n 09926 - msb = 0 09927 - lsb = 0 09928 - i2c_size = 1 09929 */ 09930 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_2 0x0FA5 09931 /*!< 09932 info: \n 09933 - msb = 0 09934 - lsb = 0 09935 - i2c_size = 1 09936 */ 09937 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_1 0x0FA6 09938 /*!< 09939 info: \n 09940 - msb = 0 09941 - lsb = 0 09942 - i2c_size = 1 09943 */ 09944 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_0 0x0FA7 09945 /*!< 09946 info: \n 09947 - msb = 0 09948 - lsb = 0 09949 - i2c_size = 1 09950 */ 09951 #define VL53L1_RANGE_RESULT__ACCUM_PHASE 0x0FA8 09952 /*!< 09953 type: uint32_t \n 09954 default: 0x00000000 \n 09955 info: \n 09956 - msb = 31 09957 - lsb = 0 09958 - i2c_size = 4 09959 groups: \n 09960 ['patch_results', 'range_results'] 09961 fields: \n 09962 - [31:0] = range_result__accum_phase 09963 */ 09964 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_3 0x0FA8 09965 /*!< 09966 info: \n 09967 - msb = 0 09968 - lsb = 0 09969 - i2c_size = 1 09970 */ 09971 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_2 0x0FA9 09972 /*!< 09973 info: \n 09974 - msb = 0 09975 - lsb = 0 09976 - i2c_size = 1 09977 */ 09978 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_1 0x0FAA 09979 /*!< 09980 info: \n 09981 - msb = 0 09982 - lsb = 0 09983 - i2c_size = 1 09984 */ 09985 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_0 0x0FAB 09986 /*!< 09987 info: \n 09988 - msb = 0 09989 - lsb = 0 09990 - i2c_size = 1 09991 */ 09992 #define VL53L1_RANGE_RESULT__OFFSET_CORRECTED_RANGE 0x0FAC 09993 /*!< 09994 type: uint16_t \n 09995 default: 0x0000 \n 09996 info: \n 09997 - msb = 15 09998 - lsb = 0 09999 - i2c_size = 2 10000 groups: \n 10001 ['patch_results', 'range_results'] 10002 fields: \n 10003 - [15:0] = range_result__offset_corrected_range 10004 */ 10005 #define VL53L1_RANGE_RESULT__OFFSET_CORRECTED_RANGE_HI 0x0FAC 10006 /*!< 10007 info: \n 10008 - msb = 0 10009 - lsb = 0 10010 - i2c_size = 1 10011 */ 10012 #define VL53L1_RANGE_RESULT__OFFSET_CORRECTED_RANGE_LO 0x0FAD 10013 /*!< 10014 info: \n 10015 - msb = 0 10016 - lsb = 0 10017 - i2c_size = 1 10018 */ 10019 #define VL53L1_SHADOW_PHASECAL_RESULT__VCSEL_START 0x0FAE 10020 /*!< 10021 type: uint8_t \n 10022 default: 0x00 \n 10023 info: \n 10024 - msb = 7 10025 - lsb = 0 10026 - i2c_size = 1 10027 groups: \n 10028 ['shadow_system_results', 'histogram_results'] 10029 fields: \n 10030 - [7:0] = shadow_phasecal_result__vcsel_start 10031 */ 10032 #define VL53L1_SHADOW_RESULT__INTERRUPT_STATUS 0x0FB0 10033 /*!< 10034 type: uint8_t \n 10035 default: 0x00 \n 10036 info: \n 10037 - msb = 5 10038 - lsb = 0 10039 - i2c_size = 1 10040 groups: \n 10041 ['shadow_system_results', 'results'] 10042 fields: \n 10043 - [2:0] = shadow_int_status 10044 - [4:3] = shadow_int_error_status 10045 - [5] = shadow_gph_id_gpio_status 10046 */ 10047 #define VL53L1_SHADOW_RESULT__RANGE_STATUS 0x0FB1 10048 /*!< 10049 type: uint8_t \n 10050 default: 0x00 \n 10051 info: \n 10052 - msb = 7 10053 - lsb = 0 10054 - i2c_size = 1 10055 groups: \n 10056 ['shadow_system_results', 'results'] 10057 fields: \n 10058 - [4:0] = shadow_range_status 10059 - [5] = shadow_max_threshold_hit 10060 - [6] = shadow_min_threshold_hit 10061 - [7] = shadow_gph_id_range_status 10062 */ 10063 #define VL53L1_SHADOW_RESULT__REPORT_STATUS 0x0FB2 10064 /*!< 10065 type: uint8_t \n 10066 default: 0x00 \n 10067 info: \n 10068 - msb = 3 10069 - lsb = 0 10070 - i2c_size = 1 10071 groups: \n 10072 ['shadow_system_results', 'results'] 10073 fields: \n 10074 - [3:0] = shadow_report_status 10075 */ 10076 #define VL53L1_SHADOW_RESULT__STREAM_COUNT 0x0FB3 10077 /*!< 10078 type: uint8_t \n 10079 default: 0x00 \n 10080 info: \n 10081 - msb = 7 10082 - lsb = 0 10083 - i2c_size = 1 10084 groups: \n 10085 ['shadow_system_results', 'results'] 10086 fields: \n 10087 - [7:0] = shadow_result__stream_count 10088 */ 10089 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FB4 10090 /*!< 10091 type: uint16_t \n 10092 default: 0x0000 \n 10093 info: \n 10094 - msb = 15 10095 - lsb = 0 10096 - i2c_size = 2 10097 groups: \n 10098 ['shadow_system_results', 'results'] 10099 fields: \n 10100 - [15:0] = shadow_result__dss_actual_effective_spads_sd0 (fixed point 8.8) 10101 */ 10102 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FB4 10103 /*!< 10104 info: \n 10105 - msb = 0 10106 - lsb = 0 10107 - i2c_size = 1 10108 */ 10109 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FB5 10110 /*!< 10111 info: \n 10112 - msb = 0 10113 - lsb = 0 10114 - i2c_size = 1 10115 */ 10116 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x0FB6 10117 /*!< 10118 type: uint16_t \n 10119 default: 0x0000 \n 10120 info: \n 10121 - msb = 15 10122 - lsb = 0 10123 - i2c_size = 2 10124 groups: \n 10125 ['shadow_system_results', 'results'] 10126 fields: \n 10127 - [15:0] = shadow_result__peak_signal_count_rate_mcps_sd0 (fixed point 9.7) 10128 */ 10129 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0FB6 10130 /*!< 10131 info: \n 10132 - msb = 0 10133 - lsb = 0 10134 - i2c_size = 1 10135 */ 10136 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0FB7 10137 /*!< 10138 info: \n 10139 - msb = 0 10140 - lsb = 0 10141 - i2c_size = 1 10142 */ 10143 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0FB8 10144 /*!< 10145 type: uint16_t \n 10146 default: 0x0000 \n 10147 info: \n 10148 - msb = 15 10149 - lsb = 0 10150 - i2c_size = 2 10151 groups: \n 10152 ['shadow_system_results', 'results'] 10153 fields: \n 10154 - [15:0] = shadow_result__ambient_count_rate_mcps_sd0 (fixed point 9.7) 10155 */ 10156 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0FB8 10157 /*!< 10158 info: \n 10159 - msb = 0 10160 - lsb = 0 10161 - i2c_size = 1 10162 */ 10163 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0FB9 10164 /*!< 10165 info: \n 10166 - msb = 0 10167 - lsb = 0 10168 - i2c_size = 1 10169 */ 10170 #define VL53L1_SHADOW_RESULT__SIGMA_SD0 0x0FBA 10171 /*!< 10172 type: uint16_t \n 10173 default: 0x0000 \n 10174 info: \n 10175 - msb = 15 10176 - lsb = 0 10177 - i2c_size = 2 10178 groups: \n 10179 ['shadow_system_results', 'results'] 10180 fields: \n 10181 - [15:0] = shadow_result__sigma_sd0 (fixed point 14.2) 10182 */ 10183 #define VL53L1_SHADOW_RESULT__SIGMA_SD0_HI 0x0FBA 10184 /*!< 10185 info: \n 10186 - msb = 0 10187 - lsb = 0 10188 - i2c_size = 1 10189 */ 10190 #define VL53L1_SHADOW_RESULT__SIGMA_SD0_LO 0x0FBB 10191 /*!< 10192 info: \n 10193 - msb = 0 10194 - lsb = 0 10195 - i2c_size = 1 10196 */ 10197 #define VL53L1_SHADOW_RESULT__PHASE_SD0 0x0FBC 10198 /*!< 10199 type: uint16_t \n 10200 default: 0x0000 \n 10201 info: \n 10202 - msb = 15 10203 - lsb = 0 10204 - i2c_size = 2 10205 groups: \n 10206 ['shadow_system_results', 'results'] 10207 fields: \n 10208 - [15:0] = shadow_result__phase_sd0 (fixed point 5.11) 10209 */ 10210 #define VL53L1_SHADOW_RESULT__PHASE_SD0_HI 0x0FBC 10211 /*!< 10212 info: \n 10213 - msb = 0 10214 - lsb = 0 10215 - i2c_size = 1 10216 */ 10217 #define VL53L1_SHADOW_RESULT__PHASE_SD0_LO 0x0FBD 10218 /*!< 10219 info: \n 10220 - msb = 0 10221 - lsb = 0 10222 - i2c_size = 1 10223 */ 10224 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0FBE 10225 /*!< 10226 type: uint16_t \n 10227 default: 0x0000 \n 10228 info: \n 10229 - msb = 15 10230 - lsb = 0 10231 - i2c_size = 2 10232 groups: \n 10233 ['shadow_system_results', 'results'] 10234 fields: \n 10235 - [15:0] = shadow_result__final_crosstalk_corrected_range_mm_sd0 10236 */ 10237 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0FBE 10238 /*!< 10239 info: \n 10240 - msb = 0 10241 - lsb = 0 10242 - i2c_size = 1 10243 */ 10244 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0FBF 10245 /*!< 10246 info: \n 10247 - msb = 0 10248 - lsb = 0 10249 - i2c_size = 1 10250 */ 10251 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0FC0 10252 /*!< 10253 type: uint16_t \n 10254 default: 0x0000 \n 10255 info: \n 10256 - msb = 15 10257 - lsb = 0 10258 - i2c_size = 2 10259 groups: \n 10260 ['shadow_system_results', 'results'] 10261 fields: \n 10262 - [15:0] = shadow_result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0 (fixed point 9.7) 10263 */ 10264 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0FC0 10265 /*!< 10266 info: \n 10267 - msb = 0 10268 - lsb = 0 10269 - i2c_size = 1 10270 */ 10271 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0FC1 10272 /*!< 10273 info: \n 10274 - msb = 0 10275 - lsb = 0 10276 - i2c_size = 1 10277 */ 10278 #define VL53L1_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FC2 10279 /*!< 10280 type: uint16_t \n 10281 default: 0x0000 \n 10282 info: \n 10283 - msb = 15 10284 - lsb = 0 10285 - i2c_size = 2 10286 groups: \n 10287 ['shadow_system_results', 'results'] 10288 fields: \n 10289 - [15:0] = shadow_result__mm_inner_actual_effective_spads_sd0 (fixed point 8.8) 10290 */ 10291 #define VL53L1_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FC2 10292 /*!< 10293 info: \n 10294 - msb = 0 10295 - lsb = 0 10296 - i2c_size = 1 10297 */ 10298 #define VL53L1_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FC3 10299 /*!< 10300 info: \n 10301 - msb = 0 10302 - lsb = 0 10303 - i2c_size = 1 10304 */ 10305 #define VL53L1_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FC4 10306 /*!< 10307 type: uint16_t \n 10308 default: 0x0000 \n 10309 info: \n 10310 - msb = 15 10311 - lsb = 0 10312 - i2c_size = 2 10313 groups: \n 10314 ['shadow_system_results', 'results'] 10315 fields: \n 10316 - [15:0] = shadow_result__mm_outer_actual_effective_spads_sd0 (fixed point 8.8) 10317 */ 10318 #define VL53L1_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FC4 10319 /*!< 10320 info: \n 10321 - msb = 0 10322 - lsb = 0 10323 - i2c_size = 1 10324 */ 10325 #define VL53L1_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FC5 10326 /*!< 10327 info: \n 10328 - msb = 0 10329 - lsb = 0 10330 - i2c_size = 1 10331 */ 10332 #define VL53L1_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x0FC6 10333 /*!< 10334 type: uint16_t \n 10335 default: 0x0000 \n 10336 info: \n 10337 - msb = 15 10338 - lsb = 0 10339 - i2c_size = 2 10340 groups: \n 10341 ['shadow_system_results', 'results'] 10342 fields: \n 10343 - [15:0] = shadow_result__avg_signal_count_rate_mcps_sd0 (fixed point 9.7) 10344 */ 10345 #define VL53L1_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0FC6 10346 /*!< 10347 info: \n 10348 - msb = 0 10349 - lsb = 0 10350 - i2c_size = 1 10351 */ 10352 #define VL53L1_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0FC7 10353 /*!< 10354 info: \n 10355 - msb = 0 10356 - lsb = 0 10357 - i2c_size = 1 10358 */ 10359 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x0FC8 10360 /*!< 10361 type: uint16_t \n 10362 default: 0x0000 \n 10363 info: \n 10364 - msb = 15 10365 - lsb = 0 10366 - i2c_size = 2 10367 groups: \n 10368 ['shadow_system_results', 'results'] 10369 fields: \n 10370 - [15:0] = shadow_result__dss_actual_effective_spads_sd1 (fixed point 8.8) 10371 */ 10372 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x0FC8 10373 /*!< 10374 info: \n 10375 - msb = 0 10376 - lsb = 0 10377 - i2c_size = 1 10378 */ 10379 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x0FC9 10380 /*!< 10381 info: \n 10382 - msb = 0 10383 - lsb = 0 10384 - i2c_size = 1 10385 */ 10386 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x0FCA 10387 /*!< 10388 type: uint16_t \n 10389 default: 0x0000 \n 10390 info: \n 10391 - msb = 15 10392 - lsb = 0 10393 - i2c_size = 2 10394 groups: \n 10395 ['shadow_system_results', 'results'] 10396 fields: \n 10397 - [15:0] = shadow_result__peak_signal_count_rate_mcps_sd1 (fixed point 9.7) 10398 */ 10399 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x0FCA 10400 /*!< 10401 info: \n 10402 - msb = 0 10403 - lsb = 0 10404 - i2c_size = 1 10405 */ 10406 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x0FCB 10407 /*!< 10408 info: \n 10409 - msb = 0 10410 - lsb = 0 10411 - i2c_size = 1 10412 */ 10413 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x0FCC 10414 /*!< 10415 type: uint16_t \n 10416 default: 0x0000 \n 10417 info: \n 10418 - msb = 15 10419 - lsb = 0 10420 - i2c_size = 2 10421 groups: \n 10422 ['shadow_system_results', 'results'] 10423 fields: \n 10424 - [15:0] = shadow_result__ambient_count_rate_mcps_sd1 (fixed point 9.7) 10425 */ 10426 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x0FCC 10427 /*!< 10428 info: \n 10429 - msb = 0 10430 - lsb = 0 10431 - i2c_size = 1 10432 */ 10433 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x0FCD 10434 /*!< 10435 info: \n 10436 - msb = 0 10437 - lsb = 0 10438 - i2c_size = 1 10439 */ 10440 #define VL53L1_SHADOW_RESULT__SIGMA_SD1 0x0FCE 10441 /*!< 10442 type: uint16_t \n 10443 default: 0x0000 \n 10444 info: \n 10445 - msb = 15 10446 - lsb = 0 10447 - i2c_size = 2 10448 groups: \n 10449 ['shadow_system_results', 'results'] 10450 fields: \n 10451 - [15:0] = shadow_result__sigma_sd1 (fixed point 14.2) 10452 */ 10453 #define VL53L1_SHADOW_RESULT__SIGMA_SD1_HI 0x0FCE 10454 /*!< 10455 info: \n 10456 - msb = 0 10457 - lsb = 0 10458 - i2c_size = 1 10459 */ 10460 #define VL53L1_SHADOW_RESULT__SIGMA_SD1_LO 0x0FCF 10461 /*!< 10462 info: \n 10463 - msb = 0 10464 - lsb = 0 10465 - i2c_size = 1 10466 */ 10467 #define VL53L1_SHADOW_RESULT__PHASE_SD1 0x0FD0 10468 /*!< 10469 type: uint16_t \n 10470 default: 0x0000 \n 10471 info: \n 10472 - msb = 15 10473 - lsb = 0 10474 - i2c_size = 2 10475 groups: \n 10476 ['shadow_system_results', 'results'] 10477 fields: \n 10478 - [15:0] = shadow_result__phase_sd1 (fixed point 5.11) 10479 */ 10480 #define VL53L1_SHADOW_RESULT__PHASE_SD1_HI 0x0FD0 10481 /*!< 10482 info: \n 10483 - msb = 0 10484 - lsb = 0 10485 - i2c_size = 1 10486 */ 10487 #define VL53L1_SHADOW_RESULT__PHASE_SD1_LO 0x0FD1 10488 /*!< 10489 info: \n 10490 - msb = 0 10491 - lsb = 0 10492 - i2c_size = 1 10493 */ 10494 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x0FD2 10495 /*!< 10496 type: uint16_t \n 10497 default: 0x0000 \n 10498 info: \n 10499 - msb = 15 10500 - lsb = 0 10501 - i2c_size = 2 10502 groups: \n 10503 ['shadow_system_results', 'results'] 10504 fields: \n 10505 - [15:0] = shadow_result__final_crosstalk_corrected_range_mm_sd1 10506 */ 10507 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x0FD2 10508 /*!< 10509 info: \n 10510 - msb = 0 10511 - lsb = 0 10512 - i2c_size = 1 10513 */ 10514 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x0FD3 10515 /*!< 10516 info: \n 10517 - msb = 0 10518 - lsb = 0 10519 - i2c_size = 1 10520 */ 10521 #define VL53L1_SHADOW_RESULT__SPARE_0_SD1 0x0FD4 10522 /*!< 10523 type: uint16_t \n 10524 default: 0x0000 \n 10525 info: \n 10526 - msb = 15 10527 - lsb = 0 10528 - i2c_size = 2 10529 groups: \n 10530 ['shadow_system_results', 'results'] 10531 fields: \n 10532 - [15:0] = shadow_result__spare_0_sd1 10533 */ 10534 #define VL53L1_SHADOW_RESULT__SPARE_0_SD1_HI 0x0FD4 10535 /*!< 10536 info: \n 10537 - msb = 0 10538 - lsb = 0 10539 - i2c_size = 1 10540 */ 10541 #define VL53L1_SHADOW_RESULT__SPARE_0_SD1_LO 0x0FD5 10542 /*!< 10543 info: \n 10544 - msb = 0 10545 - lsb = 0 10546 - i2c_size = 1 10547 */ 10548 #define VL53L1_SHADOW_RESULT__SPARE_1_SD1 0x0FD6 10549 /*!< 10550 type: uint16_t \n 10551 default: 0x0000 \n 10552 info: \n 10553 - msb = 15 10554 - lsb = 0 10555 - i2c_size = 2 10556 groups: \n 10557 ['shadow_system_results', 'results'] 10558 fields: \n 10559 - [15:0] = shadow_result__spare_1_sd1 10560 */ 10561 #define VL53L1_SHADOW_RESULT__SPARE_1_SD1_HI 0x0FD6 10562 /*!< 10563 info: \n 10564 - msb = 0 10565 - lsb = 0 10566 - i2c_size = 1 10567 */ 10568 #define VL53L1_SHADOW_RESULT__SPARE_1_SD1_LO 0x0FD7 10569 /*!< 10570 info: \n 10571 - msb = 0 10572 - lsb = 0 10573 - i2c_size = 1 10574 */ 10575 #define VL53L1_SHADOW_RESULT__SPARE_2_SD1 0x0FD8 10576 /*!< 10577 type: uint16_t \n 10578 default: 0x0000 \n 10579 info: \n 10580 - msb = 15 10581 - lsb = 0 10582 - i2c_size = 2 10583 groups: \n 10584 ['shadow_system_results', 'results'] 10585 fields: \n 10586 - [15:0] = shadow_result__spare_2_sd1 10587 */ 10588 #define VL53L1_SHADOW_RESULT__SPARE_2_SD1_HI 0x0FD8 10589 /*!< 10590 info: \n 10591 - msb = 0 10592 - lsb = 0 10593 - i2c_size = 1 10594 */ 10595 #define VL53L1_SHADOW_RESULT__SPARE_2_SD1_LO 0x0FD9 10596 /*!< 10597 info: \n 10598 - msb = 0 10599 - lsb = 0 10600 - i2c_size = 1 10601 */ 10602 #define VL53L1_SHADOW_RESULT__SPARE_3_SD1 0x0FDA 10603 /*!< 10604 type: uint8_t \n 10605 default: 0x00 \n 10606 info: \n 10607 - msb = 7 10608 - lsb = 0 10609 - i2c_size = 1 10610 groups: \n 10611 ['shadow_system_results', 'results'] 10612 fields: \n 10613 - [7:0] = shadow_result__spare_3_sd1 10614 */ 10615 #define VL53L1_SHADOW_RESULT__THRESH_INFO 0x0FDB 10616 /*!< 10617 type: uint8_t \n 10618 default: 0x00 \n 10619 info: \n 10620 - msb = 7 10621 - lsb = 0 10622 - i2c_size = 1 10623 groups: \n 10624 ['shadow_system_results', 'results'] 10625 fields: \n 10626 - [3:0] = shadow_result__distance_int_info 10627 - [7:4] = shadow_result__rate_int_info 10628 */ 10629 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x0FDC 10630 /*!< 10631 type: uint32_t \n 10632 default: 0x00000000 \n 10633 info: \n 10634 - msb = 31 10635 - lsb = 0 10636 - i2c_size = 4 10637 groups: \n 10638 ['shadow_core_results', 'ranging_core_results'] 10639 fields: \n 10640 - [31:0] = shadow_result_core__ambient_window_events_sd0 10641 */ 10642 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x0FDC 10643 /*!< 10644 info: \n 10645 - msb = 0 10646 - lsb = 0 10647 - i2c_size = 1 10648 */ 10649 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x0FDD 10650 /*!< 10651 info: \n 10652 - msb = 0 10653 - lsb = 0 10654 - i2c_size = 1 10655 */ 10656 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x0FDE 10657 /*!< 10658 info: \n 10659 - msb = 0 10660 - lsb = 0 10661 - i2c_size = 1 10662 */ 10663 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x0FDF 10664 /*!< 10665 info: \n 10666 - msb = 0 10667 - lsb = 0 10668 - i2c_size = 1 10669 */ 10670 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x0FE0 10671 /*!< 10672 type: uint32_t \n 10673 default: 0x00000000 \n 10674 info: \n 10675 - msb = 31 10676 - lsb = 0 10677 - i2c_size = 4 10678 groups: \n 10679 ['shadow_core_results', 'ranging_core_results'] 10680 fields: \n 10681 - [31:0] = shadow_result_core__ranging_total_events_sd0 10682 */ 10683 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x0FE0 10684 /*!< 10685 info: \n 10686 - msb = 0 10687 - lsb = 0 10688 - i2c_size = 1 10689 */ 10690 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x0FE1 10691 /*!< 10692 info: \n 10693 - msb = 0 10694 - lsb = 0 10695 - i2c_size = 1 10696 */ 10697 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x0FE2 10698 /*!< 10699 info: \n 10700 - msb = 0 10701 - lsb = 0 10702 - i2c_size = 1 10703 */ 10704 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x0FE3 10705 /*!< 10706 info: \n 10707 - msb = 0 10708 - lsb = 0 10709 - i2c_size = 1 10710 */ 10711 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x0FE4 10712 /*!< 10713 type: int32_t \n 10714 default: 0x00000000 \n 10715 info: \n 10716 - msb = 31 10717 - lsb = 0 10718 - i2c_size = 4 10719 groups: \n 10720 ['shadow_core_results', 'ranging_core_results'] 10721 fields: \n 10722 - [31:0] = shadow_result_core__signal_total_events_sd0 10723 */ 10724 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x0FE4 10725 /*!< 10726 info: \n 10727 - msb = 0 10728 - lsb = 0 10729 - i2c_size = 1 10730 */ 10731 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x0FE5 10732 /*!< 10733 info: \n 10734 - msb = 0 10735 - lsb = 0 10736 - i2c_size = 1 10737 */ 10738 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x0FE6 10739 /*!< 10740 info: \n 10741 - msb = 0 10742 - lsb = 0 10743 - i2c_size = 1 10744 */ 10745 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x0FE7 10746 /*!< 10747 info: \n 10748 - msb = 0 10749 - lsb = 0 10750 - i2c_size = 1 10751 */ 10752 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x0FE8 10753 /*!< 10754 type: uint32_t \n 10755 default: 0x00000000 \n 10756 info: \n 10757 - msb = 31 10758 - lsb = 0 10759 - i2c_size = 4 10760 groups: \n 10761 ['shadow_core_results', 'ranging_core_results'] 10762 fields: \n 10763 - [31:0] = shadow_result_core__total_periods_elapsed_sd0 10764 */ 10765 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x0FE8 10766 /*!< 10767 info: \n 10768 - msb = 0 10769 - lsb = 0 10770 - i2c_size = 1 10771 */ 10772 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x0FE9 10773 /*!< 10774 info: \n 10775 - msb = 0 10776 - lsb = 0 10777 - i2c_size = 1 10778 */ 10779 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x0FEA 10780 /*!< 10781 info: \n 10782 - msb = 0 10783 - lsb = 0 10784 - i2c_size = 1 10785 */ 10786 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x0FEB 10787 /*!< 10788 info: \n 10789 - msb = 0 10790 - lsb = 0 10791 - i2c_size = 1 10792 */ 10793 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x0FEC 10794 /*!< 10795 type: uint32_t \n 10796 default: 0x00000000 \n 10797 info: \n 10798 - msb = 31 10799 - lsb = 0 10800 - i2c_size = 4 10801 groups: \n 10802 ['shadow_core_results', 'ranging_core_results'] 10803 fields: \n 10804 - [31:0] = shadow_result_core__ambient_window_events_sd1 10805 */ 10806 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x0FEC 10807 /*!< 10808 info: \n 10809 - msb = 0 10810 - lsb = 0 10811 - i2c_size = 1 10812 */ 10813 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x0FED 10814 /*!< 10815 info: \n 10816 - msb = 0 10817 - lsb = 0 10818 - i2c_size = 1 10819 */ 10820 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x0FEE 10821 /*!< 10822 info: \n 10823 - msb = 0 10824 - lsb = 0 10825 - i2c_size = 1 10826 */ 10827 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x0FEF 10828 /*!< 10829 info: \n 10830 - msb = 0 10831 - lsb = 0 10832 - i2c_size = 1 10833 */ 10834 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x0FF0 10835 /*!< 10836 type: uint32_t \n 10837 default: 0x00000000 \n 10838 info: \n 10839 - msb = 31 10840 - lsb = 0 10841 - i2c_size = 4 10842 groups: \n 10843 ['shadow_core_results', 'ranging_core_results'] 10844 fields: \n 10845 - [31:0] = shadow_result_core__ranging_total_events_sd1 10846 */ 10847 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x0FF0 10848 /*!< 10849 info: \n 10850 - msb = 0 10851 - lsb = 0 10852 - i2c_size = 1 10853 */ 10854 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x0FF1 10855 /*!< 10856 info: \n 10857 - msb = 0 10858 - lsb = 0 10859 - i2c_size = 1 10860 */ 10861 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x0FF2 10862 /*!< 10863 info: \n 10864 - msb = 0 10865 - lsb = 0 10866 - i2c_size = 1 10867 */ 10868 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x0FF3 10869 /*!< 10870 info: \n 10871 - msb = 0 10872 - lsb = 0 10873 - i2c_size = 1 10874 */ 10875 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x0FF4 10876 /*!< 10877 type: int32_t \n 10878 default: 0x00000000 \n 10879 info: \n 10880 - msb = 31 10881 - lsb = 0 10882 - i2c_size = 4 10883 groups: \n 10884 ['shadow_core_results', 'ranging_core_results'] 10885 fields: \n 10886 - [31:0] = shadow_result_core__signal_total_events_sd1 10887 */ 10888 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x0FF4 10889 /*!< 10890 info: \n 10891 - msb = 0 10892 - lsb = 0 10893 - i2c_size = 1 10894 */ 10895 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x0FF5 10896 /*!< 10897 info: \n 10898 - msb = 0 10899 - lsb = 0 10900 - i2c_size = 1 10901 */ 10902 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x0FF6 10903 /*!< 10904 info: \n 10905 - msb = 0 10906 - lsb = 0 10907 - i2c_size = 1 10908 */ 10909 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x0FF7 10910 /*!< 10911 info: \n 10912 - msb = 0 10913 - lsb = 0 10914 - i2c_size = 1 10915 */ 10916 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x0FF8 10917 /*!< 10918 type: uint32_t \n 10919 default: 0x00000000 \n 10920 info: \n 10921 - msb = 31 10922 - lsb = 0 10923 - i2c_size = 4 10924 groups: \n 10925 ['shadow_core_results', 'ranging_core_results'] 10926 fields: \n 10927 - [31:0] = shadow_result_core__total_periods_elapsed_sd1 10928 */ 10929 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x0FF8 10930 /*!< 10931 info: \n 10932 - msb = 0 10933 - lsb = 0 10934 - i2c_size = 1 10935 */ 10936 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x0FF9 10937 /*!< 10938 info: \n 10939 - msb = 0 10940 - lsb = 0 10941 - i2c_size = 1 10942 */ 10943 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x0FFA 10944 /*!< 10945 info: \n 10946 - msb = 0 10947 - lsb = 0 10948 - i2c_size = 1 10949 */ 10950 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x0FFB 10951 /*!< 10952 info: \n 10953 - msb = 0 10954 - lsb = 0 10955 - i2c_size = 1 10956 */ 10957 #define VL53L1_SHADOW_RESULT_CORE__SPARE_0 0x0FFC 10958 /*!< 10959 type: uint8_t \n 10960 default: 0x00 \n 10961 info: \n 10962 - msb = 7 10963 - lsb = 0 10964 - i2c_size = 1 10965 groups: \n 10966 ['shadow_core_results', 'ranging_core_results'] 10967 fields: \n 10968 - [7:0] = shadow_result_core__spare_0 10969 */ 10970 #define VL53L1_SHADOW_PHASECAL_RESULT__REFERENCE_PHASE_HI 0x0FFE 10971 /*!< 10972 type: uint8_t \n 10973 default: 0x00 \n 10974 info: \n 10975 - msb = 7 10976 - lsb = 0 10977 - i2c_size = 1 10978 groups: \n 10979 ['shadow_system_results', 'histogram_results'] 10980 fields: \n 10981 - [7:0] = shadow_phasecal_result__reference_phase_hi 10982 */ 10983 #define VL53L1_SHADOW_PHASECAL_RESULT__REFERENCE_PHASE_LO 0x0FFF 10984 /*!< 10985 type: uint8_t \n 10986 default: 0x00 \n 10987 info: \n 10988 - msb = 7 10989 - lsb = 0 10990 - i2c_size = 1 10991 groups: \n 10992 ['shadow_system_results', 'histogram_results'] 10993 fields: \n 10994 - [7:0] = shadow_phasecal_result__reference_phase_lo 10995 */ 10996 10997 /** @} VL53L1_register_DefineRegisters_group */ 10998 10999 11000 #endif
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