USBHAL_KL25Z.cpp

00001 /* Copyright (c) 2010-2011 mbed.org, MIT License
00002 *
00003 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
00004 * and associated documentation files (the "Software"), to deal in the Software without
00005 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
00006 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
00007 * Software is furnished to do so, subject to the following conditions:
00008 *
00009 * The above copyright notice and this permission notice shall be included in all copies or
00010 * substantial portions of the Software.
00011 *
00012 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
00013 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
00014 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
00015 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
00016 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
00017 */
00018 
00019 #if defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | defined(TARGET_K64F) | defined(TARGET_K22F) | defined(TARGET_TEENSY3_1)
00020 
00021 #include "USBHAL.h"
00022 
00023 USBHAL * USBHAL::instance;
00024 
00025 static volatile int epComplete = 0;
00026 
00027 // Convert physical endpoint number to register bit
00028 #define EP(endpoint) (1<<(endpoint))
00029 
00030 // Convert physical to logical
00031 #define PHY_TO_LOG(endpoint)    ((endpoint)>>1)
00032 
00033 // Get endpoint direction
00034 #define IN_EP(endpoint)     ((endpoint) & 1U ? true : false)
00035 #define OUT_EP(endpoint)    ((endpoint) & 1U ? false : true)
00036 
00037 #define BD_OWN_MASK        (1<<7)
00038 #define BD_DATA01_MASK     (1<<6)
00039 #define BD_KEEP_MASK       (1<<5)
00040 #define BD_NINC_MASK       (1<<4)
00041 #define BD_DTS_MASK        (1<<3)
00042 #define BD_STALL_MASK      (1<<2)
00043 
00044 #define TX    1
00045 #define RX    0
00046 #define ODD   0
00047 #define EVEN  1
00048 // this macro waits a physical endpoint number
00049 #define EP_BDT_IDX(ep, dir, odd) (((ep * 4) + (2 * dir) + (1 *  odd)))
00050 
00051 #define SETUP_TOKEN    0x0D
00052 #define IN_TOKEN       0x09
00053 #define OUT_TOKEN      0x01
00054 #define TOK_PID(idx)   ((bdt[idx].info >> 2) & 0x0F)
00055 
00056 // for each endpt: 8 bytes
00057 typedef struct BDT {
00058     uint8_t   info;       // BD[0:7]
00059     uint8_t   dummy;      // RSVD: BD[8:15]
00060     uint16_t  byte_count; // BD[16:32]
00061     uint32_t  address;    // Addr
00062 } BDT;
00063 
00064 
00065 // there are:
00066 //    * 16 bidirectionnal endpt -> 32 physical endpt
00067 //    * as there are ODD and EVEN buffer -> 32*2 bdt
00068 __attribute__((__aligned__(512))) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2];
00069 uint8_t * endpoint_buffer[(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2];
00070 uint8_t * endpoint_buffer_iso[2*2];
00071 
00072 static uint8_t set_addr = 0;
00073 static uint8_t addr = 0;
00074 
00075 static uint32_t Data1  = 0x55555555;
00076 
00077 static uint32_t frameNumber() {
00078     return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF);
00079 }
00080 
00081 uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
00082     return 0;
00083 }
00084 
00085 USBHAL::USBHAL(void) {
00086     // Disable IRQ
00087     NVIC_DisableIRQ(USB0_IRQn);
00088 
00089 #if defined(TARGET_K64F)
00090     MPU->CESR=0;
00091 #endif
00092     // fill in callback array
00093     epCallback[0] = &USBHAL::EP1_OUT_callback;
00094     epCallback[1] = &USBHAL::EP1_IN_callback;
00095     epCallback[2] = &USBHAL::EP2_OUT_callback;
00096     epCallback[3] = &USBHAL::EP2_IN_callback;
00097     epCallback[4] = &USBHAL::EP3_OUT_callback;
00098     epCallback[5] = &USBHAL::EP3_IN_callback;
00099     epCallback[6] = &USBHAL::EP4_OUT_callback;
00100     epCallback[7] = &USBHAL::EP4_IN_callback;
00101     epCallback[8] = &USBHAL::EP5_OUT_callback;
00102     epCallback[9] = &USBHAL::EP5_IN_callback;
00103     epCallback[10] = &USBHAL::EP6_OUT_callback;
00104     epCallback[11] = &USBHAL::EP6_IN_callback;
00105     epCallback[12] = &USBHAL::EP7_OUT_callback;
00106     epCallback[13] = &USBHAL::EP7_IN_callback;
00107     epCallback[14] = &USBHAL::EP8_OUT_callback;
00108     epCallback[15] = &USBHAL::EP8_IN_callback;
00109     epCallback[16] = &USBHAL::EP9_OUT_callback;
00110     epCallback[17] = &USBHAL::EP9_IN_callback;
00111     epCallback[18] = &USBHAL::EP10_OUT_callback;
00112     epCallback[19] = &USBHAL::EP10_IN_callback;
00113     epCallback[20] = &USBHAL::EP11_OUT_callback;
00114     epCallback[21] = &USBHAL::EP11_IN_callback;
00115     epCallback[22] = &USBHAL::EP12_OUT_callback;
00116     epCallback[23] = &USBHAL::EP12_IN_callback;
00117     epCallback[24] = &USBHAL::EP13_OUT_callback;
00118     epCallback[25] = &USBHAL::EP13_IN_callback;
00119     epCallback[26] = &USBHAL::EP14_OUT_callback;
00120     epCallback[27] = &USBHAL::EP14_IN_callback;
00121     epCallback[28] = &USBHAL::EP15_OUT_callback;
00122     epCallback[29] = &USBHAL::EP15_IN_callback;
00123 
00124 #if defined(TARGET_KL43Z)
00125     // enable USBFS clock
00126     SIM->SCGC4 |= SIM_SCGC4_USBFS_MASK;
00127 
00128     // enable the IRC48M clock
00129     USB0->CLK_RECOVER_IRC_EN |= USB_CLK_RECOVER_IRC_EN_IRC_EN_MASK;
00130 
00131     // enable the USB clock recovery tuning
00132     USB0->CLK_RECOVER_CTRL |= USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN_MASK;
00133 
00134     // choose usb src clock
00135     SIM->SOPT2 |= SIM_SOPT2_USBSRC_MASK;
00136 #else
00137 
00138  // enable OTG clock
00139     SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK;
00140     // enable the IRC48M clock
00141     USB0->CLK_RECOVER_IRC_EN |=  USB_CLK_RECOVER_IRC_EN_IRC_EN_MASK;
00142     // enable the USB clock recovery tuning
00143     USB0->CLK_RECOVER_CTRL |= USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN_MASK;
00144     // choose usb src as PLL
00145     SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK;
00146     SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL(3) | SIM_SOPT2_USBSRC_MASK;
00147     SIM->CLKDIV2 &= ~SIM_CLKDIV2_USBDIV_MASK ;
00148     SIM->CLKDIV2 &= ~SIM_CLKDIV2_USBFRAC_MASK ;
00149     //SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | (1 << SIM_SOPT2_PLLFLLSEL_SHIFT));
00150   /*  // choose usb src as PLL
00151     SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK;
00152     SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | (1 << SIM_SOPT2_PLLFLLSEL_SHIFT));
00153 
00154     // enable OTG clock
00155     SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK;
00156 */
00157 #endif
00158 
00159     // Attach IRQ
00160     instance = this;
00161     NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr);
00162     NVIC_EnableIRQ(USB0_IRQn);
00163 
00164     // USB Module Configuration
00165     // Reset USB Module
00166     USB0->USBTRC0 |= USB_USBTRC0_USBRESET_MASK;
00167     while(USB0->USBTRC0 & USB_USBTRC0_USBRESET_MASK);
00168 
00169     // Set BDT Base Register
00170     USB0->BDTPAGE1 = (uint8_t)((uint32_t)bdt>>8);
00171     USB0->BDTPAGE2 = (uint8_t)((uint32_t)bdt>>16);
00172     USB0->BDTPAGE3 = (uint8_t)((uint32_t)bdt>>24);
00173 
00174     // Clear interrupt flag
00175     USB0->ISTAT = 0xff;
00176 
00177     // USB Interrupt Enablers
00178     USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK |
00179                    USB_INTEN_SOFTOKEN_MASK |
00180                    USB_INTEN_ERROREN_MASK  |
00181                    USB_INTEN_USBRSTEN_MASK;
00182 
00183     // Disable weak pull downs
00184     USB0->USBCTRL &= ~(USB_USBCTRL_PDE_MASK | USB_USBCTRL_SUSP_MASK);
00185 
00186     USB0->USBTRC0 |= 0x40;
00187 }
00188 
00189 USBHAL::~USBHAL(void) { }
00190 
00191 void USBHAL::connect(void) {
00192     // enable USB
00193     USB0->CTL |= USB_CTL_USBENSOFEN_MASK;
00194     // Pull up enable
00195     USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK;
00196 }
00197 
00198 void USBHAL::disconnect(void) {
00199     // disable USB
00200     USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK;
00201     // Pull up disable
00202     USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK;
00203 
00204     //Free buffers if required:
00205     for (int i = 0; i<(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2; i++) {
00206         free(endpoint_buffer[i]);
00207         endpoint_buffer[i] = NULL;
00208     }
00209     free(endpoint_buffer_iso[2]);
00210     endpoint_buffer_iso[2] = NULL;
00211     free(endpoint_buffer_iso[0]);
00212     endpoint_buffer_iso[0] = NULL;
00213 }
00214 
00215 void USBHAL::configureDevice(void) {
00216     // not needed
00217 }
00218 
00219 void USBHAL::unconfigureDevice(void) {
00220     // not needed
00221 }
00222 
00223 void USBHAL::setAddress(uint8_t address) {
00224     // we don't set the address now otherwise the usb controller does not ack
00225     // we set a flag instead
00226     // see usbisr when an IN token is received
00227     set_addr = 1;
00228     addr = address;
00229 }
00230 
00231 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
00232     uint32_t handshake_flag = 0;
00233     uint8_t * buf;
00234 
00235     if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
00236         return false;
00237     }
00238 
00239     uint32_t log_endpoint = PHY_TO_LOG(endpoint);
00240 
00241     if ((flags & ISOCHRONOUS) == 0) {
00242         handshake_flag = USB_ENDPT_EPHSHK_MASK;
00243         if (IN_EP(endpoint)) {
00244             if (endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] == NULL)
00245                 endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] = (uint8_t *) malloc (64*2);
00246             buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0];
00247         } else {
00248             if (endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] == NULL)
00249                 endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] = (uint8_t *) malloc (64*2);
00250             buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0];
00251         }
00252     } else {
00253         if (IN_EP(endpoint)) {
00254             if (endpoint_buffer_iso[2] == NULL)
00255                 endpoint_buffer_iso[2] = (uint8_t *) malloc (1023*2);
00256             buf = &endpoint_buffer_iso[2][0];
00257         } else {
00258             if (endpoint_buffer_iso[0] == NULL)
00259                 endpoint_buffer_iso[0] = (uint8_t *) malloc (1023*2);
00260             buf = &endpoint_buffer_iso[0][0];
00261         }
00262     }
00263 
00264     // IN endpt -> device to host (TX)
00265     if (IN_EP(endpoint)) {
00266         USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag |        // ep handshaking (not if iso endpoint)
00267                                               USB_ENDPT_EPTXEN_MASK;  // en TX (IN) tran
00268         bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf;
00269         bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0;
00270     }
00271     // OUT endpt -> host to device (RX)
00272     else {
00273         USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag |        // ep handshaking (not if iso endpoint)
00274                                               USB_ENDPT_EPRXEN_MASK;  // en RX (OUT) tran.
00275         bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket;
00276         bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address    = (uint32_t) buf;
00277         bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info       = BD_OWN_MASK | BD_DTS_MASK;
00278         bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info       = 0;
00279     }
00280 
00281     Data1 |= (1 << endpoint);
00282 
00283     return true;
00284 }
00285 
00286 // read setup packet
00287 void USBHAL::EP0setup(uint8_t *buffer) {
00288     uint32_t sz;
00289     endpointReadResult(EP0OUT, buffer, &sz);
00290 }
00291 
00292 void USBHAL::EP0readStage(void) {
00293     Data1 &= ~1UL;  // set DATA0
00294     bdt[0].info = (BD_DTS_MASK | BD_OWN_MASK);
00295 }
00296 
00297 void USBHAL::EP0read(void) {
00298     uint32_t idx = EP_BDT_IDX(PHY_TO_LOG(EP0OUT), RX, 0);
00299     bdt[idx].byte_count = MAX_PACKET_SIZE_EP0;
00300 }
00301 
00302 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
00303     uint32_t sz;
00304     endpointReadResult(EP0OUT, buffer, &sz);
00305     return sz;
00306 }
00307 
00308 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
00309     endpointWrite(EP0IN, buffer, size);
00310 }
00311 
00312 void USBHAL::EP0getWriteResult(void) {
00313 }
00314 
00315 void USBHAL::EP0stall(void) {
00316     stallEndpoint(EP0OUT);
00317 }
00318 
00319 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
00320     endpoint = PHY_TO_LOG(endpoint);
00321     uint32_t idx = EP_BDT_IDX(endpoint, RX, 0);
00322     bdt[idx].byte_count = maximumSize;
00323     return EP_PENDING;
00324 }
00325 
00326 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
00327     uint32_t n, sz, idx, setup = 0;
00328     uint8_t not_iso;
00329     uint8_t * ep_buf;
00330 
00331     uint32_t log_endpoint = PHY_TO_LOG(endpoint);
00332 
00333     if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
00334         return EP_INVALID;
00335     }
00336 
00337     // if read on a IN endpoint -> error
00338     if (IN_EP(endpoint)) {
00339         return EP_INVALID;
00340     }
00341 
00342     idx = EP_BDT_IDX(log_endpoint, RX, 0);
00343     sz  = bdt[idx].byte_count;
00344     not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK;
00345 
00346     //for isochronous endpoint, we don't wait an interrupt
00347     if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) {
00348         return EP_PENDING;
00349     }
00350 
00351     if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) {
00352         setup = 1;
00353     }
00354 
00355     // non iso endpoint
00356     if (not_iso) {
00357         ep_buf = endpoint_buffer[idx];
00358     } else {
00359         ep_buf = endpoint_buffer_iso[0];
00360     }
00361 
00362     for (n = 0; n < sz; n++) {
00363         buffer[n] = ep_buf[n];
00364     }
00365 
00366     if (((Data1 >> endpoint) & 1) == ((bdt[idx].info >> 6) & 1)) {
00367         if (setup && (buffer[6] == 0))  // if no setup data stage,
00368             Data1 &= ~1UL;              // set DATA0
00369         else
00370             Data1 ^= (1 << endpoint);
00371     }
00372 
00373     if (((Data1 >> endpoint) & 1)) {
00374         bdt[idx].info = BD_DTS_MASK | BD_DATA01_MASK | BD_OWN_MASK;
00375     }
00376     else {
00377         bdt[idx].info = BD_DTS_MASK | BD_OWN_MASK;
00378     }
00379 
00380     USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK;
00381     *bytesRead = sz;
00382 
00383     epComplete &= ~EP(endpoint);
00384     return EP_COMPLETED;
00385 }
00386 
00387 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
00388     uint32_t idx, n;
00389     uint8_t * ep_buf;
00390 
00391     if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
00392         return EP_INVALID;
00393     }
00394 
00395     // if write on a OUT endpoint -> error
00396     if (OUT_EP(endpoint)) {
00397         return EP_INVALID;
00398     }
00399 
00400     idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0);
00401     bdt[idx].byte_count = size;
00402 
00403 
00404     // non iso endpoint
00405     if (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPHSHK_MASK) {
00406         ep_buf = endpoint_buffer[idx];
00407     } else {
00408         ep_buf = endpoint_buffer_iso[2];
00409     }
00410 
00411     for (n = 0; n < size; n++) {
00412         ep_buf[n] = data[n];
00413     }
00414 
00415     if ((Data1 >> endpoint) & 1) {
00416         bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK;
00417     } else {
00418         bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK;
00419     }
00420 
00421     Data1 ^= (1 << endpoint);
00422 
00423     return EP_PENDING;
00424 }
00425 
00426 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
00427     if (epComplete & EP(endpoint)) {
00428         epComplete &= ~EP(endpoint);
00429         return EP_COMPLETED;
00430     }
00431 
00432     return EP_PENDING;
00433 }
00434 
00435 void USBHAL::stallEndpoint(uint8_t endpoint) {
00436     USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK;
00437 }
00438 
00439 void USBHAL::unstallEndpoint(uint8_t endpoint) {
00440     USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
00441 }
00442 
00443 bool USBHAL::getEndpointStallState(uint8_t endpoint) {
00444     uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK);
00445     return (stall) ? true : false;
00446 }
00447 
00448 void USBHAL::remoteWakeup(void) {
00449     // [TODO]
00450 }
00451 
00452 
00453 void USBHAL::_usbisr(void) {
00454     instance->usbisr();
00455 }
00456 
00457 
00458 void USBHAL::usbisr(void) {
00459     uint8_t i;
00460     uint8_t istat = USB0->ISTAT;
00461 
00462     // reset interrupt
00463     if (istat & USB_ISTAT_USBRST_MASK) {
00464         // disable all endpt
00465         for(i = 0; i < 16; i++) {
00466             USB0->ENDPOINT[i].ENDPT = 0x00;
00467         }
00468 
00469         // enable control endpoint
00470         realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
00471         realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
00472 
00473         Data1 = 0x55555555;
00474         USB0->CTL |=  USB_CTL_ODDRST_MASK;
00475 
00476         USB0->ISTAT   =  0xFF;  // clear all interrupt status flags
00477         USB0->ERRSTAT =  0xFF;  // clear all error flags
00478         USB0->ERREN   =  0xFF;  // enable error interrupt sources
00479         USB0->ADDR    =  0x00;  // set default address
00480 
00481         return;
00482     }
00483 
00484     // resume interrupt
00485     if (istat & USB_ISTAT_RESUME_MASK) {
00486         USB0->ISTAT = USB_ISTAT_RESUME_MASK;
00487     }
00488 
00489     // SOF interrupt
00490     if (istat & USB_ISTAT_SOFTOK_MASK) {
00491         USB0->ISTAT = USB_ISTAT_SOFTOK_MASK;
00492         // SOF event, read frame number
00493         SOF(frameNumber());
00494     }
00495 
00496     // stall interrupt
00497     if (istat & 1<<7) {
00498         if (USB0->ENDPOINT[0].ENDPT & USB_ENDPT_EPSTALL_MASK)
00499             USB0->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
00500         USB0->ISTAT |= USB_ISTAT_STALL_MASK;
00501     }
00502 
00503     // token interrupt
00504     if (istat & 1<<3) {
00505         uint32_t num  = (USB0->STAT >> 4) & 0x0F;
00506         uint32_t dir  = (USB0->STAT >> 3) & 0x01;
00507         uint32_t ev_odd = (USB0->STAT >> 2) & 0x01;
00508 
00509         // setup packet
00510         if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) {
00511             Data1 &= ~0x02;
00512             bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK;
00513             bdt[EP_BDT_IDX(0, TX, ODD)].info  &= ~BD_OWN_MASK;
00514 
00515             // EP0 SETUP event (SETUP data received)
00516             EP0setupCallback();
00517 
00518         } else {
00519             // OUT packet
00520             if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) {
00521                 if (num == 0)
00522                     EP0out();
00523                 else {
00524                     epComplete |= (1 << EP(num));
00525                     if ((instance->*(epCallback[EP(num) - 2]))()) {
00526                         epComplete &= ~(1 << EP(num));
00527                     }
00528                 }
00529             }
00530 
00531             // IN packet
00532             if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) {
00533                 if (num == 0) {
00534                     EP0in();
00535                     if (set_addr == 1) {
00536                         USB0->ADDR = addr & 0x7F;
00537                         set_addr = 0;
00538                     }
00539                 }
00540                 else {
00541                     epComplete |= (1 << (EP(num) + 1));
00542                     if ((instance->*(epCallback[EP(num) + 1 - 2]))()) {
00543                         epComplete &= ~(1 << (EP(num) + 1));
00544                     }
00545                 }
00546             }
00547         }
00548 
00549         USB0->ISTAT = USB_ISTAT_TOKDNE_MASK;
00550     }
00551 
00552     // sleep interrupt
00553     if (istat & 1<<4) {
00554         USB0->ISTAT |= USB_ISTAT_SLEEP_MASK;
00555     }
00556 
00557     // error interrupt
00558     if (istat & USB_ISTAT_ERROR_MASK) {
00559         USB0->ERRSTAT = 0xFF;
00560         USB0->ISTAT |= USB_ISTAT_ERROR_MASK;
00561     }
00562 }
00563 
00564 
00565 #endif