LAN(Wi-Fi) air controller through the Internet. Also you can use TANK. See:http://wizard.nestegg.jp/lanir.html

Dependencies:   EthernetNetIf mbed HTTPServer

Committer:
halfpitch
Date:
Mon Aug 01 19:21:55 2011 +0000
Revision:
0:6f9648f5eaab
Rev.A

Who changed what in which revision?

UserRevisionLine numberNew contents of line
halfpitch 0:6f9648f5eaab 1 /* mbed Microcontroller Library - SDFileSystem
halfpitch 0:6f9648f5eaab 2 * Copyright (c) 2008-2009, sford
halfpitch 0:6f9648f5eaab 3 */
halfpitch 0:6f9648f5eaab 4
halfpitch 0:6f9648f5eaab 5 // VERY DRAFT CODE! Needs serious rework/refactoring
halfpitch 0:6f9648f5eaab 6
halfpitch 0:6f9648f5eaab 7 /* Introduction
halfpitch 0:6f9648f5eaab 8 * ------------
halfpitch 0:6f9648f5eaab 9 * SD and MMC cards support a number of interfaces, but common to them all
halfpitch 0:6f9648f5eaab 10 * is one based on SPI. This is the one I'm implmenting because it means
halfpitch 0:6f9648f5eaab 11 * it is much more portable even though not so performant, and we already
halfpitch 0:6f9648f5eaab 12 * have the mbed SPI Interface!
halfpitch 0:6f9648f5eaab 13 *
halfpitch 0:6f9648f5eaab 14 * The main reference I'm using is Chapter 7, "SPI Mode" of:
halfpitch 0:6f9648f5eaab 15 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
halfpitch 0:6f9648f5eaab 16 *
halfpitch 0:6f9648f5eaab 17 * SPI Startup
halfpitch 0:6f9648f5eaab 18 * -----------
halfpitch 0:6f9648f5eaab 19 * The SD card powers up in SD mode. The SPI interface mode is selected by
halfpitch 0:6f9648f5eaab 20 * asserting CS low and sending the reset command (CMD0). The card will
halfpitch 0:6f9648f5eaab 21 * respond with a (R1) response.
halfpitch 0:6f9648f5eaab 22 *
halfpitch 0:6f9648f5eaab 23 * CMD8 is optionally sent to determine the voltage range supported, and
halfpitch 0:6f9648f5eaab 24 * indirectly determine whether it is a version 1.x SD/non-SD card or
halfpitch 0:6f9648f5eaab 25 * version 2.x. I'll just ignore this for now.
halfpitch 0:6f9648f5eaab 26 *
halfpitch 0:6f9648f5eaab 27 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
halfpitch 0:6f9648f5eaab 28 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
halfpitch 0:6f9648f5eaab 29 *
halfpitch 0:6f9648f5eaab 30 * You should also indicate whether the host supports High Capicity cards,
halfpitch 0:6f9648f5eaab 31 * and check whether the card is high capacity - i'll also ignore this
halfpitch 0:6f9648f5eaab 32 *
halfpitch 0:6f9648f5eaab 33 * SPI Protocol
halfpitch 0:6f9648f5eaab 34 * ------------
halfpitch 0:6f9648f5eaab 35 * The SD SPI protocol is based on transactions made up of 8-bit words, with
halfpitch 0:6f9648f5eaab 36 * the host starting every bus transaction by asserting the CS signal low. The
halfpitch 0:6f9648f5eaab 37 * card always responds to commands, data blocks and errors.
halfpitch 0:6f9648f5eaab 38 *
halfpitch 0:6f9648f5eaab 39 * The protocol supports a CRC, but by default it is off (except for the
halfpitch 0:6f9648f5eaab 40 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
halfpitch 0:6f9648f5eaab 41 * I'll leave the CRC off I think!
halfpitch 0:6f9648f5eaab 42 *
halfpitch 0:6f9648f5eaab 43 * Standard capacity cards have variable data block sizes, whereas High
halfpitch 0:6f9648f5eaab 44 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
halfpitch 0:6f9648f5eaab 45 * just always use the Standard Capacity cards with a block size of 512 bytes.
halfpitch 0:6f9648f5eaab 46 * This is set with CMD16.
halfpitch 0:6f9648f5eaab 47 *
halfpitch 0:6f9648f5eaab 48 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
halfpitch 0:6f9648f5eaab 49 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
halfpitch 0:6f9648f5eaab 50 * the card gets a read command, it responds with a response token, and then
halfpitch 0:6f9648f5eaab 51 * a data token or an error.
halfpitch 0:6f9648f5eaab 52 *
halfpitch 0:6f9648f5eaab 53 * SPI Command Format
halfpitch 0:6f9648f5eaab 54 * ------------------
halfpitch 0:6f9648f5eaab 55 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
halfpitch 0:6f9648f5eaab 56 *
halfpitch 0:6f9648f5eaab 57 * +---------------+------------+------------+-----------+----------+--------------+
halfpitch 0:6f9648f5eaab 58 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
halfpitch 0:6f9648f5eaab 59 * +---------------+------------+------------+-----------+----------+--------------+
halfpitch 0:6f9648f5eaab 60 *
halfpitch 0:6f9648f5eaab 61 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
halfpitch 0:6f9648f5eaab 62 *
halfpitch 0:6f9648f5eaab 63 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
halfpitch 0:6f9648f5eaab 64 *
halfpitch 0:6f9648f5eaab 65 * SPI Response Format
halfpitch 0:6f9648f5eaab 66 * -------------------
halfpitch 0:6f9648f5eaab 67 * The main response format (R1) is a status byte (normally zero). Key flags:
halfpitch 0:6f9648f5eaab 68 * idle - 1 if the card is in an idle state/initialising
halfpitch 0:6f9648f5eaab 69 * cmd - 1 if an illegal command code was detected
halfpitch 0:6f9648f5eaab 70 *
halfpitch 0:6f9648f5eaab 71 * +-------------------------------------------------+
halfpitch 0:6f9648f5eaab 72 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
halfpitch 0:6f9648f5eaab 73 * +-------------------------------------------------+
halfpitch 0:6f9648f5eaab 74 *
halfpitch 0:6f9648f5eaab 75 * R1b is the same, except it is followed by a busy signal (zeros) until
halfpitch 0:6f9648f5eaab 76 * the first non-zero byte when it is ready again.
halfpitch 0:6f9648f5eaab 77 *
halfpitch 0:6f9648f5eaab 78 * Data Response Token
halfpitch 0:6f9648f5eaab 79 * -------------------
halfpitch 0:6f9648f5eaab 80 * Every data block written to the card is acknowledged by a byte
halfpitch 0:6f9648f5eaab 81 * response token
halfpitch 0:6f9648f5eaab 82 *
halfpitch 0:6f9648f5eaab 83 * +----------------------+
halfpitch 0:6f9648f5eaab 84 * | xxx | 0 | status | 1 |
halfpitch 0:6f9648f5eaab 85 * +----------------------+
halfpitch 0:6f9648f5eaab 86 * 010 - OK!
halfpitch 0:6f9648f5eaab 87 * 101 - CRC Error
halfpitch 0:6f9648f5eaab 88 * 110 - Write Error
halfpitch 0:6f9648f5eaab 89 *
halfpitch 0:6f9648f5eaab 90 * Single Block Read and Write
halfpitch 0:6f9648f5eaab 91 * ---------------------------
halfpitch 0:6f9648f5eaab 92 *
halfpitch 0:6f9648f5eaab 93 * Block transfers have a byte header, followed by the data, followed
halfpitch 0:6f9648f5eaab 94 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
halfpitch 0:6f9648f5eaab 95 *
halfpitch 0:6f9648f5eaab 96 * +------+---------+---------+- - - -+---------+-----------+----------+
halfpitch 0:6f9648f5eaab 97 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
halfpitch 0:6f9648f5eaab 98 * +------+---------+---------+- - - -+---------+-----------+----------+
halfpitch 0:6f9648f5eaab 99 */
halfpitch 0:6f9648f5eaab 100
halfpitch 0:6f9648f5eaab 101 #include "SDFileSystem.h"
halfpitch 0:6f9648f5eaab 102
halfpitch 0:6f9648f5eaab 103 #define SD_COMMAND_TIMEOUT 5000
halfpitch 0:6f9648f5eaab 104
halfpitch 0:6f9648f5eaab 105 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
halfpitch 0:6f9648f5eaab 106 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
halfpitch 0:6f9648f5eaab 107 _cs = 1;
halfpitch 0:6f9648f5eaab 108 }
halfpitch 0:6f9648f5eaab 109
halfpitch 0:6f9648f5eaab 110 #define R1_IDLE_STATE (1 << 0)
halfpitch 0:6f9648f5eaab 111 #define R1_ERASE_RESET (1 << 1)
halfpitch 0:6f9648f5eaab 112 #define R1_ILLEGAL_COMMAND (1 << 2)
halfpitch 0:6f9648f5eaab 113 #define R1_COM_CRC_ERROR (1 << 3)
halfpitch 0:6f9648f5eaab 114 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
halfpitch 0:6f9648f5eaab 115 #define R1_ADDRESS_ERROR (1 << 5)
halfpitch 0:6f9648f5eaab 116 #define R1_PARAMETER_ERROR (1 << 6)
halfpitch 0:6f9648f5eaab 117
halfpitch 0:6f9648f5eaab 118 // Types
halfpitch 0:6f9648f5eaab 119 // - v1.x Standard Capacity
halfpitch 0:6f9648f5eaab 120 // - v2.x Standard Capacity
halfpitch 0:6f9648f5eaab 121 // - v2.x High Capacity
halfpitch 0:6f9648f5eaab 122 // - Not recognised as an SD Card
halfpitch 0:6f9648f5eaab 123
halfpitch 0:6f9648f5eaab 124 #define SDCARD_FAIL 0
halfpitch 0:6f9648f5eaab 125 #define SDCARD_V1 1
halfpitch 0:6f9648f5eaab 126 #define SDCARD_V2 2
halfpitch 0:6f9648f5eaab 127 #define SDCARD_V2HC 3
halfpitch 0:6f9648f5eaab 128
halfpitch 0:6f9648f5eaab 129 int SDFileSystem::initialise_card() {
halfpitch 0:6f9648f5eaab 130 // Set to 100kHz for initialisation, and clock card with cs = 1
halfpitch 0:6f9648f5eaab 131 _spi.frequency(100000);
halfpitch 0:6f9648f5eaab 132 _cs = 1;
halfpitch 0:6f9648f5eaab 133 for(int i=0; i<16; i++) {
halfpitch 0:6f9648f5eaab 134 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 135 }
halfpitch 0:6f9648f5eaab 136
halfpitch 0:6f9648f5eaab 137 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
halfpitch 0:6f9648f5eaab 138 if(_cmd(0, 0) != R1_IDLE_STATE) {
halfpitch 0:6f9648f5eaab 139 fprintf(stderr, "No disk, or could not put SD card in to SPI idle state\n");
halfpitch 0:6f9648f5eaab 140 return SDCARD_FAIL;
halfpitch 0:6f9648f5eaab 141 }
halfpitch 0:6f9648f5eaab 142
halfpitch 0:6f9648f5eaab 143 // send CMD8 to determine whther it is ver 2.x
halfpitch 0:6f9648f5eaab 144 int r = _cmd8();
halfpitch 0:6f9648f5eaab 145 if(r == R1_IDLE_STATE) {
halfpitch 0:6f9648f5eaab 146 return initialise_card_v2();
halfpitch 0:6f9648f5eaab 147 } else if(r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
halfpitch 0:6f9648f5eaab 148 return initialise_card_v1();
halfpitch 0:6f9648f5eaab 149 } else {
halfpitch 0:6f9648f5eaab 150 fprintf(stderr, "Not in idle state after sending CMD8 (not an SD card?)\n");
halfpitch 0:6f9648f5eaab 151 return SDCARD_FAIL;
halfpitch 0:6f9648f5eaab 152 }
halfpitch 0:6f9648f5eaab 153 }
halfpitch 0:6f9648f5eaab 154
halfpitch 0:6f9648f5eaab 155 int SDFileSystem::initialise_card_v1() {
halfpitch 0:6f9648f5eaab 156 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
halfpitch 0:6f9648f5eaab 157 _cmd(55, 0);
halfpitch 0:6f9648f5eaab 158 if(_cmd(41, 0) == 0) {
halfpitch 0:6f9648f5eaab 159 return SDCARD_V1;
halfpitch 0:6f9648f5eaab 160 }
halfpitch 0:6f9648f5eaab 161 }
halfpitch 0:6f9648f5eaab 162
halfpitch 0:6f9648f5eaab 163 fprintf(stderr, "Timeout waiting for v1.x card\n");
halfpitch 0:6f9648f5eaab 164 return SDCARD_FAIL;
halfpitch 0:6f9648f5eaab 165 }
halfpitch 0:6f9648f5eaab 166
halfpitch 0:6f9648f5eaab 167 int SDFileSystem::initialise_card_v2() {
halfpitch 0:6f9648f5eaab 168
halfpitch 0:6f9648f5eaab 169 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
halfpitch 0:6f9648f5eaab 170 _cmd(55, 0);
halfpitch 0:6f9648f5eaab 171 if(_cmd(41, 0) == 0) {
halfpitch 0:6f9648f5eaab 172 _cmd58();
halfpitch 0:6f9648f5eaab 173 return SDCARD_V2;
halfpitch 0:6f9648f5eaab 174 }
halfpitch 0:6f9648f5eaab 175 }
halfpitch 0:6f9648f5eaab 176
halfpitch 0:6f9648f5eaab 177 fprintf(stderr, "Timeout waiting for v2.x card\n");
halfpitch 0:6f9648f5eaab 178 return SDCARD_FAIL;
halfpitch 0:6f9648f5eaab 179 }
halfpitch 0:6f9648f5eaab 180
halfpitch 0:6f9648f5eaab 181 int SDFileSystem::disk_initialize() {
halfpitch 0:6f9648f5eaab 182
halfpitch 0:6f9648f5eaab 183 int i = initialise_card();
halfpitch 0:6f9648f5eaab 184 // printf("init card = %d\n", i);
halfpitch 0:6f9648f5eaab 185 // printf("OK\n");
halfpitch 0:6f9648f5eaab 186
halfpitch 0:6f9648f5eaab 187 _sectors = _sd_sectors();
halfpitch 0:6f9648f5eaab 188
halfpitch 0:6f9648f5eaab 189 // Set block length to 512 (CMD16)
halfpitch 0:6f9648f5eaab 190 if(_cmd(16, 512) != 0) {
halfpitch 0:6f9648f5eaab 191 fprintf(stderr, "Set 512-byte block timed out\n");
halfpitch 0:6f9648f5eaab 192 return 1;
halfpitch 0:6f9648f5eaab 193 }
halfpitch 0:6f9648f5eaab 194
halfpitch 0:6f9648f5eaab 195 _spi.frequency(1000000); // Set to 1MHz for data transfer
halfpitch 0:6f9648f5eaab 196 return 0;
halfpitch 0:6f9648f5eaab 197 }
halfpitch 0:6f9648f5eaab 198
halfpitch 0:6f9648f5eaab 199 int SDFileSystem::disk_write(const char *buffer, int block_number) {
halfpitch 0:6f9648f5eaab 200 // set write address for single block (CMD24)
halfpitch 0:6f9648f5eaab 201 if(_cmd(24, block_number * 512) != 0) {
halfpitch 0:6f9648f5eaab 202 return 1;
halfpitch 0:6f9648f5eaab 203 }
halfpitch 0:6f9648f5eaab 204
halfpitch 0:6f9648f5eaab 205 // send the data block
halfpitch 0:6f9648f5eaab 206 _write(buffer, 512);
halfpitch 0:6f9648f5eaab 207 return 0;
halfpitch 0:6f9648f5eaab 208 }
halfpitch 0:6f9648f5eaab 209
halfpitch 0:6f9648f5eaab 210 int SDFileSystem::disk_read(char *buffer, int block_number) {
halfpitch 0:6f9648f5eaab 211 // set read address for single block (CMD17)
halfpitch 0:6f9648f5eaab 212 if(_cmd(17, block_number * 512) != 0) {
halfpitch 0:6f9648f5eaab 213 return 1;
halfpitch 0:6f9648f5eaab 214 }
halfpitch 0:6f9648f5eaab 215
halfpitch 0:6f9648f5eaab 216 // receive the data
halfpitch 0:6f9648f5eaab 217 _read(buffer, 512);
halfpitch 0:6f9648f5eaab 218 return 0;
halfpitch 0:6f9648f5eaab 219 }
halfpitch 0:6f9648f5eaab 220
halfpitch 0:6f9648f5eaab 221 int SDFileSystem::disk_status() { return 0; }
halfpitch 0:6f9648f5eaab 222 int SDFileSystem::disk_sync() { return 0; }
halfpitch 0:6f9648f5eaab 223 int SDFileSystem::disk_sectors() { return _sectors; }
halfpitch 0:6f9648f5eaab 224
halfpitch 0:6f9648f5eaab 225 // PRIVATE FUNCTIONS
halfpitch 0:6f9648f5eaab 226
halfpitch 0:6f9648f5eaab 227 int SDFileSystem::_cmd(int cmd, int arg) {
halfpitch 0:6f9648f5eaab 228 _cs = 0;
halfpitch 0:6f9648f5eaab 229
halfpitch 0:6f9648f5eaab 230 // send a command
halfpitch 0:6f9648f5eaab 231 _spi.write(0x40 | cmd);
halfpitch 0:6f9648f5eaab 232 _spi.write(arg >> 24);
halfpitch 0:6f9648f5eaab 233 _spi.write(arg >> 16);
halfpitch 0:6f9648f5eaab 234 _spi.write(arg >> 8);
halfpitch 0:6f9648f5eaab 235 _spi.write(arg >> 0);
halfpitch 0:6f9648f5eaab 236 _spi.write(0x95);
halfpitch 0:6f9648f5eaab 237
halfpitch 0:6f9648f5eaab 238 // wait for the repsonse (response[7] == 0)
halfpitch 0:6f9648f5eaab 239 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
halfpitch 0:6f9648f5eaab 240 int response = _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 241 if(!(response & 0x80)) {
halfpitch 0:6f9648f5eaab 242 _cs = 1;
halfpitch 0:6f9648f5eaab 243 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 244 return response;
halfpitch 0:6f9648f5eaab 245 }
halfpitch 0:6f9648f5eaab 246 }
halfpitch 0:6f9648f5eaab 247 _cs = 1;
halfpitch 0:6f9648f5eaab 248 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 249 return -1; // timeout
halfpitch 0:6f9648f5eaab 250 }
halfpitch 0:6f9648f5eaab 251 int SDFileSystem::_cmdx(int cmd, int arg) {
halfpitch 0:6f9648f5eaab 252 _cs = 0;
halfpitch 0:6f9648f5eaab 253
halfpitch 0:6f9648f5eaab 254 // send a command
halfpitch 0:6f9648f5eaab 255 _spi.write(0x40 | cmd);
halfpitch 0:6f9648f5eaab 256 _spi.write(arg >> 24);
halfpitch 0:6f9648f5eaab 257 _spi.write(arg >> 16);
halfpitch 0:6f9648f5eaab 258 _spi.write(arg >> 8);
halfpitch 0:6f9648f5eaab 259 _spi.write(arg >> 0);
halfpitch 0:6f9648f5eaab 260 _spi.write(0x95);
halfpitch 0:6f9648f5eaab 261
halfpitch 0:6f9648f5eaab 262 // wait for the repsonse (response[7] == 0)
halfpitch 0:6f9648f5eaab 263 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
halfpitch 0:6f9648f5eaab 264 int response = _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 265 if(!(response & 0x80)) {
halfpitch 0:6f9648f5eaab 266 return response;
halfpitch 0:6f9648f5eaab 267 }
halfpitch 0:6f9648f5eaab 268 }
halfpitch 0:6f9648f5eaab 269 _cs = 1;
halfpitch 0:6f9648f5eaab 270 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 271 return -1; // timeout
halfpitch 0:6f9648f5eaab 272 }
halfpitch 0:6f9648f5eaab 273
halfpitch 0:6f9648f5eaab 274
halfpitch 0:6f9648f5eaab 275 int SDFileSystem::_cmd58() {
halfpitch 0:6f9648f5eaab 276 _cs = 0;
halfpitch 0:6f9648f5eaab 277 int arg = 0;
halfpitch 0:6f9648f5eaab 278
halfpitch 0:6f9648f5eaab 279 // send a command
halfpitch 0:6f9648f5eaab 280 _spi.write(0x40 | 58);
halfpitch 0:6f9648f5eaab 281 _spi.write(arg >> 24);
halfpitch 0:6f9648f5eaab 282 _spi.write(arg >> 16);
halfpitch 0:6f9648f5eaab 283 _spi.write(arg >> 8);
halfpitch 0:6f9648f5eaab 284 _spi.write(arg >> 0);
halfpitch 0:6f9648f5eaab 285 _spi.write(0x95);
halfpitch 0:6f9648f5eaab 286
halfpitch 0:6f9648f5eaab 287 // wait for the repsonse (response[7] == 0)
halfpitch 0:6f9648f5eaab 288 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
halfpitch 0:6f9648f5eaab 289 int response = _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 290 if(!(response & 0x80)) {
halfpitch 0:6f9648f5eaab 291 int ocr = _spi.write(0xFF) << 24;
halfpitch 0:6f9648f5eaab 292 ocr |= _spi.write(0xFF) << 16;
halfpitch 0:6f9648f5eaab 293 ocr |= _spi.write(0xFF) << 8;
halfpitch 0:6f9648f5eaab 294 ocr |= _spi.write(0xFF) << 0;
halfpitch 0:6f9648f5eaab 295 // printf("OCR = 0x%08X\n", ocr);
halfpitch 0:6f9648f5eaab 296 _cs = 1;
halfpitch 0:6f9648f5eaab 297 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 298 return response;
halfpitch 0:6f9648f5eaab 299 }
halfpitch 0:6f9648f5eaab 300 }
halfpitch 0:6f9648f5eaab 301 _cs = 1;
halfpitch 0:6f9648f5eaab 302 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 303 return -1; // timeout
halfpitch 0:6f9648f5eaab 304 }
halfpitch 0:6f9648f5eaab 305
halfpitch 0:6f9648f5eaab 306 int SDFileSystem::_cmd8() {
halfpitch 0:6f9648f5eaab 307 _cs = 0;
halfpitch 0:6f9648f5eaab 308
halfpitch 0:6f9648f5eaab 309 // send a command
halfpitch 0:6f9648f5eaab 310 _spi.write(0x40 | 8); // CMD8
halfpitch 0:6f9648f5eaab 311 _spi.write(0x00); // reserved
halfpitch 0:6f9648f5eaab 312 _spi.write(0x00); // reserved
halfpitch 0:6f9648f5eaab 313 _spi.write(0x01); // 3.3v
halfpitch 0:6f9648f5eaab 314 _spi.write(0xAA); // check pattern
halfpitch 0:6f9648f5eaab 315 _spi.write(0x87); // crc
halfpitch 0:6f9648f5eaab 316
halfpitch 0:6f9648f5eaab 317 // wait for the repsonse (response[7] == 0)
halfpitch 0:6f9648f5eaab 318 for(int i=0; i<SD_COMMAND_TIMEOUT * 1000; i++) {
halfpitch 0:6f9648f5eaab 319 char response[5];
halfpitch 0:6f9648f5eaab 320 response[0] = _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 321 if(!(response[0] & 0x80)) {
halfpitch 0:6f9648f5eaab 322 for(int j=1; j<5; j++) {
halfpitch 0:6f9648f5eaab 323 response[i] = _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 324 }
halfpitch 0:6f9648f5eaab 325 _cs = 1;
halfpitch 0:6f9648f5eaab 326 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 327 return response[0];
halfpitch 0:6f9648f5eaab 328 }
halfpitch 0:6f9648f5eaab 329 }
halfpitch 0:6f9648f5eaab 330 _cs = 1;
halfpitch 0:6f9648f5eaab 331 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 332 return -1; // timeout
halfpitch 0:6f9648f5eaab 333 }
halfpitch 0:6f9648f5eaab 334
halfpitch 0:6f9648f5eaab 335 int SDFileSystem::_read(char *buffer, int length) {
halfpitch 0:6f9648f5eaab 336 _cs = 0;
halfpitch 0:6f9648f5eaab 337
halfpitch 0:6f9648f5eaab 338 // read until start byte (0xFF)
halfpitch 0:6f9648f5eaab 339 while(_spi.write(0xFF) != 0xFE);
halfpitch 0:6f9648f5eaab 340
halfpitch 0:6f9648f5eaab 341 // read data
halfpitch 0:6f9648f5eaab 342 for(int i=0; i<length; i++) {
halfpitch 0:6f9648f5eaab 343 buffer[i] = _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 344 }
halfpitch 0:6f9648f5eaab 345 _spi.write(0xFF); // checksum
halfpitch 0:6f9648f5eaab 346 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 347
halfpitch 0:6f9648f5eaab 348 _cs = 1;
halfpitch 0:6f9648f5eaab 349 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 350 return 0;
halfpitch 0:6f9648f5eaab 351 }
halfpitch 0:6f9648f5eaab 352
halfpitch 0:6f9648f5eaab 353 int SDFileSystem::_write(const char *buffer, int length) {
halfpitch 0:6f9648f5eaab 354 _cs = 0;
halfpitch 0:6f9648f5eaab 355
halfpitch 0:6f9648f5eaab 356 // indicate start of block
halfpitch 0:6f9648f5eaab 357 _spi.write(0xFE);
halfpitch 0:6f9648f5eaab 358
halfpitch 0:6f9648f5eaab 359 // write the data
halfpitch 0:6f9648f5eaab 360 for(int i=0; i<length; i++) {
halfpitch 0:6f9648f5eaab 361 _spi.write(buffer[i]);
halfpitch 0:6f9648f5eaab 362 }
halfpitch 0:6f9648f5eaab 363
halfpitch 0:6f9648f5eaab 364 // write the checksum
halfpitch 0:6f9648f5eaab 365 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 366 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 367
halfpitch 0:6f9648f5eaab 368 // check the repsonse token
halfpitch 0:6f9648f5eaab 369 if((_spi.write(0xFF) & 0x1F) != 0x05) {
halfpitch 0:6f9648f5eaab 370 _cs = 1;
halfpitch 0:6f9648f5eaab 371 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 372 return 1;
halfpitch 0:6f9648f5eaab 373 }
halfpitch 0:6f9648f5eaab 374
halfpitch 0:6f9648f5eaab 375 // wait for write to finish
halfpitch 0:6f9648f5eaab 376 while(_spi.write(0xFF) == 0);
halfpitch 0:6f9648f5eaab 377
halfpitch 0:6f9648f5eaab 378 _cs = 1;
halfpitch 0:6f9648f5eaab 379 _spi.write(0xFF);
halfpitch 0:6f9648f5eaab 380 return 0;
halfpitch 0:6f9648f5eaab 381 }
halfpitch 0:6f9648f5eaab 382
halfpitch 0:6f9648f5eaab 383 static int ext_bits(char *data, int msb, int lsb) {
halfpitch 0:6f9648f5eaab 384 int bits = 0;
halfpitch 0:6f9648f5eaab 385 int size = 1 + msb - lsb;
halfpitch 0:6f9648f5eaab 386 for(int i=0; i<size; i++) {
halfpitch 0:6f9648f5eaab 387 int position = lsb + i;
halfpitch 0:6f9648f5eaab 388 int byte = 15 - (position >> 3);
halfpitch 0:6f9648f5eaab 389 int bit = position & 0x7;
halfpitch 0:6f9648f5eaab 390 int value = (data[byte] >> bit) & 1;
halfpitch 0:6f9648f5eaab 391 bits |= value << i;
halfpitch 0:6f9648f5eaab 392 }
halfpitch 0:6f9648f5eaab 393 return bits;
halfpitch 0:6f9648f5eaab 394 }
halfpitch 0:6f9648f5eaab 395
halfpitch 0:6f9648f5eaab 396 int SDFileSystem::_sd_sectors() {
halfpitch 0:6f9648f5eaab 397
halfpitch 0:6f9648f5eaab 398 // CMD9, Response R2 (R1 byte + 16-byte block read)
halfpitch 0:6f9648f5eaab 399 if(_cmdx(9, 0) != 0) {
halfpitch 0:6f9648f5eaab 400 fprintf(stderr, "Didn't get a response from the disk\n");
halfpitch 0:6f9648f5eaab 401 return 0;
halfpitch 0:6f9648f5eaab 402 }
halfpitch 0:6f9648f5eaab 403
halfpitch 0:6f9648f5eaab 404 char csd[16];
halfpitch 0:6f9648f5eaab 405 if(_read(csd, 16) != 0) {
halfpitch 0:6f9648f5eaab 406 fprintf(stderr, "Couldn't read csd response from disk\n");
halfpitch 0:6f9648f5eaab 407 return 0;
halfpitch 0:6f9648f5eaab 408 }
halfpitch 0:6f9648f5eaab 409
halfpitch 0:6f9648f5eaab 410 // csd_structure : csd[127:126]
halfpitch 0:6f9648f5eaab 411 // c_size : csd[73:62]
halfpitch 0:6f9648f5eaab 412 // c_size_mult : csd[49:47]
halfpitch 0:6f9648f5eaab 413 // read_bl_len : csd[83:80] - the *maximum* read block length
halfpitch 0:6f9648f5eaab 414
halfpitch 0:6f9648f5eaab 415 int csd_structure = ext_bits(csd, 127, 126);
halfpitch 0:6f9648f5eaab 416 int c_size = ext_bits(csd, 73, 62);
halfpitch 0:6f9648f5eaab 417 int c_size_mult = ext_bits(csd, 49, 47);
halfpitch 0:6f9648f5eaab 418 int read_bl_len = ext_bits(csd, 83, 80);
halfpitch 0:6f9648f5eaab 419
halfpitch 0:6f9648f5eaab 420 // printf("CSD_STRUCT = %d\n", csd_structure);
halfpitch 0:6f9648f5eaab 421
halfpitch 0:6f9648f5eaab 422 if(csd_structure != 0) {
halfpitch 0:6f9648f5eaab 423 fprintf(stderr, "This disk tastes funny! I only know about type 0 CSD structures\n");
halfpitch 0:6f9648f5eaab 424 return 0;
halfpitch 0:6f9648f5eaab 425 }
halfpitch 0:6f9648f5eaab 426
halfpitch 0:6f9648f5eaab 427 // memory capacity = BLOCKNR * BLOCK_LEN
halfpitch 0:6f9648f5eaab 428 // where
halfpitch 0:6f9648f5eaab 429 // BLOCKNR = (C_SIZE+1) * MULT
halfpitch 0:6f9648f5eaab 430 // MULT = 2^(C_SIZE_MULT+2) (C_SIZE_MULT < 8)
halfpitch 0:6f9648f5eaab 431 // BLOCK_LEN = 2^READ_BL_LEN, (READ_BL_LEN < 12)
halfpitch 0:6f9648f5eaab 432
halfpitch 0:6f9648f5eaab 433 int block_len = 1 << read_bl_len;
halfpitch 0:6f9648f5eaab 434 int mult = 1 << (c_size_mult + 2);
halfpitch 0:6f9648f5eaab 435 int blocknr = (c_size + 1) * mult;
halfpitch 0:6f9648f5eaab 436 int capacity = blocknr * block_len;
halfpitch 0:6f9648f5eaab 437
halfpitch 0:6f9648f5eaab 438 int blocks = capacity / 512;
halfpitch 0:6f9648f5eaab 439
halfpitch 0:6f9648f5eaab 440 return blocks;
halfpitch 0:6f9648f5eaab 441 }