UART console application for testing SX1272/SX1276

Dependencies:   SX127x

/media/uploads/dudmuck/lora.png

This is a UART console test application for using SX127x library driver for SX1272/SX1276 radio transceivers. Serial console is provided at 57600bps. Refer to Serial Communication with a PC for information about using the serial port with your PC.

Using this command interface, you can exercise the functionality of radio chip without needing specialized software application for your PC.

Commands which can be used include ? to list available commands, or . to query status from radio chip, for example. The serial console allows you to configure the radio chip, such as setting spreading factor, bandwidth, operating frequency, etc.

A simple chat application is provided to try communications between two boards. The SX127x library object is instantiated with pin assignments generic arduino headers, but can be easily reassigned for any mbed board.

The same driver library can operate for both SX1272 and SX1276. Upon starting, the driver auto-detects whether SX1272 or SX1276 transceiver chip is connected by attempting to change the LowFrequencyModeOn bit in RegOpMode register. If this bit can be changed, then the radio device is SX1276. This bit is not implemented in SX1272. A few of the radio driver functions select behavior based on this detection. The differences between these two devices is small, from a software perspective.

Using with SX1276MB1xAS Shield

This component plugs into any board with arduino uno headers.

There are two different version of this shield. European version (MAS), and North American (LAS). The LAS shield uses PA_BOOST transmit pin to permit +20dBm power. The MAS version uses RFO transmit pin in Europe. This software reads RF switch pin (A4 pin) pulling resistor to determine which type of shield is installed.


Using with your own production board

This software is useful for validating RF performance your own LoRa board design, because only two external pins needs to be provided to PC (UART TX/RX). You can select an mbed platform which matches the CPU on your own board. If the memory size doesnt match exactly, you can export the program to an offline toolchain and edit the target type or linker file there.

Transmitter Test Guidelines

FSK mode is used for transmitter testing, because an unmodulated carrier can be sent, permitting easy measurement of TX power and frequency error.

commands used for transmitter testing:

  • frf915.0 change to your desired RF center frequency (in this case 915MHz)
  • L to toggle the radio chip into FSK mode.
  • fdev0 to configure TX frequency deviation to zero, to put the transmitted carrier on the center frequency.
  • pas to select which TX pin is connected to antenna matching (RFO vs PA_BOOST).
  • op<dBm> to configure TX power.
  • If you desire to test higher power PA_BOOST, use ocp<mA>
  • w 01 03 put radio chip into transmit mode (skips writing to FIFO). This will cause radio to transmit preamble, because the FIFO is empty in TX mode. Since Fdev is zero, an unmodulated carrier is sent.
  • Spectrum analyzer can now be used to to observe TX power, harmonics, power consumption, or frequency error.
  • stby to end transmission, or use h to reset radio chip to default condition.
  • Use period . command at any time to review current radio configuration.

LoRa transmitter testing

  • use L command to toggle radio into LoRa, if necessary.
  • Normally the tx command is used to manually send single packets.
  • txc will toggle TxContinuousMode in LoRa modem to send continuous modulated transmission.
  • Useful for checking adjacent channel power.
  • enter txc again to end transmission.

Receiver Test Guidelines

FSK mode is used for receiver sensitivity testing, allowing the use of a BERT signal generator (such as R/S SMIQ03B). Using this method provides real-time indication of receiver sensitivity, useful for tuning and impedance matching. The radio chip outputs DCLK and DATA digital signals which are connected back to BERT signal generator.

commands used for receiver testing:

  • L to toggle the radio chip into FSK mode.
  • datam to toggle FSK modem into continuous mode. This disables packet engine and gives direct access to demodulator.
  • configure DIO1 pin to DCLK function, and DIO2 pin to DATA function:
    • dio command to list current DIO pin asignments
    • d1 to cycle DIO1 function until Dclk is selected
    • d2 for DIO2, only Data function is available in FSK continuous mode
  • frf915.0 change to your desired RF center frequency (in this case 915MHz)
  • rx to start receiver
  • stby to disable receiver

Full command list

Arguments shown in square brackets [] indicate required. <> are optional, where leaving off the argument usually causes a read of the item, and providing the value causes a write operation. You should always have the radio chip datasheet on-hand when using these commands.

Hitting <enter> key by itself will repeat last command.
<Ctrl-C> will cancel an operation in progress.

command list: common commands (both LoRa and FSK)

commanddescription
. (period)print current radio status
?list available commands
Ltoggle active radio modem (LoRa vs FSK)
hhardware reset, put radio into default power-on condition
frf<MHz>get/set RF operating frequency
rxstart radio receiver (any received packets are printed onto your serial terminal)
rssiread instantaneous RSSI (level read at the time command is issued)
tx<%d>transmit test packet. Packet length value can be provided as argument, or uses last value if not provided
payl<%d>get/set payload length
bw<KHz>get/set bandwidth. In LoRa mode, both receive and transmit bandwidth are changed. For FSK, only receive bandwidth is affected. bwa accesses AFC bandwidth in FSK
pastoggle RFO / PA_BOOST transmit pin output selection
op<dBm>get/set TX output power. Value is provided in dBm. Special case is value of 20dBm (on PA_BOOST), which causes increase in TX DAC voltage
ocp<mA>get/set TX current limit, in milliamps. Necessary adjustment when +20dBm is used
dioshow DIO pin assignments
d<0-5>change DIO pin assignment, the pin number is given as arguement. Each pin has up to 4 possible functions
pres<%d>set preamble length. LoRa: number of symbols. FSK: number of bytes
crcontoggle crcOn
lnabcycle LNA-boost setting (receiver performance adjustment)
Rread all radio registers (use only while reading chip datasheet)
r[%x]read single radio register (use only while reading chip datasheet)
w[%x %x]write single radio register (use only while reading chip datasheet)
pllbwchange PLL bandwidth
stbyset chip mode to standby
sleepset chip mode to sleep
fstxset chip mode to fstx
fsrxset chip mode to fsrx
Eiger range test commandsdescription
pid<%d>get set ID number in range test payload
pertx<%d>start Eiger PER transmit. The count of packets to send is provided as arguement
perrxstart Eiger PER receive
txpd<%d>get/set tx delay between PER packets transmitted

command list: LoRa modem commands

LoRa commandLoRa description
iqinvtoggle RX IQ invert
cintoggle TX IQ invert
lhp<%d>(RX) get/set hop period
sync<%x>get/set sync (post-preamble gap, single byte)
cr<1-4>get/set codingRate
lhmtoggle explicit/implicit (explicit mode sends payload length with each packet)
sf<%d>get/set spreadingFactor (SF7 to SF12)
ldrtoggle LowDataRateOptimize (changes payload encoding, for long packets)
txctoggle TxContinuousMode
rxt<%d>get/set SymbTimeout
rxsstart RX_SINGLE (receives only for SymbTimeout symbols)
cad<%d num tries>run channel activity detection

command list: FSK modem commands

FSK commandFSK description
c<%d>get/set test cases. Several FSK bitrates/bandwidths pre-configured to give optimal performance.
fdev<kHz>(TX) get/set frequency deviation
mods(TX) increment modulation shaping
par(TX) increment paRamp
datamtoggle DataMode (packet/continuous)
fifottoggle TxStartCondition (FifoThreshold level vs FifoNotEmpty)
br<%f kbps>get/set bitrate
dcfincrement DcFree (manchester / whitening)
pktftoggle PacketFormat fixed/variable length
syncontoggle SyncOn (frame sync, SFD enable)
bitsynctoggle BitSyncOn (continuous mode only)
syncw<hex bytes>get/set syncword. Sync bytes are provided by hex octects separated by spaces.
fei(RX) read FEI
rxt(RX) increment RxTrigger (RX start on rssi vs. preamble detect)
rssit<-dBm>(RX) get/set rssi threshold (trigger level for RSSI interrupt)
rssis<%d>(RX) get/set rssi smoothing
rssio<%d>(RX) get/set rssi offset
agcauto(RX) toggle AgcAutoOn (true = LNA gain set automatically)
afcauto(RX) toggle AfcAutoOn
ac(RX) AfcClear
ar(RX) increment AutoRestartRxMode
alc(RX) toggle AfcAutoClearOn (only if AfcAutoOn is set)
prep(RX) toggle PreamblePolarity (0xAA vs 0x55)
pde(RX) toggle PreambleDetectorOn
pds<%d>(RX) get/set PreambleDetectorSize
pdt<%d>(RX) get/set PreambleDetectorTol
mp(RX) toggle MapPreambleDetect (DIO function RSSI vs PreambleDetect)
thr<%d>get/set FifoThreshold (triggers FifoLevel interrupt)
polltoggle poll_irq_en. Radio events read from DIO pins vs polling of IrqFlags register
Eempty out FIFO
clkoutincrement ClkOut divider
ookenter OOK mode
ooktincrement OokThreshType
ooksincrement OokPeakTheshStep
sqlch<%d>get/set OokFixedThresh
Committer:
dudmuck
Date:
Tue Aug 02 15:36:51 2016 -0700
Revision:
19:be8a8b0e7320
Parent:
18:9530d682fd9a
Child:
20:b11592c9ba5f
corrected errors and warnings in GCC

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dudmuck 1:1cd0afbed23c 1 #include "sx127x_lora.h"
dudmuck 1:1cd0afbed23c 2 #include "sx127x_fsk.h"
dudmuck 19:be8a8b0e7320 3 #define __STDC_FORMAT_MACROS
dudmuck 19:be8a8b0e7320 4 #include <inttypes.h>
dudmuck 18:9530d682fd9a 5 //#include "kermit.h"
dudmuck 0:be215de91a68 6
dudmuck 13:c73caaee93a5 7 //#define FSK_PER
dudmuck 10:d9bb2ce57f05 8 //#define START_EIGER_RX
dudmuck 10:d9bb2ce57f05 9 //#define START_EIGER_TX
dudmuck 10:d9bb2ce57f05 10
dudmuck 10:d9bb2ce57f05 11 DigitalOut led1(LED1);
dudmuck 0:be215de91a68 12 Serial pc(USBTX, USBRX);
dudmuck 0:be215de91a68 13
dudmuck 0:be215de91a68 14 uint8_t tx_cnt;
dudmuck 0:be215de91a68 15 char pcbuf[64];
dudmuck 5:360069ec9953 16 int pcbuf_len;
dudmuck 0:be215de91a68 17
dudmuck 0:be215de91a68 18 typedef enum {
dudmuck 0:be215de91a68 19 APP_NONE = 0,
dudmuck 0:be215de91a68 20 APP_CHAT
dudmuck 0:be215de91a68 21 } app_e;
dudmuck 0:be215de91a68 22
dudmuck 0:be215de91a68 23 app_e app = APP_NONE;
dudmuck 0:be215de91a68 24
dudmuck 18:9530d682fd9a 25 #define FSK_LARGE_PKT_THRESHOLD 0x3f
dudmuck 7:c3c54f222ced 26
dudmuck 18:9530d682fd9a 27 bool ook_test_en;
dudmuck 18:9530d682fd9a 28 bool poll_irq_en;
dudmuck 1:1cd0afbed23c 29
dudmuck 8:227605e4a760 30 /***************************** eiger per: *************************************************/
dudmuck 8:227605e4a760 31
dudmuck 18:9530d682fd9a 32 uint32_t num_cads;
dudmuck 18:9530d682fd9a 33 bool cadper_enable;
dudmuck 8:227605e4a760 34 bool per_en;
dudmuck 8:227605e4a760 35 float per_tx_delay = 0.1;
dudmuck 8:227605e4a760 36 int per_id;
dudmuck 18:9530d682fd9a 37 uint32_t PacketTxCnt, PacketTxCntEnd;
dudmuck 8:227605e4a760 38 uint32_t PacketPerOkCnt;
dudmuck 8:227605e4a760 39 int PacketRxSequencePrev;
dudmuck 8:227605e4a760 40 uint32_t PacketPerKoCnt;
dudmuck 8:227605e4a760 41 uint32_t PacketNormalCnt;
dudmuck 8:227605e4a760 42 Timeout per_timeout;
dudmuck 8:227605e4a760 43
dudmuck 18:9530d682fd9a 44
dudmuck 18:9530d682fd9a 45
dudmuck 0:be215de91a68 46 /******************************************************************************/
dudmuck 9:2f13a9ef27b4 47 #ifdef TARGET_MTS_MDOT_F411RE
dudmuck 9:2f13a9ef27b4 48 // mosi, miso, sclk, cs, rst, dio0, dio1
dudmuck 9:2f13a9ef27b4 49 SX127x radio(LORA_MOSI, LORA_MISO, LORA_SCK, LORA_NSS, LORA_RESET, LORA_DIO0, LORA_DIO1);
dudmuck 9:2f13a9ef27b4 50
dudmuck 9:2f13a9ef27b4 51 DigitalOut txctl(LORA_TXCTL);
dudmuck 9:2f13a9ef27b4 52 DigitalOut rxctl(LORA_RXCTL);
dudmuck 9:2f13a9ef27b4 53
dudmuck 9:2f13a9ef27b4 54 void rfsw_callback()
dudmuck 9:2f13a9ef27b4 55 {
dudmuck 9:2f13a9ef27b4 56 /* SKY13350 */
dudmuck 9:2f13a9ef27b4 57 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) { // start of transmission
dudmuck 9:2f13a9ef27b4 58 txctl = 1;
dudmuck 9:2f13a9ef27b4 59 rxctl = 0;
dudmuck 9:2f13a9ef27b4 60 } else { // reception:
dudmuck 9:2f13a9ef27b4 61 txctl = 0;
dudmuck 9:2f13a9ef27b4 62 rxctl = 1;
dudmuck 9:2f13a9ef27b4 63 }
dudmuck 9:2f13a9ef27b4 64 }
dudmuck 9:2f13a9ef27b4 65
dudmuck 15:c69b942685ea 66 #define FSK_RSSI_OFFSET 0
dudmuck 15:c69b942685ea 67 #define FSK_RSSI_SMOOTHING 2
dudmuck 15:c69b942685ea 68
dudmuck 9:2f13a9ef27b4 69 #else /********************* ...mDot **********************/
dudmuck 0:be215de91a68 70
dudmuck 5:360069ec9953 71 // pin: 3 8 1 7 10 12 5
dudmuck 5:360069ec9953 72 // mosi, miso, sclk, cs, rst, dio0, dio1
dudmuck 6:fe16f96ee335 73 SX127x radio(D11, D12, D13, D10, A0, D2, D3); // sx1276 arduino shield
dudmuck 0:be215de91a68 74
dudmuck 15:c69b942685ea 75 // for SX1276 arduino shield:
dudmuck 7:c3c54f222ced 76 #ifdef TARGET_LPC11U6X
dudmuck 15:c69b942685ea 77 //DigitalOut rfsw(P0_23);
dudmuck 15:c69b942685ea 78 DigitalInOut rfsw(P0_23);
dudmuck 7:c3c54f222ced 79 #else
dudmuck 15:c69b942685ea 80 //DigitalOut rfsw(A4);
dudmuck 15:c69b942685ea 81 DigitalInOut rfsw(A4);
dudmuck 7:c3c54f222ced 82 #endif
dudmuck 6:fe16f96ee335 83
dudmuck 14:c57ea544dc18 84 DigitalIn dio2(D4);
dudmuck 14:c57ea544dc18 85
dudmuck 6:fe16f96ee335 86 void rfsw_callback()
dudmuck 6:fe16f96ee335 87 {
dudmuck 6:fe16f96ee335 88 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER)
dudmuck 6:fe16f96ee335 89 rfsw = 1;
dudmuck 6:fe16f96ee335 90 else
dudmuck 6:fe16f96ee335 91 rfsw = 0;
dudmuck 6:fe16f96ee335 92 }
dudmuck 6:fe16f96ee335 93
dudmuck 15:c69b942685ea 94 #define FSK_RSSI_OFFSET 5
dudmuck 15:c69b942685ea 95 #define FSK_RSSI_SMOOTHING 2
dudmuck 15:c69b942685ea 96
dudmuck 15:c69b942685ea 97 typedef enum {
dudmuck 15:c69b942685ea 98 SHIELD_TYPE_NONE = 0,
dudmuck 15:c69b942685ea 99 SHIELD_TYPE_LAS,
dudmuck 15:c69b942685ea 100 SHIELD_TYPE_MAS,
dudmuck 15:c69b942685ea 101 } shield_type_e;
dudmuck 15:c69b942685ea 102 shield_type_e shield_type;
dudmuck 15:c69b942685ea 103
dudmuck 9:2f13a9ef27b4 104 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 9:2f13a9ef27b4 105
dudmuck 9:2f13a9ef27b4 106 SX127x_fsk fsk(radio);
dudmuck 9:2f13a9ef27b4 107 SX127x_lora lora(radio);
dudmuck 18:9530d682fd9a 108 //Kermit kermit(lora);
dudmuck 9:2f13a9ef27b4 109
dudmuck 0:be215de91a68 110 void printLoraIrqs_(bool clear)
dudmuck 0:be215de91a68 111 {
dudmuck 0:be215de91a68 112 //in radio class -- RegIrqFlags_t RegIrqFlags;
dudmuck 0:be215de91a68 113
dudmuck 0:be215de91a68 114 //already read RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 0:be215de91a68 115 printf("\r\nIrqFlags:");
dudmuck 1:1cd0afbed23c 116 if (lora.RegIrqFlags.bits.CadDetected)
dudmuck 0:be215de91a68 117 printf("CadDetected ");
dudmuck 1:1cd0afbed23c 118 if (lora.RegIrqFlags.bits.FhssChangeChannel) {
dudmuck 0:be215de91a68 119 //radio.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL);
dudmuck 1:1cd0afbed23c 120 printf("FhssChangeChannel:%d ", lora.RegHopChannel.bits.FhssPresentChannel);
dudmuck 0:be215de91a68 121 }
dudmuck 1:1cd0afbed23c 122 if (lora.RegIrqFlags.bits.CadDone)
dudmuck 0:be215de91a68 123 printf("CadDone ");
dudmuck 1:1cd0afbed23c 124 if (lora.RegIrqFlags.bits.TxDone)
dudmuck 0:be215de91a68 125 printf("TxDone ");
dudmuck 1:1cd0afbed23c 126 if (lora.RegIrqFlags.bits.ValidHeader)
dudmuck 0:be215de91a68 127 printf("ValidHeader ");
dudmuck 1:1cd0afbed23c 128 if (lora.RegIrqFlags.bits.PayloadCrcError)
dudmuck 0:be215de91a68 129 printf("PayloadCrcError ");
dudmuck 1:1cd0afbed23c 130 if (lora.RegIrqFlags.bits.RxDone)
dudmuck 0:be215de91a68 131 printf("RxDone ");
dudmuck 1:1cd0afbed23c 132 if (lora.RegIrqFlags.bits.RxTimeout)
dudmuck 0:be215de91a68 133 printf("RxTimeout ");
dudmuck 0:be215de91a68 134
dudmuck 0:be215de91a68 135 printf("\r\n");
dudmuck 0:be215de91a68 136
dudmuck 0:be215de91a68 137 if (clear)
dudmuck 1:1cd0afbed23c 138 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 0:be215de91a68 139
dudmuck 0:be215de91a68 140 }
dudmuck 0:be215de91a68 141
dudmuck 1:1cd0afbed23c 142 void lora_printCodingRate(bool from_rx)
dudmuck 0:be215de91a68 143 {
dudmuck 1:1cd0afbed23c 144 uint8_t d = lora.getCodingRate(from_rx);
dudmuck 0:be215de91a68 145 printf("CodingRate:");
dudmuck 0:be215de91a68 146 switch (d) {
dudmuck 0:be215de91a68 147 case 1: printf("4/5 "); break;
dudmuck 0:be215de91a68 148 case 2: printf("4/6 "); break;
dudmuck 0:be215de91a68 149 case 3: printf("4/7 "); break;
dudmuck 0:be215de91a68 150 case 4: printf("4/8 "); break;
dudmuck 0:be215de91a68 151 default:
dudmuck 0:be215de91a68 152 printf("%d ", d);
dudmuck 0:be215de91a68 153 break;
dudmuck 0:be215de91a68 154 }
dudmuck 0:be215de91a68 155 }
dudmuck 0:be215de91a68 156
dudmuck 1:1cd0afbed23c 157 void lora_printHeaderMode()
dudmuck 0:be215de91a68 158 {
dudmuck 1:1cd0afbed23c 159 if (lora.getHeaderMode())
dudmuck 0:be215de91a68 160 printf("implicit ");
dudmuck 0:be215de91a68 161 else
dudmuck 0:be215de91a68 162 printf("explicit ");
dudmuck 0:be215de91a68 163 }
dudmuck 0:be215de91a68 164
dudmuck 1:1cd0afbed23c 165 void lora_printBw()
dudmuck 0:be215de91a68 166 {
dudmuck 19:be8a8b0e7320 167 (void)lora.getBw();
dudmuck 0:be215de91a68 168
dudmuck 0:be215de91a68 169 printf("Bw:");
dudmuck 0:be215de91a68 170 if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 171 switch (lora.RegModemConfig.sx1276bits.Bw) {
dudmuck 0:be215de91a68 172 case 0: printf("7.8KHz "); break;
dudmuck 0:be215de91a68 173 case 1: printf("10.4KHz "); break;
dudmuck 0:be215de91a68 174 case 2: printf("15.6KHz "); break;
dudmuck 0:be215de91a68 175 case 3: printf("20.8KHz "); break;
dudmuck 0:be215de91a68 176 case 4: printf("31.25KHz "); break;
dudmuck 0:be215de91a68 177 case 5: printf("41.7KHz "); break;
dudmuck 0:be215de91a68 178 case 6: printf("62.5KHz "); break;
dudmuck 0:be215de91a68 179 case 7: printf("125KHz "); break;
dudmuck 0:be215de91a68 180 case 8: printf("250KHz "); break;
dudmuck 0:be215de91a68 181 case 9: printf("500KHz "); break;
dudmuck 1:1cd0afbed23c 182 default: printf("%x ", lora.RegModemConfig.sx1276bits.Bw); break;
dudmuck 0:be215de91a68 183 }
dudmuck 0:be215de91a68 184 } else if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 185 switch (lora.RegModemConfig.sx1272bits.Bw) {
dudmuck 0:be215de91a68 186 case 0: printf("125KHz "); break;
dudmuck 0:be215de91a68 187 case 1: printf("250KHz "); break;
dudmuck 0:be215de91a68 188 case 2: printf("500KHz "); break;
dudmuck 0:be215de91a68 189 case 3: printf("11b "); break;
dudmuck 0:be215de91a68 190 }
dudmuck 0:be215de91a68 191 }
dudmuck 0:be215de91a68 192 }
dudmuck 0:be215de91a68 193
dudmuck 1:1cd0afbed23c 194 void lora_printAllBw()
dudmuck 0:be215de91a68 195 {
dudmuck 0:be215de91a68 196 int i, s;
dudmuck 0:be215de91a68 197
dudmuck 0:be215de91a68 198 if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 199 s = lora.RegModemConfig.sx1276bits.Bw;
dudmuck 0:be215de91a68 200 for (i = 0; i < 10; i++ ) {
dudmuck 1:1cd0afbed23c 201 lora.RegModemConfig.sx1276bits.Bw = i;
dudmuck 0:be215de91a68 202 printf("%d ", i);
dudmuck 1:1cd0afbed23c 203 lora_printBw();
dudmuck 0:be215de91a68 204 printf("\r\n");
dudmuck 0:be215de91a68 205 }
dudmuck 1:1cd0afbed23c 206 lora.RegModemConfig.sx1276bits.Bw = s;
dudmuck 0:be215de91a68 207 } else if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 208 s = lora.RegModemConfig.sx1272bits.Bw;
dudmuck 0:be215de91a68 209 for (i = 0; i < 3; i++ ) {
dudmuck 1:1cd0afbed23c 210 lora.RegModemConfig.sx1272bits.Bw = i;
dudmuck 0:be215de91a68 211 printf("%d ", i);
dudmuck 1:1cd0afbed23c 212 lora_printBw();
dudmuck 0:be215de91a68 213 printf("\r\n");
dudmuck 0:be215de91a68 214 }
dudmuck 1:1cd0afbed23c 215 lora.RegModemConfig.sx1272bits.Bw = s;
dudmuck 0:be215de91a68 216 }
dudmuck 0:be215de91a68 217 }
dudmuck 0:be215de91a68 218
dudmuck 1:1cd0afbed23c 219 void lora_printSf()
dudmuck 0:be215de91a68 220 {
dudmuck 0:be215de91a68 221 // spreading factor same between sx127[26]
dudmuck 1:1cd0afbed23c 222 printf("sf:%d ", lora.getSf());
dudmuck 0:be215de91a68 223 }
dudmuck 0:be215de91a68 224
dudmuck 1:1cd0afbed23c 225 void lora_printRxPayloadCrcOn()
dudmuck 0:be215de91a68 226 {
dudmuck 1:1cd0afbed23c 227 bool on = lora.getRxPayloadCrcOn();
dudmuck 18:9530d682fd9a 228 printf("RxPayloadCrcOn:%d = ", on);
dudmuck 18:9530d682fd9a 229 if (lora.getHeaderMode())
dudmuck 18:9530d682fd9a 230 printf("Rx/"); // implicit mode
dudmuck 18:9530d682fd9a 231
dudmuck 0:be215de91a68 232 if (on)
dudmuck 18:9530d682fd9a 233 printf("Tx CRC Enabled\r\n");
dudmuck 0:be215de91a68 234 else
dudmuck 18:9530d682fd9a 235 printf("Tx CRC disabled\r\n");
dudmuck 0:be215de91a68 236 }
dudmuck 0:be215de91a68 237
dudmuck 1:1cd0afbed23c 238 void lora_printTxContinuousMode()
dudmuck 0:be215de91a68 239 {
dudmuck 1:1cd0afbed23c 240 printf("TxContinuousMode:%d ", lora.RegModemConfig2.sx1276bits.TxContinuousMode); // same for sx1272 and sx1276
dudmuck 0:be215de91a68 241 }
dudmuck 0:be215de91a68 242
dudmuck 1:1cd0afbed23c 243 void lora_printAgcAutoOn()
dudmuck 0:be215de91a68 244 {
dudmuck 1:1cd0afbed23c 245 printf("AgcAutoOn:%d", lora.getAgcAutoOn());
dudmuck 0:be215de91a68 246 }
dudmuck 0:be215de91a68 247
dudmuck 1:1cd0afbed23c 248 void lora_print_dio()
dudmuck 0:be215de91a68 249 {
dudmuck 1:1cd0afbed23c 250 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 0:be215de91a68 251 printf("DIO5:");
dudmuck 0:be215de91a68 252 switch (radio.RegDioMapping2.bits.Dio5Mapping) {
dudmuck 0:be215de91a68 253 case 0: printf("ModeReady"); break;
dudmuck 0:be215de91a68 254 case 1: printf("ClkOut"); break;
dudmuck 0:be215de91a68 255 case 2: printf("ClkOut"); break;
dudmuck 0:be215de91a68 256 }
dudmuck 0:be215de91a68 257 printf(" DIO4:");
dudmuck 0:be215de91a68 258 switch (radio.RegDioMapping2.bits.Dio4Mapping) {
dudmuck 0:be215de91a68 259 case 0: printf("CadDetected"); break;
dudmuck 0:be215de91a68 260 case 1: printf("PllLock"); break;
dudmuck 0:be215de91a68 261 case 2: printf("PllLock"); break;
dudmuck 0:be215de91a68 262 }
dudmuck 0:be215de91a68 263 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 0:be215de91a68 264 printf(" DIO3:");
dudmuck 0:be215de91a68 265 switch (radio.RegDioMapping1.bits.Dio3Mapping) {
dudmuck 0:be215de91a68 266 case 0: printf("CadDone"); break;
dudmuck 0:be215de91a68 267 case 1: printf("ValidHeader"); break;
dudmuck 0:be215de91a68 268 case 2: printf("PayloadCrcError"); break;
dudmuck 0:be215de91a68 269 }
dudmuck 0:be215de91a68 270 printf(" DIO2:");
dudmuck 0:be215de91a68 271 switch (radio.RegDioMapping1.bits.Dio2Mapping) {
dudmuck 0:be215de91a68 272 case 0:
dudmuck 0:be215de91a68 273 case 1:
dudmuck 0:be215de91a68 274 case 2:
dudmuck 0:be215de91a68 275 printf("FhssChangeChannel");
dudmuck 0:be215de91a68 276 break;
dudmuck 0:be215de91a68 277 }
dudmuck 0:be215de91a68 278 printf(" DIO1:");
dudmuck 0:be215de91a68 279 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 0:be215de91a68 280 case 0: printf("RxTimeout"); break;
dudmuck 0:be215de91a68 281 case 1: printf("FhssChangeChannel"); break;
dudmuck 0:be215de91a68 282 case 2: printf("CadDetected"); break;
dudmuck 0:be215de91a68 283 }
dudmuck 0:be215de91a68 284 printf(" DIO0:");
dudmuck 0:be215de91a68 285 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 0:be215de91a68 286 case 0: printf("RxDone"); break;
dudmuck 0:be215de91a68 287 case 1: printf("TxDone"); break;
dudmuck 0:be215de91a68 288 case 2: printf("CadDone"); break;
dudmuck 0:be215de91a68 289 }
dudmuck 0:be215de91a68 290
dudmuck 0:be215de91a68 291 printf("\r\n");
dudmuck 0:be215de91a68 292 }
dudmuck 0:be215de91a68 293
dudmuck 1:1cd0afbed23c 294 void fsk_print_dio()
dudmuck 1:1cd0afbed23c 295 {
dudmuck 1:1cd0afbed23c 296 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 1:1cd0afbed23c 297
dudmuck 2:c6b23a43a9d9 298 printf("DIO5:");
dudmuck 1:1cd0afbed23c 299 switch (radio.RegDioMapping2.bits.Dio5Mapping) {
dudmuck 1:1cd0afbed23c 300 case 0: printf("ClkOut"); break;
dudmuck 1:1cd0afbed23c 301 case 1: printf("PllLock"); break;
dudmuck 1:1cd0afbed23c 302 case 2:
dudmuck 1:1cd0afbed23c 303 if (fsk.RegPktConfig2.bits.DataModePacket)
dudmuck 1:1cd0afbed23c 304 printf("data");
dudmuck 1:1cd0afbed23c 305 else {
dudmuck 1:1cd0afbed23c 306 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 307 printf("preamble");
dudmuck 1:1cd0afbed23c 308 else
dudmuck 1:1cd0afbed23c 309 printf("rssi");
dudmuck 1:1cd0afbed23c 310 }
dudmuck 1:1cd0afbed23c 311 break;
dudmuck 1:1cd0afbed23c 312 case 3: printf("ModeReady"); break;
dudmuck 1:1cd0afbed23c 313 }
dudmuck 1:1cd0afbed23c 314
dudmuck 2:c6b23a43a9d9 315 printf(" DIO4:");
dudmuck 1:1cd0afbed23c 316 switch (radio.RegDioMapping2.bits.Dio4Mapping) {
dudmuck 1:1cd0afbed23c 317 case 0: printf("temp/eol"); break;
dudmuck 1:1cd0afbed23c 318 case 1: printf("PllLock"); break;
dudmuck 1:1cd0afbed23c 319 case 2: printf("TimeOut"); break;
dudmuck 1:1cd0afbed23c 320 case 3:
dudmuck 1:1cd0afbed23c 321 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 322 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 323 printf("preamble");
dudmuck 1:1cd0afbed23c 324 else
dudmuck 1:1cd0afbed23c 325 printf("rssi");
dudmuck 1:1cd0afbed23c 326 } else
dudmuck 1:1cd0afbed23c 327 printf("ModeReady");
dudmuck 1:1cd0afbed23c 328 break;
dudmuck 1:1cd0afbed23c 329 }
dudmuck 1:1cd0afbed23c 330
dudmuck 1:1cd0afbed23c 331 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 1:1cd0afbed23c 332
dudmuck 2:c6b23a43a9d9 333 printf(" DIO3:");
dudmuck 1:1cd0afbed23c 334 switch (radio.RegDioMapping1.bits.Dio3Mapping) {
dudmuck 1:1cd0afbed23c 335 case 0: printf("Timeout"); break;
dudmuck 1:1cd0afbed23c 336 case 1:
dudmuck 1:1cd0afbed23c 337 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 338 printf("preamble");
dudmuck 1:1cd0afbed23c 339 else
dudmuck 1:1cd0afbed23c 340 printf("rssi");
dudmuck 1:1cd0afbed23c 341 break;
dudmuck 1:1cd0afbed23c 342 case 2: printf("?automode_status?"); break;
dudmuck 1:1cd0afbed23c 343 case 3: printf("TempChange/LowBat"); break;
dudmuck 1:1cd0afbed23c 344 }
dudmuck 1:1cd0afbed23c 345
dudmuck 2:c6b23a43a9d9 346 printf(" DIO2:");
dudmuck 1:1cd0afbed23c 347 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 348 switch (radio.RegDioMapping1.bits.Dio2Mapping) {
dudmuck 1:1cd0afbed23c 349 case 0: printf("FifoFull"); break;
dudmuck 1:1cd0afbed23c 350 case 1: printf("RxReady"); break;
dudmuck 1:1cd0afbed23c 351 case 2: printf("FifoFull/rx-timeout"); break;
dudmuck 1:1cd0afbed23c 352 case 3: printf("FifoFull/rx-syncadrs"); break;
dudmuck 1:1cd0afbed23c 353 }
dudmuck 1:1cd0afbed23c 354 } else {
dudmuck 1:1cd0afbed23c 355 printf("Data");
dudmuck 1:1cd0afbed23c 356 }
dudmuck 1:1cd0afbed23c 357
dudmuck 2:c6b23a43a9d9 358 printf(" DIO1:");
dudmuck 1:1cd0afbed23c 359 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 360 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 1:1cd0afbed23c 361 case 0: printf("FifoThresh"); break;
dudmuck 1:1cd0afbed23c 362 case 1: printf("FifoEmpty"); break;
dudmuck 1:1cd0afbed23c 363 case 2: printf("FifoFull"); break;
dudmuck 1:1cd0afbed23c 364 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 365 }
dudmuck 1:1cd0afbed23c 366 } else {
dudmuck 1:1cd0afbed23c 367 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 1:1cd0afbed23c 368 case 0: printf("Dclk"); break;
dudmuck 1:1cd0afbed23c 369 case 1:
dudmuck 1:1cd0afbed23c 370 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 371 printf("preamble");
dudmuck 1:1cd0afbed23c 372 else
dudmuck 1:1cd0afbed23c 373 printf("rssi");
dudmuck 1:1cd0afbed23c 374 break;
dudmuck 1:1cd0afbed23c 375 case 2: printf("-2-"); break;
dudmuck 1:1cd0afbed23c 376 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 377 }
dudmuck 1:1cd0afbed23c 378 }
dudmuck 1:1cd0afbed23c 379
dudmuck 2:c6b23a43a9d9 380 printf(" DIO0:");
dudmuck 1:1cd0afbed23c 381 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 382 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 1:1cd0afbed23c 383 case 0: printf("PayloadReady/PacketSent"); break;
dudmuck 1:1cd0afbed23c 384 case 1: printf("CrcOk"); break;
dudmuck 1:1cd0afbed23c 385 case 2: printf("-2-"); break;
dudmuck 1:1cd0afbed23c 386 case 3: printf("TempChange/LowBat"); break;
dudmuck 1:1cd0afbed23c 387 }
dudmuck 1:1cd0afbed23c 388 } else {
dudmuck 1:1cd0afbed23c 389 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 1:1cd0afbed23c 390 case 0: printf("SyncAdrs/TxReady"); break;
dudmuck 1:1cd0afbed23c 391 case 1:
dudmuck 1:1cd0afbed23c 392 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 393 printf("preamble");
dudmuck 1:1cd0afbed23c 394 else
dudmuck 1:1cd0afbed23c 395 printf("rssi");
dudmuck 1:1cd0afbed23c 396 break;
dudmuck 1:1cd0afbed23c 397 case 2: printf("RxReady"); break;
dudmuck 1:1cd0afbed23c 398 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 399 }
dudmuck 1:1cd0afbed23c 400 }
dudmuck 1:1cd0afbed23c 401 printf("\r\n");
dudmuck 1:1cd0afbed23c 402 }
dudmuck 1:1cd0afbed23c 403
dudmuck 0:be215de91a68 404 void lora_print_status()
dudmuck 15:c69b942685ea 405 {
dudmuck 0:be215de91a68 406 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 0:be215de91a68 407 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 0:be215de91a68 408 printf("FSK\r\n");
dudmuck 0:be215de91a68 409 return;
dudmuck 0:be215de91a68 410 }
dudmuck 0:be215de91a68 411
dudmuck 1:1cd0afbed23c 412 lora_print_dio();
dudmuck 0:be215de91a68 413 printf("LoRa ");
dudmuck 0:be215de91a68 414
dudmuck 0:be215de91a68 415 // printing LoRa registers at 0x0d -> 0x3f
dudmuck 0:be215de91a68 416
dudmuck 1:1cd0afbed23c 417 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 1:1cd0afbed23c 418 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 0:be215de91a68 419
dudmuck 1:1cd0afbed23c 420 lora_printCodingRate(false); // false: transmitted coding rate
dudmuck 1:1cd0afbed23c 421 lora_printHeaderMode();
dudmuck 1:1cd0afbed23c 422 lora_printBw();
dudmuck 1:1cd0afbed23c 423 lora_printSf();
dudmuck 1:1cd0afbed23c 424 lora_printRxPayloadCrcOn();
dudmuck 0:be215de91a68 425 // RegModemStat
dudmuck 0:be215de91a68 426 printf("ModemStat:0x%02x\r\n", radio.read_reg(REG_LR_MODEMSTAT));
dudmuck 0:be215de91a68 427
dudmuck 0:be215de91a68 428 // fifo ptrs:
dudmuck 1:1cd0afbed23c 429 lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH);
dudmuck 1:1cd0afbed23c 430 lora.RegRxMaxPayloadLength = radio.read_reg(REG_LR_RX_MAX_PAYLOADLENGTH);
dudmuck 0:be215de91a68 431 printf("fifoptr=0x%02x txbase=0x%02x rxbase=0x%02x payloadLength=0x%02x maxlen=0x%02x",
dudmuck 0:be215de91a68 432 radio.read_reg(REG_LR_FIFOADDRPTR),
dudmuck 0:be215de91a68 433 radio.read_reg(REG_LR_FIFOTXBASEADDR),
dudmuck 0:be215de91a68 434 radio.read_reg(REG_LR_FIFORXBASEADDR),
dudmuck 1:1cd0afbed23c 435 lora.RegPayloadLength,
dudmuck 1:1cd0afbed23c 436 lora.RegRxMaxPayloadLength
dudmuck 0:be215de91a68 437 );
dudmuck 0:be215de91a68 438
dudmuck 1:1cd0afbed23c 439 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 0:be215de91a68 440 printLoraIrqs_(false);
dudmuck 0:be215de91a68 441
dudmuck 1:1cd0afbed23c 442 lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD);
dudmuck 1:1cd0afbed23c 443 if (lora.RegHopPeriod != 0) {
dudmuck 1:1cd0afbed23c 444 printf("\r\nHopPeriod:0x%02x\r\n", lora.RegHopPeriod);
dudmuck 0:be215de91a68 445 }
dudmuck 0:be215de91a68 446
dudmuck 18:9530d682fd9a 447 printf("SymbTimeout:%d ", radio.read_u16(REG_LR_MODEMCONFIG2) & 0x3ff);
dudmuck 0:be215de91a68 448
dudmuck 1:1cd0afbed23c 449 lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB);
dudmuck 4:7a9007dfc0e5 450 printf("PreambleLength:%d ", lora.RegPreamble);
dudmuck 0:be215de91a68 451
dudmuck 0:be215de91a68 452 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER_SINGLE) {
dudmuck 15:c69b942685ea 453 printf("rssi:%ddBm ", lora.get_current_rssi());
dudmuck 0:be215de91a68 454 }
dudmuck 0:be215de91a68 455
dudmuck 1:1cd0afbed23c 456 lora_printTxContinuousMode();
dudmuck 0:be215de91a68 457
dudmuck 0:be215de91a68 458 printf("\r\n");
dudmuck 1:1cd0afbed23c 459 lora_printAgcAutoOn();
dudmuck 0:be215de91a68 460 if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 461 printf(" LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 462 }
dudmuck 0:be215de91a68 463
dudmuck 0:be215de91a68 464 printf("\r\nHeaderCount:%d PacketCount:%d, ",
dudmuck 0:be215de91a68 465 radio.read_u16(REG_LR_RXHEADERCNTVALUE_MSB), radio.read_u16(REG_LR_RXPACKETCNTVALUE_MSB));
dudmuck 0:be215de91a68 466
dudmuck 0:be215de91a68 467 printf("Lora detection threshold:%02x\r\n", radio.read_reg(REG_LR_DETECTION_THRESHOLD));
dudmuck 1:1cd0afbed23c 468 lora.RegTest31.octet = radio.read_reg(REG_LR_TEST31);
dudmuck 1:1cd0afbed23c 469 printf("detect_trig_same_peaks_nb:%d\r\n", lora.RegTest31.bits.detect_trig_same_peaks_nb);
dudmuck 0:be215de91a68 470
dudmuck 0:be215de91a68 471 if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 472 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 6:fe16f96ee335 473 printf("LowDataRateOptimize:%d ", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 474 } else if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 475 lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3);
dudmuck 6:fe16f96ee335 476 printf("LowDataRateOptimize:%d ", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 477 }
dudmuck 0:be215de91a68 478
dudmuck 6:fe16f96ee335 479 printf(" invert: rx=%d tx=%d\r\n", lora.RegTest33.bits.invert_i_q, !lora.RegTest33.bits.chirp_invert_tx);
dudmuck 6:fe16f96ee335 480
dudmuck 0:be215de91a68 481 printf("\r\n");
dudmuck 0:be215de91a68 482 //printf("A %02x\r\n", radio.RegModemConfig2.octet);
dudmuck 0:be215de91a68 483 }
dudmuck 0:be215de91a68 484
dudmuck 1:1cd0afbed23c 485 uint16_t
dudmuck 1:1cd0afbed23c 486 fsk_get_PayloadLength(void)
dudmuck 1:1cd0afbed23c 487 {
dudmuck 1:1cd0afbed23c 488 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 1:1cd0afbed23c 489
dudmuck 1:1cd0afbed23c 490 return fsk.RegPktConfig2.bits.PayloadLength;
dudmuck 1:1cd0afbed23c 491 }
dudmuck 1:1cd0afbed23c 492
dudmuck 1:1cd0afbed23c 493 void fsk_printAddressFiltering()
dudmuck 1:1cd0afbed23c 494 {
dudmuck 1:1cd0afbed23c 495 uint8_t FSKRegNodeAdrs, FSKRegBroadcastAdrs;
dudmuck 1:1cd0afbed23c 496
dudmuck 1:1cd0afbed23c 497 printf(" AddressFiltering:");
dudmuck 1:1cd0afbed23c 498 switch (fsk.RegPktConfig1.bits.AddressFiltering) {
dudmuck 1:1cd0afbed23c 499 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 500 case 1: // NodeAddress
dudmuck 1:1cd0afbed23c 501 FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS);
dudmuck 6:fe16f96ee335 502 printf("NodeAdrs:%02x\r\n", FSKRegNodeAdrs);
dudmuck 1:1cd0afbed23c 503 break;
dudmuck 1:1cd0afbed23c 504 case 2: // NodeAddress & BroadcastAddress
dudmuck 1:1cd0afbed23c 505 FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS);
dudmuck 1:1cd0afbed23c 506 printf("NodeAdrs:%02x ", FSKRegNodeAdrs);
dudmuck 1:1cd0afbed23c 507 FSKRegBroadcastAdrs = radio.read_reg(REG_FSK_BROADCASTADRS);
dudmuck 6:fe16f96ee335 508 printf("BroadcastAdrs:%02x\r\n", FSKRegBroadcastAdrs );
dudmuck 1:1cd0afbed23c 509 break;
dudmuck 1:1cd0afbed23c 510 default:
dudmuck 1:1cd0afbed23c 511 printf("%d", fsk.RegPktConfig1.bits.AddressFiltering);
dudmuck 1:1cd0afbed23c 512 break;
dudmuck 1:1cd0afbed23c 513 }
dudmuck 1:1cd0afbed23c 514 }
dudmuck 1:1cd0afbed23c 515
dudmuck 1:1cd0afbed23c 516 void fsk_print_IrqFlags2()
dudmuck 1:1cd0afbed23c 517 {
dudmuck 2:c6b23a43a9d9 518 RegIrqFlags2_t RegIrqFlags2;
dudmuck 1:1cd0afbed23c 519
dudmuck 1:1cd0afbed23c 520 printf("IrqFlags2: ");
dudmuck 2:c6b23a43a9d9 521 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 2:c6b23a43a9d9 522 if (RegIrqFlags2.bits.FifoFull)
dudmuck 1:1cd0afbed23c 523 printf("FifoFull ");
dudmuck 2:c6b23a43a9d9 524 if (RegIrqFlags2.bits.FifoEmpty)
dudmuck 1:1cd0afbed23c 525 printf("FifoEmpty ");
dudmuck 2:c6b23a43a9d9 526 if (RegIrqFlags2.bits.FifoLevel)
dudmuck 1:1cd0afbed23c 527 printf("FifoLevel ");
dudmuck 2:c6b23a43a9d9 528 if (RegIrqFlags2.bits.FifoOverrun)
dudmuck 1:1cd0afbed23c 529 printf("FifoOverrun ");
dudmuck 2:c6b23a43a9d9 530 if (RegIrqFlags2.bits.PacketSent)
dudmuck 1:1cd0afbed23c 531 printf("PacketSent ");
dudmuck 2:c6b23a43a9d9 532 if (RegIrqFlags2.bits.PayloadReady)
dudmuck 1:1cd0afbed23c 533 printf("PayloadReady ");
dudmuck 2:c6b23a43a9d9 534 if (RegIrqFlags2.bits.CrcOk)
dudmuck 1:1cd0afbed23c 535 printf("CrcOk ");
dudmuck 2:c6b23a43a9d9 536 if (RegIrqFlags2.bits.LowBat)
dudmuck 1:1cd0afbed23c 537 printf("LowBat ");
dudmuck 2:c6b23a43a9d9 538 printf("\r\n");
dudmuck 1:1cd0afbed23c 539 }
dudmuck 1:1cd0afbed23c 540
dudmuck 1:1cd0afbed23c 541 void
dudmuck 1:1cd0afbed23c 542 fsk_print_status()
dudmuck 1:1cd0afbed23c 543 {
dudmuck 1:1cd0afbed23c 544 //uint16_t s;
dudmuck 2:c6b23a43a9d9 545 RegIrqFlags1_t RegIrqFlags1;
dudmuck 1:1cd0afbed23c 546
dudmuck 1:1cd0afbed23c 547 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 1:1cd0afbed23c 548 printf("LoRa\r\n");
dudmuck 1:1cd0afbed23c 549 return;
dudmuck 1:1cd0afbed23c 550 }
dudmuck 1:1cd0afbed23c 551
dudmuck 1:1cd0afbed23c 552 if (radio.RegOpMode.bits.ModulationType == 0) {
dudmuck 1:1cd0afbed23c 553 printf("FSK ");
dudmuck 1:1cd0afbed23c 554 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 1:1cd0afbed23c 555 case 1: printf("BT1.0 "); break;
dudmuck 1:1cd0afbed23c 556 case 2: printf("BT0.5 "); break;
dudmuck 1:1cd0afbed23c 557 case 3: printf("BT0.3 "); break;
dudmuck 1:1cd0afbed23c 558 }
dudmuck 1:1cd0afbed23c 559 } else if (radio.RegOpMode.bits.ModulationType == 1) {
dudmuck 1:1cd0afbed23c 560 printf("OOK ");
dudmuck 18:9530d682fd9a 561 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 18:9530d682fd9a 562 case 1: printf("Fcutoff=bitrate"); break;
dudmuck 18:9530d682fd9a 563 case 2: printf("Fcutoff=2*bitrate"); break;
dudmuck 18:9530d682fd9a 564 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 565 }
dudmuck 1:1cd0afbed23c 566 }
dudmuck 1:1cd0afbed23c 567
dudmuck 19:be8a8b0e7320 568 printf("%" PRIu32 "bps fdev:%" PRIu32 "Hz\r\n", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 1:1cd0afbed23c 569
dudmuck 1:1cd0afbed23c 570 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 1:1cd0afbed23c 571
dudmuck 1:1cd0afbed23c 572 fsk_print_dio();
dudmuck 1:1cd0afbed23c 573
dudmuck 19:be8a8b0e7320 574 printf("rxbw:%" PRIu32 "Hz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 19:be8a8b0e7320 575 printf("afcbw:%" PRIu32 "Hz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW));
dudmuck 1:1cd0afbed23c 576
dudmuck 1:1cd0afbed23c 577 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 1:1cd0afbed23c 578 printf("RssiOffset:%ddB smoothing:%dsamples\r\n", fsk.RegRssiConfig.bits.RssiOffset, 1 << (fsk.RegRssiConfig.bits.RssiSmoothing+1));
dudmuck 1:1cd0afbed23c 579
dudmuck 1:1cd0afbed23c 580
dudmuck 1:1cd0afbed23c 581 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 1:1cd0afbed23c 582
dudmuck 1:1cd0afbed23c 583 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 584 uint16_t len;
dudmuck 1:1cd0afbed23c 585 /* packet mode */
dudmuck 1:1cd0afbed23c 586 len = fsk_get_PayloadLength();
dudmuck 1:1cd0afbed23c 587 printf("packet RegPayloadLength:0x%03x ", len);
dudmuck 1:1cd0afbed23c 588
dudmuck 1:1cd0afbed23c 589 if (fsk.RegPktConfig2.bits.BeaconOn)
dudmuck 1:1cd0afbed23c 590 printf("BeaconOn ");
dudmuck 1:1cd0afbed23c 591
dudmuck 1:1cd0afbed23c 592 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 1:1cd0afbed23c 593 printf("FifoThreshold:%d TxStartCondition:", fsk.RegFifoThreshold.bits.FifoThreshold);
dudmuck 1:1cd0afbed23c 594 if (fsk.RegFifoThreshold.bits.TxStartCondition)
dudmuck 1:1cd0afbed23c 595 printf("!FifoEmpty");
dudmuck 1:1cd0afbed23c 596 else
dudmuck 1:1cd0afbed23c 597 printf("FifoLevel");
dudmuck 1:1cd0afbed23c 598
dudmuck 1:1cd0afbed23c 599 printf("\r\nAutoRestartRxMode:");
dudmuck 1:1cd0afbed23c 600 switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) {
dudmuck 1:1cd0afbed23c 601 case 0: printf("off "); break;
dudmuck 1:1cd0afbed23c 602 case 1: printf("no-pll-wait "); break;
dudmuck 1:1cd0afbed23c 603 case 2: printf("pll-wait "); break;
dudmuck 1:1cd0afbed23c 604 case 3: printf("3 "); break;
dudmuck 1:1cd0afbed23c 605 }
dudmuck 1:1cd0afbed23c 606 //...todo
dudmuck 1:1cd0afbed23c 607
dudmuck 1:1cd0afbed23c 608 printf("PreambleSize:%d ", radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 1:1cd0afbed23c 609
dudmuck 1:1cd0afbed23c 610 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 1:1cd0afbed23c 611 if (fsk.RegOokPeak.bits.barker_en)
dudmuck 1:1cd0afbed23c 612 printf("barker ");
dudmuck 1:1cd0afbed23c 613 if (!fsk.RegOokPeak.bits.BitSyncOn)
dudmuck 1:1cd0afbed23c 614 printf("BitSyncOff ");
dudmuck 1:1cd0afbed23c 615 //...todo
dudmuck 1:1cd0afbed23c 616
dudmuck 1:1cd0afbed23c 617 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 1:1cd0afbed23c 618 if (fsk.RegPktConfig1.bits.PacketFormatVariable)
dudmuck 1:1cd0afbed23c 619 printf("variable");
dudmuck 1:1cd0afbed23c 620 else
dudmuck 1:1cd0afbed23c 621 printf("fixed");
dudmuck 1:1cd0afbed23c 622 printf("-length\r\ncrc");
dudmuck 1:1cd0afbed23c 623 if (fsk.RegPktConfig1.bits.CrcOn) {
dudmuck 1:1cd0afbed23c 624 printf("On");
dudmuck 1:1cd0afbed23c 625 } else
dudmuck 1:1cd0afbed23c 626 printf("Off");
dudmuck 1:1cd0afbed23c 627 printf(" crctype:");
dudmuck 1:1cd0afbed23c 628 if (fsk.RegPktConfig1.bits.CrCWhiteningType)
dudmuck 1:1cd0afbed23c 629 printf("IBM");
dudmuck 1:1cd0afbed23c 630 else
dudmuck 1:1cd0afbed23c 631 printf("CCITT");
dudmuck 1:1cd0afbed23c 632 printf(" dcFree:");
dudmuck 1:1cd0afbed23c 633 switch (fsk.RegPktConfig1.bits.DcFree) {
dudmuck 1:1cd0afbed23c 634 case 0: printf("none "); break;
dudmuck 1:1cd0afbed23c 635 case 1: printf("Manchester "); break;
dudmuck 1:1cd0afbed23c 636 case 2: printf("Whitening "); break;
dudmuck 1:1cd0afbed23c 637 case 3: printf("reserved "); break;
dudmuck 1:1cd0afbed23c 638 }
dudmuck 1:1cd0afbed23c 639 fsk_printAddressFiltering();
dudmuck 1:1cd0afbed23c 640
dudmuck 1:1cd0afbed23c 641 printf("\r\n");
dudmuck 1:1cd0afbed23c 642 fsk_print_IrqFlags2();
dudmuck 1:1cd0afbed23c 643 } else {
dudmuck 1:1cd0afbed23c 644 /* continuous mode */
dudmuck 1:1cd0afbed23c 645 printf("continuous ");
dudmuck 1:1cd0afbed23c 646 }
dudmuck 1:1cd0afbed23c 647
dudmuck 1:1cd0afbed23c 648 fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT);
dudmuck 1:1cd0afbed23c 649 printf("PreambleDetect:");
dudmuck 1:1cd0afbed23c 650 if (fsk.RegPreambleDetect.bits.PreambleDetectorOn) {
dudmuck 1:1cd0afbed23c 651 printf("size=%d,tol=%d ",
dudmuck 1:1cd0afbed23c 652 fsk.RegPreambleDetect.bits.PreambleDetectorSize,
dudmuck 1:1cd0afbed23c 653 fsk.RegPreambleDetect.bits.PreambleDetectorTol);
dudmuck 1:1cd0afbed23c 654 } else
dudmuck 1:1cd0afbed23c 655 printf("Off ");
dudmuck 1:1cd0afbed23c 656
dudmuck 18:9530d682fd9a 657 if (fsk.RegSyncConfig.bits.SyncOn) {
dudmuck 18:9530d682fd9a 658 printf(" syncsize:%d ", fsk.RegSyncConfig.bits.SyncSize);
dudmuck 18:9530d682fd9a 659 printf(" : %02x ", radio.read_reg(REG_FSK_SYNCVALUE1));
dudmuck 18:9530d682fd9a 660 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE2));
dudmuck 18:9530d682fd9a 661 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE3));
dudmuck 18:9530d682fd9a 662 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE4));
dudmuck 18:9530d682fd9a 663 } else
dudmuck 18:9530d682fd9a 664 printf("Sync Off");
dudmuck 1:1cd0afbed23c 665 printf("\r\n"); // end sync config
dudmuck 1:1cd0afbed23c 666
dudmuck 1:1cd0afbed23c 667 fsk.RegAfcFei.octet = radio.read_reg(REG_FSK_AFCFEI);
dudmuck 1:1cd0afbed23c 668 printf("afcAutoClear:");
dudmuck 1:1cd0afbed23c 669 if (fsk.RegAfcFei.bits.AfcAutoClearOn)
dudmuck 1:1cd0afbed23c 670 printf("On");
dudmuck 1:1cd0afbed23c 671 else
dudmuck 1:1cd0afbed23c 672 printf("OFF");
dudmuck 1:1cd0afbed23c 673 printf(" afc:%dHz ", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 1:1cd0afbed23c 674
dudmuck 1:1cd0afbed23c 675 printf("fei:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_FEIMSB)));
dudmuck 1:1cd0afbed23c 676
dudmuck 1:1cd0afbed23c 677 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 1:1cd0afbed23c 678 printf("RxTrigger:");
dudmuck 1:1cd0afbed23c 679 switch (fsk.RegRxConfig.bits.RxTrigger) {
dudmuck 1:1cd0afbed23c 680 case 0: printf("none "); break;
dudmuck 1:1cd0afbed23c 681 case 1: printf("rssi "); break;
dudmuck 1:1cd0afbed23c 682 case 6: printf("preamble "); break;
dudmuck 1:1cd0afbed23c 683 case 7: printf("both "); break;
dudmuck 1:1cd0afbed23c 684 default: printf("-%d- ", fsk.RegRxConfig.bits.RxTrigger); break;
dudmuck 1:1cd0afbed23c 685 }
dudmuck 1:1cd0afbed23c 686 printf("AfcAuto:");
dudmuck 1:1cd0afbed23c 687 if (fsk.RegRxConfig.bits.AfcAutoOn)
dudmuck 1:1cd0afbed23c 688 printf("On ");
dudmuck 1:1cd0afbed23c 689 else
dudmuck 1:1cd0afbed23c 690 printf("OFF ");
dudmuck 15:c69b942685ea 691
dudmuck 15:c69b942685ea 692 radio.RegLna.octet = radio.read_reg(REG_LNA);
dudmuck 1:1cd0afbed23c 693 if (!fsk.RegRxConfig.bits.AgcAutoOn) {
dudmuck 1:1cd0afbed23c 694 printf("AgcAutoOff:G%d ", radio.RegLna.bits.LnaGain);
dudmuck 1:1cd0afbed23c 695 }
dudmuck 15:c69b942685ea 696 printf("LnaBoostHF:%d ", radio.RegLna.bits.LnaBoostHF);
dudmuck 1:1cd0afbed23c 697
dudmuck 1:1cd0afbed23c 698 fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL);
dudmuck 1:1cd0afbed23c 699 if (fsk.RegTimerResol.bits.hlm_started)
dudmuck 1:1cd0afbed23c 700 printf("hlm_started ");
dudmuck 1:1cd0afbed23c 701 else
dudmuck 1:1cd0afbed23c 702 printf("hlm_stopped ");
dudmuck 1:1cd0afbed23c 703
dudmuck 1:1cd0afbed23c 704 fsk.RegRssiThresh = radio.read_reg(REG_FSK_RSSITHRESH);
dudmuck 1:1cd0afbed23c 705 printf("rssiThreshold:-%.1f@%02x ", fsk.RegRssiThresh / 2.0, REG_FSK_RSSITHRESH);
dudmuck 1:1cd0afbed23c 706
dudmuck 1:1cd0afbed23c 707 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 1:1cd0afbed23c 708 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER ||
dudmuck 1:1cd0afbed23c 709 radio.RegOpMode.bits.Mode == RF_OPMODE_SYNTHESIZER_RX)
dudmuck 1:1cd0afbed23c 710 {
dudmuck 1:1cd0afbed23c 711 printf("rssi:-%.1f ", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 1:1cd0afbed23c 712 }
dudmuck 1:1cd0afbed23c 713
dudmuck 1:1cd0afbed23c 714 fsk.RegSeqConfig1.octet = radio.read_reg(REG_FSK_SEQCONFIG1);
dudmuck 1:1cd0afbed23c 715 printf("\r\nsequencer: ");
dudmuck 1:1cd0afbed23c 716 printf("FromStart:");
dudmuck 1:1cd0afbed23c 717 switch (fsk.RegSeqConfig1.bits.FromStart) {
dudmuck 1:1cd0afbed23c 718 case 0:
dudmuck 1:1cd0afbed23c 719 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 720 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 721 printf("idle");
dudmuck 1:1cd0afbed23c 722 else
dudmuck 1:1cd0afbed23c 723 printf("sequencerOff");
dudmuck 1:1cd0afbed23c 724 break;
dudmuck 1:1cd0afbed23c 725 case 1: printf("rx"); break;
dudmuck 1:1cd0afbed23c 726 case 2: printf("tx"); break;
dudmuck 1:1cd0afbed23c 727 case 3: printf("tx on fifolevel"); break;
dudmuck 1:1cd0afbed23c 728 }
dudmuck 1:1cd0afbed23c 729 printf(" lowPowerSelection:");
dudmuck 1:1cd0afbed23c 730 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 731 printf("idle");
dudmuck 1:1cd0afbed23c 732 else
dudmuck 1:1cd0afbed23c 733 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 734 if (fsk.RegSeqConfig1.bits.FromStart != 0 &&
dudmuck 1:1cd0afbed23c 735 fsk.RegSeqConfig1.bits.LowPowerSelection != 0)
dudmuck 1:1cd0afbed23c 736 { // if sequencer enabled:
dudmuck 1:1cd0afbed23c 737 printf("\r\nsequencer: IdleMode:");
dudmuck 1:1cd0afbed23c 738 if (fsk.RegSeqConfig1.bits.IdleMode)
dudmuck 1:1cd0afbed23c 739 printf("Sleep");
dudmuck 1:1cd0afbed23c 740 else
dudmuck 1:1cd0afbed23c 741 printf("standby");
dudmuck 1:1cd0afbed23c 742 printf("\r\nsequencer: FromIdle to:");
dudmuck 1:1cd0afbed23c 743 if (fsk.RegSeqConfig1.bits.FromIdle)
dudmuck 1:1cd0afbed23c 744 printf("rx");
dudmuck 1:1cd0afbed23c 745 else
dudmuck 1:1cd0afbed23c 746 printf("tx");
dudmuck 1:1cd0afbed23c 747 printf("\r\nsequencer: FromTransmit to:");
dudmuck 1:1cd0afbed23c 748 if (fsk.RegSeqConfig1.bits.FromTransmit)
dudmuck 1:1cd0afbed23c 749 printf("rx-on-PacketSent");
dudmuck 1:1cd0afbed23c 750 else {
dudmuck 1:1cd0afbed23c 751 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 752 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 753 printf("idle");
dudmuck 1:1cd0afbed23c 754 else
dudmuck 1:1cd0afbed23c 755 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 756 printf("-on-PacketSent");
dudmuck 1:1cd0afbed23c 757 }
dudmuck 1:1cd0afbed23c 758 fsk.RegSeqConfig2.octet = radio.read_reg(REG_FSK_SEQCONFIG2);
dudmuck 1:1cd0afbed23c 759 printf("\r\nsequencer: FromReceive:");
dudmuck 1:1cd0afbed23c 760 switch (fsk.RegSeqConfig2.bits.FromReceive) {
dudmuck 1:1cd0afbed23c 761 case 1: printf("PacketRecevied on PayloadReady"); break;
dudmuck 1:1cd0afbed23c 762 case 2:
dudmuck 1:1cd0afbed23c 763 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 764 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 765 printf("idle");
dudmuck 1:1cd0afbed23c 766 else
dudmuck 1:1cd0afbed23c 767 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 768 printf("-on-payloadReady");
dudmuck 1:1cd0afbed23c 769 break;
dudmuck 1:1cd0afbed23c 770 case 3: printf("PacketRecevied-on-CrcOk"); break;
dudmuck 1:1cd0afbed23c 771 case 4: printf("SequencerOff-on-Rssi"); break;
dudmuck 1:1cd0afbed23c 772 case 5: printf("SequencerOff-on-SyncAddress"); break;
dudmuck 1:1cd0afbed23c 773 case 6: printf("SequencerOff-PreambleDetect"); break;
dudmuck 1:1cd0afbed23c 774 default: printf("-%d-", fsk.RegSeqConfig2.bits.FromReceive); break;
dudmuck 1:1cd0afbed23c 775 }
dudmuck 1:1cd0afbed23c 776 printf("\r\nsequencer: FromRxTimeout:");
dudmuck 1:1cd0afbed23c 777 switch (fsk.RegSeqConfig2.bits.FromRxTimeout) {
dudmuck 1:1cd0afbed23c 778 case 0: printf("rx"); break;
dudmuck 1:1cd0afbed23c 779 case 1: printf("tx"); break;
dudmuck 1:1cd0afbed23c 780 case 2:
dudmuck 1:1cd0afbed23c 781 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 782 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 783 printf("idle");
dudmuck 1:1cd0afbed23c 784 else
dudmuck 1:1cd0afbed23c 785 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 786 break;
dudmuck 1:1cd0afbed23c 787 case 3: printf("SequencerOff"); break;
dudmuck 1:1cd0afbed23c 788 }
dudmuck 1:1cd0afbed23c 789 printf("\r\nsequencer: FromPacketReceived to:");
dudmuck 1:1cd0afbed23c 790 switch (fsk.RegSeqConfig2.bits.FromPacketReceived) {
dudmuck 1:1cd0afbed23c 791 case 0: printf("SequencerOff"); break;
dudmuck 1:1cd0afbed23c 792 case 1: printf("tx on FifoEmpty"); break;
dudmuck 1:1cd0afbed23c 793 case 2:
dudmuck 1:1cd0afbed23c 794 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 795 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 796 printf("idle");
dudmuck 1:1cd0afbed23c 797 else
dudmuck 1:1cd0afbed23c 798 printf("sequencerOff");
dudmuck 1:1cd0afbed23c 799 break;
dudmuck 1:1cd0afbed23c 800 case 3: printf("rx via fs"); break;
dudmuck 1:1cd0afbed23c 801 case 4: printf("rx"); break;
dudmuck 1:1cd0afbed23c 802 }
dudmuck 1:1cd0afbed23c 803
dudmuck 1:1cd0afbed23c 804 fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL);
dudmuck 1:1cd0afbed23c 805 printf("\r\nsequencer: timer1:");
dudmuck 1:1cd0afbed23c 806 switch (fsk.RegTimerResol.bits.timer1_resol) {
dudmuck 1:1cd0afbed23c 807 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 808 case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER1COEF) * 64); break;
dudmuck 1:1cd0afbed23c 809 case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER1COEF) * 4.1); break;
dudmuck 1:1cd0afbed23c 810 case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER1COEF) * 0.262); break;
dudmuck 1:1cd0afbed23c 811 }
dudmuck 1:1cd0afbed23c 812
dudmuck 1:1cd0afbed23c 813 printf(" timer2:");
dudmuck 1:1cd0afbed23c 814 switch (fsk.RegTimerResol.bits.timer2_resol) {
dudmuck 1:1cd0afbed23c 815 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 816 case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER2COEF) * 64); break;
dudmuck 1:1cd0afbed23c 817 case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER2COEF) * 4.1); break;
dudmuck 1:1cd0afbed23c 818 case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER2COEF) * 0.262); break;
dudmuck 1:1cd0afbed23c 819 }
dudmuck 1:1cd0afbed23c 820 } // ..if sequencer enabled
dudmuck 1:1cd0afbed23c 821
dudmuck 1:1cd0afbed23c 822 printf("\r\nIrqFlags1:");
dudmuck 2:c6b23a43a9d9 823 RegIrqFlags1.octet = radio.read_reg(REG_FSK_IRQFLAGS1);
dudmuck 2:c6b23a43a9d9 824 if (RegIrqFlags1.bits.ModeReady)
dudmuck 1:1cd0afbed23c 825 printf("ModeReady ");
dudmuck 2:c6b23a43a9d9 826 if (RegIrqFlags1.bits.RxReady)
dudmuck 1:1cd0afbed23c 827 printf("RxReady ");
dudmuck 2:c6b23a43a9d9 828 if (RegIrqFlags1.bits.TxReady)
dudmuck 1:1cd0afbed23c 829 printf("TxReady ");
dudmuck 2:c6b23a43a9d9 830 if (RegIrqFlags1.bits.PllLock)
dudmuck 1:1cd0afbed23c 831 printf("PllLock ");
dudmuck 2:c6b23a43a9d9 832 if (RegIrqFlags1.bits.Rssi)
dudmuck 1:1cd0afbed23c 833 printf("Rssi ");
dudmuck 2:c6b23a43a9d9 834 if (RegIrqFlags1.bits.Timeout)
dudmuck 1:1cd0afbed23c 835 printf("Timeout ");
dudmuck 2:c6b23a43a9d9 836 if (RegIrqFlags1.bits.PreambleDetect)
dudmuck 1:1cd0afbed23c 837 printf("PreambleDetect ");
dudmuck 2:c6b23a43a9d9 838 if (RegIrqFlags1.bits.SyncAddressMatch)
dudmuck 1:1cd0afbed23c 839 printf("SyncAddressMatch ");
dudmuck 1:1cd0afbed23c 840
dudmuck 1:1cd0afbed23c 841 printf("\r\n");
dudmuck 1:1cd0afbed23c 842
dudmuck 1:1cd0afbed23c 843 /* TODO if (!SX1272FSK->RegPktConfig1.bits.PacketFormatVariable) { // if fixed-length packet format:
dudmuck 1:1cd0afbed23c 844 s = fsk_get_PayloadLength();
dudmuck 1:1cd0afbed23c 845 if (s > FSK_LARGE_PKT_THRESHOLD)
dudmuck 1:1cd0afbed23c 846 flags.fifo_flow_ctl = 1;
dudmuck 1:1cd0afbed23c 847 else
dudmuck 1:1cd0afbed23c 848 flags.fifo_flow_ctl = 0;
dudmuck 1:1cd0afbed23c 849 }*/
dudmuck 1:1cd0afbed23c 850
dudmuck 1:1cd0afbed23c 851 fsk.RegImageCal.octet = radio.read_reg(REG_FSK_IMAGECAL);
dudmuck 1:1cd0afbed23c 852 if (fsk.RegImageCal.bits.TempMonitorOff) {
dudmuck 1:1cd0afbed23c 853 printf("TempMonitorOff[\r0m\n");
dudmuck 1:1cd0afbed23c 854 } else {
dudmuck 1:1cd0afbed23c 855 printf("TempThreshold:");
dudmuck 1:1cd0afbed23c 856 switch (fsk.RegImageCal.bits.TempThreshold) {
dudmuck 1:1cd0afbed23c 857 case 0: printf("5C"); break;
dudmuck 1:1cd0afbed23c 858 case 1: printf("10C"); break;
dudmuck 1:1cd0afbed23c 859 case 2: printf("15C"); break;
dudmuck 1:1cd0afbed23c 860 case 3: printf("20C"); break;
dudmuck 1:1cd0afbed23c 861 }
dudmuck 1:1cd0afbed23c 862 printf("\r\n");
dudmuck 1:1cd0afbed23c 863 }
dudmuck 1:1cd0afbed23c 864 if (fsk.RegImageCal.bits.ImageCalRunning)
dudmuck 1:1cd0afbed23c 865 printf("ImageCalRunning[\r0m\n");
dudmuck 1:1cd0afbed23c 866
dudmuck 1:1cd0afbed23c 867 /* printf("flags.fifo_flow_ctl:%d pktidx:%d rx_pktlen:%d", flags.fifo_flow_ctl, pktidx, rx_pktlen);
dudmuck 6:fe16f96ee335 868 printf("\r\n");
dudmuck 1:1cd0afbed23c 869
dudmuck 6:fe16f96ee335 870 //printf("DIO0_PIN:%d\r\n", digitalRead(DIO0_PIN));
dudmuck 6:fe16f96ee335 871 printf("pkt_buf_len=%d remaining=%d\r\n", pk*/
dudmuck 1:1cd0afbed23c 872 }
dudmuck 1:1cd0afbed23c 873
dudmuck 0:be215de91a68 874 void printOpMode()
dudmuck 0:be215de91a68 875 {
dudmuck 0:be215de91a68 876 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 0:be215de91a68 877 switch (radio.RegOpMode.bits.Mode) {
dudmuck 0:be215de91a68 878 case RF_OPMODE_SLEEP: printf("sleep"); break;
dudmuck 0:be215de91a68 879 case RF_OPMODE_STANDBY: printf("stby"); break;
dudmuck 0:be215de91a68 880 case RF_OPMODE_SYNTHESIZER_TX: printf("fstx"); break;
dudmuck 0:be215de91a68 881 case RF_OPMODE_TRANSMITTER: printf("tx"); break;
dudmuck 0:be215de91a68 882 case RF_OPMODE_SYNTHESIZER_RX: printf("fsrx"); break;
dudmuck 0:be215de91a68 883 case RF_OPMODE_RECEIVER: printf("rx"); break;
dudmuck 0:be215de91a68 884 case 6:
dudmuck 0:be215de91a68 885 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 0:be215de91a68 886 printf("rxs");
dudmuck 0:be215de91a68 887 else
dudmuck 0:be215de91a68 888 printf("-6-");
dudmuck 0:be215de91a68 889 break; // todo: different lora/fsk
dudmuck 0:be215de91a68 890 case 7:
dudmuck 0:be215de91a68 891 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 0:be215de91a68 892 printf("cad");
dudmuck 0:be215de91a68 893 else
dudmuck 0:be215de91a68 894 printf("-7-");
dudmuck 0:be215de91a68 895 break; // todo: different lora/fsk
dudmuck 0:be215de91a68 896 }
dudmuck 0:be215de91a68 897 }
dudmuck 0:be215de91a68 898
dudmuck 0:be215de91a68 899 void
dudmuck 0:be215de91a68 900 printPa()
dudmuck 0:be215de91a68 901 {
dudmuck 0:be215de91a68 902 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 0:be215de91a68 903 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 0:be215de91a68 904 float output_dBm = 17 - (15-radio.RegPaConfig.bits.OutputPower);
dudmuck 0:be215de91a68 905 printf(" PABOOST OutputPower=%.1fdBm", output_dBm);
dudmuck 0:be215de91a68 906 } else {
dudmuck 0:be215de91a68 907 float pmax = (0.6*radio.RegPaConfig.bits.MaxPower) + 10.8;
dudmuck 0:be215de91a68 908 float output_dBm = pmax - (15-radio.RegPaConfig.bits.OutputPower);
dudmuck 0:be215de91a68 909 printf(" RFO pmax=%.1fdBm OutputPower=%.1fdBm", pmax, output_dBm);
dudmuck 0:be215de91a68 910 }
dudmuck 0:be215de91a68 911 }
dudmuck 0:be215de91a68 912
dudmuck 0:be215de91a68 913 void /* things always present, whether lora or fsk */
dudmuck 0:be215de91a68 914 common_print_status()
dudmuck 0:be215de91a68 915 {
dudmuck 0:be215de91a68 916 printf("version:0x%02x %.3fMHz ", radio.read_reg(REG_VERSION), radio.get_frf_MHz());
dudmuck 0:be215de91a68 917 printOpMode();
dudmuck 0:be215de91a68 918
dudmuck 0:be215de91a68 919 printPa();
dudmuck 0:be215de91a68 920
dudmuck 0:be215de91a68 921 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 0:be215de91a68 922 if (radio.RegOcp.bits.OcpOn) {
dudmuck 0:be215de91a68 923 int imax = 0;
dudmuck 0:be215de91a68 924 if (radio.RegOcp.bits.OcpTrim < 16)
dudmuck 0:be215de91a68 925 imax = 45 + (5 * radio.RegOcp.bits.OcpTrim);
dudmuck 0:be215de91a68 926 else if (radio.RegOcp.bits.OcpTrim < 28)
dudmuck 0:be215de91a68 927 imax = -30 + (10 * radio.RegOcp.bits.OcpTrim);
dudmuck 0:be215de91a68 928 else
dudmuck 0:be215de91a68 929 imax = 240;
dudmuck 0:be215de91a68 930 printf(" OcpOn %dmA ", imax);
dudmuck 0:be215de91a68 931 } else
dudmuck 0:be215de91a68 932 printf(" OcpOFF ");
dudmuck 0:be215de91a68 933
dudmuck 0:be215de91a68 934 printf("\r\n");
dudmuck 8:227605e4a760 935
dudmuck 8:227605e4a760 936 if (per_en) {
dudmuck 18:9530d682fd9a 937 if (cadper_enable) {
dudmuck 19:be8a8b0e7320 938 printf("cadper %" PRIu32 ", ", num_cads);
dudmuck 18:9530d682fd9a 939 }
dudmuck 8:227605e4a760 940 printf("per_tx_delay:%f\r\n", per_tx_delay);
dudmuck 8:227605e4a760 941 printf("PER device ID:%d\r\n", per_id);
dudmuck 8:227605e4a760 942 }
dudmuck 18:9530d682fd9a 943
dudmuck 18:9530d682fd9a 944 if (poll_irq_en)
dudmuck 18:9530d682fd9a 945 printf("poll_irq_en\r\n");
dudmuck 0:be215de91a68 946
dudmuck 0:be215de91a68 947 }
dudmuck 0:be215de91a68 948
dudmuck 0:be215de91a68 949 void print_rx_buf(int len)
dudmuck 0:be215de91a68 950 {
dudmuck 0:be215de91a68 951 int i;
dudmuck 0:be215de91a68 952
dudmuck 0:be215de91a68 953 printf("000:");
dudmuck 0:be215de91a68 954 for (i = 0; i < len; i++) {
dudmuck 0:be215de91a68 955 //printf("(%d)%02x ", i % 16, rx_buf[i]);
dudmuck 0:be215de91a68 956 printf("%02x ", radio.rx_buf[i]);
dudmuck 0:be215de91a68 957 if (i % 16 == 15 && i != len-1)
dudmuck 0:be215de91a68 958 printf("\r\n%03d:", i+1);
dudmuck 0:be215de91a68 959
dudmuck 0:be215de91a68 960 }
dudmuck 0:be215de91a68 961 printf("\r\n");
dudmuck 0:be215de91a68 962 }
dudmuck 0:be215de91a68 963
dudmuck 7:c3c54f222ced 964 void print_rx_verbose(uint8_t dlen)
dudmuck 7:c3c54f222ced 965 {
dudmuck 7:c3c54f222ced 966 float dbm;
dudmuck 7:c3c54f222ced 967 printLoraIrqs_(false);
dudmuck 7:c3c54f222ced 968 if (lora.RegHopPeriod > 0) {
dudmuck 7:c3c54f222ced 969 lora.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL);
dudmuck 7:c3c54f222ced 970 printf("HopCH:%d ", lora.RegHopChannel.bits.FhssPresentChannel);
dudmuck 7:c3c54f222ced 971 }
dudmuck 7:c3c54f222ced 972 printf("%dHz ", lora.get_freq_error_Hz());
dudmuck 7:c3c54f222ced 973 lora_printCodingRate(true); // true: of received packet
dudmuck 7:c3c54f222ced 974 dbm = lora.get_pkt_rssi();
dudmuck 7:c3c54f222ced 975 printf(" crc%s %.1fdB %.1fdBm\r\n",
dudmuck 7:c3c54f222ced 976 lora.RegHopChannel.bits.RxPayloadCrcOn ? "On" : "OFF",
dudmuck 7:c3c54f222ced 977 lora.RegPktSnrValue / 4.0,
dudmuck 7:c3c54f222ced 978 dbm
dudmuck 7:c3c54f222ced 979 );
dudmuck 7:c3c54f222ced 980 print_rx_buf(dlen);
dudmuck 18:9530d682fd9a 981 }
dudmuck 7:c3c54f222ced 982
dudmuck 18:9530d682fd9a 983 void set_per_en(bool en)
dudmuck 18:9530d682fd9a 984 {
dudmuck 18:9530d682fd9a 985 if (en) {
dudmuck 18:9530d682fd9a 986 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 987 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 988 lora.RegModemConfig.sx1272bits.LowDataRateOptimize = 1;
dudmuck 18:9530d682fd9a 989 radio.write_reg(REG_LR_MODEMCONFIG, lora.RegModemConfig.octet);
dudmuck 18:9530d682fd9a 990 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 991 lora.RegModemConfig3.sx1276bits.LowDataRateOptimize = 1;
dudmuck 18:9530d682fd9a 992 radio.write_reg(REG_LR_MODEMCONFIG3, lora.RegModemConfig3.octet);
dudmuck 18:9530d682fd9a 993 }
dudmuck 18:9530d682fd9a 994 lora.RegPayloadLength = 9;
dudmuck 18:9530d682fd9a 995 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 996 radio.RegDioMapping1.bits.Dio3Mapping = 1; // to ValidHeader
dudmuck 18:9530d682fd9a 997 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 998 } else { // fsk..
dudmuck 18:9530d682fd9a 999 //fsk_tx_length = 9;
dudmuck 7:c3c54f222ced 1000 }
dudmuck 18:9530d682fd9a 1001 PacketRxSequencePrev = -1;
dudmuck 18:9530d682fd9a 1002 //PacketRxSequence = 0;
dudmuck 18:9530d682fd9a 1003 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 1004 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 1005 PacketNormalCnt = 0;
dudmuck 18:9530d682fd9a 1006 } // ..if (per_en)
dudmuck 18:9530d682fd9a 1007 else {
dudmuck 18:9530d682fd9a 1008 per_timeout.detach();
dudmuck 18:9530d682fd9a 1009 }
dudmuck 18:9530d682fd9a 1010
dudmuck 18:9530d682fd9a 1011 per_en = en;
dudmuck 18:9530d682fd9a 1012 }
dudmuck 7:c3c54f222ced 1013
dudmuck 8:227605e4a760 1014 void per_cb()
dudmuck 8:227605e4a760 1015 {
dudmuck 8:227605e4a760 1016 int i;
dudmuck 8:227605e4a760 1017
dudmuck 8:227605e4a760 1018 PacketTxCnt++;
dudmuck 8:227605e4a760 1019
dudmuck 8:227605e4a760 1020 radio.tx_buf[0] = per_id;
dudmuck 8:227605e4a760 1021 radio.tx_buf[1] = PacketTxCnt >> 24;
dudmuck 8:227605e4a760 1022 radio.tx_buf[2] = PacketTxCnt >> 16;
dudmuck 8:227605e4a760 1023 radio.tx_buf[3] = PacketTxCnt >> 8;
dudmuck 8:227605e4a760 1024 radio.tx_buf[4] = PacketTxCnt;
dudmuck 8:227605e4a760 1025 radio.tx_buf[5] = 'P';
dudmuck 8:227605e4a760 1026 radio.tx_buf[6] = 'E';
dudmuck 8:227605e4a760 1027 radio.tx_buf[7] = 'R';
dudmuck 8:227605e4a760 1028 radio.tx_buf[8] = 0;
dudmuck 8:227605e4a760 1029 for (i = 0; i < 8; i++)
dudmuck 8:227605e4a760 1030 radio.tx_buf[8] += radio.tx_buf[i];
dudmuck 8:227605e4a760 1031
dudmuck 13:c73caaee93a5 1032 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 13:c73caaee93a5 1033 lora.start_tx(lora.RegPayloadLength);
dudmuck 13:c73caaee93a5 1034 } else {
dudmuck 13:c73caaee93a5 1035 fsk.start_tx(9);
dudmuck 13:c73caaee93a5 1036 }
dudmuck 10:d9bb2ce57f05 1037
dudmuck 10:d9bb2ce57f05 1038 led1 = !led1.read();
dudmuck 18:9530d682fd9a 1039
dudmuck 18:9530d682fd9a 1040 if (PacketTxCnt == PacketTxCntEnd) {
dudmuck 18:9530d682fd9a 1041 set_per_en(false);
dudmuck 18:9530d682fd9a 1042 return;
dudmuck 18:9530d682fd9a 1043 }
dudmuck 8:227605e4a760 1044 }
dudmuck 8:227605e4a760 1045
dudmuck 13:c73caaee93a5 1046 int per_parse_rx(uint8_t len)
dudmuck 13:c73caaee93a5 1047 {
dudmuck 13:c73caaee93a5 1048 if (len > 8 && radio.rx_buf[5] == 'P' && radio.rx_buf[6] == 'E' && radio.rx_buf[7] == 'R') {
dudmuck 13:c73caaee93a5 1049 int i;
dudmuck 13:c73caaee93a5 1050 float per;
dudmuck 13:c73caaee93a5 1051
dudmuck 13:c73caaee93a5 1052 /* this is PER packet */
dudmuck 19:be8a8b0e7320 1053 int PacketRxSequence = (radio.rx_buf[1] << 24) | (radio.rx_buf[2] << 16) | (radio.rx_buf[3] << 8) | radio.rx_buf[4];
dudmuck 13:c73caaee93a5 1054 PacketPerOkCnt++;
dudmuck 13:c73caaee93a5 1055
dudmuck 13:c73caaee93a5 1056 if( PacketRxSequence <= PacketRxSequencePrev )
dudmuck 13:c73caaee93a5 1057 { // Sequence went back => resynchronization
dudmuck 13:c73caaee93a5 1058 // dont count missed packets this time
dudmuck 13:c73caaee93a5 1059 i = 0;
dudmuck 13:c73caaee93a5 1060 }
dudmuck 13:c73caaee93a5 1061 else
dudmuck 13:c73caaee93a5 1062 {
dudmuck 13:c73caaee93a5 1063 // determine number of missed packets
dudmuck 13:c73caaee93a5 1064 i = PacketRxSequence - PacketRxSequencePrev - 1;
dudmuck 13:c73caaee93a5 1065 }
dudmuck 13:c73caaee93a5 1066
dudmuck 13:c73caaee93a5 1067 led1 = !led1.read();
dudmuck 13:c73caaee93a5 1068 // be ready for the next
dudmuck 13:c73caaee93a5 1069 PacketRxSequencePrev = PacketRxSequence;
dudmuck 13:c73caaee93a5 1070 // increment 'missed' counter for the RX session
dudmuck 13:c73caaee93a5 1071 PacketPerKoCnt += i;
dudmuck 18:9530d682fd9a 1072 per = ( (float)1.0 - ( float )PacketPerOkCnt / ( float )( PacketPerOkCnt + PacketPerKoCnt ) ) * (float)100.0;
dudmuck 19:be8a8b0e7320 1073 printf("%d, ok=%" PRIu32 " missed=%" PRIu32 " normal=%" PRIu32 " per:%.3f ", PacketRxSequence, PacketPerOkCnt, PacketPerKoCnt, PacketNormalCnt, per);
dudmuck 15:c69b942685ea 1074 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 15:c69b942685ea 1075 printf("pkt:%ddBm, snr:%.1fdB, %ddBm\r\n", lora.get_pkt_rssi(), lora.RegPktSnrValue / 4.0, lora.get_current_rssi());
dudmuck 15:c69b942685ea 1076 else {
dudmuck 16:b9d36c60f2d3 1077 wait_us(10000);
dudmuck 15:c69b942685ea 1078 printf(" -%.1fdBm\r\n", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 15:c69b942685ea 1079 }
dudmuck 15:c69b942685ea 1080
dudmuck 13:c73caaee93a5 1081 return 1;
dudmuck 13:c73caaee93a5 1082 } else {
dudmuck 13:c73caaee93a5 1083 return 0;
dudmuck 13:c73caaee93a5 1084 }
dudmuck 13:c73caaee93a5 1085 }
dudmuck 13:c73caaee93a5 1086
dudmuck 18:9530d682fd9a 1087 typedef enum {
dudmuck 18:9530d682fd9a 1088 ON_TXDONE_STATE_NONE = 0,
dudmuck 18:9530d682fd9a 1089 ON_TXDONE_STATE_SYNC_HI_NIBBLE,
dudmuck 18:9530d682fd9a 1090 ON_TXDONE_STATE_SYNC_LO_NIBBLE,
dudmuck 18:9530d682fd9a 1091 ON_TXDONE_STATE_PAYLOAD_LENGTH,
dudmuck 18:9530d682fd9a 1092 } on_txdone_state_e;
dudmuck 18:9530d682fd9a 1093
dudmuck 18:9530d682fd9a 1094 on_txdone_state_e on_txdone_state;
dudmuck 18:9530d682fd9a 1095
dudmuck 18:9530d682fd9a 1096 uint8_t lora_sync_byte;
dudmuck 18:9530d682fd9a 1097 float on_txdone_delay;
dudmuck 18:9530d682fd9a 1098 Timeout on_txdone_timeout;
dudmuck 18:9530d682fd9a 1099 uint8_t on_txdone_repeat_cnt;
dudmuck 18:9530d682fd9a 1100
dudmuck 18:9530d682fd9a 1101 void txdone_timeout_cb()
dudmuck 18:9530d682fd9a 1102 {
dudmuck 18:9530d682fd9a 1103 uint8_t nib;
dudmuck 18:9530d682fd9a 1104
dudmuck 18:9530d682fd9a 1105 switch (on_txdone_state) {
dudmuck 18:9530d682fd9a 1106 case ON_TXDONE_STATE_SYNC_HI_NIBBLE:
dudmuck 18:9530d682fd9a 1107 nib = lora_sync_byte >> 4;
dudmuck 18:9530d682fd9a 1108 if (nib >= 15) {
dudmuck 18:9530d682fd9a 1109 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 1110 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 1111 } else
dudmuck 18:9530d682fd9a 1112 nib++;
dudmuck 18:9530d682fd9a 1113
dudmuck 18:9530d682fd9a 1114 lora_sync_byte = nib << 4;
dudmuck 18:9530d682fd9a 1115
dudmuck 18:9530d682fd9a 1116 radio.write_reg(REG_LR_SYNC_BYTE, lora_sync_byte);
dudmuck 18:9530d682fd9a 1117 printf("upper %02x\r\n", lora_sync_byte);
dudmuck 18:9530d682fd9a 1118 break;
dudmuck 18:9530d682fd9a 1119 case ON_TXDONE_STATE_SYNC_LO_NIBBLE:
dudmuck 18:9530d682fd9a 1120 nib = lora_sync_byte & 0x0f;
dudmuck 18:9530d682fd9a 1121 if (nib >= 15) {
dudmuck 18:9530d682fd9a 1122 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 1123 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 1124 } else
dudmuck 18:9530d682fd9a 1125 nib++;
dudmuck 18:9530d682fd9a 1126
dudmuck 18:9530d682fd9a 1127 lora_sync_byte = nib & 0x0f;
dudmuck 18:9530d682fd9a 1128
dudmuck 18:9530d682fd9a 1129 radio.write_reg(REG_LR_SYNC_BYTE, lora_sync_byte);
dudmuck 18:9530d682fd9a 1130 printf("lower %02x\r\n", lora_sync_byte);
dudmuck 18:9530d682fd9a 1131 break;
dudmuck 18:9530d682fd9a 1132 case ON_TXDONE_STATE_PAYLOAD_LENGTH:
dudmuck 18:9530d682fd9a 1133 if (++on_txdone_repeat_cnt >= 10) {
dudmuck 18:9530d682fd9a 1134 on_txdone_repeat_cnt = 0;
dudmuck 18:9530d682fd9a 1135 if (lora.RegPayloadLength == 255) {
dudmuck 18:9530d682fd9a 1136 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 1137 printf("done\r\n");
dudmuck 18:9530d682fd9a 1138 on_txdone_state = ON_TXDONE_STATE_NONE;
dudmuck 18:9530d682fd9a 1139 return;
dudmuck 18:9530d682fd9a 1140 }
dudmuck 18:9530d682fd9a 1141 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 1142 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1143 printf("pl %d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1144 }
dudmuck 18:9530d682fd9a 1145 tx_cnt++;
dudmuck 18:9530d682fd9a 1146 radio.tx_buf[0] = tx_cnt;
dudmuck 18:9530d682fd9a 1147 radio.tx_buf[1] = ~tx_cnt;
dudmuck 18:9530d682fd9a 1148 break;
dudmuck 18:9530d682fd9a 1149 default:
dudmuck 18:9530d682fd9a 1150 return;
dudmuck 18:9530d682fd9a 1151 } // ..switch (on_txdone_state)
dudmuck 18:9530d682fd9a 1152
dudmuck 18:9530d682fd9a 1153 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1154 }
dudmuck 18:9530d682fd9a 1155
dudmuck 18:9530d682fd9a 1156 void
dudmuck 18:9530d682fd9a 1157 poll_service_radio()
dudmuck 18:9530d682fd9a 1158 {
dudmuck 18:9530d682fd9a 1159 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1160 } else { // fsk:
dudmuck 18:9530d682fd9a 1161 RegIrqFlags2_t RegIrqFlags2;
dudmuck 18:9530d682fd9a 1162 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 18:9530d682fd9a 1163 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 1164 if (RegIrqFlags2.bits.PacketSent) {
dudmuck 18:9530d682fd9a 1165 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 18:9530d682fd9a 1166 printf("poll mode fsk tx done\r\n");
dudmuck 18:9530d682fd9a 1167 }
dudmuck 18:9530d682fd9a 1168 }
dudmuck 18:9530d682fd9a 1169 } // ..fsk
dudmuck 18:9530d682fd9a 1170 }
dudmuck 18:9530d682fd9a 1171
dudmuck 18:9530d682fd9a 1172 void cadper_service()
dudmuck 18:9530d682fd9a 1173 {
dudmuck 18:9530d682fd9a 1174 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1175
dudmuck 18:9530d682fd9a 1176
dudmuck 18:9530d682fd9a 1177 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 1178 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 1179 do {
dudmuck 18:9530d682fd9a 1180 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1181 if (lora.RegIrqFlags.bits.RxDone) {
dudmuck 18:9530d682fd9a 1182 service_action_e act = lora.service();
dudmuck 18:9530d682fd9a 1183 if (act == SERVICE_READ_FIFO) {
dudmuck 18:9530d682fd9a 1184 if (!per_parse_rx(lora.RegRxNbBytes)) {
dudmuck 18:9530d682fd9a 1185 PacketNormalCnt++;
dudmuck 18:9530d682fd9a 1186 print_rx_verbose(lora.RegRxNbBytes);
dudmuck 18:9530d682fd9a 1187 }
dudmuck 18:9530d682fd9a 1188 }
dudmuck 18:9530d682fd9a 1189 break;
dudmuck 18:9530d682fd9a 1190 }
dudmuck 18:9530d682fd9a 1191 } while (!lora.RegIrqFlags.bits.RxTimeout);
dudmuck 18:9530d682fd9a 1192 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 1193 }
dudmuck 18:9530d682fd9a 1194
dudmuck 18:9530d682fd9a 1195 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 1196 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1197 num_cads++;
dudmuck 18:9530d682fd9a 1198 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 1199 }
dudmuck 18:9530d682fd9a 1200
dudmuck 18:9530d682fd9a 1201 }
dudmuck 18:9530d682fd9a 1202
dudmuck 0:be215de91a68 1203 void
dudmuck 0:be215de91a68 1204 service_radio()
dudmuck 0:be215de91a68 1205 {
dudmuck 1:1cd0afbed23c 1206 service_action_e act;
dudmuck 14:c57ea544dc18 1207 static uint8_t rssi = 0;
dudmuck 1:1cd0afbed23c 1208
dudmuck 1:1cd0afbed23c 1209 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1210 if (cadper_enable) {
dudmuck 18:9530d682fd9a 1211 cadper_service();
dudmuck 18:9530d682fd9a 1212 }
dudmuck 4:7a9007dfc0e5 1213
dudmuck 1:1cd0afbed23c 1214 act = lora.service();
dudmuck 0:be215de91a68 1215
dudmuck 1:1cd0afbed23c 1216 switch (act) {
dudmuck 1:1cd0afbed23c 1217 case SERVICE_READ_FIFO:
dudmuck 8:227605e4a760 1218 if (app == APP_NONE) {
dudmuck 8:227605e4a760 1219 if (per_en) {
dudmuck 13:c73caaee93a5 1220 if (!per_parse_rx(lora.RegRxNbBytes)) {
dudmuck 8:227605e4a760 1221 PacketNormalCnt++;
dudmuck 13:c73caaee93a5 1222 print_rx_verbose(lora.RegRxNbBytes);
dudmuck 8:227605e4a760 1223 }
dudmuck 8:227605e4a760 1224 } else
dudmuck 8:227605e4a760 1225 print_rx_verbose(lora.RegRxNbBytes);
dudmuck 15:c69b942685ea 1226 fflush(stdout);
dudmuck 1:1cd0afbed23c 1227 } else if (app == APP_CHAT) {
dudmuck 1:1cd0afbed23c 1228 if (lora.RegHopChannel.bits.RxPayloadCrcOn) {
dudmuck 1:1cd0afbed23c 1229 if (lora.RegIrqFlags.bits.PayloadCrcError)
dudmuck 1:1cd0afbed23c 1230 printf("crcError\r\n");
dudmuck 1:1cd0afbed23c 1231 else {
dudmuck 1:1cd0afbed23c 1232 int n = lora.RegRxNbBytes;
dudmuck 1:1cd0afbed23c 1233 radio.rx_buf[n++] = '\r';
dudmuck 1:1cd0afbed23c 1234 radio.rx_buf[n++] = '\n';
dudmuck 1:1cd0afbed23c 1235 radio.rx_buf[n] = 0; // null terminate
dudmuck 1:1cd0afbed23c 1236 printf((char *)radio.rx_buf);
dudmuck 1:1cd0afbed23c 1237 }
dudmuck 1:1cd0afbed23c 1238 } else
dudmuck 1:1cd0afbed23c 1239 printf("crcOff\r\n");
dudmuck 1:1cd0afbed23c 1240
dudmuck 1:1cd0afbed23c 1241 // clear Irq flags
dudmuck 1:1cd0afbed23c 1242 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 1:1cd0afbed23c 1243 // should still be in receive mode
dudmuck 0:be215de91a68 1244 }
dudmuck 1:1cd0afbed23c 1245 break;
dudmuck 1:1cd0afbed23c 1246 case SERVICE_TX_DONE:
dudmuck 1:1cd0afbed23c 1247 if (app == APP_CHAT) {
dudmuck 18:9530d682fd9a 1248 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 8:227605e4a760 1249 } else if (per_en) {
dudmuck 18:9530d682fd9a 1250 per_timeout.attach(&per_cb, per_tx_delay); // start next TX
dudmuck 18:9530d682fd9a 1251 } else if (on_txdone_state != ON_TXDONE_STATE_NONE) {
dudmuck 18:9530d682fd9a 1252 on_txdone_timeout.attach(&txdone_timeout_cb, on_txdone_delay);
dudmuck 1:1cd0afbed23c 1253 }
dudmuck 1:1cd0afbed23c 1254 break;
dudmuck 1:1cd0afbed23c 1255 case SERVICE_ERROR:
dudmuck 1:1cd0afbed23c 1256 printf("error\r\n");
dudmuck 1:1cd0afbed23c 1257 break;
dudmuck 19:be8a8b0e7320 1258 case SERVICE_NONE:
dudmuck 19:be8a8b0e7320 1259 break;
dudmuck 1:1cd0afbed23c 1260 } // ...switch (act)
dudmuck 1:1cd0afbed23c 1261 } else {
dudmuck 1:1cd0afbed23c 1262 /* FSK: */
dudmuck 1:1cd0afbed23c 1263 act = fsk.service();
dudmuck 1:1cd0afbed23c 1264
dudmuck 1:1cd0afbed23c 1265 switch (act) {
dudmuck 1:1cd0afbed23c 1266 case SERVICE_READ_FIFO:
dudmuck 2:c6b23a43a9d9 1267 if (app == APP_CHAT) {
dudmuck 2:c6b23a43a9d9 1268 int n = fsk.rx_buf_length;
dudmuck 2:c6b23a43a9d9 1269 radio.rx_buf[n++] = '\r';
dudmuck 2:c6b23a43a9d9 1270 radio.rx_buf[n++] = '\n';
dudmuck 2:c6b23a43a9d9 1271 radio.rx_buf[n] = 0; // null terminate
dudmuck 2:c6b23a43a9d9 1272 printf((char *)radio.rx_buf);
dudmuck 2:c6b23a43a9d9 1273 } else {
dudmuck 2:c6b23a43a9d9 1274 if (fsk.RegRxConfig.bits.AfcAutoOn)
dudmuck 14:c57ea544dc18 1275 printf("%dHz ", (int)(FREQ_STEP_HZ * fsk.RegAfcValue));
dudmuck 14:c57ea544dc18 1276 if (rssi != 0) {
dudmuck 15:c69b942685ea 1277 printf("pkt:-%.1fdBm ", rssi / 2.0);
dudmuck 14:c57ea544dc18 1278 rssi = 0;
dudmuck 15:c69b942685ea 1279 }
dudmuck 13:c73caaee93a5 1280 if (per_en) {
dudmuck 13:c73caaee93a5 1281 if (!per_parse_rx(fsk.rx_buf_length)) {
dudmuck 13:c73caaee93a5 1282 PacketNormalCnt++;
dudmuck 13:c73caaee93a5 1283 print_rx_buf(fsk.rx_buf_length);
dudmuck 13:c73caaee93a5 1284 }
dudmuck 13:c73caaee93a5 1285 } else {
dudmuck 13:c73caaee93a5 1286 print_rx_buf(fsk.rx_buf_length);
dudmuck 13:c73caaee93a5 1287 }
dudmuck 15:c69b942685ea 1288 fflush(stdout);
dudmuck 2:c6b23a43a9d9 1289 }
dudmuck 1:1cd0afbed23c 1290 break;
dudmuck 2:c6b23a43a9d9 1291 case SERVICE_TX_DONE:
dudmuck 18:9530d682fd9a 1292 if (ook_test_en)
dudmuck 18:9530d682fd9a 1293 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 2:c6b23a43a9d9 1294 if (app == APP_CHAT) {
dudmuck 2:c6b23a43a9d9 1295 fsk.start_rx();
dudmuck 13:c73caaee93a5 1296 } else if (per_en) {
dudmuck 13:c73caaee93a5 1297 per_timeout.attach(&per_cb, per_tx_delay); // start next TX
dudmuck 13:c73caaee93a5 1298 }
dudmuck 2:c6b23a43a9d9 1299 break;
dudmuck 19:be8a8b0e7320 1300 case SERVICE_ERROR:
dudmuck 19:be8a8b0e7320 1301 case SERVICE_NONE:
dudmuck 19:be8a8b0e7320 1302 break;
dudmuck 1:1cd0afbed23c 1303 } // ...switch (act)
dudmuck 14:c57ea544dc18 1304
dudmuck 14:c57ea544dc18 1305 /* fsk sync address */
dudmuck 14:c57ea544dc18 1306 if (dio2 && radio.RegDioMapping1.bits.Dio2Mapping == 3) {
dudmuck 14:c57ea544dc18 1307 // syncAdrs when in RX mode
dudmuck 14:c57ea544dc18 1308 if (rssi == 0) {
dudmuck 15:c69b942685ea 1309 rssi = radio.read_reg(REG_FSK_RSSIVALUE);
dudmuck 14:c57ea544dc18 1310 }
dudmuck 14:c57ea544dc18 1311 }
dudmuck 14:c57ea544dc18 1312
dudmuck 14:c57ea544dc18 1313 } // ...!radio.RegOpMode.bits.LongRangeMode
dudmuck 0:be215de91a68 1314 }
dudmuck 0:be215de91a68 1315
dudmuck 5:360069ec9953 1316 /*int get_kbd_str(char* buf, int size)
dudmuck 0:be215de91a68 1317 {
dudmuck 0:be215de91a68 1318 char c;
dudmuck 0:be215de91a68 1319 int i;
dudmuck 0:be215de91a68 1320 static int prev_len;
dudmuck 0:be215de91a68 1321
dudmuck 0:be215de91a68 1322 for (i = 0;;) {
dudmuck 0:be215de91a68 1323 if (pc.readable()) {
dudmuck 0:be215de91a68 1324 c = pc.getc();
dudmuck 0:be215de91a68 1325 if (c == 8 && i > 0) {
dudmuck 0:be215de91a68 1326 pc.putc(8);
dudmuck 0:be215de91a68 1327 pc.putc(' ');
dudmuck 0:be215de91a68 1328 pc.putc(8);
dudmuck 0:be215de91a68 1329 i--;
dudmuck 0:be215de91a68 1330 } else if (c == '\r') {
dudmuck 0:be215de91a68 1331 if (i == 0) {
dudmuck 0:be215de91a68 1332 return prev_len; // repeat previous
dudmuck 0:be215de91a68 1333 } else {
dudmuck 0:be215de91a68 1334 buf[i] = 0; // null terminate
dudmuck 0:be215de91a68 1335 prev_len = i;
dudmuck 0:be215de91a68 1336 return i;
dudmuck 0:be215de91a68 1337 }
dudmuck 0:be215de91a68 1338 } else if (c == 3) {
dudmuck 0:be215de91a68 1339 // ctrl-C abort
dudmuck 0:be215de91a68 1340 return -1;
dudmuck 0:be215de91a68 1341 } else if (i < size) {
dudmuck 0:be215de91a68 1342 buf[i++] = c;
dudmuck 0:be215de91a68 1343 pc.putc(c);
dudmuck 0:be215de91a68 1344 }
dudmuck 4:7a9007dfc0e5 1345 } else {
dudmuck 0:be215de91a68 1346 service_radio();
dudmuck 4:7a9007dfc0e5 1347 }
dudmuck 0:be215de91a68 1348 } // ...for()
dudmuck 5:360069ec9953 1349 }*/
dudmuck 0:be215de91a68 1350
dudmuck 0:be215de91a68 1351 void
dudmuck 0:be215de91a68 1352 console_chat()
dudmuck 0:be215de91a68 1353 {
dudmuck 5:360069ec9953 1354 //int i, len = get_kbd_str(pcbuf, sizeof(pcbuf));
dudmuck 5:360069ec9953 1355
dudmuck 5:360069ec9953 1356 service_radio();
dudmuck 5:360069ec9953 1357
dudmuck 5:360069ec9953 1358 if (pcbuf_len < 0) {
dudmuck 0:be215de91a68 1359 printf("chat abort\r\n");
dudmuck 5:360069ec9953 1360 pcbuf_len = 0;
dudmuck 0:be215de91a68 1361 app = APP_NONE;
dudmuck 0:be215de91a68 1362 return;
dudmuck 5:360069ec9953 1363 } else if (pcbuf_len == 0) {
dudmuck 5:360069ec9953 1364 return;
dudmuck 0:be215de91a68 1365 } else {
dudmuck 5:360069ec9953 1366 int i;
dudmuck 5:360069ec9953 1367 for (i = 0; i < pcbuf_len; i++)
dudmuck 0:be215de91a68 1368 radio.tx_buf[i] = pcbuf[i];
dudmuck 1:1cd0afbed23c 1369 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 5:360069ec9953 1370 lora.RegPayloadLength = pcbuf_len;
dudmuck 1:1cd0afbed23c 1371 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 5:360069ec9953 1372 lora.start_tx(pcbuf_len);
dudmuck 2:c6b23a43a9d9 1373 } else {
dudmuck 5:360069ec9953 1374 fsk.start_tx(pcbuf_len);
dudmuck 2:c6b23a43a9d9 1375 }
dudmuck 5:360069ec9953 1376 pcbuf_len = 0;
dudmuck 0:be215de91a68 1377 printf("\r\n");
dudmuck 0:be215de91a68 1378 }
dudmuck 0:be215de91a68 1379 }
dudmuck 0:be215de91a68 1380
dudmuck 18:9530d682fd9a 1381 typedef enum {
dudmuck 18:9530d682fd9a 1382 TXTICKER_STATE_OFF = 0,
dudmuck 18:9530d682fd9a 1383 TXTICKER_STATE_TOGGLE_PAYLOAD_BIT,
dudmuck 18:9530d682fd9a 1384 TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH,
dudmuck 18:9530d682fd9a 1385 TXTICKER_STATE_CYCLE_CODING_RATE,
dudmuck 18:9530d682fd9a 1386 TXTICKER_STATE_TOG_HEADER_MODE,
dudmuck 18:9530d682fd9a 1387 TXTICKER_STATE_TOG_CRC_ON,
dudmuck 18:9530d682fd9a 1388 TXTICKER_STATE_CYCLE_SYNC_1,
dudmuck 18:9530d682fd9a 1389 TXTICKER_STATE_CYCLE_SYNC_2,
dudmuck 18:9530d682fd9a 1390 TXTICKER_STATE_RAMP_PAYLOAD_DATA_START,
dudmuck 18:9530d682fd9a 1391 TXTICKER_STATE_RAMP_PAYLOAD_DATA,
dudmuck 18:9530d682fd9a 1392 TXTICKER_STATE_SYMBOL_SWEEP,
dudmuck 18:9530d682fd9a 1393 TXTICKER_STATE_TOGGLE_ALL_BITS_START,
dudmuck 18:9530d682fd9a 1394 TXTICKER_STATE_TOGGLE_ALL_BITS,
dudmuck 18:9530d682fd9a 1395 } txticker_state_e;
dudmuck 18:9530d682fd9a 1396
dudmuck 18:9530d682fd9a 1397 txticker_state_e txticker_state;
dudmuck 18:9530d682fd9a 1398 float tx_ticker_rate = 0.5;
dudmuck 18:9530d682fd9a 1399 Ticker tx_ticker;
dudmuck 18:9530d682fd9a 1400
dudmuck 18:9530d682fd9a 1401 uint8_t txticker_sync_byte;
dudmuck 18:9530d682fd9a 1402 uint8_t payload_length_stop;
dudmuck 18:9530d682fd9a 1403 uint8_t symbol_num;
dudmuck 18:9530d682fd9a 1404 uint32_t symbol_sweep_bit_counter = 0;
dudmuck 18:9530d682fd9a 1405 unsigned int symbol_sweep_bit_counter_stop;
dudmuck 18:9530d682fd9a 1406 uint8_t symbol_sweep_nbits;
dudmuck 18:9530d682fd9a 1407 uint8_t byte_pad_length;
dudmuck 18:9530d682fd9a 1408
dudmuck 18:9530d682fd9a 1409 uint8_t tab_current_byte_num;
dudmuck 18:9530d682fd9a 1410 uint8_t tab_current_bit_in_byte;
dudmuck 18:9530d682fd9a 1411
dudmuck 18:9530d682fd9a 1412 void fp_cb()
dudmuck 18:9530d682fd9a 1413 {
dudmuck 18:9530d682fd9a 1414 int i;
dudmuck 18:9530d682fd9a 1415 if (!radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1416 return;
dudmuck 18:9530d682fd9a 1417
dudmuck 18:9530d682fd9a 1418 switch (txticker_state) {
dudmuck 18:9530d682fd9a 1419 case TXTICKER_STATE_TOGGLE_PAYLOAD_BIT:
dudmuck 18:9530d682fd9a 1420 /*
dudmuck 18:9530d682fd9a 1421 {
dudmuck 18:9530d682fd9a 1422 if (fp_tog_bit_ < 32) {
dudmuck 18:9530d682fd9a 1423 uint32_t bp = 1 << fp_tog_bit_;
dudmuck 18:9530d682fd9a 1424 fp_data ^= bp;
dudmuck 18:9530d682fd9a 1425 //printf("bp%02x ", bp);
dudmuck 18:9530d682fd9a 1426 }
dudmuck 18:9530d682fd9a 1427 memcpy(radio.tx_buf, &fp_data, fp_data_length);
dudmuck 18:9530d682fd9a 1428 printf("TX ");
dudmuck 18:9530d682fd9a 1429 for (i = 0; i < fp_data_length; i++)
dudmuck 18:9530d682fd9a 1430 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1431
dudmuck 18:9530d682fd9a 1432 printf("\r\n");
dudmuck 18:9530d682fd9a 1433 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1434 break;
dudmuck 18:9530d682fd9a 1435 }
dudmuck 18:9530d682fd9a 1436 */
dudmuck 18:9530d682fd9a 1437 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1438 break;
dudmuck 18:9530d682fd9a 1439 case TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH:
dudmuck 18:9530d682fd9a 1440 {
dudmuck 18:9530d682fd9a 1441 if (lora.RegPayloadLength > payload_length_stop)
dudmuck 18:9530d682fd9a 1442 lora.RegPayloadLength = 0;
dudmuck 18:9530d682fd9a 1443 else
dudmuck 18:9530d682fd9a 1444 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 1445
dudmuck 18:9530d682fd9a 1446 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1447 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1448 printf("RegPayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1449 break;
dudmuck 18:9530d682fd9a 1450 }
dudmuck 18:9530d682fd9a 1451 case TXTICKER_STATE_CYCLE_CODING_RATE:
dudmuck 18:9530d682fd9a 1452 {
dudmuck 18:9530d682fd9a 1453 uint8_t cr = lora.getCodingRate(false); // false: TX coding rate
dudmuck 18:9530d682fd9a 1454 if (cr == 4)
dudmuck 18:9530d682fd9a 1455 cr = 0;
dudmuck 18:9530d682fd9a 1456 else
dudmuck 18:9530d682fd9a 1457 cr++;
dudmuck 18:9530d682fd9a 1458
dudmuck 18:9530d682fd9a 1459 lora.setCodingRate(cr);
dudmuck 18:9530d682fd9a 1460 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1461 printf("tx cr:%d\r\n", cr);
dudmuck 18:9530d682fd9a 1462 break;
dudmuck 18:9530d682fd9a 1463 }
dudmuck 18:9530d682fd9a 1464 case TXTICKER_STATE_TOG_HEADER_MODE:
dudmuck 18:9530d682fd9a 1465 {
dudmuck 18:9530d682fd9a 1466 lora.setHeaderMode(!lora.getHeaderMode());
dudmuck 18:9530d682fd9a 1467 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1468 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 1469 lora_printHeaderMode();
dudmuck 18:9530d682fd9a 1470 printf("\r\n");
dudmuck 18:9530d682fd9a 1471 break;
dudmuck 18:9530d682fd9a 1472 }
dudmuck 18:9530d682fd9a 1473 case TXTICKER_STATE_TOG_CRC_ON:
dudmuck 18:9530d682fd9a 1474 {
dudmuck 18:9530d682fd9a 1475 lora.setRxPayloadCrcOn(!lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 1476 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1477 printf("crc on:%d\r\n", lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 1478 break;
dudmuck 18:9530d682fd9a 1479 }
dudmuck 18:9530d682fd9a 1480 case TXTICKER_STATE_CYCLE_SYNC_1:
dudmuck 18:9530d682fd9a 1481 {
dudmuck 18:9530d682fd9a 1482 /* cycle hi nibble of 0x39 register */
dudmuck 18:9530d682fd9a 1483 if ((txticker_sync_byte & 0xf0) == 0xf0)
dudmuck 18:9530d682fd9a 1484 txticker_sync_byte &= 0x0f;
dudmuck 18:9530d682fd9a 1485 else
dudmuck 18:9530d682fd9a 1486 txticker_sync_byte += 0x10;
dudmuck 18:9530d682fd9a 1487 radio.write_reg(REG_LR_SYNC_BYTE, txticker_sync_byte);
dudmuck 18:9530d682fd9a 1488 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1489 printf("0x39: %02x\r\n", txticker_sync_byte);
dudmuck 18:9530d682fd9a 1490 break;
dudmuck 18:9530d682fd9a 1491 }
dudmuck 18:9530d682fd9a 1492 case TXTICKER_STATE_CYCLE_SYNC_2:
dudmuck 18:9530d682fd9a 1493 {
dudmuck 18:9530d682fd9a 1494 /* cycle lo nibble of 0x39 register */
dudmuck 18:9530d682fd9a 1495 if ((txticker_sync_byte & 0x0f) == 0x0f)
dudmuck 18:9530d682fd9a 1496 txticker_sync_byte &= 0xf0;
dudmuck 18:9530d682fd9a 1497 else
dudmuck 18:9530d682fd9a 1498 txticker_sync_byte += 0x01;
dudmuck 18:9530d682fd9a 1499 radio.write_reg(REG_LR_SYNC_BYTE, txticker_sync_byte);
dudmuck 18:9530d682fd9a 1500 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1501 printf("0x39: %02x\r\n", txticker_sync_byte);
dudmuck 18:9530d682fd9a 1502 break;
dudmuck 18:9530d682fd9a 1503 }
dudmuck 18:9530d682fd9a 1504 case TXTICKER_STATE_RAMP_PAYLOAD_DATA_START:
dudmuck 18:9530d682fd9a 1505 txticker_state = TXTICKER_STATE_RAMP_PAYLOAD_DATA;
dudmuck 18:9530d682fd9a 1506 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1507 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1508
dudmuck 18:9530d682fd9a 1509 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1510 printf("payload start, len:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1511 break;
dudmuck 18:9530d682fd9a 1512 case TXTICKER_STATE_RAMP_PAYLOAD_DATA:
dudmuck 18:9530d682fd9a 1513 for (i = lora.RegPayloadLength-1; i >= 0; i--) {
dudmuck 18:9530d682fd9a 1514 //printf("i:%d ", i);
dudmuck 18:9530d682fd9a 1515 if (radio.tx_buf[i] == 255) {
dudmuck 18:9530d682fd9a 1516 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1517 } else {
dudmuck 18:9530d682fd9a 1518 radio.tx_buf[i]++;
dudmuck 18:9530d682fd9a 1519 break;
dudmuck 18:9530d682fd9a 1520 }
dudmuck 18:9530d682fd9a 1521 }
dudmuck 18:9530d682fd9a 1522 //printf("\r\n");
dudmuck 18:9530d682fd9a 1523 printf("send:");
dudmuck 18:9530d682fd9a 1524 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 1525 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1526 }
dudmuck 18:9530d682fd9a 1527 printf("\r\n");
dudmuck 18:9530d682fd9a 1528 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1529 if (radio.tx_buf[0] == 255) {
dudmuck 18:9530d682fd9a 1530 printf("payload ramp done\r\n");
dudmuck 18:9530d682fd9a 1531 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1532 }
dudmuck 18:9530d682fd9a 1533 break;
dudmuck 18:9530d682fd9a 1534 case TXTICKER_STATE_SYMBOL_SWEEP: // fpsNL command, where N=symbol num, L=nbytes
dudmuck 18:9530d682fd9a 1535 {
dudmuck 18:9530d682fd9a 1536 uint32_t mask;
dudmuck 18:9530d682fd9a 1537 /*for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1538 radio.tx_buf[i] = 0;*/
dudmuck 18:9530d682fd9a 1539 i = byte_pad_length;
dudmuck 19:be8a8b0e7320 1540 printf("bit_counter 0x%" PRIx32 " : ", symbol_sweep_bit_counter);
dudmuck 18:9530d682fd9a 1541 for (int bn = 0; bn < symbol_sweep_nbits; bn += 2) {
dudmuck 18:9530d682fd9a 1542 /* 2 lsbits going into first byte */
dudmuck 18:9530d682fd9a 1543 mask = 1 << bn;
dudmuck 18:9530d682fd9a 1544 if (symbol_sweep_bit_counter & mask)
dudmuck 18:9530d682fd9a 1545 radio.tx_buf[i] |= 1 << symbol_num;
dudmuck 18:9530d682fd9a 1546 else
dudmuck 18:9530d682fd9a 1547 radio.tx_buf[i] &= ~(1 << symbol_num);
dudmuck 18:9530d682fd9a 1548 mask = 2 << bn;
dudmuck 18:9530d682fd9a 1549 if (symbol_sweep_bit_counter & mask)
dudmuck 18:9530d682fd9a 1550 radio.tx_buf[i] |= 0x10 << symbol_num;
dudmuck 18:9530d682fd9a 1551 else
dudmuck 18:9530d682fd9a 1552 radio.tx_buf[i] &= ~(0x10 << symbol_num);
dudmuck 18:9530d682fd9a 1553 //printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1554 i++;
dudmuck 18:9530d682fd9a 1555 }
dudmuck 18:9530d682fd9a 1556 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1557 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1558 printf("\r\n");
dudmuck 18:9530d682fd9a 1559 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1560 if (++symbol_sweep_bit_counter == symbol_sweep_bit_counter_stop) {
dudmuck 18:9530d682fd9a 1561 printf("stop\r\n");
dudmuck 18:9530d682fd9a 1562 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1563 }
dudmuck 18:9530d682fd9a 1564 }
dudmuck 18:9530d682fd9a 1565 break;
dudmuck 18:9530d682fd9a 1566 case TXTICKER_STATE_TOGGLE_ALL_BITS_START:
dudmuck 18:9530d682fd9a 1567 tab_current_byte_num = byte_pad_length;
dudmuck 18:9530d682fd9a 1568 tab_current_bit_in_byte = 0;
dudmuck 18:9530d682fd9a 1569 printf("tx ");
dudmuck 18:9530d682fd9a 1570 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 1571 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1572 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1573 }
dudmuck 18:9530d682fd9a 1574 printf("\r\n");
dudmuck 18:9530d682fd9a 1575 txticker_state = TXTICKER_STATE_TOGGLE_ALL_BITS;
dudmuck 18:9530d682fd9a 1576 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1577 break;
dudmuck 18:9530d682fd9a 1578 case TXTICKER_STATE_TOGGLE_ALL_BITS:
dudmuck 18:9530d682fd9a 1579 {
dudmuck 18:9530d682fd9a 1580 uint8_t mask = 1 << tab_current_bit_in_byte;
dudmuck 18:9530d682fd9a 1581 radio.tx_buf[tab_current_byte_num] = mask;
dudmuck 18:9530d682fd9a 1582 printf("bit%d in [%d]: tx ", tab_current_bit_in_byte, tab_current_byte_num);
dudmuck 18:9530d682fd9a 1583 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 1584 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1585 }
dudmuck 18:9530d682fd9a 1586 printf("\r\n");
dudmuck 18:9530d682fd9a 1587 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1588 if (++tab_current_bit_in_byte == 8) {
dudmuck 18:9530d682fd9a 1589 radio.tx_buf[tab_current_byte_num] = 0;
dudmuck 18:9530d682fd9a 1590 tab_current_bit_in_byte = 0;
dudmuck 18:9530d682fd9a 1591 if (++tab_current_byte_num == lora.RegPayloadLength) {
dudmuck 18:9530d682fd9a 1592 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1593 }
dudmuck 18:9530d682fd9a 1594 }
dudmuck 18:9530d682fd9a 1595 }
dudmuck 18:9530d682fd9a 1596 break;
dudmuck 18:9530d682fd9a 1597 default:
dudmuck 18:9530d682fd9a 1598 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1599 break;
dudmuck 18:9530d682fd9a 1600 } // ...switch (txticker_state)
dudmuck 18:9530d682fd9a 1601 }
dudmuck 18:9530d682fd9a 1602
dudmuck 18:9530d682fd9a 1603 void ook_test_tx(int len)
dudmuck 18:9530d682fd9a 1604 {
dudmuck 18:9530d682fd9a 1605 int i;
dudmuck 18:9530d682fd9a 1606 /*
dudmuck 18:9530d682fd9a 1607 fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 1608 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 1609 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 18:9530d682fd9a 1610 */
dudmuck 18:9530d682fd9a 1611 for (i = 0; i < 4; i++) {
dudmuck 18:9530d682fd9a 1612 radio.tx_buf[i] = 0xaa;
dudmuck 18:9530d682fd9a 1613 }
dudmuck 18:9530d682fd9a 1614
dudmuck 18:9530d682fd9a 1615 printf("ooktx:");
dudmuck 18:9530d682fd9a 1616 for (i = 0; i < len; i++) {
dudmuck 18:9530d682fd9a 1617 radio.tx_buf[i+4] = rand() & 0xff;
dudmuck 18:9530d682fd9a 1618 printf("%02x ", radio.tx_buf[i+4]);
dudmuck 18:9530d682fd9a 1619 }
dudmuck 18:9530d682fd9a 1620 printf("\r\n");
dudmuck 18:9530d682fd9a 1621 fsk.start_tx(len+4);
dudmuck 18:9530d682fd9a 1622
dudmuck 18:9530d682fd9a 1623 while (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 18:9530d682fd9a 1624 if (poll_irq_en)
dudmuck 18:9530d682fd9a 1625 poll_service_radio();
dudmuck 18:9530d682fd9a 1626 else
dudmuck 18:9530d682fd9a 1627 service_radio();
dudmuck 18:9530d682fd9a 1628 }
dudmuck 18:9530d682fd9a 1629 }
dudmuck 18:9530d682fd9a 1630
dudmuck 18:9530d682fd9a 1631 void cmd_init(uint8_t args_at)
dudmuck 10:d9bb2ce57f05 1632 {
dudmuck 18:9530d682fd9a 1633 printf("init\r\n");
dudmuck 18:9530d682fd9a 1634 radio.init();
dudmuck 18:9530d682fd9a 1635 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1636 fsk.init(); // put FSK modem to some functioning default
dudmuck 18:9530d682fd9a 1637 } else {
dudmuck 18:9530d682fd9a 1638 // lora configuration is more simple
dudmuck 18:9530d682fd9a 1639 }
dudmuck 18:9530d682fd9a 1640 }
dudmuck 18:9530d682fd9a 1641
dudmuck 18:9530d682fd9a 1642 void cmd_per_tx_delay(uint8_t idx)
dudmuck 18:9530d682fd9a 1643 {
dudmuck 18:9530d682fd9a 1644 int i;
dudmuck 18:9530d682fd9a 1645 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1646 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 1647 per_tx_delay = i / 1000.0;
dudmuck 18:9530d682fd9a 1648 }
dudmuck 18:9530d682fd9a 1649 printf("per_tx_delay:%dms\r\n", (int)(per_tx_delay * 1000));
dudmuck 18:9530d682fd9a 1650 }
dudmuck 18:9530d682fd9a 1651
dudmuck 18:9530d682fd9a 1652 void cmd_tx(uint8_t idx)
dudmuck 18:9530d682fd9a 1653 {
dudmuck 18:9530d682fd9a 1654 int i;
dudmuck 18:9530d682fd9a 1655 static uint16_t fsk_tx_length;
dudmuck 18:9530d682fd9a 1656
dudmuck 18:9530d682fd9a 1657 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1658 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1659 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 1660 lora.RegPayloadLength = i;
dudmuck 18:9530d682fd9a 1661 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1662 }
dudmuck 18:9530d682fd9a 1663 tx_cnt++;
dudmuck 18:9530d682fd9a 1664 printf("payload:%02x\r\n", tx_cnt);
dudmuck 18:9530d682fd9a 1665
dudmuck 18:9530d682fd9a 1666 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1667 radio.tx_buf[i] = tx_cnt;
dudmuck 18:9530d682fd9a 1668 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1669 } else { // FSK:
dudmuck 18:9530d682fd9a 1670 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1671 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 1672 fsk_tx_length = i;
dudmuck 18:9530d682fd9a 1673 }
dudmuck 18:9530d682fd9a 1674 if (ook_test_en) {
dudmuck 18:9530d682fd9a 1675 ook_test_tx(fsk_tx_length);
dudmuck 18:9530d682fd9a 1676 } else {
dudmuck 18:9530d682fd9a 1677 if (radio.RegOpMode.bits.Mode != RF_OPMODE_TRANSMITTER) { // if not already busy transmitting
dudmuck 18:9530d682fd9a 1678 tx_cnt++;
dudmuck 18:9530d682fd9a 1679 printf("payload:%02x\r\n", tx_cnt);
dudmuck 18:9530d682fd9a 1680 for (i = 0; i < fsk_tx_length; i++) {
dudmuck 18:9530d682fd9a 1681 radio.tx_buf[i] = tx_cnt;
dudmuck 18:9530d682fd9a 1682 }
dudmuck 18:9530d682fd9a 1683 fsk.start_tx(fsk_tx_length);
dudmuck 18:9530d682fd9a 1684 }
dudmuck 18:9530d682fd9a 1685 }
dudmuck 18:9530d682fd9a 1686 } // !LoRa
dudmuck 18:9530d682fd9a 1687
dudmuck 18:9530d682fd9a 1688 }
dudmuck 18:9530d682fd9a 1689
dudmuck 18:9530d682fd9a 1690 void cmd_hw_reset(uint8_t idx)
dudmuck 18:9530d682fd9a 1691 {
dudmuck 18:9530d682fd9a 1692 printf("hw_reset()\r\n");
dudmuck 18:9530d682fd9a 1693 radio.hw_reset();
dudmuck 18:9530d682fd9a 1694 ook_test_en = false;
dudmuck 18:9530d682fd9a 1695 poll_irq_en = false;
dudmuck 18:9530d682fd9a 1696 }
dudmuck 18:9530d682fd9a 1697
dudmuck 18:9530d682fd9a 1698 void cmd_read_all_regs(uint8_t idx)
dudmuck 18:9530d682fd9a 1699 {
dudmuck 18:9530d682fd9a 1700 uint8_t a, d;
dudmuck 18:9530d682fd9a 1701
dudmuck 18:9530d682fd9a 1702 // read all registers
dudmuck 18:9530d682fd9a 1703 for (a = 1; a < 0x71; a++) {
dudmuck 18:9530d682fd9a 1704 d = radio.read_reg(a);
dudmuck 18:9530d682fd9a 1705 printf("%02x: %02x\r\n", a, d);
dudmuck 18:9530d682fd9a 1706 }
dudmuck 18:9530d682fd9a 1707 }
dudmuck 18:9530d682fd9a 1708
dudmuck 18:9530d682fd9a 1709 void cmd_read_current_rssi(uint8_t idx)
dudmuck 18:9530d682fd9a 1710 {
dudmuck 18:9530d682fd9a 1711 if (radio.RegOpMode.bits.Mode != RF_OPMODE_RECEIVER) {
dudmuck 18:9530d682fd9a 1712 radio.set_opmode(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 1713 wait_us(10000);
dudmuck 18:9530d682fd9a 1714 }
dudmuck 18:9530d682fd9a 1715 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1716 printf("rssi:%ddBm\r\n", lora.get_current_rssi());
dudmuck 18:9530d682fd9a 1717 else
dudmuck 18:9530d682fd9a 1718 printf("rssi:-%.1f\r\n", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 18:9530d682fd9a 1719 }
dudmuck 18:9530d682fd9a 1720
dudmuck 18:9530d682fd9a 1721 void cmd_lora_continuous_tx(uint8_t idx)
dudmuck 18:9530d682fd9a 1722 {
dudmuck 18:9530d682fd9a 1723 /* TxContinuousMode same for sx1272 and sx1276 */
dudmuck 18:9530d682fd9a 1724 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 1725 lora.RegModemConfig2.sx1276bits.TxContinuousMode ^= 1;
dudmuck 18:9530d682fd9a 1726 radio.write_reg(REG_LR_MODEMCONFIG2, lora.RegModemConfig2.octet);
dudmuck 18:9530d682fd9a 1727 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 13:c73caaee93a5 1728
dudmuck 18:9530d682fd9a 1729 lora_printTxContinuousMode();
dudmuck 18:9530d682fd9a 1730 printf("\r\n");
dudmuck 18:9530d682fd9a 1731 }
dudmuck 18:9530d682fd9a 1732
dudmuck 18:9530d682fd9a 1733 void cmd_fsk_test_case(uint8_t idx)
dudmuck 18:9530d682fd9a 1734 {
dudmuck 18:9530d682fd9a 1735 if (pcbuf[idx] < '0' || pcbuf[idx] > '9') {
dudmuck 19:be8a8b0e7320 1736 printf("%" PRIu32 "bps fdev:%" PRIu32 "hz ", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 19:be8a8b0e7320 1737 printf("rxbw:%" PRIu32 "Hz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 19:be8a8b0e7320 1738 printf("afcbw:%" PRIu32 "Hz preambleLen:%" PRIu16 "\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW), radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 18:9530d682fd9a 1739 } else {
dudmuck 18:9530d682fd9a 1740 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 1741 per_tx_delay = 0.3;
dudmuck 18:9530d682fd9a 1742
dudmuck 18:9530d682fd9a 1743 if (radio.read_reg(REG_FSK_SYNCVALUE1) == 0x55 && radio.read_reg(REG_FSK_SYNCVALUE2)) {
dudmuck 18:9530d682fd9a 1744 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 1745 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 18:9530d682fd9a 1746 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 1747 radio.write_reg(REG_FSK_SYNCVALUE3, 0x90);
dudmuck 18:9530d682fd9a 1748 radio.write_reg(REG_FSK_SYNCVALUE2, 0x4e);
dudmuck 18:9530d682fd9a 1749 radio.write_reg(REG_FSK_SYNCVALUE1, 0x63);
dudmuck 18:9530d682fd9a 1750 }
dudmuck 18:9530d682fd9a 1751
dudmuck 18:9530d682fd9a 1752 fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT);
dudmuck 18:9530d682fd9a 1753 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 18:9530d682fd9a 1754 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 1755
dudmuck 18:9530d682fd9a 1756 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 1757 fsk.RegRxConfig.bits.AfcAutoOn = 1;
dudmuck 18:9530d682fd9a 1758 fsk.RegRxConfig.bits.AgcAutoOn = 1;
dudmuck 18:9530d682fd9a 1759 fsk.RegRxConfig.bits.RxTrigger = 7;
dudmuck 18:9530d682fd9a 1760 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 1761
dudmuck 18:9530d682fd9a 1762 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 18:9530d682fd9a 1763 fsk.RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 18:9530d682fd9a 1764 fsk.RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 18:9530d682fd9a 1765 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 1766
dudmuck 18:9530d682fd9a 1767 switch (pcbuf[idx]) {
dudmuck 18:9530d682fd9a 1768 case '0':
dudmuck 18:9530d682fd9a 1769 fsk.set_bitrate(4800);
dudmuck 18:9530d682fd9a 1770 fsk.set_tx_fdev_hz(5005);
dudmuck 18:9530d682fd9a 1771 fsk.set_rx_dcc_bw_hz(10417, 0); // rxbw
dudmuck 18:9530d682fd9a 1772 fsk.set_rx_dcc_bw_hz(50000, 1); // afcbw
dudmuck 18:9530d682fd9a 1773 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 1774 break;
dudmuck 18:9530d682fd9a 1775 case '1':
dudmuck 18:9530d682fd9a 1776 fsk.set_bitrate(50000);
dudmuck 18:9530d682fd9a 1777 fsk.set_tx_fdev_hz(25000);
dudmuck 18:9530d682fd9a 1778 fsk.set_rx_dcc_bw_hz(62500, 0); // rxbw
dudmuck 18:9530d682fd9a 1779 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 18:9530d682fd9a 1780 radio.write_u16(REG_FSK_PREAMBLEMSB, 9);
dudmuck 18:9530d682fd9a 1781 break;
dudmuck 18:9530d682fd9a 1782 case '2':
dudmuck 18:9530d682fd9a 1783 fsk.set_bitrate(38400);
dudmuck 18:9530d682fd9a 1784 fsk.set_tx_fdev_hz(20020);
dudmuck 18:9530d682fd9a 1785 fsk.set_rx_dcc_bw_hz(50000, 0); // rxbw
dudmuck 18:9530d682fd9a 1786 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 18:9530d682fd9a 1787 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 1788 break;
dudmuck 18:9530d682fd9a 1789 case '3':
dudmuck 18:9530d682fd9a 1790 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 1791 fsk.set_tx_fdev_hz(20020);
dudmuck 18:9530d682fd9a 1792 fsk.set_rx_dcc_bw_hz(25000, 0); // rxbw
dudmuck 18:9530d682fd9a 1793 fsk.set_rx_dcc_bw_hz(50000, 1); // afcbw
dudmuck 18:9530d682fd9a 1794 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 1795 break;
dudmuck 18:9530d682fd9a 1796 case '4':
dudmuck 18:9530d682fd9a 1797 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 1798 fsk.set_tx_fdev_hz(4028);
dudmuck 18:9530d682fd9a 1799 fsk.set_rx_dcc_bw_hz(7813, 0); // rxbw
dudmuck 18:9530d682fd9a 1800 fsk.set_rx_dcc_bw_hz(25000, 1); // afcbw
dudmuck 18:9530d682fd9a 1801 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 1802 break;
dudmuck 18:9530d682fd9a 1803 case '5':
dudmuck 18:9530d682fd9a 1804 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 1805 fsk.set_tx_fdev_hz(4028);
dudmuck 18:9530d682fd9a 1806 fsk.set_rx_dcc_bw_hz(5208, 0); // rxbw
dudmuck 18:9530d682fd9a 1807 fsk.set_rx_dcc_bw_hz(10417, 1); // afcbw
dudmuck 18:9530d682fd9a 1808 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 1809 break;
dudmuck 18:9530d682fd9a 1810 } // ...switch (pcbuf[idx])
dudmuck 19:be8a8b0e7320 1811 printf("%" PRIu32 "bps fdev:%" PRIu32 "hz ", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 19:be8a8b0e7320 1812 printf("rxbw:%" PRIu32 "Hz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 19:be8a8b0e7320 1813 printf("afcbw:%" PRIu32 "Hz preambleLen:%" PRIu16 "\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW), radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 18:9530d682fd9a 1814 }
dudmuck 18:9530d682fd9a 1815 }
dudmuck 18:9530d682fd9a 1816
dudmuck 18:9530d682fd9a 1817 void cmd_toggle_modem(uint8_t idx)
dudmuck 18:9530d682fd9a 1818 {
dudmuck 18:9530d682fd9a 1819 ook_test_en = false;
dudmuck 18:9530d682fd9a 1820 poll_irq_en = false;
dudmuck 18:9530d682fd9a 1821 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1822 fsk.enable(false);
dudmuck 18:9530d682fd9a 1823 else
dudmuck 18:9530d682fd9a 1824 lora.enable();
dudmuck 18:9530d682fd9a 1825
dudmuck 18:9530d682fd9a 1826 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 18:9530d682fd9a 1827 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1828 printf("LoRa\r\n");
dudmuck 18:9530d682fd9a 1829 else
dudmuck 18:9530d682fd9a 1830 printf("FSK\r\n");
dudmuck 18:9530d682fd9a 1831 }
dudmuck 18:9530d682fd9a 1832
dudmuck 18:9530d682fd9a 1833 void cmd_empty_fifo(uint8_t idx)
dudmuck 18:9530d682fd9a 1834 {
dudmuck 18:9530d682fd9a 1835 RegIrqFlags2_t RegIrqFlags2;
dudmuck 18:9530d682fd9a 1836 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 1837 while (!RegIrqFlags2.bits.FifoEmpty) {
dudmuck 18:9530d682fd9a 1838 if (pc.readable())
dudmuck 18:9530d682fd9a 1839 break;
dudmuck 18:9530d682fd9a 1840 printf("%02x\r\n", radio.read_reg(REG_FIFO));
dudmuck 18:9530d682fd9a 1841 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 1842 }
dudmuck 18:9530d682fd9a 1843 }
dudmuck 18:9530d682fd9a 1844
dudmuck 18:9530d682fd9a 1845 void cmd_print_status(uint8_t idx)
dudmuck 18:9530d682fd9a 1846 {
dudmuck 18:9530d682fd9a 1847 if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 1848 #ifdef TARGET_MTS_MDOT_F411RE
dudmuck 18:9530d682fd9a 1849 printf("\r\nSX1276 ");
dudmuck 18:9530d682fd9a 1850 #else
dudmuck 18:9530d682fd9a 1851 if (shield_type == SHIELD_TYPE_LAS)
dudmuck 18:9530d682fd9a 1852 printf("\r\nSX1276LAS ");
dudmuck 18:9530d682fd9a 1853 if (shield_type == SHIELD_TYPE_MAS)
dudmuck 18:9530d682fd9a 1854 printf("\r\nSX1276MAS ");
dudmuck 18:9530d682fd9a 1855 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 18:9530d682fd9a 1856 } else if (radio.type == SX1272)
dudmuck 18:9530d682fd9a 1857 printf("\r\nSX1272 ");
dudmuck 18:9530d682fd9a 1858
dudmuck 18:9530d682fd9a 1859 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 18:9530d682fd9a 1860 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1861 lora_print_status();
dudmuck 18:9530d682fd9a 1862 else
dudmuck 18:9530d682fd9a 1863 fsk_print_status();
dudmuck 18:9530d682fd9a 1864 common_print_status();
dudmuck 18:9530d682fd9a 1865 }
dudmuck 18:9530d682fd9a 1866
dudmuck 18:9530d682fd9a 1867 void cmd_hop_period(uint8_t idx)
dudmuck 18:9530d682fd9a 1868 {
dudmuck 18:9530d682fd9a 1869 int i;
dudmuck 18:9530d682fd9a 1870 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1871 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 1872 lora.RegHopPeriod = i;
dudmuck 18:9530d682fd9a 1873 radio.write_reg(REG_LR_HOPPERIOD, lora.RegHopPeriod);
dudmuck 18:9530d682fd9a 1874 if (radio.RegDioMapping1.bits.Dio1Mapping != 1) {
dudmuck 18:9530d682fd9a 1875 radio.RegDioMapping1.bits.Dio1Mapping = 1;
dudmuck 18:9530d682fd9a 1876 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 1877 }
dudmuck 18:9530d682fd9a 1878 }
dudmuck 18:9530d682fd9a 1879 lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD);
dudmuck 18:9530d682fd9a 1880 printf("HopPeriod:0x%02x\r\n", lora.RegHopPeriod);
dudmuck 18:9530d682fd9a 1881 }
dudmuck 18:9530d682fd9a 1882
dudmuck 18:9530d682fd9a 1883 void cmd_lora_ppg(uint8_t idx)
dudmuck 18:9530d682fd9a 1884 {
dudmuck 18:9530d682fd9a 1885 int i;
dudmuck 18:9530d682fd9a 1886 if (pcbuf[idx] != 0) {
dudmuck 18:9530d682fd9a 1887 sscanf(pcbuf+idx, "%x", &i);
dudmuck 18:9530d682fd9a 1888 radio.write_reg(REG_LR_SYNC_BYTE, i);
dudmuck 18:9530d682fd9a 1889 }
dudmuck 18:9530d682fd9a 1890 printf("lora sync:0x%02x\r\n", radio.read_reg(REG_LR_SYNC_BYTE));
dudmuck 18:9530d682fd9a 1891 }
dudmuck 18:9530d682fd9a 1892
dudmuck 18:9530d682fd9a 1893 void cmd_rssi_offset(uint8_t idx)
dudmuck 18:9530d682fd9a 1894 {
dudmuck 18:9530d682fd9a 1895 int i;
dudmuck 18:9530d682fd9a 1896 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1897 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 1898 fsk.RegRssiConfig.bits.RssiOffset = i;
dudmuck 18:9530d682fd9a 1899 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 1900 }
dudmuck 18:9530d682fd9a 1901 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 1902 printf("RssiOffset:%d\r\n", fsk.RegRssiConfig.bits.RssiOffset);
dudmuck 18:9530d682fd9a 1903 }
dudmuck 18:9530d682fd9a 1904
dudmuck 18:9530d682fd9a 1905 void cmd_rssi_smoothing(uint8_t idx)
dudmuck 18:9530d682fd9a 1906 {
dudmuck 18:9530d682fd9a 1907 int i;
dudmuck 18:9530d682fd9a 1908 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1909 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 1910 fsk.RegRssiConfig.bits.RssiSmoothing = i;
dudmuck 18:9530d682fd9a 1911 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 1912 }
dudmuck 18:9530d682fd9a 1913 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 1914 printf("RssiSmoothing:%d\r\n", fsk.RegRssiConfig.bits.RssiSmoothing);
dudmuck 18:9530d682fd9a 1915 }
dudmuck 18:9530d682fd9a 1916
dudmuck 18:9530d682fd9a 1917 void cmd_rssi_threshold(uint8_t idx)
dudmuck 18:9530d682fd9a 1918 {
dudmuck 19:be8a8b0e7320 1919 if ((pcbuf[idx] >= '0' && pcbuf[idx] <= '9') || pcbuf[idx] == '-') {
dudmuck 18:9530d682fd9a 1920 float dbm;
dudmuck 18:9530d682fd9a 1921 sscanf(pcbuf+idx, "%f", &dbm);
dudmuck 18:9530d682fd9a 1922 dbm *= (float)2.0;
dudmuck 18:9530d682fd9a 1923 fsk.RegRssiThresh = (int)fabs(dbm);
dudmuck 18:9530d682fd9a 1924 radio.write_reg(REG_FSK_RSSITHRESH, fsk.RegRssiThresh);
dudmuck 18:9530d682fd9a 1925 }
dudmuck 18:9530d682fd9a 1926 fsk.RegRssiThresh = radio.read_reg(REG_FSK_RSSITHRESH);
dudmuck 18:9530d682fd9a 1927 printf("rssiThreshold:-%.1f\r\n", fsk.RegRssiThresh / 2.0);
dudmuck 18:9530d682fd9a 1928 }
dudmuck 18:9530d682fd9a 1929
dudmuck 18:9530d682fd9a 1930 void cmd_rx_trigger(uint8_t idx)
dudmuck 18:9530d682fd9a 1931 {
dudmuck 18:9530d682fd9a 1932 printf("RxTrigger:");
dudmuck 18:9530d682fd9a 1933 switch (fsk.RegRxConfig.bits.RxTrigger) {
dudmuck 18:9530d682fd9a 1934 case 0: fsk.RegRxConfig.bits.RxTrigger = 1;
dudmuck 18:9530d682fd9a 1935 printf("rssi\r\n");
dudmuck 18:9530d682fd9a 1936 break;
dudmuck 18:9530d682fd9a 1937 case 1: fsk.RegRxConfig.bits.RxTrigger = 6;
dudmuck 18:9530d682fd9a 1938 printf("preamble\r\n");
dudmuck 18:9530d682fd9a 1939 break;
dudmuck 18:9530d682fd9a 1940 case 6: fsk.RegRxConfig.bits.RxTrigger = 7;
dudmuck 18:9530d682fd9a 1941 printf("both\r\n");
dudmuck 18:9530d682fd9a 1942 break;
dudmuck 18:9530d682fd9a 1943 case 7: fsk.RegRxConfig.bits.RxTrigger = 0;
dudmuck 18:9530d682fd9a 1944 printf("none\r\n");
dudmuck 18:9530d682fd9a 1945 break;
dudmuck 18:9530d682fd9a 1946 default: fsk.RegRxConfig.bits.RxTrigger = 0;
dudmuck 18:9530d682fd9a 1947 printf("none\r\n");
dudmuck 18:9530d682fd9a 1948 break;
dudmuck 18:9530d682fd9a 1949 }
dudmuck 18:9530d682fd9a 1950 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 1951 }
dudmuck 18:9530d682fd9a 1952
dudmuck 18:9530d682fd9a 1953 void cmd_cadper(uint8_t idx)
dudmuck 18:9530d682fd9a 1954 {
dudmuck 18:9530d682fd9a 1955 set_per_en(true);
dudmuck 18:9530d682fd9a 1956
dudmuck 18:9530d682fd9a 1957 PacketNormalCnt = 0;
dudmuck 18:9530d682fd9a 1958 PacketRxSequencePrev = -1;
dudmuck 18:9530d682fd9a 1959 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 1960 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 1961
dudmuck 18:9530d682fd9a 1962 cadper_enable = true;
dudmuck 18:9530d682fd9a 1963
dudmuck 18:9530d682fd9a 1964 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1965 /* clear any stale flag */
dudmuck 18:9530d682fd9a 1966 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 1967
dudmuck 18:9530d682fd9a 1968 /* start first CAD */
dudmuck 18:9530d682fd9a 1969 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 1970 num_cads = 0;
dudmuck 18:9530d682fd9a 1971 }
dudmuck 18:9530d682fd9a 1972
dudmuck 18:9530d682fd9a 1973 #if 0
dudmuck 18:9530d682fd9a 1974 void cmd_cadrx(uint8_t idx)
dudmuck 18:9530d682fd9a 1975 {
dudmuck 18:9530d682fd9a 1976 int n_tries = 1;
dudmuck 18:9530d682fd9a 1977 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1978 /* clear any stale flag */
dudmuck 18:9530d682fd9a 1979 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 1980
dudmuck 18:9530d682fd9a 1981 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1982 sscanf(pcbuf+idx, "%d", &n_tries);
dudmuck 18:9530d682fd9a 1983 }
dudmuck 18:9530d682fd9a 1984
dudmuck 18:9530d682fd9a 1985 while (n_tries > 0) {
dudmuck 18:9530d682fd9a 1986 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 1987
dudmuck 18:9530d682fd9a 1988 do {
dudmuck 18:9530d682fd9a 1989 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1990 } while (!lora.RegIrqFlags.bits.CadDetected && !lora.RegIrqFlags.bits.CadDone);
dudmuck 18:9530d682fd9a 1991 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 1992 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 1993 n_tries = 1; // end
dudmuck 18:9530d682fd9a 1994 printf("CadDetected ");
dudmuck 18:9530d682fd9a 1995 }
dudmuck 18:9530d682fd9a 1996 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 1997 printf("CadDone ");
dudmuck 18:9530d682fd9a 1998 }
dudmuck 18:9530d682fd9a 1999
dudmuck 18:9530d682fd9a 2000 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2001 printf("\r\n");
dudmuck 18:9530d682fd9a 2002 n_tries--;
dudmuck 18:9530d682fd9a 2003 }
dudmuck 18:9530d682fd9a 2004 }
dudmuck 18:9530d682fd9a 2005 #endif /* #if 0 */
dudmuck 18:9530d682fd9a 2006
dudmuck 18:9530d682fd9a 2007 void cmd_cad(uint8_t idx)
dudmuck 18:9530d682fd9a 2008 {
dudmuck 18:9530d682fd9a 2009 int n_tries = 1;
dudmuck 18:9530d682fd9a 2010 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2011 /* clear any stale flag */
dudmuck 18:9530d682fd9a 2012 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2013
dudmuck 18:9530d682fd9a 2014 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2015 sscanf(pcbuf+idx, "%d", &n_tries);
dudmuck 18:9530d682fd9a 2016 }
dudmuck 18:9530d682fd9a 2017
dudmuck 18:9530d682fd9a 2018 while (n_tries > 0) {
dudmuck 18:9530d682fd9a 2019 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 2020
dudmuck 18:9530d682fd9a 2021 do {
dudmuck 18:9530d682fd9a 2022 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2023 } while (!lora.RegIrqFlags.bits.CadDetected && !lora.RegIrqFlags.bits.CadDone);
dudmuck 18:9530d682fd9a 2024 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 2025 n_tries = 1; // end
dudmuck 18:9530d682fd9a 2026 printf("CadDetected ");
dudmuck 18:9530d682fd9a 2027 }
dudmuck 18:9530d682fd9a 2028 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 2029 if (n_tries == 1) // print on last try
dudmuck 18:9530d682fd9a 2030 printf("CadDone ");
dudmuck 18:9530d682fd9a 2031 }
dudmuck 18:9530d682fd9a 2032
dudmuck 18:9530d682fd9a 2033 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2034 n_tries--;
dudmuck 18:9530d682fd9a 2035 }
dudmuck 18:9530d682fd9a 2036 printf("\r\n");
dudmuck 18:9530d682fd9a 2037 }
dudmuck 18:9530d682fd9a 2038
dudmuck 18:9530d682fd9a 2039 void cmd_rx_timeout(uint8_t idx)
dudmuck 18:9530d682fd9a 2040 {
dudmuck 18:9530d682fd9a 2041 int symb_timeout;
dudmuck 18:9530d682fd9a 2042 uint16_t reg_u16 = radio.read_u16(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2043
dudmuck 18:9530d682fd9a 2044 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2045 sscanf(pcbuf+idx, "%d", &symb_timeout);
dudmuck 18:9530d682fd9a 2046 reg_u16 &= 0xfc00;
dudmuck 18:9530d682fd9a 2047 reg_u16 |= symb_timeout;
dudmuck 18:9530d682fd9a 2048 }
dudmuck 18:9530d682fd9a 2049 reg_u16 = radio.read_u16(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2050 printf("SymbTimeout:%d\r\n", reg_u16 & 0x3ff);
dudmuck 18:9530d682fd9a 2051 }
dudmuck 18:9530d682fd9a 2052
dudmuck 18:9530d682fd9a 2053 void cmd_rx_single(uint8_t idx)
dudmuck 18:9530d682fd9a 2054 {
dudmuck 18:9530d682fd9a 2055 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 2056 }
dudmuck 18:9530d682fd9a 2057
dudmuck 18:9530d682fd9a 2058 void cmd_rx(uint8_t idx)
dudmuck 18:9530d682fd9a 2059 {
dudmuck 18:9530d682fd9a 2060 set_per_en(false);
dudmuck 18:9530d682fd9a 2061
dudmuck 18:9530d682fd9a 2062 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2063 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 2064 else {
dudmuck 18:9530d682fd9a 2065 fsk.start_rx();
dudmuck 18:9530d682fd9a 2066 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 18:9530d682fd9a 2067 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2068 if (radio.HF) {
dudmuck 18:9530d682fd9a 2069 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2070 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 18:9530d682fd9a 2071 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 18:9530d682fd9a 2072 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 2073 }
dudmuck 18:9530d682fd9a 2074 }
dudmuck 18:9530d682fd9a 2075 }
dudmuck 18:9530d682fd9a 2076
dudmuck 18:9530d682fd9a 2077 void cmd_radio_reg_read(uint8_t idx)
dudmuck 18:9530d682fd9a 2078 {
dudmuck 18:9530d682fd9a 2079 int i;
dudmuck 18:9530d682fd9a 2080 sscanf(pcbuf+idx, "%x", &i);
dudmuck 18:9530d682fd9a 2081 printf("%02x: %02x\r\n", i, radio.read_reg(i));
dudmuck 18:9530d682fd9a 2082 }
dudmuck 18:9530d682fd9a 2083
dudmuck 18:9530d682fd9a 2084 void cmd_radio_reg_write(uint8_t idx)
dudmuck 18:9530d682fd9a 2085 {
dudmuck 18:9530d682fd9a 2086 int i, n;
dudmuck 18:9530d682fd9a 2087 sscanf(pcbuf+idx, "%x %x", &i, &n);
dudmuck 18:9530d682fd9a 2088 radio.write_reg(i, n);
dudmuck 18:9530d682fd9a 2089 printf("%02x: %02x\r\n", i, radio.read_reg(i));
dudmuck 18:9530d682fd9a 2090 }
dudmuck 18:9530d682fd9a 2091
dudmuck 18:9530d682fd9a 2092 void cmd_mod_shaping(uint8_t idx)
dudmuck 18:9530d682fd9a 2093 {
dudmuck 18:9530d682fd9a 2094 uint8_t s = fsk.get_modulation_shaping();
dudmuck 18:9530d682fd9a 2095
dudmuck 18:9530d682fd9a 2096 if (s == 3)
dudmuck 18:9530d682fd9a 2097 s = 0;
dudmuck 18:9530d682fd9a 2098 else
dudmuck 18:9530d682fd9a 2099 s++;
dudmuck 18:9530d682fd9a 2100
dudmuck 18:9530d682fd9a 2101 fsk.set_modulation_shaping(s);
dudmuck 18:9530d682fd9a 2102
dudmuck 18:9530d682fd9a 2103 if (radio.RegOpMode.bits.ModulationType == 0) {
dudmuck 18:9530d682fd9a 2104 printf("FSK ");
dudmuck 18:9530d682fd9a 2105 switch (s) {
dudmuck 18:9530d682fd9a 2106 case 0: printf("off"); break;
dudmuck 18:9530d682fd9a 2107 case 1: printf("BT1.0 "); break;
dudmuck 18:9530d682fd9a 2108 case 2: printf("BT0.5 "); break;
dudmuck 18:9530d682fd9a 2109 case 3: printf("BT0.3 "); break;
dudmuck 18:9530d682fd9a 2110 }
dudmuck 18:9530d682fd9a 2111 } else if (radio.RegOpMode.bits.ModulationType == 1) {
dudmuck 18:9530d682fd9a 2112 printf("OOK ");
dudmuck 18:9530d682fd9a 2113 switch (s) {
dudmuck 18:9530d682fd9a 2114 case 0: printf("off"); break;
dudmuck 18:9530d682fd9a 2115 case 1: printf("Fcutoff=bitrate"); break;
dudmuck 18:9530d682fd9a 2116 case 2: printf("Fcutoff=2*bitrate"); break;
dudmuck 18:9530d682fd9a 2117 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 2118 }
dudmuck 18:9530d682fd9a 2119 }
dudmuck 18:9530d682fd9a 2120
dudmuck 18:9530d682fd9a 2121 printf("\r\n");
dudmuck 18:9530d682fd9a 2122 }
dudmuck 18:9530d682fd9a 2123
dudmuck 18:9530d682fd9a 2124 void cmd_MapPreambleDetect(uint8_t idx)
dudmuck 18:9530d682fd9a 2125 {
dudmuck 18:9530d682fd9a 2126 radio.RegDioMapping2.bits.MapPreambleDetect ^= 1;
dudmuck 18:9530d682fd9a 2127 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 2128 printf("MapPreambleDetect:");
dudmuck 18:9530d682fd9a 2129 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 18:9530d682fd9a 2130 printf("preamble\r\n");
dudmuck 18:9530d682fd9a 2131 else
dudmuck 18:9530d682fd9a 2132 printf("rssi\r\n");
dudmuck 18:9530d682fd9a 2133 }
dudmuck 18:9530d682fd9a 2134
dudmuck 18:9530d682fd9a 2135 void cmd_bgr(uint8_t idx)
dudmuck 18:9530d682fd9a 2136 {
dudmuck 18:9530d682fd9a 2137 RegPdsTrim1_t pds_trim;
dudmuck 18:9530d682fd9a 2138 uint8_t adr;
dudmuck 18:9530d682fd9a 2139 if (radio.type == SX1276)
dudmuck 18:9530d682fd9a 2140 adr = REG_PDSTRIM1_SX1276;
dudmuck 18:9530d682fd9a 2141 else
dudmuck 18:9530d682fd9a 2142 adr = REG_PDSTRIM1_SX1272;
dudmuck 18:9530d682fd9a 2143
dudmuck 18:9530d682fd9a 2144 pds_trim.octet = radio.read_reg(adr);
dudmuck 18:9530d682fd9a 2145 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2146 int i;
dudmuck 18:9530d682fd9a 2147 sscanf(&pcbuf[idx], "%d", &i);
dudmuck 18:9530d682fd9a 2148 pds_trim.bits.prog_txdac = i;
dudmuck 18:9530d682fd9a 2149 }
dudmuck 18:9530d682fd9a 2150 radio.write_reg(adr, pds_trim.octet);
dudmuck 18:9530d682fd9a 2151 printf("prog_txdac:%.1fuA\r\n", 2.5 + (pds_trim.bits.prog_txdac * 0.625));
dudmuck 18:9530d682fd9a 2152 /* increase OCP threshold to allow more power */
dudmuck 18:9530d682fd9a 2153 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 18:9530d682fd9a 2154 if (radio.RegOcp.bits.OcpTrim < 16) {
dudmuck 18:9530d682fd9a 2155 radio.RegOcp.bits.OcpTrim = 16;
dudmuck 18:9530d682fd9a 2156 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 18:9530d682fd9a 2157 }
dudmuck 18:9530d682fd9a 2158 }
dudmuck 18:9530d682fd9a 2159
dudmuck 18:9530d682fd9a 2160 void cmd_ook(uint8_t idx)
dudmuck 18:9530d682fd9a 2161 {
dudmuck 18:9530d682fd9a 2162 fsk.set_bitrate(32768);
dudmuck 18:9530d682fd9a 2163 radio.write_u16(REG_FSK_PREAMBLEMSB, 0); // zero preamble length
dudmuck 18:9530d682fd9a 2164 radio.RegOpMode.bits.ModulationType = 1; // to ook mode
dudmuck 18:9530d682fd9a 2165 radio.write_reg(REG_OPMODE, radio.RegOpMode.octet);
dudmuck 18:9530d682fd9a 2166 fsk.RegSyncConfig.bits.SyncOn = 0;
dudmuck 18:9530d682fd9a 2167 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2168 ook_test_en = true;
dudmuck 18:9530d682fd9a 2169 printf("OOK\r\n");
dudmuck 18:9530d682fd9a 2170 }
dudmuck 18:9530d682fd9a 2171
dudmuck 18:9530d682fd9a 2172 void cmd_ocp(uint8_t idx)
dudmuck 18:9530d682fd9a 2173 {
dudmuck 18:9530d682fd9a 2174 int i;
dudmuck 18:9530d682fd9a 2175 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2176 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2177 if (i < 130)
dudmuck 18:9530d682fd9a 2178 radio.RegOcp.bits.OcpTrim = (i - 45) / 5;
dudmuck 18:9530d682fd9a 2179 else
dudmuck 18:9530d682fd9a 2180 radio.RegOcp.bits.OcpTrim = (i + 30) / 10;
dudmuck 18:9530d682fd9a 2181 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 18:9530d682fd9a 2182 }
dudmuck 18:9530d682fd9a 2183 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 18:9530d682fd9a 2184 if (radio.RegOcp.bits.OcpTrim < 16)
dudmuck 18:9530d682fd9a 2185 i = 45 + (5 * radio.RegOcp.bits.OcpTrim);
dudmuck 18:9530d682fd9a 2186 else if (radio.RegOcp.bits.OcpTrim < 28)
dudmuck 18:9530d682fd9a 2187 i = (10 * radio.RegOcp.bits.OcpTrim) - 30;
dudmuck 18:9530d682fd9a 2188 else
dudmuck 18:9530d682fd9a 2189 i = 240;
dudmuck 18:9530d682fd9a 2190 printf("Ocp: %dmA\r\n", i);
dudmuck 18:9530d682fd9a 2191 }
dudmuck 18:9530d682fd9a 2192
dudmuck 18:9530d682fd9a 2193 void cmd_op(uint8_t idx)
dudmuck 18:9530d682fd9a 2194 {
dudmuck 18:9530d682fd9a 2195 int i, dbm;
dudmuck 18:9530d682fd9a 2196 RegPdsTrim1_t pds_trim;
dudmuck 18:9530d682fd9a 2197 uint8_t adr;
dudmuck 18:9530d682fd9a 2198 if (radio.type == SX1276)
dudmuck 18:9530d682fd9a 2199 adr = REG_PDSTRIM1_SX1276;
dudmuck 18:9530d682fd9a 2200 else
dudmuck 18:9530d682fd9a 2201 adr = REG_PDSTRIM1_SX1272;
dudmuck 18:9530d682fd9a 2202
dudmuck 18:9530d682fd9a 2203 pds_trim.octet = radio.read_reg(adr);
dudmuck 18:9530d682fd9a 2204
dudmuck 19:be8a8b0e7320 2205 if (pcbuf[idx] >= '0' && (pcbuf[idx] <= '9' || pcbuf[idx] == '-')) {
dudmuck 18:9530d682fd9a 2206 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2207 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 18:9530d682fd9a 2208 /* PABOOST used: +2dbm to +17, or +20 */
dudmuck 18:9530d682fd9a 2209 if (i == 20) {
dudmuck 18:9530d682fd9a 2210 printf("+20dBm PADAC bias\r\n");
dudmuck 18:9530d682fd9a 2211 i -= 3;
dudmuck 18:9530d682fd9a 2212 pds_trim.bits.prog_txdac = 7;
dudmuck 13:c73caaee93a5 2213 }
dudmuck 18:9530d682fd9a 2214 if (i > 1)
dudmuck 18:9530d682fd9a 2215 radio.RegPaConfig.bits.OutputPower = i - 2;
dudmuck 18:9530d682fd9a 2216 } else {
dudmuck 18:9530d682fd9a 2217 /* RFO used: -1 to +14dbm */
dudmuck 18:9530d682fd9a 2218 if (i < 15)
dudmuck 18:9530d682fd9a 2219 radio.RegPaConfig.bits.OutputPower = i + 1;
dudmuck 18:9530d682fd9a 2220 }
dudmuck 18:9530d682fd9a 2221 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 2222 }
dudmuck 18:9530d682fd9a 2223 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 18:9530d682fd9a 2224 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 18:9530d682fd9a 2225 printf("PA_BOOST ");
dudmuck 18:9530d682fd9a 2226 dbm = radio.RegPaConfig.bits.OutputPower + pds_trim.bits.prog_txdac - 2;
dudmuck 18:9530d682fd9a 2227 } else {
dudmuck 18:9530d682fd9a 2228 printf("RFO ");
dudmuck 18:9530d682fd9a 2229 dbm = radio.RegPaConfig.bits.OutputPower - 1;
dudmuck 18:9530d682fd9a 2230 }
dudmuck 18:9530d682fd9a 2231 printf("OutputPower:%ddBm\r\n", dbm);
dudmuck 18:9530d682fd9a 2232 }
dudmuck 18:9530d682fd9a 2233
dudmuck 18:9530d682fd9a 2234
dudmuck 18:9530d682fd9a 2235
dudmuck 18:9530d682fd9a 2236 void cmd_fsk_agcauto(uint8_t idx)
dudmuck 18:9530d682fd9a 2237 {
dudmuck 18:9530d682fd9a 2238 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2239 fsk.RegRxConfig.bits.AgcAutoOn ^= 1;
dudmuck 18:9530d682fd9a 2240 printf("AgcAuto:");
dudmuck 18:9530d682fd9a 2241 if (fsk.RegRxConfig.bits.AgcAutoOn)
dudmuck 18:9530d682fd9a 2242 printf("On\r\n");
dudmuck 18:9530d682fd9a 2243 else
dudmuck 18:9530d682fd9a 2244 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 2245 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2246 }
dudmuck 18:9530d682fd9a 2247
dudmuck 18:9530d682fd9a 2248 void cmd_fsk_afcauto(uint8_t idx)
dudmuck 18:9530d682fd9a 2249 {
dudmuck 18:9530d682fd9a 2250 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2251 fsk.RegRxConfig.bits.AfcAutoOn ^= 1;
dudmuck 18:9530d682fd9a 2252 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2253 printf("AfcAuto:");
dudmuck 18:9530d682fd9a 2254 if (fsk.RegRxConfig.bits.AfcAutoOn)
dudmuck 18:9530d682fd9a 2255 printf("On\r\n");
dudmuck 18:9530d682fd9a 2256 else
dudmuck 18:9530d682fd9a 2257 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 2258 }
dudmuck 18:9530d682fd9a 2259
dudmuck 18:9530d682fd9a 2260 void cmd_crcOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2261 {
dudmuck 18:9530d682fd9a 2262 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2263 lora.setRxPayloadCrcOn(!lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 2264 lora_printRxPayloadCrcOn();
dudmuck 18:9530d682fd9a 2265 } else {
dudmuck 18:9530d682fd9a 2266 printf("CrcOn:");
dudmuck 18:9530d682fd9a 2267 fsk.RegPktConfig1.bits.CrcOn ^= 1;
dudmuck 18:9530d682fd9a 2268 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 2269 if (fsk.RegPktConfig1.bits.CrcOn)
dudmuck 18:9530d682fd9a 2270 printf("On\r\n");
dudmuck 18:9530d682fd9a 2271 else
dudmuck 18:9530d682fd9a 2272 printf("Off\r\n");
dudmuck 18:9530d682fd9a 2273 if (fsk.RegPktConfig2.bits.DataModePacket && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 18:9530d682fd9a 2274 fsk.config_dio0_for_pktmode_rx();
dudmuck 18:9530d682fd9a 2275 }
dudmuck 18:9530d682fd9a 2276 }
dudmuck 18:9530d682fd9a 2277 printf("\r\n");
dudmuck 18:9530d682fd9a 2278 }
dudmuck 18:9530d682fd9a 2279
dudmuck 18:9530d682fd9a 2280 #ifdef LORA_TX_TEST
dudmuck 18:9530d682fd9a 2281 void cmd_lora_fixed_payload_symbol(uint8_t idx) // fixed payload, symbol test
dudmuck 18:9530d682fd9a 2282 {
dudmuck 18:9530d682fd9a 2283 int n, i;
dudmuck 18:9530d682fd9a 2284
dudmuck 18:9530d682fd9a 2285 symbol_num = pcbuf[idx] - '0';
dudmuck 18:9530d682fd9a 2286 sscanf(pcbuf+idx+2, "%d", &i);
dudmuck 18:9530d682fd9a 2287 n = i >> 2; // num nibbles
dudmuck 18:9530d682fd9a 2288 printf("%d nibbles: ", n);
dudmuck 18:9530d682fd9a 2289 lora.RegPayloadLength = byte_pad_length;
dudmuck 18:9530d682fd9a 2290 while (n > 0) {
dudmuck 18:9530d682fd9a 2291 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 2292 n -= 2; // one byte = two nibbles
dudmuck 18:9530d682fd9a 2293 }
dudmuck 18:9530d682fd9a 2294 printf("%d bytes\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2295 symbol_sweep_nbits = i >> 2;
dudmuck 18:9530d682fd9a 2296 symbol_sweep_bit_counter = 0;
dudmuck 18:9530d682fd9a 2297 symbol_sweep_bit_counter_stop = 1 << symbol_sweep_nbits; // one bit per nibble used in symbol (2bits per byte)
dudmuck 18:9530d682fd9a 2298 printf("sweep symbol %d, length bytes:%d nbits:%d stop:0x%x\r\n", symbol_num, lora.RegPayloadLength, symbol_sweep_nbits, symbol_sweep_bit_counter_stop);
dudmuck 18:9530d682fd9a 2299 txticker_state = TXTICKER_STATE_SYMBOL_SWEEP;
dudmuck 18:9530d682fd9a 2300 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2301 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2302 }
dudmuck 18:9530d682fd9a 2303
dudmuck 18:9530d682fd9a 2304 void cmd_fixed_payload_offset(uint8_t idx)
dudmuck 18:9530d682fd9a 2305 {
dudmuck 18:9530d682fd9a 2306 int i;
dudmuck 18:9530d682fd9a 2307 if (pcbuf[idx] >='0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2308 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2309 byte_pad_length = i;
dudmuck 18:9530d682fd9a 2310 }
dudmuck 18:9530d682fd9a 2311 printf("byte_pad_length:%d\r\n", byte_pad_length);
dudmuck 18:9530d682fd9a 2312 }
dudmuck 18:9530d682fd9a 2313
dudmuck 18:9530d682fd9a 2314 void cmd_lora_fixed_payload(uint8_t idx)
dudmuck 18:9530d682fd9a 2315 {
dudmuck 18:9530d682fd9a 2316 int n, a, i, d = 0;
dudmuck 18:9530d682fd9a 2317 for (i = idx; i < pcbuf_len; ) {
dudmuck 18:9530d682fd9a 2318 //printf("scan:\"%s\"\r\n", pcbuf+i);
dudmuck 18:9530d682fd9a 2319 sscanf(pcbuf+i, "%x", &n);
dudmuck 18:9530d682fd9a 2320 //printf("n:%x\r\n", n);
dudmuck 18:9530d682fd9a 2321 radio.tx_buf[d] = n;
dudmuck 18:9530d682fd9a 2322 printf("%02x ", n);
dudmuck 18:9530d682fd9a 2323 while (pcbuf[i] == ' ')
dudmuck 18:9530d682fd9a 2324 i++;
dudmuck 18:9530d682fd9a 2325 //printf("%d pcbuf[i]:%x\r\n", i, pcbuf[i]);
dudmuck 18:9530d682fd9a 2326 for (a = i; pcbuf[a] != ' '; a++)
dudmuck 18:9530d682fd9a 2327 if (a >= pcbuf_len)
dudmuck 18:9530d682fd9a 2328 break;
dudmuck 18:9530d682fd9a 2329 i = a;
dudmuck 18:9530d682fd9a 2330 while (pcbuf[i] == ' ') {
dudmuck 18:9530d682fd9a 2331 i++;
dudmuck 18:9530d682fd9a 2332 if (i >= pcbuf_len)
dudmuck 18:9530d682fd9a 2333 break;
dudmuck 18:9530d682fd9a 2334 }
dudmuck 18:9530d682fd9a 2335 d++;
dudmuck 18:9530d682fd9a 2336 }
dudmuck 18:9530d682fd9a 2337 lora.RegPayloadLength = d;
dudmuck 18:9530d682fd9a 2338 printf("\r\nlora.RegPayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2339 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2340 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2341 }
dudmuck 18:9530d682fd9a 2342
dudmuck 18:9530d682fd9a 2343 void cmd_lora_toggle_crcOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2344 {
dudmuck 18:9530d682fd9a 2345 /* test lora crc on/off */
dudmuck 18:9530d682fd9a 2346 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 2347 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2348 txticker_state = TXTICKER_STATE_TOG_CRC_ON;
dudmuck 18:9530d682fd9a 2349 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2350 }
dudmuck 18:9530d682fd9a 2351
dudmuck 18:9530d682fd9a 2352 void lora_cycle_payload_length(uint8_t idx)
dudmuck 18:9530d682fd9a 2353 {
dudmuck 18:9530d682fd9a 2354 int i;
dudmuck 18:9530d682fd9a 2355 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2356 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2357 payload_length_stop = i;
dudmuck 18:9530d682fd9a 2358 }
dudmuck 18:9530d682fd9a 2359 txticker_state = TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH;
dudmuck 18:9530d682fd9a 2360 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2361 }
dudmuck 18:9530d682fd9a 2362
dudmuck 18:9530d682fd9a 2363 void cmd_lora_data_ramp(uint8_t idx)
dudmuck 18:9530d682fd9a 2364 {
dudmuck 18:9530d682fd9a 2365 // lora payload data ramping
dudmuck 18:9530d682fd9a 2366 lora.RegPayloadLength = pcbuf[idx] - '0';
dudmuck 18:9530d682fd9a 2367 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2368 txticker_state = TXTICKER_STATE_RAMP_PAYLOAD_DATA_START;
dudmuck 18:9530d682fd9a 2369 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2370 }
dudmuck 18:9530d682fd9a 2371
dudmuck 18:9530d682fd9a 2372 void cmd_lora_sync_lo_nibble(uint8_t idx)
dudmuck 18:9530d682fd9a 2373 {
dudmuck 18:9530d682fd9a 2374 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 2375 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 2376 on_txdone_delay = 0.100;
dudmuck 18:9530d682fd9a 2377 txdone_timeout_cb();
dudmuck 18:9530d682fd9a 2378 //sync_sweep_timeout.attach(&txdone_timeout_cb, sync_sweep_delay);
dudmuck 18:9530d682fd9a 2379 }
dudmuck 18:9530d682fd9a 2380
dudmuck 18:9530d682fd9a 2381 void cmd_lora_toggle_header_mode(uint8_t idx)
dudmuck 18:9530d682fd9a 2382 {
dudmuck 18:9530d682fd9a 2383 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 2384 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2385 txticker_state = TXTICKER_STATE_TOG_HEADER_MODE;
dudmuck 18:9530d682fd9a 2386 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2387 }
dudmuck 18:9530d682fd9a 2388
dudmuck 18:9530d682fd9a 2389 void cmd_lora_sync_sweep(uint8_t idx)
dudmuck 18:9530d682fd9a 2390 {
dudmuck 18:9530d682fd9a 2391 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 2392 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2393 txticker_sync_byte = 0x12;
dudmuck 18:9530d682fd9a 2394 if (pcbuf[idx] == '1')
dudmuck 18:9530d682fd9a 2395 txticker_state = TXTICKER_STATE_CYCLE_SYNC_1;
dudmuck 18:9530d682fd9a 2396 else if (pcbuf[idx] == '2')
dudmuck 18:9530d682fd9a 2397 txticker_state = TXTICKER_STATE_CYCLE_SYNC_2;
dudmuck 18:9530d682fd9a 2398 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2399 }
dudmuck 18:9530d682fd9a 2400
dudmuck 18:9530d682fd9a 2401 void cmd_lora_all_payload_lengths(uint8_t idx)
dudmuck 18:9530d682fd9a 2402 {
dudmuck 18:9530d682fd9a 2403 on_txdone_repeat_cnt = 0;
dudmuck 18:9530d682fd9a 2404 on_txdone_state = ON_TXDONE_STATE_PAYLOAD_LENGTH;
dudmuck 18:9530d682fd9a 2405 on_txdone_delay = 0.200;
dudmuck 18:9530d682fd9a 2406 txdone_timeout_cb();
dudmuck 18:9530d682fd9a 2407 lora.RegPayloadLength = 0;
dudmuck 18:9530d682fd9a 2408 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2409 }
dudmuck 18:9530d682fd9a 2410
dudmuck 18:9530d682fd9a 2411 void cmd_lora_toggle_all_bits(uint8_t idx)
dudmuck 18:9530d682fd9a 2412 {
dudmuck 18:9530d682fd9a 2413 lora.RegPayloadLength = (pcbuf[idx] - '0') + byte_pad_length;
dudmuck 18:9530d682fd9a 2414 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2415 txticker_state = TXTICKER_STATE_TOGGLE_ALL_BITS_START;
dudmuck 18:9530d682fd9a 2416 printf("tab byte length:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2417
dudmuck 18:9530d682fd9a 2418 if (lora.RegPayloadLength > 0)
dudmuck 18:9530d682fd9a 2419 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2420 }
dudmuck 18:9530d682fd9a 2421
dudmuck 18:9530d682fd9a 2422 void cmd_lora_cycle_codingrates(uint8_t idx)
dudmuck 18:9530d682fd9a 2423 {
dudmuck 18:9530d682fd9a 2424 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 2425 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2426 txticker_state = TXTICKER_STATE_CYCLE_CODING_RATE;
dudmuck 18:9530d682fd9a 2427 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2428 }
dudmuck 18:9530d682fd9a 2429 #endif /* LORA_TX_TEST */
dudmuck 18:9530d682fd9a 2430
dudmuck 18:9530d682fd9a 2431 void cmd_codingRate(uint8_t idx)
dudmuck 18:9530d682fd9a 2432 {
dudmuck 18:9530d682fd9a 2433 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9')
dudmuck 18:9530d682fd9a 2434 lora.setCodingRate(pcbuf[idx] - '0');
dudmuck 18:9530d682fd9a 2435 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 2436 lora_printCodingRate(false); // false: transmitted
dudmuck 18:9530d682fd9a 2437 printf("\r\n");
dudmuck 18:9530d682fd9a 2438 }
dudmuck 18:9530d682fd9a 2439
dudmuck 18:9530d682fd9a 2440 void cmd_lora_header_mode(uint8_t idx)
dudmuck 18:9530d682fd9a 2441 {
dudmuck 18:9530d682fd9a 2442 lora.setHeaderMode(!lora.getHeaderMode());
dudmuck 18:9530d682fd9a 2443 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 2444 lora_printHeaderMode();
dudmuck 18:9530d682fd9a 2445 printf("\r\n");
dudmuck 18:9530d682fd9a 2446 }
dudmuck 18:9530d682fd9a 2447
dudmuck 18:9530d682fd9a 2448 void cmd_fsk_AfcAutoClearOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2449 {
dudmuck 18:9530d682fd9a 2450 fsk.RegAfcFei.bits.AfcAutoClearOn ^= 1;
dudmuck 18:9530d682fd9a 2451 printf("AfcAutoClearOn: ");
dudmuck 18:9530d682fd9a 2452 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 18:9530d682fd9a 2453 if (fsk.RegAfcFei.bits.AfcAutoClearOn)
dudmuck 18:9530d682fd9a 2454 printf("ON\r\n");
dudmuck 18:9530d682fd9a 2455 else
dudmuck 18:9530d682fd9a 2456 printf("off\r\n");
dudmuck 18:9530d682fd9a 2457 }
dudmuck 18:9530d682fd9a 2458
dudmuck 18:9530d682fd9a 2459 void cmd_fsk_AutoRestartRxMode(uint8_t idx)
dudmuck 18:9530d682fd9a 2460 {
dudmuck 18:9530d682fd9a 2461 fsk.RegSyncConfig.bits.AutoRestartRxMode++;
dudmuck 18:9530d682fd9a 2462 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2463 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 2464 printf("AutoRestartRxMode:");
dudmuck 18:9530d682fd9a 2465 switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) {
dudmuck 18:9530d682fd9a 2466 case 0: printf("off "); break;
dudmuck 18:9530d682fd9a 2467 case 1: printf("no-pll-wait "); break;
dudmuck 18:9530d682fd9a 2468 case 2: printf("pll-wait "); break;
dudmuck 18:9530d682fd9a 2469 case 3: printf("3 "); break;
dudmuck 18:9530d682fd9a 2470 }
dudmuck 18:9530d682fd9a 2471 printf("\r\n");
dudmuck 18:9530d682fd9a 2472 }
dudmuck 18:9530d682fd9a 2473
dudmuck 18:9530d682fd9a 2474 void cmd_AfcClear(uint8_t idx)
dudmuck 18:9530d682fd9a 2475 {
dudmuck 18:9530d682fd9a 2476 printf("clear afc: ");
dudmuck 18:9530d682fd9a 2477 fsk.RegAfcFei.bits.AfcClear = 1;
dudmuck 18:9530d682fd9a 2478 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 18:9530d682fd9a 2479 fsk.RegAfcFei.bits.AfcClear = 0;
dudmuck 18:9530d682fd9a 2480 printf("%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 18:9530d682fd9a 2481 }
dudmuck 18:9530d682fd9a 2482
dudmuck 18:9530d682fd9a 2483 void cmd_fsk_bitrate(uint8_t idx)
dudmuck 18:9530d682fd9a 2484 {
dudmuck 18:9530d682fd9a 2485 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2486 float kbits;
dudmuck 18:9530d682fd9a 2487 sscanf(&pcbuf[idx], "%f", &kbits);
dudmuck 18:9530d682fd9a 2488 fsk.set_bitrate((int)(kbits*1000));
dudmuck 18:9530d682fd9a 2489 }
dudmuck 18:9530d682fd9a 2490 printf("%fkbps\r\n", fsk.get_bitrate()/(float)1000.0);
dudmuck 18:9530d682fd9a 2491 }
dudmuck 18:9530d682fd9a 2492
dudmuck 18:9530d682fd9a 2493 void cmd_bandwidth(uint8_t idx)
dudmuck 18:9530d682fd9a 2494 {
dudmuck 18:9530d682fd9a 2495 int i;
dudmuck 18:9530d682fd9a 2496 float f;
dudmuck 18:9530d682fd9a 2497 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2498 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2499 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 2500 sscanf(&pcbuf[idx], "%d", &i);
dudmuck 18:9530d682fd9a 2501 lora.setBw_KHz(i);
dudmuck 18:9530d682fd9a 2502 } else
dudmuck 18:9530d682fd9a 2503 lora_printAllBw();
dudmuck 18:9530d682fd9a 2504 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 2505 printf("current ");
dudmuck 18:9530d682fd9a 2506 lora_printBw();
dudmuck 18:9530d682fd9a 2507 printf("\r\n");
dudmuck 18:9530d682fd9a 2508 } else { // FSK:
dudmuck 18:9530d682fd9a 2509 if (pcbuf[idx] == 'a') {
dudmuck 18:9530d682fd9a 2510 idx++;
dudmuck 18:9530d682fd9a 2511 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2512 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 2513 sscanf(&pcbuf[idx], "%f", &f);
dudmuck 18:9530d682fd9a 2514 fsk.set_rx_dcc_bw_hz((int)(f*(float)1000.0), 1);
dudmuck 18:9530d682fd9a 2515 }
dudmuck 18:9530d682fd9a 2516 printf("afcbw:%.3fkHz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW)/1000.0);
dudmuck 18:9530d682fd9a 2517 } else {
dudmuck 18:9530d682fd9a 2518 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2519 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 2520 sscanf(&pcbuf[idx], "%f", &f);
dudmuck 18:9530d682fd9a 2521 fsk.set_rx_dcc_bw_hz((int)(f*(float)1000.0), 0);
dudmuck 18:9530d682fd9a 2522 }
dudmuck 18:9530d682fd9a 2523 printf("rxbw:%.3fkHz\r\n", fsk.get_rx_bw_hz(REG_FSK_RXBW)/1000.0);
dudmuck 18:9530d682fd9a 2524 }
dudmuck 18:9530d682fd9a 2525 }
dudmuck 18:9530d682fd9a 2526 }
dudmuck 18:9530d682fd9a 2527
dudmuck 18:9530d682fd9a 2528 void cmd_lora_poll_validHeader(uint8_t idx)
dudmuck 18:9530d682fd9a 2529 {
dudmuck 18:9530d682fd9a 2530 lora.poll_vh ^= 1;
dudmuck 18:9530d682fd9a 2531 printf("poll_vh:%d\r\n", lora.poll_vh);
dudmuck 18:9530d682fd9a 2532 }
dudmuck 18:9530d682fd9a 2533
dudmuck 18:9530d682fd9a 2534 void cmd_fsk_syncword(uint8_t idx)
dudmuck 18:9530d682fd9a 2535 {
dudmuck 18:9530d682fd9a 2536 int i, d = 0;
dudmuck 18:9530d682fd9a 2537 uint8_t reg_addr = REG_FSK_SYNCVALUE1;
dudmuck 18:9530d682fd9a 2538
dudmuck 18:9530d682fd9a 2539 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 2540
dudmuck 18:9530d682fd9a 2541 if (pcbuf_len != idx) { // something to write?
dudmuck 18:9530d682fd9a 2542 for (i = idx; i < pcbuf_len; ) {
dudmuck 18:9530d682fd9a 2543 int a, n;
dudmuck 18:9530d682fd9a 2544 sscanf(pcbuf+i, "%x", &n);
dudmuck 18:9530d682fd9a 2545 radio.write_reg(reg_addr++, n);
dudmuck 18:9530d682fd9a 2546 //printf("%02x ", n);
dudmuck 18:9530d682fd9a 2547 while (pcbuf[i] == ' ')
dudmuck 18:9530d682fd9a 2548 i++;
dudmuck 18:9530d682fd9a 2549 for (a = i; pcbuf[a] != ' '; a++)
dudmuck 18:9530d682fd9a 2550 if (a >= pcbuf_len)
dudmuck 18:9530d682fd9a 2551 break;
dudmuck 18:9530d682fd9a 2552 i = a;
dudmuck 18:9530d682fd9a 2553 while (pcbuf[i] == ' ') {
dudmuck 18:9530d682fd9a 2554 i++;
dudmuck 18:9530d682fd9a 2555 if (i >= pcbuf_len)
dudmuck 18:9530d682fd9a 2556 break;
dudmuck 18:9530d682fd9a 2557 }
dudmuck 18:9530d682fd9a 2558 d++;
dudmuck 18:9530d682fd9a 2559 }
dudmuck 18:9530d682fd9a 2560
dudmuck 18:9530d682fd9a 2561 fsk.RegSyncConfig.bits.SyncSize = reg_addr - REG_FSK_SYNCVALUE1 - 1;
dudmuck 18:9530d682fd9a 2562 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2563 }
dudmuck 18:9530d682fd9a 2564
dudmuck 18:9530d682fd9a 2565 printf("%d: ", fsk.RegSyncConfig.bits.SyncSize);
dudmuck 18:9530d682fd9a 2566 for (i = 0; i <= fsk.RegSyncConfig.bits.SyncSize; i++)
dudmuck 18:9530d682fd9a 2567 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE1+i));
dudmuck 18:9530d682fd9a 2568 printf("\r\n");
dudmuck 18:9530d682fd9a 2569 }
dudmuck 18:9530d682fd9a 2570
dudmuck 18:9530d682fd9a 2571 void cmd_fsk_syncOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2572 {
dudmuck 18:9530d682fd9a 2573 fsk.RegSyncConfig.bits.SyncOn ^= 1;
dudmuck 18:9530d682fd9a 2574 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2575 printf("SyncOn:%d\r\n", fsk.RegSyncConfig.bits.SyncOn);
dudmuck 18:9530d682fd9a 2576 }
dudmuck 18:9530d682fd9a 2577
dudmuck 18:9530d682fd9a 2578 void cmd_fsk_bitsync(uint8_t idx)
dudmuck 18:9530d682fd9a 2579 {
dudmuck 18:9530d682fd9a 2580 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 2581 fsk.RegOokPeak.bits.BitSyncOn ^= 1;
dudmuck 18:9530d682fd9a 2582 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 2583 if (fsk.RegOokPeak.bits.BitSyncOn)
dudmuck 18:9530d682fd9a 2584 printf("BitSyncOn\r\n");
dudmuck 18:9530d682fd9a 2585 else
dudmuck 18:9530d682fd9a 2586 printf("BitSync Off\r\n");
dudmuck 18:9530d682fd9a 2587 }
dudmuck 18:9530d682fd9a 2588
dudmuck 18:9530d682fd9a 2589 void cmd_lora_sf(uint8_t idx)
dudmuck 18:9530d682fd9a 2590 {
dudmuck 18:9530d682fd9a 2591 int i;
dudmuck 18:9530d682fd9a 2592 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2593 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2594 lora.setSf(i);
dudmuck 18:9530d682fd9a 2595 if (i == 6 && !lora.getHeaderMode()) {
dudmuck 18:9530d682fd9a 2596 printf("SF6: to implicit header mode\r\n");
dudmuck 18:9530d682fd9a 2597 lora.setHeaderMode(true);
dudmuck 18:9530d682fd9a 2598 }
dudmuck 18:9530d682fd9a 2599 }
dudmuck 18:9530d682fd9a 2600 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2601 lora_printSf();
dudmuck 18:9530d682fd9a 2602 printf("\r\n");
dudmuck 18:9530d682fd9a 2603 }
dudmuck 18:9530d682fd9a 2604
dudmuck 18:9530d682fd9a 2605 void cmd_fsk_TxStartCondition(uint8_t idx)
dudmuck 18:9530d682fd9a 2606 {
dudmuck 18:9530d682fd9a 2607 fsk.RegFifoThreshold.bits.TxStartCondition ^= 1;
dudmuck 18:9530d682fd9a 2608 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 18:9530d682fd9a 2609 printf("TxStartCondition:");
dudmuck 18:9530d682fd9a 2610 if (fsk.RegFifoThreshold.bits.TxStartCondition)
dudmuck 18:9530d682fd9a 2611 printf("!FifoEmpty\r\n");
dudmuck 18:9530d682fd9a 2612 else
dudmuck 18:9530d682fd9a 2613 printf("FifoLevel\r\n");
dudmuck 18:9530d682fd9a 2614 }
dudmuck 18:9530d682fd9a 2615
dudmuck 18:9530d682fd9a 2616 void cmd_fsk_read_fei(uint8_t idx)
dudmuck 18:9530d682fd9a 2617 {
dudmuck 18:9530d682fd9a 2618 printf("fei:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_FEIMSB)));
dudmuck 18:9530d682fd9a 2619 }
dudmuck 18:9530d682fd9a 2620
dudmuck 18:9530d682fd9a 2621 void cmd_fsk_fdev(uint8_t idx)
dudmuck 18:9530d682fd9a 2622 {
dudmuck 18:9530d682fd9a 2623 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2624 float khz;
dudmuck 18:9530d682fd9a 2625 sscanf(pcbuf+idx, "%f", &khz);
dudmuck 18:9530d682fd9a 2626 fsk.set_tx_fdev_hz((int)(khz*1000));
dudmuck 18:9530d682fd9a 2627 }
dudmuck 18:9530d682fd9a 2628 printf("fdev:%fKHz\r\n", fsk.get_tx_fdev_hz()/(float)1000.0);
dudmuck 18:9530d682fd9a 2629 }
dudmuck 18:9530d682fd9a 2630
dudmuck 18:9530d682fd9a 2631 void cmd_frf(uint8_t idx)
dudmuck 18:9530d682fd9a 2632 {
dudmuck 18:9530d682fd9a 2633 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2634 float MHz;
dudmuck 18:9530d682fd9a 2635 sscanf(pcbuf+idx, "%f", &MHz);
dudmuck 18:9530d682fd9a 2636 //printf("MHz:%f\r\n", MHz);
dudmuck 18:9530d682fd9a 2637 radio.set_frf_MHz(MHz);
dudmuck 18:9530d682fd9a 2638 }
dudmuck 18:9530d682fd9a 2639 printf("%fMHz\r\n", radio.get_frf_MHz());
dudmuck 18:9530d682fd9a 2640 #ifndef TARGET_MTS_MDOT_F411RE
dudmuck 18:9530d682fd9a 2641 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 18:9530d682fd9a 2642 if (shield_type == SHIELD_TYPE_LAS) {
dudmuck 18:9530d682fd9a 2643 // LAS HF=PA_BOOST LF=RFO
dudmuck 18:9530d682fd9a 2644 if (radio.HF)
dudmuck 18:9530d682fd9a 2645 radio.RegPaConfig.bits.PaSelect = 1;
dudmuck 18:9530d682fd9a 2646 else
dudmuck 18:9530d682fd9a 2647 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 18:9530d682fd9a 2648 }
dudmuck 18:9530d682fd9a 2649 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 2650 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 18:9530d682fd9a 2651 }
dudmuck 18:9530d682fd9a 2652
dudmuck 18:9530d682fd9a 2653 void cmd_fsk_PacketFormat(uint8_t idx)
dudmuck 18:9530d682fd9a 2654 {
dudmuck 18:9530d682fd9a 2655 printf("PacketFormat:");
dudmuck 18:9530d682fd9a 2656 fsk.RegPktConfig1.bits.PacketFormatVariable ^= 1;
dudmuck 18:9530d682fd9a 2657 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 2658 if (fsk.RegPktConfig1.bits.PacketFormatVariable)
dudmuck 18:9530d682fd9a 2659 printf("variable\r\n");
dudmuck 18:9530d682fd9a 2660 else
dudmuck 18:9530d682fd9a 2661 printf("fixed\r\n");
dudmuck 18:9530d682fd9a 2662 }
dudmuck 18:9530d682fd9a 2663
dudmuck 18:9530d682fd9a 2664 void cmd_payload_length(uint8_t idx)
dudmuck 18:9530d682fd9a 2665 {
dudmuck 18:9530d682fd9a 2666 int i;
dudmuck 18:9530d682fd9a 2667 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2668 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2669 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2670 lora.RegPayloadLength = i;
dudmuck 13:c73caaee93a5 2671 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2672 } else {
dudmuck 18:9530d682fd9a 2673 fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 2674 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 10:d9bb2ce57f05 2675 }
dudmuck 18:9530d682fd9a 2676 }
dudmuck 18:9530d682fd9a 2677 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2678 lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH);
dudmuck 18:9530d682fd9a 2679 printf("PayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2680 } else {
dudmuck 18:9530d682fd9a 2681 printf("PayloadLength:%d\r\n", fsk_get_PayloadLength());
dudmuck 18:9530d682fd9a 2682 }
dudmuck 18:9530d682fd9a 2683 }
dudmuck 18:9530d682fd9a 2684
dudmuck 18:9530d682fd9a 2685 void cmd_paRamp(uint8_t idx)
dudmuck 18:9530d682fd9a 2686 {
dudmuck 18:9530d682fd9a 2687 int i;
dudmuck 18:9530d682fd9a 2688 uint8_t reg_par = radio.read_reg(REG_PARAMP);
dudmuck 18:9530d682fd9a 2689 uint8_t PaRamp = reg_par & 0x0f;
dudmuck 18:9530d682fd9a 2690 reg_par &= 0xf0;
dudmuck 18:9530d682fd9a 2691 if (PaRamp == 15)
dudmuck 18:9530d682fd9a 2692 PaRamp = 0;
dudmuck 18:9530d682fd9a 2693 else
dudmuck 18:9530d682fd9a 2694 PaRamp++;
dudmuck 18:9530d682fd9a 2695 radio.write_reg(REG_PARAMP, reg_par | PaRamp);
dudmuck 18:9530d682fd9a 2696 printf("PaRamp:");
dudmuck 18:9530d682fd9a 2697 switch (PaRamp) {
dudmuck 18:9530d682fd9a 2698 case 0: i = 3400; break;
dudmuck 18:9530d682fd9a 2699 case 1: i = 2000; break;
dudmuck 18:9530d682fd9a 2700 case 2: i = 1000; break;
dudmuck 18:9530d682fd9a 2701 case 3: i = 500; break;
dudmuck 18:9530d682fd9a 2702 case 4: i = 250; break;
dudmuck 18:9530d682fd9a 2703 case 5: i = 125; break;
dudmuck 18:9530d682fd9a 2704 case 6: i = 100; break;
dudmuck 18:9530d682fd9a 2705 case 7: i = 62; break;
dudmuck 18:9530d682fd9a 2706 case 8: i = 50; break;
dudmuck 18:9530d682fd9a 2707 case 9: i = 40; break;
dudmuck 18:9530d682fd9a 2708 case 10: i = 31; break;
dudmuck 18:9530d682fd9a 2709 case 11: i = 25; break;
dudmuck 18:9530d682fd9a 2710 case 12: i = 20; break;
dudmuck 18:9530d682fd9a 2711 case 13: i = 15; break;
dudmuck 18:9530d682fd9a 2712 case 14: i = 12; break;
dudmuck 18:9530d682fd9a 2713 case 15: i = 10; break;
dudmuck 18:9530d682fd9a 2714 }
dudmuck 18:9530d682fd9a 2715 printf("%dus\r\n", i);
dudmuck 18:9530d682fd9a 2716 }
dudmuck 18:9530d682fd9a 2717
dudmuck 18:9530d682fd9a 2718 void cmd_paSelect(uint8_t idx)
dudmuck 18:9530d682fd9a 2719 {
dudmuck 18:9530d682fd9a 2720 radio.RegPaConfig.bits.PaSelect ^= 1;
dudmuck 18:9530d682fd9a 2721 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 2722 printPa();
dudmuck 18:9530d682fd9a 2723 printf("\r\n");
dudmuck 18:9530d682fd9a 2724 }
dudmuck 18:9530d682fd9a 2725
dudmuck 18:9530d682fd9a 2726 void cmd_poll_irq_en(uint8_t idx)
dudmuck 18:9530d682fd9a 2727 {
dudmuck 18:9530d682fd9a 2728 poll_irq_en ^= 1;
dudmuck 18:9530d682fd9a 2729 printf("poll_irq_en:");
dudmuck 18:9530d682fd9a 2730 if (poll_irq_en)
dudmuck 18:9530d682fd9a 2731 printf("irqFlags register\r\n");
dudmuck 18:9530d682fd9a 2732 else
dudmuck 18:9530d682fd9a 2733 printf("DIO pin interrupt\r\n");
dudmuck 18:9530d682fd9a 2734 }
dudmuck 18:9530d682fd9a 2735
dudmuck 18:9530d682fd9a 2736 void cmd_per_id(uint8_t idx)
dudmuck 18:9530d682fd9a 2737 {
dudmuck 18:9530d682fd9a 2738 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2739 sscanf(pcbuf+idx, "%d", &per_id);
dudmuck 18:9530d682fd9a 2740 }
dudmuck 18:9530d682fd9a 2741 printf("PER device ID:%d\r\n", per_id);
dudmuck 18:9530d682fd9a 2742 }
dudmuck 18:9530d682fd9a 2743
dudmuck 18:9530d682fd9a 2744 void cmd_pertx(uint8_t idx)
dudmuck 18:9530d682fd9a 2745 {
dudmuck 18:9530d682fd9a 2746 int i;
dudmuck 18:9530d682fd9a 2747
dudmuck 18:9530d682fd9a 2748 if (cadper_enable)
dudmuck 18:9530d682fd9a 2749 cadper_enable = false;
dudmuck 18:9530d682fd9a 2750
dudmuck 18:9530d682fd9a 2751 set_per_en(true);
dudmuck 18:9530d682fd9a 2752 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2753 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2754 PacketTxCntEnd = i;
dudmuck 18:9530d682fd9a 2755 }
dudmuck 18:9530d682fd9a 2756 PacketTxCnt = 0;
dudmuck 18:9530d682fd9a 2757 per_timeout.attach(&per_cb, per_tx_delay);
dudmuck 18:9530d682fd9a 2758 }
dudmuck 18:9530d682fd9a 2759
dudmuck 18:9530d682fd9a 2760 void cmd_perrx(uint8_t idx)
dudmuck 18:9530d682fd9a 2761 {
dudmuck 18:9530d682fd9a 2762 set_per_en(true);
dudmuck 18:9530d682fd9a 2763
dudmuck 18:9530d682fd9a 2764 PacketNormalCnt = 0;
dudmuck 18:9530d682fd9a 2765 PacketRxSequencePrev = -1;
dudmuck 18:9530d682fd9a 2766 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 2767 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 2768 //dio3.rise(&dio3_cb);
dudmuck 18:9530d682fd9a 2769
dudmuck 18:9530d682fd9a 2770 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2771 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 13:c73caaee93a5 2772 else {
dudmuck 18:9530d682fd9a 2773 fsk.start_rx();
dudmuck 18:9530d682fd9a 2774 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 18:9530d682fd9a 2775 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2776 if (radio.HF) {
dudmuck 18:9530d682fd9a 2777 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2778 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 18:9530d682fd9a 2779 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 18:9530d682fd9a 2780 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 2781 }
dudmuck 18:9530d682fd9a 2782 }
dudmuck 18:9530d682fd9a 2783 }
dudmuck 18:9530d682fd9a 2784
dudmuck 18:9530d682fd9a 2785 void cmd_fsk_PreambleDetectorOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2786 {
dudmuck 18:9530d682fd9a 2787 fsk.RegPreambleDetect.bits.PreambleDetectorOn ^= 1;
dudmuck 18:9530d682fd9a 2788 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 2789 printf("PreambleDetector:");
dudmuck 18:9530d682fd9a 2790 if (fsk.RegPreambleDetect.bits.PreambleDetectorOn)
dudmuck 18:9530d682fd9a 2791 printf("On\r\n");
dudmuck 18:9530d682fd9a 2792 else
dudmuck 18:9530d682fd9a 2793 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 2794 }
dudmuck 18:9530d682fd9a 2795
dudmuck 18:9530d682fd9a 2796 void cmd_fsk_PreambleDetectorSize(uint8_t idx)
dudmuck 18:9530d682fd9a 2797 {
dudmuck 18:9530d682fd9a 2798 int i;
dudmuck 18:9530d682fd9a 2799 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2800 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2801 fsk.RegPreambleDetect.bits.PreambleDetectorSize = i;
dudmuck 18:9530d682fd9a 2802 }
dudmuck 18:9530d682fd9a 2803 printf("PreambleDetectorSize:%d\r\n", fsk.RegPreambleDetect.bits.PreambleDetectorSize);
dudmuck 18:9530d682fd9a 2804 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 2805 }
dudmuck 18:9530d682fd9a 2806
dudmuck 18:9530d682fd9a 2807 void cmd_fsk_PreambleDetectorTol(uint8_t idx)
dudmuck 18:9530d682fd9a 2808 {
dudmuck 18:9530d682fd9a 2809 int i;
dudmuck 18:9530d682fd9a 2810 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2811 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2812 fsk.RegPreambleDetect.bits.PreambleDetectorTol = i;
dudmuck 18:9530d682fd9a 2813 }
dudmuck 18:9530d682fd9a 2814 printf("PreambleDetectorTol:%d\r\n", fsk.RegPreambleDetect.bits.PreambleDetectorTol);
dudmuck 18:9530d682fd9a 2815 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 2816 }
dudmuck 18:9530d682fd9a 2817
dudmuck 18:9530d682fd9a 2818 void cmd_PreambleSize(uint8_t idx)
dudmuck 18:9530d682fd9a 2819 {
dudmuck 18:9530d682fd9a 2820 int i;
dudmuck 18:9530d682fd9a 2821 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2822 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2823 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2824 radio.write_u16(REG_LR_PREAMBLEMSB, i);
dudmuck 18:9530d682fd9a 2825 }
dudmuck 18:9530d682fd9a 2826 lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB);
dudmuck 18:9530d682fd9a 2827 printf("lora PreambleLength:%d\r\n", lora.RegPreamble);
dudmuck 18:9530d682fd9a 2828 } else {
dudmuck 18:9530d682fd9a 2829 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2830 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2831 radio.write_u16(REG_FSK_PREAMBLEMSB, i);
dudmuck 18:9530d682fd9a 2832 }
dudmuck 18:9530d682fd9a 2833 printf("PreambleSize:%d\r\n", radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 18:9530d682fd9a 2834 }
dudmuck 18:9530d682fd9a 2835 }
dudmuck 18:9530d682fd9a 2836
dudmuck 18:9530d682fd9a 2837 void cmd_fsk_PreamblePolarity(uint8_t idx)
dudmuck 18:9530d682fd9a 2838 {
dudmuck 18:9530d682fd9a 2839 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 2840 fsk.RegSyncConfig.bits.PreamblePolarity ^= 1;
dudmuck 18:9530d682fd9a 2841 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2842 if (fsk.RegSyncConfig.bits.PreamblePolarity)
dudmuck 18:9530d682fd9a 2843 printf("0x55\r\n");
dudmuck 18:9530d682fd9a 2844 else
dudmuck 18:9530d682fd9a 2845 printf("0xaa\r\n");
dudmuck 18:9530d682fd9a 2846 }
dudmuck 18:9530d682fd9a 2847
dudmuck 18:9530d682fd9a 2848 void cmd_pllbw(uint8_t idx)
dudmuck 18:9530d682fd9a 2849 {
dudmuck 18:9530d682fd9a 2850 RegPll_t pll;
dudmuck 18:9530d682fd9a 2851 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 2852 // 0x5c and 0x5e registers
dudmuck 18:9530d682fd9a 2853 pll.octet = radio.read_reg(REG_PLL_SX1272);
dudmuck 18:9530d682fd9a 2854 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 2855 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 2856 else
dudmuck 18:9530d682fd9a 2857 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 2858 radio.write_reg(REG_PLL_SX1272, pll.octet);
dudmuck 18:9530d682fd9a 2859 pll.octet = radio.read_reg(REG_PLL_LOWPN_SX1272);
dudmuck 18:9530d682fd9a 2860 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 2861 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 2862 else
dudmuck 18:9530d682fd9a 2863 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 2864 radio.write_reg(REG_PLL_LOWPN_SX1272, pll.octet);
dudmuck 18:9530d682fd9a 2865 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 2866 // 0x70 register
dudmuck 18:9530d682fd9a 2867 pll.octet = radio.read_reg(REG_PLL_SX1276);
dudmuck 18:9530d682fd9a 2868 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 2869 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 2870 else
dudmuck 18:9530d682fd9a 2871 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 2872 radio.write_reg(REG_PLL_SX1276, pll.octet);
dudmuck 18:9530d682fd9a 2873 }
dudmuck 18:9530d682fd9a 2874 switch (pll.bits.PllBandwidth) {
dudmuck 18:9530d682fd9a 2875 case 0: printf("75"); break;
dudmuck 18:9530d682fd9a 2876 case 1: printf("150"); break;
dudmuck 18:9530d682fd9a 2877 case 2: printf("225"); break;
dudmuck 18:9530d682fd9a 2878 case 3: printf("300"); break;
dudmuck 18:9530d682fd9a 2879 }
dudmuck 18:9530d682fd9a 2880 printf("KHz\r\n");
dudmuck 18:9530d682fd9a 2881 }
dudmuck 18:9530d682fd9a 2882
dudmuck 18:9530d682fd9a 2883 void cmd_lna_boost(uint8_t idx)
dudmuck 18:9530d682fd9a 2884 {
dudmuck 18:9530d682fd9a 2885 radio.RegLna.octet = radio.read_reg(REG_LNA);
dudmuck 18:9530d682fd9a 2886 if (radio.RegLna.bits.LnaBoostHF == 3)
dudmuck 18:9530d682fd9a 2887 radio.RegLna.bits.LnaBoostHF = 0;
dudmuck 18:9530d682fd9a 2888 else
dudmuck 18:9530d682fd9a 2889 radio.RegLna.bits.LnaBoostHF++;
dudmuck 18:9530d682fd9a 2890 radio.write_reg(REG_LNA, radio.RegLna.octet);
dudmuck 18:9530d682fd9a 2891 printf("LNA-boost:%d\r\n", radio.RegLna.bits.LnaBoostHF);
dudmuck 18:9530d682fd9a 2892 }
dudmuck 18:9530d682fd9a 2893
dudmuck 18:9530d682fd9a 2894 void cmd_LowDataRateOptimize(uint8_t idx)
dudmuck 18:9530d682fd9a 2895 {
dudmuck 18:9530d682fd9a 2896 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 2897 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 2898 lora.RegModemConfig.sx1272bits.LowDataRateOptimize ^= 1;
dudmuck 18:9530d682fd9a 2899 printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 18:9530d682fd9a 2900 radio.write_reg(REG_LR_MODEMCONFIG, lora.RegModemConfig.octet);
dudmuck 18:9530d682fd9a 2901 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 2902 lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3);
dudmuck 18:9530d682fd9a 2903 lora.RegModemConfig3.sx1276bits.LowDataRateOptimize ^= 1;
dudmuck 18:9530d682fd9a 2904 printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize);
dudmuck 18:9530d682fd9a 2905 radio.write_reg(REG_LR_MODEMCONFIG3, lora.RegModemConfig3.octet);
dudmuck 18:9530d682fd9a 2906 }
dudmuck 18:9530d682fd9a 2907 }
dudmuck 18:9530d682fd9a 2908
dudmuck 18:9530d682fd9a 2909 void cmd_fsk_FifoThreshold(uint8_t idx)
dudmuck 18:9530d682fd9a 2910 {
dudmuck 18:9530d682fd9a 2911 int i;
dudmuck 18:9530d682fd9a 2912 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 18:9530d682fd9a 2913 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2914 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2915 fsk.RegFifoThreshold.bits.FifoThreshold = i;
dudmuck 18:9530d682fd9a 2916 }
dudmuck 18:9530d682fd9a 2917 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 18:9530d682fd9a 2918 printf("FifoThreshold:%d\r\n", fsk.RegFifoThreshold.bits.FifoThreshold);
dudmuck 18:9530d682fd9a 2919 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 18:9530d682fd9a 2920 }
dudmuck 18:9530d682fd9a 2921
dudmuck 18:9530d682fd9a 2922 void cmd_tx_ticker_rate(uint8_t idx)
dudmuck 18:9530d682fd9a 2923 {
dudmuck 18:9530d682fd9a 2924 if (pcbuf[idx] != 0) {
dudmuck 18:9530d682fd9a 2925 sscanf(pcbuf+idx, "%f", &tx_ticker_rate);
dudmuck 18:9530d682fd9a 2926 }
dudmuck 18:9530d682fd9a 2927 printf("tx_ticker_rate:%f\r\n", tx_ticker_rate);
dudmuck 18:9530d682fd9a 2928 }
dudmuck 18:9530d682fd9a 2929
dudmuck 18:9530d682fd9a 2930 void cmd_lora_tx_invert(uint8_t idx)
dudmuck 18:9530d682fd9a 2931 {
dudmuck 18:9530d682fd9a 2932 lora.invert_tx(lora.RegTest33.bits.chirp_invert_tx);
dudmuck 18:9530d682fd9a 2933 printf("chirp_invert_tx :%d\r\n", lora.RegTest33.bits.chirp_invert_tx);
dudmuck 18:9530d682fd9a 2934 }
dudmuck 18:9530d682fd9a 2935
dudmuck 18:9530d682fd9a 2936 void cmd_lora_rx_invert(uint8_t idx)
dudmuck 18:9530d682fd9a 2937 {
dudmuck 18:9530d682fd9a 2938 lora.invert_rx(!lora.RegTest33.bits.invert_i_q);
dudmuck 18:9530d682fd9a 2939 printf("rx invert_i_q:%d\r\n", lora.RegTest33.bits.invert_i_q);
dudmuck 18:9530d682fd9a 2940 }
dudmuck 18:9530d682fd9a 2941
dudmuck 18:9530d682fd9a 2942 void cmd_fsk_dcfree(uint8_t idx)
dudmuck 18:9530d682fd9a 2943 {
dudmuck 18:9530d682fd9a 2944 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 18:9530d682fd9a 2945 if (fsk.RegPktConfig1.bits.DcFree == 3)
dudmuck 18:9530d682fd9a 2946 fsk.RegPktConfig1.bits.DcFree = 0;
dudmuck 18:9530d682fd9a 2947 else
dudmuck 18:9530d682fd9a 2948 fsk.RegPktConfig1.bits.DcFree++;
dudmuck 18:9530d682fd9a 2949 printf(" dcFree:");
dudmuck 18:9530d682fd9a 2950 switch (fsk.RegPktConfig1.bits.DcFree) {
dudmuck 18:9530d682fd9a 2951 case 0: printf("none "); break;
dudmuck 18:9530d682fd9a 2952 case 1: printf("Manchester "); break;
dudmuck 18:9530d682fd9a 2953 case 2: printf("Whitening "); break;
dudmuck 18:9530d682fd9a 2954 case 3: printf("reserved "); break;
dudmuck 18:9530d682fd9a 2955 }
dudmuck 18:9530d682fd9a 2956 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 2957 printf("\r\n");
dudmuck 18:9530d682fd9a 2958 }
dudmuck 18:9530d682fd9a 2959
dudmuck 18:9530d682fd9a 2960 void cmd_fsk_DataMode(uint8_t idx)
dudmuck 18:9530d682fd9a 2961 {
dudmuck 18:9530d682fd9a 2962 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 18:9530d682fd9a 2963 fsk.RegPktConfig2.bits.DataModePacket ^= 1;
dudmuck 18:9530d682fd9a 2964 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 18:9530d682fd9a 2965 printf("datamode:");
dudmuck 18:9530d682fd9a 2966 if (fsk.RegPktConfig2.bits.DataModePacket)
dudmuck 18:9530d682fd9a 2967 printf("packet\r\n");
dudmuck 18:9530d682fd9a 2968 else
dudmuck 18:9530d682fd9a 2969 printf("continuous\r\n");
dudmuck 18:9530d682fd9a 2970 }
dudmuck 18:9530d682fd9a 2971
dudmuck 18:9530d682fd9a 2972 void cmd_show_dio(uint8_t idx)
dudmuck 18:9530d682fd9a 2973 {
dudmuck 18:9530d682fd9a 2974 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2975 lora_print_dio();
dudmuck 18:9530d682fd9a 2976 else
dudmuck 18:9530d682fd9a 2977 fsk_print_dio();
dudmuck 18:9530d682fd9a 2978 }
dudmuck 18:9530d682fd9a 2979
dudmuck 18:9530d682fd9a 2980 void cmd_set_dio(uint8_t idx)
dudmuck 18:9530d682fd9a 2981 {
dudmuck 18:9530d682fd9a 2982 switch (pcbuf[idx]) {
dudmuck 18:9530d682fd9a 2983 case '0':
dudmuck 18:9530d682fd9a 2984 radio.RegDioMapping1.bits.Dio0Mapping++;
dudmuck 18:9530d682fd9a 2985 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2986 break;
dudmuck 18:9530d682fd9a 2987 case '1':
dudmuck 18:9530d682fd9a 2988 radio.RegDioMapping1.bits.Dio1Mapping++;
dudmuck 18:9530d682fd9a 2989 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2990 break;
dudmuck 18:9530d682fd9a 2991 case '2':
dudmuck 18:9530d682fd9a 2992 radio.RegDioMapping1.bits.Dio2Mapping++;
dudmuck 18:9530d682fd9a 2993 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2994 break;
dudmuck 18:9530d682fd9a 2995 case '3':
dudmuck 18:9530d682fd9a 2996 radio.RegDioMapping1.bits.Dio3Mapping++;
dudmuck 18:9530d682fd9a 2997 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2998 break;
dudmuck 18:9530d682fd9a 2999 case '4':
dudmuck 18:9530d682fd9a 3000 radio.RegDioMapping2.bits.Dio4Mapping++;
dudmuck 18:9530d682fd9a 3001 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 3002 break;
dudmuck 18:9530d682fd9a 3003 case '5':
dudmuck 18:9530d682fd9a 3004 radio.RegDioMapping2.bits.Dio5Mapping++;
dudmuck 18:9530d682fd9a 3005 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 3006 break;
dudmuck 18:9530d682fd9a 3007 } // ...switch (pcbuf[idx])
dudmuck 18:9530d682fd9a 3008 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 3009 lora_print_dio();
dudmuck 18:9530d682fd9a 3010 else
dudmuck 18:9530d682fd9a 3011 fsk_print_dio();
dudmuck 18:9530d682fd9a 3012 }
dudmuck 18:9530d682fd9a 3013
dudmuck 18:9530d682fd9a 3014 void cmd_mode_standby(uint8_t idx)
dudmuck 18:9530d682fd9a 3015 {
dudmuck 18:9530d682fd9a 3016 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3017 printf("standby\r\n");
dudmuck 18:9530d682fd9a 3018 }
dudmuck 18:9530d682fd9a 3019
dudmuck 18:9530d682fd9a 3020 void cmd_mode_sleep(uint8_t idx)
dudmuck 18:9530d682fd9a 3021 {
dudmuck 18:9530d682fd9a 3022 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 18:9530d682fd9a 3023 printf("sleep\r\n");
dudmuck 18:9530d682fd9a 3024 }
dudmuck 18:9530d682fd9a 3025
dudmuck 18:9530d682fd9a 3026 void cmd_mode_fstx(uint8_t idx)
dudmuck 18:9530d682fd9a 3027 {
dudmuck 18:9530d682fd9a 3028 radio.set_opmode(RF_OPMODE_SYNTHESIZER_TX);
dudmuck 18:9530d682fd9a 3029 printf("fstx\r\n");
dudmuck 18:9530d682fd9a 3030 }
dudmuck 18:9530d682fd9a 3031
dudmuck 18:9530d682fd9a 3032 void cmd_mode_fsrx(uint8_t idx)
dudmuck 18:9530d682fd9a 3033 {
dudmuck 18:9530d682fd9a 3034 radio.set_opmode(RF_OPMODE_SYNTHESIZER_RX);
dudmuck 18:9530d682fd9a 3035 printf("fsrx\r\n");
dudmuck 18:9530d682fd9a 3036 }
dudmuck 18:9530d682fd9a 3037
dudmuck 18:9530d682fd9a 3038 void cmd_chat(uint8_t idx)
dudmuck 18:9530d682fd9a 3039 {
dudmuck 18:9530d682fd9a 3040 app = APP_CHAT;
dudmuck 18:9530d682fd9a 3041 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 3042 printf("chat start\r\n");
dudmuck 18:9530d682fd9a 3043 }
dudmuck 18:9530d682fd9a 3044
dudmuck 18:9530d682fd9a 3045 void cmd_OokThreshType(uint8_t idx)
dudmuck 18:9530d682fd9a 3046 {
dudmuck 18:9530d682fd9a 3047 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3048 if (fsk.RegOokPeak.bits.OokThreshType == 2)
dudmuck 18:9530d682fd9a 3049 fsk.RegOokPeak.bits.OokThreshType = 0;
dudmuck 18:9530d682fd9a 3050 else
dudmuck 18:9530d682fd9a 3051 fsk.RegOokPeak.bits.OokThreshType++;
dudmuck 18:9530d682fd9a 3052
dudmuck 18:9530d682fd9a 3053 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3054 printf("OokThreshType:");
dudmuck 18:9530d682fd9a 3055 switch (fsk.RegOokPeak.bits.OokThreshType) {
dudmuck 18:9530d682fd9a 3056 case 0: printf("fixed"); break;
dudmuck 18:9530d682fd9a 3057 case 1: printf("peak"); break;
dudmuck 18:9530d682fd9a 3058 case 2: printf("average"); break;
dudmuck 18:9530d682fd9a 3059 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 3060 }
dudmuck 18:9530d682fd9a 3061 printf("\r\n");
dudmuck 18:9530d682fd9a 3062 }
dudmuck 18:9530d682fd9a 3063
dudmuck 18:9530d682fd9a 3064 void cmd_OokPeakTheshStep(uint8_t idx)
dudmuck 18:9530d682fd9a 3065 {
dudmuck 18:9530d682fd9a 3066 float f;
dudmuck 18:9530d682fd9a 3067 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3068 if (fsk.RegOokPeak.bits.OokPeakThreshStep == 7)
dudmuck 18:9530d682fd9a 3069 fsk.RegOokPeak.bits.OokPeakThreshStep = 0;
dudmuck 18:9530d682fd9a 3070 else
dudmuck 18:9530d682fd9a 3071 fsk.RegOokPeak.bits.OokPeakThreshStep++;
dudmuck 18:9530d682fd9a 3072
dudmuck 18:9530d682fd9a 3073 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3074 switch (fsk.RegOokPeak.bits.OokPeakThreshStep) {
dudmuck 18:9530d682fd9a 3075 case 0: f = 0.5; break;
dudmuck 18:9530d682fd9a 3076 case 1: f = 1; break;
dudmuck 18:9530d682fd9a 3077 case 2: f = 1.5; break;
dudmuck 18:9530d682fd9a 3078 case 3: f = 2; break;
dudmuck 18:9530d682fd9a 3079 case 4: f = 3; break;
dudmuck 18:9530d682fd9a 3080 case 5: f = 4; break;
dudmuck 18:9530d682fd9a 3081 case 6: f = 5; break;
dudmuck 18:9530d682fd9a 3082 case 7: f = 6; break;
dudmuck 18:9530d682fd9a 3083 }
dudmuck 18:9530d682fd9a 3084 printf("OokPeakThreshStep:%.1fdB\r\n", f);
dudmuck 18:9530d682fd9a 3085 }
dudmuck 18:9530d682fd9a 3086
dudmuck 18:9530d682fd9a 3087 void cmd_OokFixedThresh(uint8_t idx)
dudmuck 18:9530d682fd9a 3088 {
dudmuck 18:9530d682fd9a 3089 int i;
dudmuck 18:9530d682fd9a 3090 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3091 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3092 radio.write_reg(REG_FSK_OOKFIX, i);
dudmuck 18:9530d682fd9a 3093 }
dudmuck 18:9530d682fd9a 3094 i = radio.read_reg(REG_FSK_OOKFIX);
dudmuck 18:9530d682fd9a 3095 printf("OokFixedThreshold:%d\r\n", i);
dudmuck 18:9530d682fd9a 3096 }
dudmuck 18:9530d682fd9a 3097
dudmuck 18:9530d682fd9a 3098 void cmd_clkout(uint8_t idx)
dudmuck 18:9530d682fd9a 3099 {
dudmuck 18:9530d682fd9a 3100 RegOsc_t reg_osc;
dudmuck 18:9530d682fd9a 3101 reg_osc.octet = radio.read_reg(REG_FSK_OSC);
dudmuck 18:9530d682fd9a 3102 if (reg_osc.bits.ClkOut == 7)
dudmuck 18:9530d682fd9a 3103 reg_osc.bits.ClkOut = 0;
dudmuck 18:9530d682fd9a 3104 else
dudmuck 18:9530d682fd9a 3105 reg_osc.bits.ClkOut++;
dudmuck 18:9530d682fd9a 3106
dudmuck 18:9530d682fd9a 3107 printf("ClkOut:%d\r\n", reg_osc.bits.ClkOut);
dudmuck 18:9530d682fd9a 3108 radio.write_reg(REG_FSK_OSC, reg_osc.octet);
dudmuck 18:9530d682fd9a 3109 }
dudmuck 18:9530d682fd9a 3110
dudmuck 18:9530d682fd9a 3111 void cmd_help(uint8_t args_at);
dudmuck 18:9530d682fd9a 3112
dudmuck 18:9530d682fd9a 3113 typedef enum {
dudmuck 18:9530d682fd9a 3114 MODEM_BOTH,
dudmuck 18:9530d682fd9a 3115 MODEM_FSK,
dudmuck 18:9530d682fd9a 3116 MODEM_LORA
dudmuck 18:9530d682fd9a 3117 } modem_e;
dudmuck 18:9530d682fd9a 3118
dudmuck 18:9530d682fd9a 3119 typedef struct {
dudmuck 18:9530d682fd9a 3120 modem_e modem;
dudmuck 18:9530d682fd9a 3121 const char* const cmd;
dudmuck 18:9530d682fd9a 3122 void (*handler)(uint8_t args_at);
dudmuck 18:9530d682fd9a 3123 const char* const arg_descr;
dudmuck 18:9530d682fd9a 3124 const char* const description;
dudmuck 18:9530d682fd9a 3125 } menu_item_t;
dudmuck 18:9530d682fd9a 3126
dudmuck 18:9530d682fd9a 3127 const menu_item_t menu_items[] =
dudmuck 18:9530d682fd9a 3128 { /* after first character, command names must be [A-Za-z] */
dudmuck 18:9530d682fd9a 3129 { MODEM_BOTH, "chat", cmd_chat, "","start keyboard chat"},
dudmuck 18:9530d682fd9a 3130 { MODEM_BOTH, "rssi", cmd_read_current_rssi, "","(RX) read instantaneous RSSI"},
dudmuck 18:9530d682fd9a 3131 { MODEM_BOTH, "txpd", cmd_per_tx_delay, "<%d>","get/set PER tx delay (in milliseconds)"},
dudmuck 18:9530d682fd9a 3132 { MODEM_BOTH, "pertx", cmd_pertx, "<%d pkt count>","start Eiger PER TX"},
dudmuck 18:9530d682fd9a 3133 { MODEM_BOTH, "perrx", cmd_perrx, "","start Eiger PER RX"},
dudmuck 18:9530d682fd9a 3134 { MODEM_BOTH, "pres", cmd_PreambleSize, "<%d>", "get/set PreambleSize"},
dudmuck 18:9530d682fd9a 3135 { MODEM_BOTH, "pllbw", cmd_pllbw, "", "increment pllbw"},
dudmuck 18:9530d682fd9a 3136 { MODEM_BOTH, "lnab", cmd_lna_boost, "", "(RX) increment LNA boost"},
dudmuck 18:9530d682fd9a 3137 { MODEM_BOTH, "stby", cmd_mode_standby, "", "set chip mode to standby"},
dudmuck 18:9530d682fd9a 3138 { MODEM_BOTH, "sleep", cmd_mode_sleep, "", "set chip mode to sleep"},
dudmuck 18:9530d682fd9a 3139 { MODEM_BOTH, "fstx", cmd_mode_fstx, "", "set chip mode to fstx"},
dudmuck 18:9530d682fd9a 3140 { MODEM_BOTH, "fsrx", cmd_mode_fsrx, "", "set chip mode to fsrx"},
dudmuck 18:9530d682fd9a 3141 { MODEM_BOTH, "crcon", cmd_crcOn, "","toggle crcOn"},
dudmuck 18:9530d682fd9a 3142 { MODEM_BOTH, "payl", cmd_payload_length, "<%d>","get/set payload length"},
dudmuck 18:9530d682fd9a 3143 { MODEM_BOTH, "bgr", cmd_bgr, "<%d>","(TX) get/set reference for TX DAC"},
dudmuck 18:9530d682fd9a 3144 { MODEM_BOTH, "ocp", cmd_ocp, "<%d>","(TX) get/set milliamps current limit"},
dudmuck 18:9530d682fd9a 3145 { MODEM_BOTH, "frf", cmd_frf, "<MHz>","get/set RF center frequency"},
dudmuck 18:9530d682fd9a 3146 { MODEM_BOTH, "pas", cmd_paSelect, "","(TX) toggle RFO/PA_BOOST"},
dudmuck 18:9530d682fd9a 3147 { MODEM_BOTH, "pid", cmd_per_id, "<%d>","get/set ID number in Eiger PER packet"},
dudmuck 18:9530d682fd9a 3148 { MODEM_BOTH, "dio", cmd_show_dio, "","print dio mapping"},
dudmuck 18:9530d682fd9a 3149
dudmuck 18:9530d682fd9a 3150 { MODEM_FSK, "clkout", cmd_clkout, "","increment ClkOut divider"},
dudmuck 18:9530d682fd9a 3151 { MODEM_FSK, "ookt", cmd_OokThreshType, "","(RX) increment OokThreshType"},
dudmuck 18:9530d682fd9a 3152 { MODEM_FSK, "ooks", cmd_OokPeakTheshStep, "","(RX) increment OokPeakTheshStep"},
dudmuck 18:9530d682fd9a 3153 { MODEM_FSK, "sqlch", cmd_OokFixedThresh, "<%d>","(RX) get/set OokFixedThresh"},
dudmuck 18:9530d682fd9a 3154 { MODEM_FSK, "rssit", cmd_rssi_threshold, "<-dBm>","(RX) get/set rssi threshold"},
dudmuck 18:9530d682fd9a 3155 { MODEM_FSK, "rssis", cmd_rssi_smoothing, "<%d>","(RX) get/set rssi smoothing"},
dudmuck 18:9530d682fd9a 3156 { MODEM_FSK, "rssio", cmd_rssi_offset, "<%d>","(RX) get/set rssi offset"},
dudmuck 18:9530d682fd9a 3157 { MODEM_FSK, "mods", cmd_mod_shaping, "", "(TX) increment modulation shaping"},
dudmuck 18:9530d682fd9a 3158 { MODEM_FSK, "agcauto", cmd_fsk_agcauto, "", "(RX) toggle AgcAutoOn"},
dudmuck 18:9530d682fd9a 3159 { MODEM_FSK, "afcauto", cmd_fsk_afcauto, "", "(RX) toggle AfcAutoOn"},
dudmuck 18:9530d682fd9a 3160 { MODEM_FSK, "syncw", cmd_fsk_syncword, "<hex bytes>", "get/set syncword"},
dudmuck 18:9530d682fd9a 3161 { MODEM_FSK, "syncon", cmd_fsk_syncOn, "", "toggle SyncOn (frame sync, SFD enable)"},
dudmuck 18:9530d682fd9a 3162 { MODEM_FSK, "bitsync", cmd_fsk_bitsync, "", "toggle BitSyncOn (continuous mode only)"},
dudmuck 18:9530d682fd9a 3163 { MODEM_FSK, "fifot", cmd_fsk_TxStartCondition, "", "(TX) toggle TxStartCondition"},
dudmuck 18:9530d682fd9a 3164 { MODEM_FSK, "pktf", cmd_fsk_PacketFormat, "", "toggle PacketFormat fixed/variable length"},
dudmuck 18:9530d682fd9a 3165 { MODEM_FSK, "poll", cmd_poll_irq_en, "", "toggle poll_irq_en"},
dudmuck 18:9530d682fd9a 3166 { MODEM_FSK, "prep", cmd_fsk_PreamblePolarity, "", "toggle PreamblePolarity"},
dudmuck 18:9530d682fd9a 3167 { MODEM_FSK, "datam", cmd_fsk_DataMode, "", "toggle DataMode (packet/continuous)"},
dudmuck 18:9530d682fd9a 3168 { MODEM_FSK, "rxt", cmd_rx_trigger, "","(RX) increment RxTrigger"},
dudmuck 18:9530d682fd9a 3169 { MODEM_FSK, "ook", cmd_ook, "","enter OOK mode"},
dudmuck 18:9530d682fd9a 3170 { MODEM_FSK, "fei", cmd_fsk_read_fei, "","(RX) read FEI"},
dudmuck 18:9530d682fd9a 3171 { MODEM_FSK, "fdev", cmd_fsk_fdev, "<kHz>","(TX) get/set fdev"},
dudmuck 18:9530d682fd9a 3172 { MODEM_FSK, "par", cmd_paRamp, "","(TX) increment paRamp"},
dudmuck 18:9530d682fd9a 3173 { MODEM_FSK, "pde", cmd_fsk_PreambleDetectorOn, "","(RX) toggle PreambleDetectorOn"},
dudmuck 18:9530d682fd9a 3174 { MODEM_FSK, "pds", cmd_fsk_PreambleDetectorSize, "<%d>","(RX) get/set PreambleDetectorSize"},
dudmuck 18:9530d682fd9a 3175 { MODEM_FSK, "pdt", cmd_fsk_PreambleDetectorTol, "<%d>","(RX) get/set PreambleDetectorTol"},
dudmuck 18:9530d682fd9a 3176 { MODEM_FSK, "thr", cmd_fsk_FifoThreshold, "<%d>","get/set FifoThreshold"},
dudmuck 18:9530d682fd9a 3177 { MODEM_FSK, "dcf", cmd_fsk_dcfree, "","(RX) increment DcFree"},
dudmuck 18:9530d682fd9a 3178 { MODEM_FSK, "br", cmd_fsk_bitrate, "<%f kbps>","get/set bitrate"},
dudmuck 18:9530d682fd9a 3179 { MODEM_FSK, "ac", cmd_AfcClear, "","(RX) AfcClear"},
dudmuck 18:9530d682fd9a 3180 { MODEM_FSK, "ar", cmd_fsk_AutoRestartRxMode, "","(RX) increment AutoRestartRxMode"},
dudmuck 18:9530d682fd9a 3181 { MODEM_FSK, "alc", cmd_fsk_AfcAutoClearOn, "","(RX) toggle AfcAutoClearOn"},
dudmuck 18:9530d682fd9a 3182 { MODEM_FSK, "mp", cmd_MapPreambleDetect, "","(RX) toggle MapPreambleDetect"},
dudmuck 18:9530d682fd9a 3183 { MODEM_BOTH, "op", cmd_op, "<dBm>","(TX) get/set TX power"},
dudmuck 18:9530d682fd9a 3184
dudmuck 18:9530d682fd9a 3185 #ifdef LORA_TX_TEST
dudmuck 18:9530d682fd9a 3186 { MODEM_LORA, "apl", cmd_lora_all_payload_lengths, "","(TXTEST) sweep payload lengths 0->255"},
dudmuck 18:9530d682fd9a 3187 { MODEM_LORA, "csn", cmd_lora_sync_sweep, "[12]","(TXTEST) sweep ppg symbol"},
dudmuck 18:9530d682fd9a 3188 { MODEM_LORA, "ss", cmd_lora_sync_lo_nibble, "","(TXTEST) ppg low nibble"},
dudmuck 18:9530d682fd9a 3189 { MODEM_LORA, "cpl", lora_cycle_payload_length, "[%d stop]","(TXTEST) sweep payload length"},
dudmuck 18:9530d682fd9a 3190 { MODEM_LORA, "ro", cmd_lora_data_ramp, "[%d bytes]","(TXTEST) sweep payload data"},
dudmuck 18:9530d682fd9a 3191 { MODEM_LORA, "ccr", cmd_lora_cycle_codingrates, "","(TXTEST) cycle coding rates"},
dudmuck 18:9530d682fd9a 3192 { MODEM_LORA, "fps", cmd_lora_fixed_payload_symbol, "[symbol_num n_bits]","(TXTEST) sweep symbol, n_bits=bits per symbol set (sf8=24, sf9=28, etc)"},
dudmuck 18:9530d682fd9a 3193 { MODEM_LORA, "fpo", cmd_fixed_payload_offset, "<nbytes>","(TXTEST) padding offset for fp tests"},
dudmuck 18:9530d682fd9a 3194 { MODEM_LORA, "fp", cmd_lora_fixed_payload, "[bytes]","(TXTEST) fixed payload"},
dudmuck 18:9530d682fd9a 3195 { MODEM_LORA, "tab", cmd_lora_toggle_all_bits, "[byte length]","(TXTEST) toggle all bits"},
dudmuck 18:9530d682fd9a 3196 { MODEM_LORA, "tcrc", cmd_lora_toggle_crcOn, "","(TXTEST) toggle crcOn"},
dudmuck 18:9530d682fd9a 3197 { MODEM_LORA, "thm", cmd_lora_toggle_header_mode, "","(TXTEST) toggle explicit/implicit"},
dudmuck 18:9530d682fd9a 3198 { MODEM_BOTH, "ttr", cmd_tx_ticker_rate, "<%f seconds>","(TXTEST) get/set tx_ticker rate"},
dudmuck 18:9530d682fd9a 3199 #endif /* LORA_TX_TEST */
dudmuck 18:9530d682fd9a 3200
dudmuck 18:9530d682fd9a 3201 { MODEM_LORA, "cadper", cmd_cadper, "","Eiger PER RX using CAD" },
dudmuck 18:9530d682fd9a 3202 { MODEM_LORA, "cad", cmd_cad, "<%d num tries>","(RX) run channel activity detection" },
dudmuck 18:9530d682fd9a 3203 { MODEM_LORA, "iqinv", cmd_lora_rx_invert, "","(RX) toggle RX IQ invert" },
dudmuck 18:9530d682fd9a 3204 { MODEM_LORA, "cin", cmd_lora_tx_invert, "","(TX) toggle TX IQ invert" },
dudmuck 18:9530d682fd9a 3205 { MODEM_LORA, "lhp", cmd_hop_period, "<%d>","(RX) get/set hop period"},
dudmuck 18:9530d682fd9a 3206 { MODEM_LORA, "sync", cmd_lora_ppg, "<%x>","get/set sync (post-preamble gap)"},
dudmuck 18:9530d682fd9a 3207 { MODEM_LORA, "cr", cmd_codingRate, "<1-4>","get/set codingRate"},
dudmuck 18:9530d682fd9a 3208 { MODEM_LORA, "lhm", cmd_lora_header_mode, "","toggle explicit/implicit"},
dudmuck 18:9530d682fd9a 3209 { MODEM_LORA, "vh", cmd_lora_poll_validHeader, "","toggle polling of validHeader"},
dudmuck 18:9530d682fd9a 3210 { MODEM_LORA, "sf", cmd_lora_sf, "<%d>","get/set spreadingFactor"},
dudmuck 18:9530d682fd9a 3211 { MODEM_LORA, "ldr", cmd_LowDataRateOptimize, "","toggle LowDataRateOptimize"},
dudmuck 18:9530d682fd9a 3212 { MODEM_LORA, "txc", cmd_lora_continuous_tx, "","(TX) toggle TxContinuousMode"},
dudmuck 18:9530d682fd9a 3213 { MODEM_BOTH, "tx", cmd_tx, "<%d>","transmit packet. optional payload length"},
dudmuck 18:9530d682fd9a 3214 { MODEM_BOTH, "bw", cmd_bandwidth, "<kHz>","get/set bandwith"},
dudmuck 18:9530d682fd9a 3215 { MODEM_LORA, "rxt", cmd_rx_timeout, "<%d>","(RX) get/set SymbTimeout"},
dudmuck 18:9530d682fd9a 3216 { MODEM_LORA, "rxs", cmd_rx_single, "","start RX_SINGLE"},
dudmuck 18:9530d682fd9a 3217 { MODEM_BOTH, "rx", cmd_rx, "","start RX"},
dudmuck 18:9530d682fd9a 3218
dudmuck 18:9530d682fd9a 3219 { MODEM_BOTH, "h", cmd_hw_reset, "","hardware reset"},
dudmuck 18:9530d682fd9a 3220 { MODEM_BOTH, "i", cmd_init, "","initialize radio driver"},
dudmuck 18:9530d682fd9a 3221 { MODEM_BOTH, "R", cmd_read_all_regs, "","read all radio registers"},
dudmuck 18:9530d682fd9a 3222 { MODEM_BOTH, "r", cmd_radio_reg_read, "[%x]","read single radio register"},
dudmuck 18:9530d682fd9a 3223 { MODEM_BOTH, "w", cmd_radio_reg_write, "[%x %x]","write single radio register"},
dudmuck 18:9530d682fd9a 3224
dudmuck 18:9530d682fd9a 3225 { MODEM_BOTH, "L", cmd_toggle_modem, "","toggle between LoRa / FSK"},
dudmuck 18:9530d682fd9a 3226 { MODEM_FSK, "E", cmd_empty_fifo, "","empty out FIFO"},
dudmuck 18:9530d682fd9a 3227 { MODEM_FSK, "c", cmd_fsk_test_case, "<%d>","get/set test cases"},
dudmuck 18:9530d682fd9a 3228 { MODEM_BOTH, "d", cmd_set_dio, "<%d pin num>","increment dio mapping"},
dudmuck 18:9530d682fd9a 3229 { MODEM_BOTH, ".", cmd_print_status, "","print status"},
dudmuck 18:9530d682fd9a 3230 { MODEM_BOTH, "?", cmd_help, "","this list of commands"},
dudmuck 19:be8a8b0e7320 3231 { MODEM_BOTH, NULL, NULL, NULL, NULL }
dudmuck 18:9530d682fd9a 3232 };
dudmuck 18:9530d682fd9a 3233
dudmuck 18:9530d682fd9a 3234 void cmd_help(uint8_t args_at)
dudmuck 18:9530d682fd9a 3235 {
dudmuck 18:9530d682fd9a 3236 int i;
dudmuck 18:9530d682fd9a 3237
dudmuck 18:9530d682fd9a 3238 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 3239 if (menu_items[i].modem == MODEM_BOTH)
dudmuck 18:9530d682fd9a 3240 printf("%s%s\t%s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 3241 }
dudmuck 18:9530d682fd9a 3242
dudmuck 18:9530d682fd9a 3243 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3244 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 3245 if (menu_items[i].modem == MODEM_LORA)
dudmuck 18:9530d682fd9a 3246 printf("%s%s\t(LoRa) %s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 3247 }
dudmuck 18:9530d682fd9a 3248 } else {
dudmuck 18:9530d682fd9a 3249 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 3250 if (menu_items[i].modem == MODEM_FSK)
dudmuck 18:9530d682fd9a 3251 printf("%s%s\t(FSK) %s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 3252 }
dudmuck 18:9530d682fd9a 3253 }
dudmuck 10:d9bb2ce57f05 3254 }
dudmuck 10:d9bb2ce57f05 3255
dudmuck 0:be215de91a68 3256 void
dudmuck 0:be215de91a68 3257 console()
dudmuck 0:be215de91a68 3258 {
dudmuck 18:9530d682fd9a 3259 int i;
dudmuck 18:9530d682fd9a 3260 uint8_t user_cmd_len;
dudmuck 5:360069ec9953 3261
dudmuck 18:9530d682fd9a 3262 if (poll_irq_en)
dudmuck 18:9530d682fd9a 3263 poll_service_radio();
dudmuck 18:9530d682fd9a 3264 else
dudmuck 18:9530d682fd9a 3265 service_radio();
dudmuck 0:be215de91a68 3266
dudmuck 5:360069ec9953 3267 if (pcbuf_len < 0) {
dudmuck 0:be215de91a68 3268 printf("abort\r\n");
dudmuck 18:9530d682fd9a 3269 cadper_enable = false;
dudmuck 8:227605e4a760 3270 per_en = false;
dudmuck 5:360069ec9953 3271 pcbuf_len = 0;
dudmuck 15:c69b942685ea 3272 if ((radio.RegOpMode.bits.Mode != RF_OPMODE_SLEEP) && (radio.RegOpMode.bits.Mode != RF_OPMODE_STANDBY)) {
dudmuck 15:c69b942685ea 3273 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 15:c69b942685ea 3274 }
dudmuck 18:9530d682fd9a 3275 on_txdone_state = ON_TXDONE_STATE_NONE;
dudmuck 18:9530d682fd9a 3276 tx_ticker.detach();
dudmuck 0:be215de91a68 3277 return;
dudmuck 0:be215de91a68 3278 }
dudmuck 5:360069ec9953 3279 if (pcbuf_len == 0)
dudmuck 5:360069ec9953 3280 return;
dudmuck 18:9530d682fd9a 3281
dudmuck 0:be215de91a68 3282 printf("\r\n");
dudmuck 18:9530d682fd9a 3283
dudmuck 18:9530d682fd9a 3284 /* get end of user-entered command */
dudmuck 18:9530d682fd9a 3285 user_cmd_len = 1; // first character can be any character
dudmuck 18:9530d682fd9a 3286 for (i = 1; i <= pcbuf_len; i++) {
dudmuck 18:9530d682fd9a 3287 if (pcbuf[i] < 'A' || (pcbuf[i] > 'Z' && pcbuf[i] < 'a') || pcbuf[i] > 'z') {
dudmuck 18:9530d682fd9a 3288 user_cmd_len = i;
dudmuck 18:9530d682fd9a 3289 break;
dudmuck 7:c3c54f222ced 3290 }
dudmuck 0:be215de91a68 3291 }
dudmuck 18:9530d682fd9a 3292
dudmuck 18:9530d682fd9a 3293 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 3294 int mi_len = strlen(menu_items[i].cmd);
dudmuck 18:9530d682fd9a 3295 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3296 if (menu_items[i].modem == MODEM_FSK)
dudmuck 18:9530d682fd9a 3297 continue; // FSK commands not used in LoRa
dudmuck 18:9530d682fd9a 3298 } else {
dudmuck 18:9530d682fd9a 3299 if (menu_items[i].modem == MODEM_LORA)
dudmuck 18:9530d682fd9a 3300 continue; // LoRa commands not used in FSK
dudmuck 18:9530d682fd9a 3301 }
dudmuck 18:9530d682fd9a 3302
dudmuck 18:9530d682fd9a 3303 if (menu_items[i].handler && user_cmd_len == mi_len && (strncmp(pcbuf, menu_items[i].cmd, mi_len) == 0)) {
dudmuck 18:9530d682fd9a 3304 while (pcbuf[mi_len] == ' ') // skip past spaces
dudmuck 18:9530d682fd9a 3305 mi_len++;
dudmuck 18:9530d682fd9a 3306 menu_items[i].handler(mi_len);
dudmuck 18:9530d682fd9a 3307 break;
dudmuck 18:9530d682fd9a 3308 }
dudmuck 18:9530d682fd9a 3309 }
dudmuck 18:9530d682fd9a 3310
dudmuck 5:360069ec9953 3311 pcbuf_len = 0;
dudmuck 0:be215de91a68 3312 printf("> ");
dudmuck 18:9530d682fd9a 3313 fflush(stdout);
dudmuck 0:be215de91a68 3314 }
dudmuck 0:be215de91a68 3315
dudmuck 5:360069ec9953 3316 void rx_callback()
dudmuck 5:360069ec9953 3317 {
dudmuck 5:360069ec9953 3318 static uint8_t pcbuf_idx = 0;
dudmuck 5:360069ec9953 3319 static uint8_t prev_len = 0;;
dudmuck 5:360069ec9953 3320 char c = pc.getc();
dudmuck 18:9530d682fd9a 3321 /*if (kermit.uart_rx_enabled) {
dudmuck 18:9530d682fd9a 3322 kermit.rx_callback(c);
dudmuck 18:9530d682fd9a 3323 } else*/ {
dudmuck 18:9530d682fd9a 3324 if (c == 8) {
dudmuck 18:9530d682fd9a 3325 if (pcbuf_idx > 0) {
dudmuck 18:9530d682fd9a 3326 pc.putc(8);
dudmuck 18:9530d682fd9a 3327 pc.putc(' ');
dudmuck 18:9530d682fd9a 3328 pc.putc(8);
dudmuck 18:9530d682fd9a 3329 pcbuf_idx--;
dudmuck 18:9530d682fd9a 3330 }
dudmuck 18:9530d682fd9a 3331 } else if (c == 3) { // ctrl-C
dudmuck 18:9530d682fd9a 3332 pcbuf_len = -1;
dudmuck 18:9530d682fd9a 3333 } else if (c == '\r') {
dudmuck 18:9530d682fd9a 3334 if (pcbuf_idx == 0) {
dudmuck 18:9530d682fd9a 3335 pcbuf_len = prev_len;
dudmuck 18:9530d682fd9a 3336 } else {
dudmuck 18:9530d682fd9a 3337 pcbuf[pcbuf_idx] = 0; // null terminate
dudmuck 18:9530d682fd9a 3338 prev_len = pcbuf_idx;
dudmuck 18:9530d682fd9a 3339 pcbuf_idx = 0;
dudmuck 18:9530d682fd9a 3340 pcbuf_len = prev_len;
dudmuck 18:9530d682fd9a 3341 }
dudmuck 18:9530d682fd9a 3342 }/* else if (c == SOH) {
dudmuck 18:9530d682fd9a 3343 kermit.uart_rx_enable();
dudmuck 18:9530d682fd9a 3344 }*/ else if (pcbuf_idx < sizeof(pcbuf)) {
dudmuck 18:9530d682fd9a 3345 pcbuf[pcbuf_idx++] = c;
dudmuck 18:9530d682fd9a 3346 pc.putc(c);
dudmuck 5:360069ec9953 3347 }
dudmuck 5:360069ec9953 3348 }
dudmuck 5:360069ec9953 3349 }
dudmuck 5:360069ec9953 3350
dudmuck 0:be215de91a68 3351 int main()
dudmuck 5:360069ec9953 3352 {
dudmuck 5:360069ec9953 3353 #if defined(TARGET_NUCLEO_L152RE) && defined(USE_DEBUGGER)
dudmuck 5:360069ec9953 3354 DBGMCU_Config(DBGMCU_SLEEP, ENABLE);
dudmuck 5:360069ec9953 3355 DBGMCU_Config(DBGMCU_STOP, ENABLE);
dudmuck 5:360069ec9953 3356 DBGMCU_Config(DBGMCU_STANDBY, ENABLE);
dudmuck 5:360069ec9953 3357 #endif
dudmuck 0:be215de91a68 3358
dudmuck 0:be215de91a68 3359 pc.baud(57600);
dudmuck 6:fe16f96ee335 3360 printf("\r\nmain()\r\n");
dudmuck 6:fe16f96ee335 3361
dudmuck 5:360069ec9953 3362 pc.attach(rx_callback);
dudmuck 0:be215de91a68 3363
dudmuck 15:c69b942685ea 3364 #ifndef TARGET_MTS_MDOT_F411RE
dudmuck 15:c69b942685ea 3365 rfsw.input();
dudmuck 15:c69b942685ea 3366 if (rfsw.read()) {
dudmuck 15:c69b942685ea 3367 shield_type = SHIELD_TYPE_LAS;
dudmuck 15:c69b942685ea 3368 printf("LAS\r\n");
dudmuck 15:c69b942685ea 3369 } else {
dudmuck 15:c69b942685ea 3370 shield_type = SHIELD_TYPE_MAS;
dudmuck 15:c69b942685ea 3371 printf("MAS\r\n");
dudmuck 15:c69b942685ea 3372 }
dudmuck 15:c69b942685ea 3373
dudmuck 15:c69b942685ea 3374 rfsw.output();
dudmuck 15:c69b942685ea 3375 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 6:fe16f96ee335 3376 radio.rf_switch.attach(rfsw_callback);
dudmuck 10:d9bb2ce57f05 3377
dudmuck 13:c73caaee93a5 3378 #ifdef FSK_PER
dudmuck 13:c73caaee93a5 3379 fsk.enable(false);
dudmuck 13:c73caaee93a5 3380 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 13:c73caaee93a5 3381 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 13:c73caaee93a5 3382 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 13:c73caaee93a5 3383 radio.write_reg(REG_FSK_SYNCVALUE3, 0x90);
dudmuck 13:c73caaee93a5 3384 radio.write_reg(REG_FSK_SYNCVALUE2, 0x4e);
dudmuck 13:c73caaee93a5 3385 radio.write_reg(REG_FSK_SYNCVALUE1, 0x63);
dudmuck 13:c73caaee93a5 3386
dudmuck 13:c73caaee93a5 3387 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 16:b9d36c60f2d3 3388 fsk.RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 16:b9d36c60f2d3 3389 fsk.RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 16:b9d36c60f2d3 3390 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 13:c73caaee93a5 3391
dudmuck 13:c73caaee93a5 3392 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 13:c73caaee93a5 3393 fsk.RegRxConfig.bits.AfcAutoOn = 1;
dudmuck 16:b9d36c60f2d3 3394 fsk.RegRxConfig.bits.AgcAutoOn = 1;
dudmuck 16:b9d36c60f2d3 3395 fsk.RegRxConfig.bits.RxTrigger = 7;
dudmuck 13:c73caaee93a5 3396 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 13:c73caaee93a5 3397
dudmuck 13:c73caaee93a5 3398 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 13:c73caaee93a5 3399 fsk.set_rx_dcc_bw_hz(41666, 1); // afcbw
dudmuck 13:c73caaee93a5 3400 fsk.set_rx_dcc_bw_hz(20833, 0); // rxbw
dudmuck 13:c73caaee93a5 3401
dudmuck 13:c73caaee93a5 3402 fsk.set_tx_fdev_hz(10000);
dudmuck 13:c73caaee93a5 3403
dudmuck 13:c73caaee93a5 3404 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 13:c73caaee93a5 3405
dudmuck 13:c73caaee93a5 3406 fsk.RegPktConfig2.bits.PayloadLength = 64;
dudmuck 13:c73caaee93a5 3407 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 13:c73caaee93a5 3408
dudmuck 13:c73caaee93a5 3409 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 13:c73caaee93a5 3410 radio.RegDioMapping2.bits.Dio5Mapping = 2; // data output to observation
dudmuck 14:c57ea544dc18 3411 radio.RegDioMapping2.bits.Dio4Mapping = 3; // output preamble detect indication
dudmuck 14:c57ea544dc18 3412 radio.RegDioMapping2.bits.MapPreambleDetect = 1;
dudmuck 13:c73caaee93a5 3413 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 16:b9d36c60f2d3 3414
dudmuck 16:b9d36c60f2d3 3415 RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 16:b9d36c60f2d3 3416 RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 16:b9d36c60f2d3 3417 RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 16:b9d36c60f2d3 3418 write_reg(REG_FSK_PREAMBLEDETECT, RegPreambleDetect.octet);
dudmuck 16:b9d36c60f2d3 3419
dudmuck 13:c73caaee93a5 3420 #endif /* FSK_PER */
dudmuck 10:d9bb2ce57f05 3421
dudmuck 10:d9bb2ce57f05 3422 #ifdef START_EIGER_TX
dudmuck 14:c57ea544dc18 3423 uint8_t addr;
dudmuck 10:d9bb2ce57f05 3424 radio.set_frf_MHz(915.0);
dudmuck 11:81ff5bcafd97 3425
dudmuck 11:81ff5bcafd97 3426 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 11:81ff5bcafd97 3427 radio.RegOcp.bits.OcpTrim = 20;
dudmuck 11:81ff5bcafd97 3428 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 11:81ff5bcafd97 3429
dudmuck 11:81ff5bcafd97 3430 RegPdsTrim1_t pds_trim;
dudmuck 14:c57ea544dc18 3431 if (radio.type == SX1276)
dudmuck 14:c57ea544dc18 3432 addr = REG_PDSTRIM1_SX1276;
dudmuck 14:c57ea544dc18 3433 else
dudmuck 14:c57ea544dc18 3434 addr = REG_PDSTRIM1_SX1272;
dudmuck 14:c57ea544dc18 3435
dudmuck 14:c57ea544dc18 3436 pds_trim.octet = radio.read_reg(addr);
dudmuck 11:81ff5bcafd97 3437 pds_trim.bits.prog_txdac = 7;
dudmuck 14:c57ea544dc18 3438 radio.write_reg(addr, pds_trim.octet);
dudmuck 11:81ff5bcafd97 3439
dudmuck 13:c73caaee93a5 3440 #ifndef FSK_PER
dudmuck 13:c73caaee93a5 3441 lora.enable();
dudmuck 12:beb0387c1b4c 3442 lora.setSf(10);
dudmuck 10:d9bb2ce57f05 3443 if (radio.type == SX1276)
dudmuck 10:d9bb2ce57f05 3444 lora.setBw(7); // 7 == 125khz
dudmuck 13:c73caaee93a5 3445 #endif
dudmuck 10:d9bb2ce57f05 3446
dudmuck 10:d9bb2ce57f05 3447 toggle_per_en();
dudmuck 10:d9bb2ce57f05 3448 PacketTxCnt = 0;
dudmuck 10:d9bb2ce57f05 3449 per_timeout.attach(&per_cb, per_tx_delay);
dudmuck 11:81ff5bcafd97 3450 #endif /* START_EIGER_TX */
dudmuck 10:d9bb2ce57f05 3451
dudmuck 10:d9bb2ce57f05 3452 #ifdef START_EIGER_RX
dudmuck 13:c73caaee93a5 3453
dudmuck 10:d9bb2ce57f05 3454 radio.set_frf_MHz(915.0);
dudmuck 11:81ff5bcafd97 3455 radio.RegPaConfig.bits.PaSelect = 1; // 0: use RFO for sx1276 shield, 1==PA_BOOST
dudmuck 10:d9bb2ce57f05 3456 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 10:d9bb2ce57f05 3457
dudmuck 10:d9bb2ce57f05 3458 toggle_per_en();
dudmuck 10:d9bb2ce57f05 3459 PacketNormalCnt = 0;
dudmuck 10:d9bb2ce57f05 3460 PacketRxSequencePrev = -1;
dudmuck 10:d9bb2ce57f05 3461 PacketPerKoCnt = 0;
dudmuck 13:c73caaee93a5 3462 PacketPerOkCnt = 0;
dudmuck 13:c73caaee93a5 3463
dudmuck 13:c73caaee93a5 3464 #ifndef FSK_PER
dudmuck 13:c73caaee93a5 3465 lora.enable();
dudmuck 13:c73caaee93a5 3466 lora.setSf(10);
dudmuck 13:c73caaee93a5 3467 if (radio.type == SX1276)
dudmuck 13:c73caaee93a5 3468 lora.setBw(7); // 7 == 125khz
dudmuck 10:d9bb2ce57f05 3469 lora.start_rx();
dudmuck 13:c73caaee93a5 3470 #else
dudmuck 13:c73caaee93a5 3471 fsk.start_rx();
dudmuck 14:c57ea544dc18 3472 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 14:c57ea544dc18 3473 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 15:c69b942685ea 3474
dudmuck 15:c69b942685ea 3475 if (radio.HF) {
dudmuck 15:c69b942685ea 3476 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 15:c69b942685ea 3477 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 15:c69b942685ea 3478 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 15:c69b942685ea 3479 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 15:c69b942685ea 3480 }
dudmuck 10:d9bb2ce57f05 3481 #endif
dudmuck 13:c73caaee93a5 3482
dudmuck 15:c69b942685ea 3483 if (radio.HF) {
dudmuck 15:c69b942685ea 3484 radio.RegLna.bits.LnaBoostHF = 3;
dudmuck 15:c69b942685ea 3485 radio.write_reg(REG_LNA, radio.RegLna.octet);
dudmuck 15:c69b942685ea 3486 }
dudmuck 15:c69b942685ea 3487
dudmuck 13:c73caaee93a5 3488 #endif /* START_EIGER_RX */
dudmuck 15:c69b942685ea 3489
dudmuck 15:c69b942685ea 3490 (void)radio.get_frf_MHz();
dudmuck 15:c69b942685ea 3491 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 15:c69b942685ea 3492 if (shield_type == SHIELD_TYPE_LAS) {
dudmuck 15:c69b942685ea 3493 // LAS HF=PA_BOOST LF=RFO
dudmuck 15:c69b942685ea 3494 if (radio.HF)
dudmuck 15:c69b942685ea 3495 radio.RegPaConfig.bits.PaSelect = 1;
dudmuck 15:c69b942685ea 3496 else
dudmuck 15:c69b942685ea 3497 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 15:c69b942685ea 3498 } else if (shield_type == SHIELD_TYPE_MAS) {
dudmuck 15:c69b942685ea 3499 // MAS HF=RFO LF=RFO
dudmuck 15:c69b942685ea 3500 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 15:c69b942685ea 3501 }
dudmuck 15:c69b942685ea 3502 radio.RegPaConfig.bits.OutputPower = 15;
dudmuck 15:c69b942685ea 3503 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 6:fe16f96ee335 3504
dudmuck 0:be215de91a68 3505
dudmuck 0:be215de91a68 3506 while(1) {
dudmuck 0:be215de91a68 3507 switch (app) {
dudmuck 0:be215de91a68 3508 case APP_NONE:
dudmuck 0:be215de91a68 3509 console();
dudmuck 0:be215de91a68 3510 break;
dudmuck 0:be215de91a68 3511 case APP_CHAT:
dudmuck 0:be215de91a68 3512 console_chat();
dudmuck 0:be215de91a68 3513 break;
dudmuck 0:be215de91a68 3514 } // ...switch (app)
dudmuck 5:360069ec9953 3515
dudmuck 5:360069ec9953 3516 #if TARGET_NUCLEO_L152RE
dudmuck 5:360069ec9953 3517 //sleep();
dudmuck 5:360069ec9953 3518 #endif
dudmuck 0:be215de91a68 3519 } // ...while(1)
dudmuck 0:be215de91a68 3520 }
dudmuck 0:be215de91a68 3521