x_nucleo_iks01a2.h

00001 /**
00002   ******************************************************************************
00003   * @file    x_nucleo_iks01a2.h
00004   * @author  MEMS Application Team
00005   * @brief   This file contains definitions for the x_nucleo_iks01a2.c
00006   ******************************************************************************
00007   * @attention
00008   *
00009   * <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
00010   *
00011   * Redistribution and use in source and binary forms, with or without modification,
00012   * are permitted provided that the following conditions are met:
00013   *   1. Redistributions of source code must retain the above copyright notice,
00014   *      this list of conditions and the following disclaimer.
00015   *   2. Redistributions in binary form must reproduce the above copyright notice,
00016   *      this list of conditions and the following disclaimer in the documentation
00017   *      and/or other materials provided with the distribution.
00018   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00019   *      may be used to endorse or promote products derived from this software
00020   *      without specific prior written permission.
00021   *
00022   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00023   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00024   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00025   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00026   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00027   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00028   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00029   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00030   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00031   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00032   *
00033   ******************************************************************************
00034   */
00035 
00036 /* Define to prevent recursive inclusion -------------------------------------*/
00037 #ifndef __X_NUCLEO_IKS01A2_H
00038 #define __X_NUCLEO_IKS01A2_H
00039 
00040 #ifdef __cplusplus
00041 extern "C" {
00042 #endif
00043 
00044 
00045 
00046 /* Includes ------------------------------------------------------------------*/
00047 
00048 #ifdef USE_STM32F4XX_NUCLEO
00049 #include "stm32f4xx_hal.h"
00050 #endif
00051 
00052 #ifdef TARGET_STM32L0
00053 #include "stm32l0xx_hal.h"
00054 #endif
00055 
00056 #ifdef USE_STM32L1XX_NUCLEO
00057 #include "stm32l1xx_hal.h"
00058 #endif
00059 
00060 #ifdef USE_STM32L4XX_NUCLEO
00061 #include "stm32l4xx_hal.h"
00062 #endif
00063 
00064 #ifdef TARGET_STM32L0
00065 #include "stm32l0xx_hal.h"
00066 #endif
00067 
00068 #include "accelerometer.h"
00069 //#include "gyroscope.h"
00070 //#include "magnetometer.h"
00071 //#include "humidity.h"
00072 //#include "temperature.h"
00073 //#include "pressure.h"
00074 
00075 /** @addtogroup BSP BSP
00076  * @{
00077  */
00078 
00079 /** @addtogroup X_NUCLEO_IKS01A2 X_NUCLEO_IKS01A2
00080  * @{
00081  */
00082 
00083 /** @addtogroup X_NUCLEO_IKS01A2_IO IO
00084  * @{
00085  */
00086 
00087 /** @addtogroup X_NUCLEO_IKS01A2_IO_Public_Constants Public constants
00088  * @{
00089  */
00090 
00091 #define IKS01A2_H3LIS331DL_AIS328DQ_AIS3624DQ_WHO_AM_I                (uint8_t)0x32
00092 #define IKS01A2_LSM303AGR_ACC_LIS2DH12_WHO_AM_I                       (uint8_t)0x33
00093 #define IKS01A2_LSM303AGR_MAG_LIS2MDL_IIS2MDC_ISM303DAC_MAG_WHO_AM_I  (uint8_t)0x40
00094 #define IKS01A2_ISM303DAC_ACC_WHO_AM_I                                (uint8_t)0x43
00095 #define IKS01A2_LIS2DW12_IIS2DLPC_WHO_AM_I                            (uint8_t)0x44
00096 #define IKS01A2_LSM6DSL_ISM330DLC_WHO_AM_I                            (uint8_t)0x6A
00097 #define IKS01A2_LSM6DSR_WHO_AM_I                                      (uint8_t)0x6B
00098 #define IKS01A2_LSM6DSO_WHO_AM_I                                      (uint8_t)0x6C
00099 #define IKS01A2_LPS22HB_LPS33HW_WHO_AM_I                              (uint8_t)0xB1
00100 #define IKS01A2_LPS22HH_WHO_AM_I                                      (uint8_t)0xB3
00101 #define IKS01A2_HTS221_WHO_AM_I                                       (uint8_t)0xBC
00102 #define IKS01A2_A3G4250D_WHO_AM_I                                     (uint8_t)0xD3
00103 
00104 /* I2C clock speed configuration (in Hz) */
00105 #if ((defined (USE_STM32F4XX_NUCLEO)) || (defined (USE_STM32L1XX_NUCLEO)))
00106 #define NUCLEO_I2C_EXPBD_SPEED                         400000
00107 #endif /* USE_STM32F4XX_NUCLEO or USE_STM32L1XX_NUCLEO */
00108 
00109 /* Timing samples for L0 with SYSCLK 32MHz set in SystemClock_Config() */
00110 #if (defined (TARGET_STM32L0))
00111 #define NUCLEO_I2C_EXPBD_TIMING_100KHZ       0x10A13E56 /* Analog Filter ON, Rise Time 400ns, Fall Time 100ns */
00112 #define NUCLEO_I2C_EXPBD_TIMING_400KHZ       0x00B1112E /* Analog Filter ON, Rise Time 250ns, Fall Time 100ns */
00113 #endif /* TARGET_STM32L0 */
00114 
00115 /* Timing samples for L4 with SYSCLK 80MHz set in SystemClock_Config() */
00116 #if (defined (USE_STM32L4XX_NUCLEO))
00117 #define NUCLEO_I2C_EXPBD_TIMING_400KHZ       0x10D1143A /* Analog Filter ON, Rise time 250ns, Fall Time 100ns */
00118 #define NUCLEO_I2C_EXPBD_TIMING_1000KHZ      0x00D00E28 /* Analog Filter ON, Rise time 120ns, Fall time 25ns */
00119 #endif /* USE_STM32L4XX_NUCLEO */
00120 
00121 /* I2C peripheral configuration defines */
00122 #define NUCLEO_I2C_EXPBD                            I2C1
00123 #define NUCLEO_I2C_EXPBD_CLK_ENABLE()               __I2C1_CLK_ENABLE()
00124 #define NUCLEO_I2C_EXPBD_SCL_SDA_GPIO_CLK_ENABLE()  __GPIOB_CLK_ENABLE()
00125 #define NUCLEO_I2C_EXPBD_SCL_SDA_AF                 GPIO_AF4_I2C1
00126 #define NUCLEO_I2C_EXPBD_SCL_SDA_GPIO_PORT          GPIOB
00127 #define NUCLEO_I2C_EXPBD_SCL_PIN                    GPIO_PIN_8
00128 #define NUCLEO_I2C_EXPBD_SDA_PIN                    GPIO_PIN_9
00129 
00130 #define NUCLEO_I2C_EXPBD_FORCE_RESET()              __I2C1_FORCE_RESET()
00131 #define NUCLEO_I2C_EXPBD_RELEASE_RESET()            __I2C1_RELEASE_RESET()
00132 
00133 /* I2C interrupt requests */
00134 #if ((defined (USE_STM32F4XX_NUCLEO)) || (defined (USE_STM32L1XX_NUCLEO)) || (defined (USE_STM32L4XX_NUCLEO)))
00135 #define NUCLEO_I2C_EXPBD_EV_IRQn                    I2C1_EV_IRQn
00136 #define NUCLEO_I2C_EXPBD_ER_IRQn                    I2C1_ER_IRQn
00137 #endif
00138 
00139 //#if (defined (TARGET_STM32L0))
00140 #if (defined (TARGET_STM32L0))
00141 #define NUCLEO_I2C_EXPBD_EV_IRQn                    I2C1_IRQn
00142 #endif
00143 
00144 /* Maximum Timeout values for flags waiting loops. These timeouts are not based
00145    on accurate values, they just guarantee that the application will not remain
00146    stuck if the I2C communication is corrupted.
00147    You may modify these timeout values depending on CPU frequency and application
00148    conditions (interrupts routines ...). */
00149 #define NUCLEO_I2C_EXPBD_TIMEOUT_MAX    0x1000 /*<! The value of the maximal timeout for BUS waiting loops */
00150 
00151 /* Definition for interrupt Pins */
00152 #define LPS22H_INT1_O_GPIO_PORT           GPIOB
00153 #define LPS22H_INT1_O_GPIO_CLK_ENABLE()   __GPIOB_CLK_ENABLE()
00154 #define LPS22H_INT1_O_GPIO_CLK_DISABLE()  __GPIOB_CLK_DISABLE()
00155 #define LPS22H_INT1_O_PIN                 GPIO_PIN_10
00156 
00157 #if ((defined (USE_STM32F4XX_NUCLEO)) || (defined (USE_STM32L1XX_NUCLEO)) || (defined (USE_STM32L4XX_NUCLEO)))
00158 #define LPS22H_INT1_O_EXTI_IRQn           EXTI15_10_IRQn
00159 #endif
00160 
00161 #if (defined (TARGET_STM32L0))
00162 #define LPS22H_INT1_O_EXTI_IRQn           EXTI4_15_IRQn
00163 #endif
00164 
00165 #define LSM6DSL_INT1_O_GPIO_PORT           GPIOB
00166 #define LSM6DSL_INT1_O_GPIO_CLK_ENABLE()   __GPIOB_CLK_ENABLE()
00167 #define LSM6DSL_INT1_O_GPIO_CLK_DISABLE()  __GPIOB_CLK_DISABLE()
00168 #define LSM6DSL_INT1_O_PIN                 GPIO_PIN_5
00169 
00170 #if ((defined (USE_STM32F4XX_NUCLEO)) || (defined (USE_STM32L1XX_NUCLEO)) || (defined (USE_STM32L4XX_NUCLEO)))
00171 #define LSM6DSL_INT1_O_EXTI_IRQn           EXTI9_5_IRQn
00172 #endif
00173 
00174 #if (defined (TARGET_STM32L0))
00175 #define LSM6DSL_INT1_O_EXTI_IRQn           EXTI4_15_IRQn
00176 #endif
00177 
00178 #if 0
00179 #define M_INT1_O_GPIO_PORT           GPIOC
00180 #define M_INT1_O_GPIO_CLK_ENABLE()   __GPIOC_CLK_ENABLE()
00181 #define M_INT1_O_GPIO_CLK_DISABLE()  __GPIOC_CLK_DISABLE()
00182 #define M_INT1_O_PIN                 GPIO_PIN_0
00183 #endif /* if 0 */
00184 #define M_INT1_O_GPIO_PORT           GPIOB
00185 #define M_INT1_O_GPIO_CLK_ENABLE()   __GPIOB_CLK_ENABLE()
00186 #define M_INT1_O_GPIO_CLK_DISABLE()  __GPIOB_CLK_DISABLE()
00187 #define M_INT1_O_PIN                 GPIO_PIN_7
00188 
00189 #if ((defined (USE_STM32F4XX_NUCLEO)) || (defined (USE_STM32L1XX_NUCLEO)) || (defined (USE_STM32L4XX_NUCLEO)))
00190 #define M_INT1_O_EXTI_IRQn           EXTI0_IRQn
00191 #endif
00192 
00193 /*
00194 #if (defined (TARGET_STM32L0))
00195 #define M_INT1_O_EXTI_IRQn           EXTI0_1_IRQn
00196 #endif
00197 */
00198 #ifdef TARGET_DISCO_L072CZ_LRWAN1
00199 #define M_INT1_O_EXTI_IRQn           EXTI4_15_IRQn
00200 #endif
00201 
00202 #if 0
00203 #define M_INT2_O_GPIO_PORT           GPIOC
00204 #define M_INT2_O_GPIO_CLK_ENABLE()   __GPIOC_CLK_ENABLE()
00205 #define M_INT2_O_GPIO_CLK_DISABLE()  __GPIOC_CLK_DISABLE()
00206 #define M_INT2_O_PIN                 GPIO_PIN_1
00207 #endif /* if 0 */
00208 #define M_INT2_O_GPIO_PORT           GPIOB
00209 #define M_INT2_O_GPIO_CLK_ENABLE()   __GPIOB_CLK_ENABLE()
00210 #define M_INT2_O_GPIO_CLK_DISABLE()  __GPIOB_CLK_DISABLE()
00211 #define M_INT2_O_PIN                 GPIO_PIN_6
00212 
00213 #if ((defined (USE_STM32F4XX_NUCLEO)) || (defined (USE_STM32L1XX_NUCLEO)) || (defined (USE_STM32L4XX_NUCLEO)))
00214 #define M_INT2_O_EXTI_IRQn           EXTI1_IRQn
00215 #endif
00216 
00217 /*
00218 #if (defined (TARGET_STM32L0))
00219 #define M_INT2_O_EXTI_IRQn           EXTI0_1_IRQn
00220 #endif
00221 */
00222 #ifdef TARGET_DISCO_L072CZ_LRWAN1
00223 #define M_INT2_O_EXTI_IRQn           EXTI4_15_IRQn
00224 #endif
00225 
00226 #define LSM6DSL_INT2_O_GPIO_PORT           GPIOB
00227 #define LSM6DSL_INT2_O_GPIO_CLK_ENABLE()   __GPIOB_CLK_ENABLE()
00228 #define LSM6DSL_INT2_O_GPIO_CLK_DISABLE()  __GPIOB_CLK_DISABLE()
00229 #define LSM6DSL_INT2_O_PIN                 GPIO_PIN_4
00230 
00231 #if ((defined (USE_STM32F4XX_NUCLEO)) || (defined (USE_STM32L1XX_NUCLEO)) || (defined (USE_STM32L4XX_NUCLEO)))
00232 #define LSM6DSL_INT2_O_EXTI_IRQn           EXTI4_IRQn
00233 #endif
00234 
00235 #if (defined (TARGET_STM32L0))
00236 #define LSM6DSL_INT2_O_EXTI_IRQn           EXTI4_15_IRQn
00237 #endif
00238 
00239 // ready for use
00240 #define USER_INT_O_GPIO_PORT           GPIOA
00241 #define USER_INT_O_GPIO_CLK_ENABLE()   __GPIOA_CLK_ENABLE()
00242 #define USER_INT_O_GPIO_CLK_DISABLE()  __GPIOA_CLK_DISABLE()
00243 #define USER_INT_O_PIN                 GPIO_PIN_10
00244 
00245 #if ((defined (USE_STM32F4XX_NUCLEO)) || (defined (USE_STM32L1XX_NUCLEO)) || (defined (USE_STM32L4XX_NUCLEO)))
00246 #define USER_INT_O_EXTI_IRQn           EXTI15_10_IRQn
00247 #endif
00248 
00249 #if (defined (TARGET_STM32L0))
00250 #define USER_INT_O_EXTI_IRQn           EXTI4_15_IRQn
00251 #endif
00252 
00253 // ready for use
00254 #define LSM303AGR_DRDY_O_GPIO_PORT           GPIOA
00255 #define LSM303AGR_DRDY_O_GPIO_CLK_ENABLE()   __GPIOA_CLK_ENABLE()
00256 #define LSM303AGR_DRDY_O_GPIO_CLK_DISABLE()  __GPIOA_CLK_DISABLE()
00257 #define LSM303AGR_DRDY_O_PIN                 GPIO_PIN_4
00258 
00259 #if ((defined (USE_STM32F4XX_NUCLEO)) || (defined (USE_STM32L1XX_NUCLEO)) || (defined (USE_STM32L4XX_NUCLEO)))
00260 #define LSM303AGR_DRDY_O_EXTI_IRQn           EXTI4_IRQn
00261 #endif
00262 
00263 #if (defined (TARGET_STM32L0))
00264 #define LSM303AGR_DRDY_O_EXTI_IRQn           EXTI4_15_IRQn
00265 #endif
00266 
00267 // ready for use
00268 #define LSM303AGR_INT_O_GPIO_PORT           GPIOB
00269 #define LSM303AGR_INT_O_GPIO_CLK_ENABLE()   __GPIOB_CLK_ENABLE()
00270 #define LSM303AGR_INT_O_GPIO_CLK_DISABLE()  __GPIOB_CLK_DISABLE()
00271 #define LSM303AGR_INT_O_PIN                 GPIO_PIN_0
00272 
00273 #if ((defined (USE_STM32F4XX_NUCLEO)) || (defined (USE_STM32L1XX_NUCLEO)) || (defined (USE_STM32L4XX_NUCLEO)))
00274 #define LSM303AGR_INT_O_EXTI_IRQn           EXTI0_IRQn
00275 #endif
00276 
00277 #if (defined (TARGET_STM32L0))
00278 #define LSM303AGR_INT_O_EXTI_IRQn           EXTI0_1_IRQn
00279 #endif
00280 
00281 /**
00282   * @}
00283   */
00284 
00285 /** @addtogroup X_NUCLEO_IKS01A2_IO_Public_FunctionPrototypes Public function prototypes
00286  * @{
00287  */
00288 
00289 DrvStatusTypeDef Sensor_IO_Init(void);
00290 DrvStatusTypeDef LSM6DSL_Sensor_IO_ITConfig(void);
00291 DrvStatusTypeDef LPS22HB_Sensor_IO_ITConfig(void);
00292 DrvStatusTypeDef LSM303AGR_Sensor_IO_ITConfig(void);
00293 DrvStatusTypeDef DIL24_Sensor_IO_ITConfig(void);
00294 
00295 /**
00296   * @}
00297   */
00298 
00299 /**
00300   * @}
00301   */
00302 
00303 /**
00304   * @}
00305   */
00306 
00307 /**
00308   * @}
00309   */
00310 
00311 #ifdef __cplusplus
00312 }
00313 #endif
00314 
00315 #endif /* __X_NUCLEO_IKS01A2_H */
00316 
00317 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/