FXOS8700CQ.h

00001 #ifndef FXOS8700CQ_H
00002 #define FXOS8700CQ_H
00003 
00004 #include "mbed.h" // Building this for the mbed platform
00005 
00006 #define I2C_400K 400000
00007 
00008 // FXOS8700CQ I2C address
00009 #define FXOS8700CQ_SLAVE_ADDR0 (0x1E<<1) // with pins SA0=0, SA1=0
00010 #define FXOS8700CQ_SLAVE_ADDR1 (0x1D<<1) // with pins SA0=1, SA1=0
00011 #define FXOS8700CQ_SLAVE_ADDR2 (0x1C<<1) // with pins SA0=0, SA1=1
00012 #define FXOS8700CQ_SLAVE_ADDR3 (0x1F<<1) // with pins SA0=1, SA1=1
00013 
00014 // FXOS8700CQ internal register addresses
00015 #define FXOS8700CQ_STATUS 0x00
00016 #define FXOS8700CQ_OUT_X_MSB 0x01
00017 #define FXOS8700CQ_WHOAMI 0x0D
00018 #define FXOS8700CQ_M_OUT_X_MSB 0x33
00019 
00020 #define FXOS8700CQ_XYZ_DATA_CFG 0x0E
00021 
00022 #define FXOS8700CQ_CTRL_REG1 0x2A
00023 #define FXOS8700CQ_CTRL_REG2 0x2B
00024 #define FXOS8700CQ_CTRL_REG3 0x2C
00025 #define FXOS8700CQ_CTRL_REG4 0x2D
00026 #define FXOS8700CQ_CTRL_REG5 0x2E
00027 
00028 #define FXOS8700CQ_M_CTRL_REG1 0x5B
00029 #define FXOS8700CQ_M_CTRL_REG2 0x5C
00030 #define FXOS8700CQ_M_CTRL_REG3 0x5D
00031 
00032 // FXOS8700CQ configuration macros, per register
00033 
00034 #define FXOS8700CQ_CTRL_REG1_ASLP_RATE2(x) (x << 6) // x is 2-bit
00035 #define FXOS8700CQ_CTRL_REG1_DR3(x) (x << 3) // x is 3-bit
00036 #define FXOS8700CQ_CTRL_REG1_LNOISE (1 << 2)
00037 #define FXOS8700CQ_CTRL_REG1_F_READ (1 << 1)
00038 #define FXOS8700CQ_CTRL_REG1_ACTIVE (1 << 0)
00039 
00040 #define FXOS8700CQ_CTRL_REG2_ST (1 << 7)
00041 #define FXOS8700CQ_CTRL_REG2_RST (1 << 6)
00042 #define FXOS8700CQ_CTRL_REG2_SMODS2(x) (x << 3) // x is 2-bit
00043 #define FXOS8700CQ_CTRL_REG2_SLPE (1 << 2)
00044 #define FXOS8700CQ_CTRL_REG2_MODS2(x) (x << 0) // x is 2-bit
00045 
00046 #define FXOS8700CQ_CTRL_REG3_FIFO_GATE (1 << 7)
00047 #define FXOS8700CQ_CTRL_REG3_WAKE_TRANS (1 << 6)
00048 #define FXOS8700CQ_CTRL_REG3_WAKE_LNDPRT (1 << 5)
00049 #define FXOS8700CQ_CTRL_REG3_WAKE_PULSE (1 << 4)
00050 #define FXOS8700CQ_CTRL_REG3_WAKE_FFMT (1 << 3)
00051 #define FXOS8700CQ_CTRL_REG3_WAKE_A_VECM (1 << 2)
00052 #define FXOS8700CQ_CTRL_REG3_IPOL (1 << 1)
00053 #define FXOS8700CQ_CTRL_REG3_PP_OD (1 << 0)
00054 
00055 #define FXOS8700CQ_CTRL_REG4_INT_EN_ASLP (1 << 7)
00056 #define FXOS8700CQ_CTRL_REG4_INT_EN_FIFO (1 << 6)
00057 #define FXOS8700CQ_CTRL_REG4_INT_EN_TRANS (1 << 5)
00058 #define FXOS8700CQ_CTRL_REG4_INT_EN_LNDPRT (1 << 4)
00059 #define FXOS8700CQ_CTRL_REG4_INT_EN_PULSE (1 << 3)
00060 #define FXOS8700CQ_CTRL_REG4_INT_EN_FFMT (1 << 2)
00061 #define FXOS8700CQ_CTRL_REG4_INT_EN_A_VECM (1 << 1)
00062 #define FXOS8700CQ_CTRL_REG4_INT_EN_DRDY (1 << 0)
00063 
00064 #define FXOS8700CQ_CTRL_REG5_INT_CFG_ASLP (1 << 7)
00065 #define FXOS8700CQ_CTRL_REG5_INT_CFG_FIFO (1 << 6)
00066 #define FXOS8700CQ_CTRL_REG5_INT_CFG_TRANS (1 << 5)
00067 #define FXOS8700CQ_CTRL_REG5_INT_CFG_LNDPRT (1 << 4)
00068 #define FXOS8700CQ_CTRL_REG5_INT_CFG_PULSE (1 << 3)
00069 #define FXOS8700CQ_CTRL_REG5_INT_CFG_FFMT (1 << 2)
00070 #define FXOS8700CQ_CTRL_REG5_INT_CFG_A_VECM (1 << 1)
00071 #define FXOS8700CQ_CTRL_REG5_INT_CFG_DRDY (1 << 0)
00072 
00073 #define FXOS8700CQ_XYZ_DATA_CFG_HPF_OUT (1 << 4)
00074 #define FXOS8700CQ_XYZ_DATA_CFG_FS2(x) (x << 0) // x is 2-bit
00075 
00076 #define FXOS8700CQ_M_CTRL_REG1_M_ACAL (1 << 7)
00077 #define FXOS8700CQ_M_CTRL_REG1_M_RST (1 << 6)
00078 #define FXOS8700CQ_M_CTRL_REG1_M_OST (1 << 5)
00079 #define FXOS8700CQ_M_CTRL_REG1_MO_OS3(x) (x << 2) // x is 3-bit
00080 #define FXOS8700CQ_M_CTRL_REG1_M_HMS2(x) (x << 0) // x is 2-bit
00081 
00082 #define FXOS8700CQ_M_CTRL_REG2_HYB_AUTOINC_MODE (1 << 5)
00083 #define FXOS8700CQ_M_CTRL_REG2_M_MAXMIN_DIS (1 << 4)
00084 #define FXOS8700CQ_M_CTRL_REG2_M_MAXMIN_DIS_THS (1 << 3)
00085 #define FXOS8700CQ_M_CTRL_REG2_M_MAXMIN_RST (1 << 2)
00086 #define FXOS8700CQ_M_CTRL_REG2_M_RST_CNT2(x) (x << 0) // x is 2-bit
00087 
00088 #define FXOS8700CQ_M_CTRL_REG3_M_RAW (1 << 7)
00089 #define FXOS8700CQ_M_CTRL_REG3_M_ASLP_OS3(x) (x << 4) // x is 3-bit
00090 #define FXOS8700CQ_M_CTRL_REG3_M_THS_XYZ_UPDATE (1 << 3)
00091 #define FXOS8700CQ_M_CTRL_REG3_M_ST_Z (1 << 2)
00092 #define FXOS8700CQ_M_CTRL_REG3_M_ST_XY2(x) (x << 0) // x is 2-bit
00093 
00094 // FXOS8700CQ WHOAMI production register value
00095 #define FXOS8700CQ_WHOAMI_VAL 0xC7
00096 
00097 // 6 channels of two bytes = 12 bytes; read from FXOS8700CQ_OUT_X_MSB
00098 #define FXOS8700CQ_READ_LEN 12
00099 
00100 // For processing the accelerometer data to right-justified 2's complement
00101 #define UINT14_MAX 16383
00102 
00103 
00104 typedef union {
00105     struct {
00106         int16_t acc_x;
00107         int16_t acc_y;
00108         int16_t acc_z;
00109         int16_t mag_x;
00110         int16_t mag_y;
00111         int16_t mag_z;
00112     } __attribute__ ((packed)) s;
00113     int16_t v[6];
00114 } FXOSData_t;
00115 
00116 /**
00117 * A driver on top of mbed-I2C to operate the FXOS8700CQ accelerometer/magnetometer
00118 * on the FRDM-K64F.
00119 *
00120 * Code has been completed, but likely not optimized and potentially buggy.
00121 */
00122 class FXOS8700CQ
00123 {
00124 public:
00125     /**
00126     * FXOS8700CQ constructor
00127     *
00128     * @param sda SDA pin
00129     * @param sdl SCL pin
00130     * @param addr address of the I2C peripheral in (7-bit << 1) form
00131     */
00132     FXOS8700CQ (PinName sda, PinName scl, int addr);
00133 
00134     /**
00135     * FXOS8700CQ destructor
00136     */
00137     ~FXOS8700CQ (void);
00138 
00139     void enable (void);
00140     void disable (void);
00141 
00142     /**
00143     * @return the contents of device register FXOS8700CQ_WHOAMI 0x0D,
00144     * should be FXOS8700CQ_WHOAMI_VAL 0xC7
00145     */
00146     uint8_t get_whoami (void);
00147     
00148     /**
00149     * @return the contents of device register FXOS8700CQ_STATUS 0x00
00150     */
00151     uint8_t status (void);
00152 
00153     /**
00154     * Data retrieval from the FXOS8700CQ
00155     *
00156     * @param accel_data destination XYZ accelerometer data struct
00157     * @param magn_data destination XYZ magnetometer data struct
00158     * @return 0 on success, non-zero on failure
00159     */
00160     uint8_t get_data (FXOSData_t *data);
00161 
00162     /**
00163     * Retrieve the full-range scale value of the accelerometer
00164     *
00165     * @return 2, 4, or 8, depending on part configuration; 0 on error
00166     */
00167     uint8_t get_accel_scale (void);
00168 
00169 
00170 
00171 private:
00172     I2C dev_i2c; // instance of the mbed I2C class
00173     uint8_t dev_addr; // Device I2C address, in (7-bit << 1) form
00174     bool enabled; // keep track of enable bit of device
00175 
00176     // I2C helper methods
00177     void read_regs(int reg_addr, uint8_t* data, int len);
00178     void write_regs(uint8_t* data, int len);
00179 
00180 };
00181 
00182 #endif