Anh Tran
test public
Dependencies: HttpServer_snapshot_mbed-os
Embed:
(wiki syntax)
Show/hide line numbers
DisplayBase.cpp
00001 /******************************************************************************* 00002 * DISCLAIMER 00003 * This software is supplied by Renesas Electronics Corporation and is only 00004 * intended for use with Renesas products. No other uses are authorized. This 00005 * software is owned by Renesas Electronics Corporation and is protected under 00006 * all applicable laws, including copyright laws. 00007 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING 00008 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT 00009 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE 00010 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. 00011 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS 00012 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE 00013 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR 00014 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE 00015 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 00016 * Renesas reserves the right, without notice, to make changes to this software 00017 * and to discontinue the availability of this software. By using this software, 00018 * you agree to the additional terms and conditions found by accessing the 00019 * following link: 00020 * http://www.renesas.com/disclaimer 00021 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved. 00022 *******************************************************************************/ 00023 #include <string.h> 00024 #include "DisplayBace.h" 00025 #include "gr_board_vdc5.h" 00026 00027 /**************************************************************************//** 00028 * @brief Constructor of the DisplayBase class 00029 * @param[in] None 00030 * @retval None 00031 ******************************************************************************/ 00032 DisplayBase::DisplayBase( void ) 00033 { 00034 /* Lcd setting (default) */ 00035 _lcd_config.lcd_type = LCD_TYPE_PARALLEL_RGB ; /* LVDS or Pararel RGB */ 00036 _lcd_config.intputClock = 66.67f; /* P1 clk [MHz] ex. 66.67 */ 00037 _lcd_config.outputClock = 40.00f; /* LCD clk [MHz] ex. 33.33 */ 00038 00039 _lcd_config.lcd_outformat = LCD_OUTFORMAT_RGB888 ; /* Output format select */ 00040 _lcd_config.lcd_edge = EDGE_FALLING ; /* Output phase control of LCD_DATA23 to LCD_DATA0 pin */ 00041 00042 _lcd_config.h_toatal_period = (800u + 40u + 128u+ 88u); /* Free-running Hsync period */ 00043 _lcd_config.v_toatal_period = (600u + 1u + 4u + 23u); /* Free-running Vsync period */ 00044 _lcd_config.h_disp_widht = 800u; /* LCD display area size, horizontal width */ 00045 _lcd_config.v_disp_widht = 600u; /* LCD display area size, vertical width */ 00046 _lcd_config.h_back_porch = (128u+ 88u); /* LCD display horizontal back porch period */ 00047 _lcd_config.v_back_porch = (4u + 23u); /* LCD display vertical back porch period */ 00048 00049 _lcd_config.h_sync_port = LCD_TCON_PIN_0 ; /* TCONn or Not use(-1) */ 00050 _lcd_config.h_sync_port_polarity = SIG_POL_NOT_INVERTED ; /* Polarity inversion control of signal */ 00051 _lcd_config.h_sync_width = 128u; /* Hsync width */ 00052 00053 _lcd_config.v_sync_port = LCD_TCON_PIN_1 ; /* TCONn or Not use(-1) */ 00054 _lcd_config.v_sync_port_polarity = SIG_POL_NOT_INVERTED ; /* Polarity inversion control of signal */ 00055 _lcd_config.v_sync_width = 4u; /* Vsync width */ 00056 00057 _lcd_config.de_port = LCD_TCON_PIN_NON ; /* TCONn or Not use(-1) */ 00058 _lcd_config.de_port_polarity = SIG_POL_NOT_INVERTED ; /* Polarity inversion control of signal */ 00059 00060 /* Digital video input setting (default) */ 00061 _video_input_sel = INPUT_SEL_VDEC ; /* Video decoder output signals */ 00062 _video_ext_in_config.inp_format = VIDEO_EXTIN_FORMAT_BT601 ; 00063 _video_ext_in_config.inp_pxd_edge = EDGE_RISING ; /* Clock edge select for capturing data */ 00064 _video_ext_in_config.inp_vs_edge = EDGE_RISING ; /* Clock edge select for capturing Vsync signals */ 00065 _video_ext_in_config.inp_hs_edge = EDGE_RISING ; /* Clock edge select for capturing Hsync signals */ 00066 _video_ext_in_config.inp_endian_on = OFF ; /* External input bit endian change on/off */ 00067 _video_ext_in_config.inp_swap_on = OFF ; /* External input B/R signal swap on/off */ 00068 _video_ext_in_config.inp_vs_inv = SIG_POL_NOT_INVERTED ; /* External input DV_VSYNC inversion control */ 00069 _video_ext_in_config.inp_hs_inv = SIG_POL_INVERTED ; /* External input DV_HSYNC inversion control */ 00070 _video_ext_in_config.inp_f525_625 = EXTIN_LINE_525 ; /* Number of lines for BT.656 external input */ 00071 _video_ext_in_config.inp_h_pos = EXTIN_H_POS_CRYCBY ; /* Y/Cb/Y/Cr data string start timing to Hsync reference */ 00072 _video_ext_in_config.cap_vs_pos = 6u; /* Capture start position from Vsync */ 00073 _video_ext_in_config.cap_hs_pos = 302u; /* Capture start position form Hsync */ 00074 _video_ext_in_config.cap_width = 640u; /* Capture width */ 00075 _video_ext_in_config.cap_height = 468u; /* Capture height should be a multiple of 4 */ 00076 00077 #if defined(TARGET_RZ_A2XX) 00078 /* mipi */ 00079 _video_mipi_config.mipi_lanenum = 2; 00080 _video_mipi_config.mipi_vc = 0; 00081 _video_mipi_config.mipi_interlace = 0; 00082 _video_mipi_config.mipi_laneswap = 0; /* Progressive */ 00083 _video_mipi_config.mipi_frametop = 0; 00084 _video_mipi_config.mipi_outputrate = 80; 00085 00086 _video_mipi_config.mipi_phy_timing.mipi_ths_prepare = 0x00000012u; 00087 _video_mipi_config.mipi_phy_timing.mipi_ths_settle = 0x00000019u; 00088 _video_mipi_config.mipi_phy_timing.mipi_tclk_prepare = 0x0000000Fu; 00089 _video_mipi_config.mipi_phy_timing.mipi_tclk_settle = 0x0000001Eu; 00090 _video_mipi_config.mipi_phy_timing.mipi_tclk_miss = 0x00000008u; 00091 _video_mipi_config.mipi_phy_timing.mipi_t_init_slave = 0x0000338Fu; 00092 00093 memset(&_video_vin_setup, 0, sizeof(_video_vin_setup)); 00094 #endif 00095 } /* End of constructor method () */ 00096 00097 /**************************************************************************//** 00098 * @brief Graphics initialization processing 00099 * @param[in] lcd_config : LCD configuration 00100 * @retval error code 00101 ******************************************************************************/ 00102 DisplayBase::graphics_error_t 00103 DisplayBase::Graphics_init( const lcd_config_t * lcd_config ) 00104 { 00105 if( lcd_config != NULL ) { 00106 _lcd_config.lcd_type = lcd_config->lcd_type ; /* LVDS or Pararel RGB */ 00107 _lcd_config.intputClock = lcd_config->intputClock ; /* P1 clk [MHz] ex. 66.67 */ 00108 _lcd_config.outputClock = lcd_config->outputClock ; /* LCD clk [MHz] ex. 33.33 */ 00109 00110 _lcd_config.lcd_outformat = lcd_config->lcd_outformat ; /* Output format select */ 00111 _lcd_config.lcd_edge = lcd_config->lcd_edge ; /* Output phase control of LCD_DATA23 to LCD_DATA0 pin */ 00112 00113 _lcd_config.h_toatal_period = lcd_config->h_toatal_period ; /* Free-running Hsync period */ 00114 _lcd_config.v_toatal_period = lcd_config->v_toatal_period ; /* Free-running Vsync period */ 00115 _lcd_config.h_disp_widht = lcd_config->h_disp_widht ; /* LCD display area size, horizontal width */ 00116 _lcd_config.v_disp_widht = lcd_config->v_disp_widht ; /* LCD display area size, vertical width */ 00117 _lcd_config.h_back_porch = lcd_config->h_back_porch ; /* LCD display horizontal back porch period */ 00118 _lcd_config.v_back_porch = lcd_config->v_back_porch ; /* LCD display vertical back porch period */ 00119 00120 _lcd_config.h_sync_port = lcd_config->h_sync_port ; /* TCONn or Not use(-1) */ 00121 _lcd_config.h_sync_port_polarity = lcd_config->h_sync_port_polarity ;/* Polarity inversion control of signal */ 00122 _lcd_config.h_sync_width = lcd_config->h_sync_width ; /* Hsync width */ 00123 00124 _lcd_config.v_sync_port = lcd_config->v_sync_port ; /* TCONn or Not use(-1) */ 00125 _lcd_config.v_sync_port_polarity = lcd_config->v_sync_port_polarity ;/* Polarity inversion control of signal */ 00126 _lcd_config.v_sync_width = lcd_config->v_sync_width ; /* Vsync width */ 00127 00128 _lcd_config.de_port = lcd_config->de_port ; /* TCONn or Not use(-1) */ 00129 _lcd_config.de_port_polarity = lcd_config->de_port_polarity ; /* Polarity inversion control of signal */ 00130 } 00131 00132 return (graphics_error_t)DRV_Graphics_Init( (drv_lcd_config_t *)&_lcd_config ); 00133 } /* End of method Graphics_init() */ 00134 00135 /**************************************************************************//** 00136 * @brief Graphics Video initialization processing 00137 * @param[in] video_input_sel : Input select 00138 * @param[in] video_ext_in_config : Digtal video input configuration 00139 * @retval error code 00140 ******************************************************************************/ 00141 DisplayBase::graphics_error_t 00142 DisplayBase::Graphics_Video_init( video_input_sel_t video_input_sel, video_ext_in_config_t * video_ext_in_config ) 00143 { 00144 graphics_error_t error; 00145 00146 if ((video_input_sel == INPUT_SEL_EXT ) 00147 || (video_input_sel == INPUT_SEL_CEU )) { 00148 _video_input_sel = video_input_sel; 00149 00150 if (video_ext_in_config != NULL) { 00151 /* Signals supplied via the external input pins */ 00152 /* if using Video decoder output signals, not using value. */ 00153 _video_ext_in_config.inp_format = video_ext_in_config->inp_format ; 00154 _video_ext_in_config.inp_pxd_edge = video_ext_in_config->inp_pxd_edge ; 00155 _video_ext_in_config.inp_vs_edge = video_ext_in_config->inp_vs_edge ; 00156 _video_ext_in_config.inp_hs_edge = video_ext_in_config->inp_hs_edge ; 00157 _video_ext_in_config.inp_endian_on = video_ext_in_config->inp_endian_on ; 00158 _video_ext_in_config.inp_swap_on = video_ext_in_config->inp_swap_on ; 00159 _video_ext_in_config.inp_vs_inv = video_ext_in_config->inp_vs_inv ; 00160 _video_ext_in_config.inp_hs_inv = video_ext_in_config->inp_hs_inv ; 00161 _video_ext_in_config.inp_f525_625 = video_ext_in_config->inp_f525_625 ; 00162 _video_ext_in_config.inp_h_pos = video_ext_in_config->inp_h_pos ; 00163 _video_ext_in_config.cap_vs_pos = video_ext_in_config->cap_vs_pos ; 00164 _video_ext_in_config.cap_hs_pos = video_ext_in_config->cap_hs_pos ; 00165 _video_ext_in_config.cap_width = video_ext_in_config->cap_width ; 00166 _video_ext_in_config.cap_height = video_ext_in_config->cap_height ; 00167 } 00168 error = (graphics_error_t)DRV_Graphics_Video_init( (drv_video_input_sel_t )video_input_sel, 00169 (drv_video_ext_in_config_t *)&_video_ext_in_config ); 00170 } else { 00171 error = GRAPHICS_PARAM_RANGE_ERR ; 00172 } 00173 00174 return error; 00175 } /* End of method Graphics_Video_init() */ 00176 00177 /**************************************************************************//** 00178 * @brief Graphics Video initialization processing 00179 * @param[in] video_input_sel : Input select 00180 * @param[in] video_mipi_config : MIPI configuration 00181 * @param[in] video_vin_setup : MIPI configuration 00182 * @retval error code 00183 ******************************************************************************/ 00184 DisplayBase::graphics_error_t 00185 DisplayBase::Graphics_Video_init( video_input_sel_t video_input_sel, video_mipi_param_t * video_mipi_config, video_vin_setup_t * video_vin_setup ) 00186 { 00187 graphics_error_t error = GRAPHICS_VDC5_ERR ; 00188 00189 #if defined(TARGET_RZ_A2XX) 00190 if (video_input_sel == INPUT_SEL_MIPI ) { 00191 _video_input_sel = video_input_sel; 00192 00193 if (video_mipi_config != NULL) { 00194 memcpy(&_video_mipi_config, video_mipi_config, sizeof(_video_mipi_config)); 00195 } 00196 if (video_vin_setup != NULL) { 00197 memcpy(&_video_vin_setup, video_vin_setup, sizeof(_video_vin_setup)); 00198 } 00199 error = (graphics_error_t)DRV_Graphics_Video_init( (drv_video_input_sel_t )video_input_sel, 00200 (drv_video_ext_in_config_t *)&_video_ext_in_config ); 00201 } else { 00202 error = GRAPHICS_PARAM_RANGE_ERR ; 00203 } 00204 #endif 00205 00206 return error; 00207 } /* End of method Graphics_Video_init() */ 00208 00209 /**************************************************************************//** 00210 * @brief LCD I/O initialization processing 00211 * @param[in] pin : Pointer of the pin assignment 00212 * @param[in] pin_count : Total number of the pin assignment 00213 * @retval error code 00214 ******************************************************************************/ 00215 DisplayBase::graphics_error_t 00216 DisplayBase::Graphics_Lcd_Port_Init( PinName *pin, unsigned int pin_count ) 00217 { 00218 return (graphics_error_t)DRV_Graphics_Lcd_Port_Init( pin, pin_count ); 00219 } /* End of method Graphics_Lcd_Port_Init() */ 00220 00221 /**************************************************************************//** 00222 * @brief LVDS I/O port initialization processing 00223 * @param[in] pin : Pointer of the pin assignment 00224 * @param[in] pin_count : Total number of the pin assignment 00225 * @retval error code 00226 ******************************************************************************/ 00227 DisplayBase::graphics_error_t 00228 DisplayBase::Graphics_Lvds_Port_Init( PinName *pin, unsigned int pin_count ) 00229 { 00230 return (graphics_error_t)DRV_Graphics_Lvds_Port_Init( pin, pin_count ); 00231 } /* End of method Graphics_Lvds_Port_Init() */ 00232 00233 /**************************************************************************//** 00234 * @brief Digital video input I/O port initialization processing 00235 * @param[in] pin : Pointer of the pin assignment 00236 * @param[in] pin_count : Total number of the pin assignment 00237 * @retval error code 00238 ******************************************************************************/ 00239 DisplayBase::graphics_error_t 00240 DisplayBase::Graphics_Dvinput_Port_Init( PinName *pin, unsigned int pin_count ) 00241 { 00242 return (graphics_error_t)DRV_Graphics_Dvinput_Port_Init( pin, pin_count ); 00243 } /* End of method Graphics_Dvinput_Port_Init() */ 00244 00245 /**************************************************************************//** 00246 * @brief CEU input I/O port initialization processing 00247 * @param[in] pin : Pointer of the pin assignment 00248 * @param[in] pin_count : Total number of the pin assignment 00249 * @retval error code 00250 ******************************************************************************/ 00251 DisplayBase::graphics_error_t 00252 DisplayBase::Graphics_Ceu_Port_Init( PinName *pin, unsigned int pin_count ) 00253 { 00254 return (graphics_error_t)DRV_Graphics_CEU_Port_Init( pin, pin_count ); 00255 } /* End of method Graphics_Ceu_Port_Init() */ 00256 00257 /**************************************************************************//** 00258 * @brief IRQ interrupt handler setting 00259 * @param[in] irq : VDC5 interrupt type 00260 * @param[in] num : Interrupt line number 00261 * @param[in] * callback : Interrupt callback function pointer 00262 * @retval error code 00263 ******************************************************************************/ 00264 DisplayBase::graphics_error_t 00265 DisplayBase::Graphics_Irq_Handler_Set( int_type_t irq, unsigned short num, void (* callback)(int_type_t) ) 00266 { 00267 return (graphics_error_t)DRV_Graphics_Irq_Handler_Set( (vdc5_int_type_t)irq, num, (void (*)(vdc5_int_type_t))callback ); 00268 } /* End of method Graphics_Irq_Handler_Set() */ 00269 00270 /**************************************************************************//** 00271 * @brief Graphics surface read start processing 00272 * @param[in] layer_id : Graphics layer ID 00273 * @retval error code 00274 ******************************************************************************/ 00275 DisplayBase::graphics_error_t 00276 DisplayBase::Graphics_Start( graphics_layer_t layer_id ) 00277 { 00278 return (graphics_error_t)DRV_Graphics_Start( (drv_graphics_layer_t)layer_id ); 00279 } /* End of method Graphics_Start() */ 00280 00281 /**************************************************************************//** 00282 * @brief Graphics surface read stop processing 00283 * @param[in] layer_id : Graphics layer ID 00284 * @retval error code 00285 ******************************************************************************/ 00286 DisplayBase::graphics_error_t 00287 DisplayBase::Graphics_Stop( graphics_layer_t layer_id ) 00288 { 00289 return (graphics_error_t)DRV_Graphics_Stop( (drv_graphics_layer_t)layer_id ); 00290 } /* End of method Graphics_Stop() */ 00291 00292 /**************************************************************************//** 00293 * @brief Video surface write start processing 00294 * @param[in] video_input_channel : Video input channel 00295 * @retval error code 00296 ******************************************************************************/ 00297 DisplayBase::graphics_error_t 00298 DisplayBase::Video_Start( video_input_channel_t video_input_channel ) 00299 { 00300 graphics_error_t error = GRAPHICS_OK ; 00301 00302 /* Digital video inputs : supporting video_input_channel 0 only. */ 00303 if( _video_input_sel == INPUT_SEL_EXT && video_input_channel == VIDEO_INPUT_CHANNEL_1 ) { 00304 error = GRAPHICS_PARAM_RANGE_ERR ; 00305 } 00306 00307 if( error == GRAPHICS_OK ) { 00308 error = (graphics_error_t)DRV_Video_Start( (drv_video_input_channel_t)video_input_channel ); 00309 } 00310 return error; 00311 } /* End of method Video_Start() */ 00312 00313 /**************************************************************************//** 00314 * @brief Video surface write stop processing 00315 * @param[in] video_input_channel : Video input channel 00316 * @retval error code 00317 ******************************************************************************/ 00318 DisplayBase::graphics_error_t 00319 DisplayBase::Video_Stop( video_input_channel_t video_input_channel ) 00320 { 00321 graphics_error_t error = GRAPHICS_OK ; 00322 00323 /* Digital video inputs : supporting video_input_channel 0 only. */ 00324 if( _video_input_sel == INPUT_SEL_EXT && video_input_channel == VIDEO_INPUT_CHANNEL_1 ) { 00325 error = GRAPHICS_PARAM_RANGE_ERR ; 00326 } 00327 00328 if( error == GRAPHICS_OK ) { 00329 error = (graphics_error_t)DRV_Video_Stop( 00330 (drv_video_input_channel_t)video_input_channel ); 00331 } 00332 return error; 00333 } /* End of method Video_Stop() */ 00334 00335 /**************************************************************************//** 00336 * @brief Graphics surface read process setting 00337 * 00338 * Description:<br> 00339 * This function supports the following 4 image format. 00340 * YCbCr422, RGB565, RGB888, ARGB8888 00341 * @param[in] layer_id : Graphics layer ID 00342 * @param[in] framebuff : Base address of the frame buffer 00343 * @param[in] fb_stride : Line offset address of the frame buffer 00344 * @param[in] gr_format : Format of the frame buffer read signal 00345 * @param[in] wr_rd_swa : frame buffer swap setting 00346 * - WR_RD_WRSWA_NON : Not swapped: 1-2-3-4-5-6-7-8 00347 * - WR_RD_WRSWA_8BIT : Swapped in 8-bit units: 2-1-4-3-6-5-8-7 00348 * - WR_RD_WRSWA_16BIT : Swapped in 16-bit units: 3-4-1-2-7-8-5-6 00349 * - WR_RD_WRSWA_16_8BIT : Swapped in 16-bit units + 8-bit units: 4-3-2-1-8-7-6-5 00350 * - WR_RD_WRSWA_32BIT : Swapped in 32-bit units: 5-6-7-8-1-2-3-4 00351 * - WR_RD_WRSWA_32_8BIT : Swapped in 32-bit units + 8-bit units: 6-5-8-7-2-1-4-3 00352 * - WR_RD_WRSWA_32_16BIT : Swapped in 32-bit units + 16-bit units: 7-8-5-6-3-4-1-2 00353 * - WR_RD_WRSWA_32_16_8BIT : Swapped in 32-bit units + 16-bit units + 8-bit units: 8-7-6-5-4-3-2-1 00354 * @param[in] gr_rect : Graphics display area 00355 * @param[in] gr_clut : CLUT setup parameter 00356 * @retval Error code 00357 ******************************************************************************/ 00358 DisplayBase::graphics_error_t 00359 DisplayBase::Graphics_Read_Setting( 00360 graphics_layer_t layer_id, 00361 void * framebuff, 00362 unsigned int fb_stride, 00363 graphics_format_t gr_format, 00364 wr_rd_swa_t wr_rd_swa, 00365 rect_t * gr_rect, 00366 clut_t * gr_clut ) 00367 { 00368 rect_t rect; 00369 00370 rect.hs = gr_rect->hs + _lcd_config.h_back_porch ; 00371 rect.vs = gr_rect->vs + _lcd_config.v_back_porch ; 00372 rect.hw = gr_rect->hw ; 00373 rect.vw = gr_rect->vw ; 00374 00375 return (graphics_error_t)DRV_Graphics_Read_Setting( 00376 (drv_graphics_layer_t)layer_id, 00377 framebuff, 00378 fb_stride, 00379 (drv_graphics_format_t)gr_format, 00380 (drv_wr_rd_swa_t)wr_rd_swa, 00381 (drv_rect_t *)&rect, 00382 (drv_clut_t *)gr_clut); 00383 } /* End of method Graphics_Read_Setting() */ 00384 00385 /**************************************************************************//** 00386 * @brief Graphics surface read process changing 00387 * 00388 * Description:<br> 00389 * This function is used to swap buffers. 00390 * 00391 * @param[in] layer_id : Graphics layer ID 00392 * @param[in] framebuff : Base address of the frame buffer 00393 * @retval Error code 00394 ******************************************************************************/ 00395 DisplayBase::graphics_error_t 00396 DisplayBase::Graphics_Read_Change ( graphics_layer_t layer_id, void * framebuff) 00397 { 00398 return (graphics_error_t)DRV_Graphics_Read_Change( 00399 (drv_graphics_layer_t)layer_id, framebuff ); 00400 } /* End of method Graphics_Read_Change() */ 00401 00402 /**************************************************************************//** 00403 * @brief Video surface write process setting 00404 * This function set the video write process. Input form is weave 00405 * (progressive) mode fixed. 00406 * This function supports the following 3 image format. 00407 * YCbCr422, RGB565, RGB888 00408 * @param[in] video_input_ch : Video input channel 00409 * @param[in] col_sys : Analog video signal color system 00410 * @param[in] adc_vinsel : Video input pin 00411 * @param[in] framebuff : Base address of the frame buffer 00412 * @param[in] fb_stride [byte] : Line offset address of the frame buffer 00413 * @param[in] video_format : Frame buffer video-signal writing format 00414 * - VIDEO_FORMAT_YCBCR422 : YCBCR422 (2byte/px) 00415 * - VIDEO_FORMAT_RGB565 : RGB565 (2byte/px) 00416 * - VIDEO_FORMAT_RGB888 : RGB888 (4byte/px) 00417 * @param[in] wr_rd_swa : frame buffer swap setting 00418 * - WR_RD_WRSWA_NON : Not swapped: 1-2-3-4-5-6-7-8 00419 * - WR_RD_WRSWA_8BIT : Swapped in 8-bit units: 2-1-4-3-6-5-8-7 00420 * - WR_RD_WRSWA_16BIT : Swapped in 16-bit units: 3-4-1-2-7-8-5-6 00421 * - WR_RD_WRSWA_16_8BIT : Swapped in 16-bit units + 8-bit units: 4-3-2-1-8-7-6-5 00422 * - WR_RD_WRSWA_32BIT : Swapped in 32-bit units: 5-6-7-8-1-2-3-4 00423 * - WR_RD_WRSWA_32_8BIT : Swapped in 32-bit units + 8-bit units: 6-5-8-7-2-1-4-3 00424 * - WR_RD_WRSWA_32_16BIT : Swapped in 32-bit units + 16-bit units: 7-8-5-6-3-4-1-2 00425 * - WR_RD_WRSWA_32_16_8BIT : Swapped in 32-bit units + 16-bit units + 8-bit units: 8-7-6-5-4-3-2-1 00426 * @param[in] video_write_size_vw [px]: output v width 00427 * @param[in] video_write_size_hw [px]: output h width 00428 * @param[in] video_adc_vinsel : Input pin control 00429 * @retval Error code 00430 ******************************************************************************/ 00431 DisplayBase::graphics_error_t 00432 DisplayBase::Video_Write_Setting( 00433 video_input_channel_t video_input_channel, 00434 graphics_video_col_sys_t col_sys, 00435 void * framebuff, 00436 unsigned int fb_stride, 00437 video_format_t video_format, 00438 wr_rd_swa_t wr_rd_swa, 00439 unsigned short write_buff_vw, 00440 unsigned short write_buff_hw, 00441 video_adc_vinsel_t video_adc_vinsel ) 00442 00443 { 00444 graphics_error_t error = GRAPHICS_OK ; 00445 00446 if( _video_input_sel == INPUT_SEL_VDEC ) { 00447 if( col_sys == COL_SYS_NTSC_358 || col_sys == COL_SYS_NTSC_443 || col_sys == COL_SYS_NTSC_443_60 ) { 00448 if( (write_buff_vw / 2u) > 240u ) { 00449 error = GRAPHICS_VIDEO_NTSC_SIZE_ERR ; 00450 } 00451 } else { 00452 if( (write_buff_vw / 2u) > 280u ) { 00453 error = GRAPHICS_VIDEO_PAL_SIZE_ERR ; 00454 } 00455 } 00456 00457 if( write_buff_hw > 800u ) { 00458 error = GRAPHICS_PARAM_RANGE_ERR ; 00459 } 00460 if( error == GRAPHICS_OK ) { 00461 error = (graphics_error_t)DRV_Video_Write_Setting( 00462 (drv_video_input_channel_t)video_input_channel, 00463 (drv_graphics_video_col_sys_t)col_sys, 00464 framebuff, 00465 fb_stride, 00466 (drv_video_format_t)video_format, 00467 (drv_wr_rd_swa_t)wr_rd_swa, 00468 write_buff_vw, 00469 write_buff_hw, 00470 (drv_video_adc_vinsel_t)video_adc_vinsel); 00471 } 00472 } else if( _video_input_sel == INPUT_SEL_EXT ) { 00473 rect_t cap_area; 00474 00475 cap_area.hs = _video_ext_in_config.cap_hs_pos * 2; 00476 cap_area.hw = _video_ext_in_config.cap_width * 2; 00477 cap_area.vs = _video_ext_in_config.cap_vs_pos ; 00478 cap_area.vw = _video_ext_in_config.cap_height ; 00479 00480 error = (graphics_error_t) DRV_Video_Write_Setting_Digital( 00481 framebuff, 00482 fb_stride, 00483 (drv_video_format_t)video_format, 00484 (drv_wr_rd_swa_t)wr_rd_swa, 00485 write_buff_vw, 00486 write_buff_hw, 00487 (drv_rect_t *)&cap_area ); 00488 } else if( _video_input_sel == INPUT_SEL_CEU ) { 00489 error = (graphics_error_t) DRV_Video_Write_Setting_Ceu( 00490 framebuff, 00491 fb_stride, 00492 (drv_video_format_t)video_format, 00493 (drv_wr_rd_swa_t)wr_rd_swa, 00494 write_buff_vw, 00495 write_buff_hw, 00496 (drv_video_ext_in_config_t *)&_video_ext_in_config); 00497 #if defined(TARGET_RZ_A2XX) 00498 } else if( _video_input_sel == INPUT_SEL_MIPI ) { 00499 error = (graphics_error_t) DRV_Video_Write_Setting_Mipi( 00500 framebuff, 00501 fb_stride, 00502 (drv_video_format_t)video_format, 00503 (drv_wr_rd_swa_t)wr_rd_swa, 00504 write_buff_vw, 00505 write_buff_hw, 00506 (drv_mipi_param_t *)&_video_mipi_config, 00507 (drv_vin_setup_t *)&_video_vin_setup); 00508 #endif 00509 } else { 00510 error = GRAPHICS_PARAM_RANGE_ERR ; 00511 } 00512 return error; 00513 } /* End of method Video_Write_Setting() */ 00514 00515 /**************************************************************************//** 00516 * @brief Graphics surface write process changing 00517 * This function is used to swap buffers of the weave write processing. 00518 * @param[in] video_input_ch : Video input channle 00519 * @param[in] framebuff : Base address of the frame buffer 00520 * @param[in] fb_stride : Line offset address of the frame buffer 00521 * @retval Error code 00522 ******************************************************************************/ 00523 DisplayBase::graphics_error_t 00524 DisplayBase::Video_Write_Change ( 00525 video_input_channel_t video_input_channel, void * framebuff, uint32_t fb_stride ) 00526 { 00527 return (graphics_error_t)DRV_Video_Write_Change( 00528 (drv_video_input_channel_t)video_input_channel, framebuff, fb_stride ); 00529 } /* End of method Video_Write_Change() */ 00530 00531 /* End of file */
Generated on Wed Jul 13 2022 05:33:36 by
1.7.2