fix for mbed lib issue 3 (i2c problem) see also https://mbed.org/users/mbed_official/code/mbed/issues/3 affected implementations: LPC812, LPC11U24, LPC1768, LPC2368, LPC4088
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cmsis_nvic.c
00001 /* mbed Microcontroller Library - cmsis_nvic for LPC11U24 00002 * Copyright (c) 2011 ARM Limited. All rights reserved. 00003 * 00004 * CMSIS-style functionality to support dynamic vectors 00005 */ 00006 00007 #include "cmsis_nvic.h" 00008 00009 /* In the M0, there is no VTOR. In the LPC range such as the LPC11U, 00010 * whilst the vector table may only be something like 48 entries (192 bytes, 0xC0), 00011 * the SYSMEMREMAP register actually remaps the memory from 0x10000000-0x100001FF 00012 * to adress 0x0-0x1FF. In this case, RAM can be addressed at both 0x10000000 and 0x0 00013 * 00014 * If we just copy the vectors to RAM and switch the SYSMEMMAP, any accesses to FLASH 00015 * above the vector table before 0x200 will actually go to RAM. So we need to provide 00016 * a solution where the compiler gets the right results based on the memory map 00017 * 00018 * Option 1 - We allocate and copy 0x200 of RAM rather than just the table 00019 * - const data and instructions before 0x200 will be copied to and fetched/exec from RAM 00020 * - RAM overhead: 0x200 - 0xC0 = 320 bytes, FLASH overhead: 0 00021 * 00022 * Option 2 - We pad the flash to 0x200 to ensure the compiler doesn't allocate anything there 00023 * - No flash accesses will go to ram, as there will be nothing there 00024 * - RAM only needs to be allocated for the vectors, as all other ram addresses are normal 00025 * - RAM overhead: 0, FLASH overhead: 320 bytes 00026 * 00027 * Option 2 is the one to go for, as RAM is the most valuable resource 00028 */ 00029 00030 #define NVIC_NUM_VECTORS (16 + 32) // CORE + MCU Peripherals 00031 #define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Vectors positioned at start of RAM 00032 00033 void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { 00034 int i; 00035 // Space for dynamic vectors, initialised to allocate in R/W 00036 static volatile uint32_t* vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS; 00037 00038 // Copy and switch to dynamic vectors if first time called 00039 if((LPC_SYSCON->SYSMEMREMAP & 0x3) != 0x1) { 00040 uint32_t *old_vectors = (uint32_t *)0; // FLASH vectors are at 0x0 00041 for(i = 0; i < NVIC_NUM_VECTORS; i++) { 00042 vectors[i] = old_vectors[i]; 00043 } 00044 LPC_SYSCON->SYSMEMREMAP = 0x1; // Remaps 0x0-0x1FF FLASH block to RAM block 00045 } 00046 00047 // Set the vector 00048 vectors[IRQn + 16] = vector; 00049 } 00050 00051 uint32_t NVIC_GetVector(IRQn_Type IRQn) { 00052 // We can always read vectors at 0x0, as the addresses are remapped 00053 uint32_t *vectors = (uint32_t*)0; 00054 00055 // Return the vector 00056 return vectors[IRQn + 16]; 00057 } 00058
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