Toyomasa Watarai
Mbed Cloud example program for workshop in W27 2018.
Embed:
(wiki syntax)
Show/hide line numbers
NanostackRfPhyAtmel.cpp
00001 /* 00002 * Copyright (c) 2014-2015 ARM Limited. All rights reserved. 00003 * SPDX-License-Identifier: Apache-2.0 00004 * Licensed under the Apache License, Version 2.0 (the License); you may 00005 * not use this file except in compliance with the License. 00006 * You may obtain a copy of the License at 00007 * 00008 * http://www.apache.org/licenses/LICENSE-2.0 00009 * 00010 * Unless required by applicable law or agreed to in writing, software 00011 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 00012 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00013 * See the License for the specific language governing permissions and 00014 * limitations under the License. 00015 */ 00016 #include <string.h> 00017 00018 #ifdef MBED_CONF_NANOSTACK_CONFIGURATION 00019 00020 #include "platform/arm_hal_interrupt.h" 00021 #include "nanostack/platform/arm_hal_phy.h" 00022 #include "ns_types.h" 00023 #include "NanostackRfPhyAtmel.h" 00024 #include "randLIB.h" 00025 #include "AT86RFReg.h" 00026 #include "nanostack/platform/arm_hal_phy.h" 00027 #include "mbed_trace.h" 00028 #include "mbed_toolchain.h" 00029 00030 #define TRACE_GROUP "AtRF" 00031 00032 /*Worst case sensitivity*/ 00033 #define RF_DEFAULT_SENSITIVITY -88 00034 /*Run calibration every 5 minutes*/ 00035 #define RF_CALIBRATION_INTERVAL 6000000 00036 /*Wait ACK for 2.5ms*/ 00037 #define RF_ACK_WAIT_DEFAULT_TIMEOUT 50 00038 /*Base CCA backoff (50us units) - substitutes for Inter-Frame Spacing*/ 00039 #define RF_CCA_BASE_BACKOFF 13 /* 650us */ 00040 /*CCA random backoff (50us units)*/ 00041 #define RF_CCA_RANDOM_BACKOFF 51 /* 2550us */ 00042 00043 #define RF_MTU 127 00044 00045 #define RF_PHY_MODE OQPSK_SIN_250 00046 00047 /*Radio RX and TX state definitions*/ 00048 #define RFF_ON 0x01 00049 #define RFF_RX 0x02 00050 #define RFF_TX 0x04 00051 #define RFF_CCA 0x08 00052 00053 typedef enum 00054 { 00055 RF_MODE_NORMAL = 0, 00056 RF_MODE_SNIFFER = 1, 00057 RF_MODE_ED = 2 00058 }rf_mode_t; 00059 00060 /*Atmel RF Part Type*/ 00061 typedef enum 00062 { 00063 ATMEL_UNKNOW_DEV = 0, 00064 ATMEL_AT86RF212, 00065 ATMEL_AT86RF231, // No longer supported (doesn't give ED+status on frame read) 00066 ATMEL_AT86RF233 00067 }rf_trx_part_e; 00068 00069 /*Atmel RF states*/ 00070 typedef enum 00071 { 00072 NOP = 0x00, 00073 BUSY_RX = 0x01, 00074 BUSY_TX = 0x02, 00075 RF_TX_START = 0x02, 00076 FORCE_TRX_OFF = 0x03, 00077 FORCE_PLL_ON = 0x04, 00078 RX_ON = 0x06, 00079 TRX_OFF = 0x08, 00080 PLL_ON = 0x09, 00081 BUSY_RX_AACK = 0x11, 00082 SLEEP = 0x0F, 00083 RX_AACK_ON = 0x16, 00084 TX_ARET_ON = 0x19, 00085 STATE_TRANSITION_IN_PROGRESS = 0x1F 00086 }rf_trx_states_t; 00087 00088 static const uint8_t *rf_tx_data; // Points to Nanostack's buffer 00089 static uint8_t rf_tx_length; 00090 /*ACK wait duration changes depending on data rate*/ 00091 static uint16_t rf_ack_wait_duration = RF_ACK_WAIT_DEFAULT_TIMEOUT; 00092 00093 static int8_t rf_sensitivity = RF_DEFAULT_SENSITIVITY; 00094 static rf_mode_t rf_mode = RF_MODE_NORMAL; 00095 static uint8_t radio_tx_power = 0x00; // Default to +4dBm 00096 static uint8_t rf_phy_channel = 12; 00097 static uint8_t rf_tuned = 1; 00098 static uint8_t rf_use_antenna_diversity = 0; 00099 static int16_t expected_ack_sequence = -1; 00100 static uint8_t rf_rx_mode = 0; 00101 static uint8_t rf_flags = 0; 00102 static int8_t rf_radio_driver_id = -1; 00103 static phy_device_driver_s device_driver; 00104 static uint8_t mac_tx_handle = 0; 00105 static uint8_t xah_ctrl_1; 00106 00107 /* Channel configurations for 2.4 and sub-GHz */ 00108 static const phy_rf_channel_configuration_s phy_24ghz = {2405000000U, 5000000U, 250000U, 16U, M_OQPSK}; 00109 static const phy_rf_channel_configuration_s phy_subghz = {868300000U, 2000000U, 250000U, 11U, M_OQPSK}; 00110 00111 static const phy_device_channel_page_s phy_channel_pages[] = { 00112 { CHANNEL_PAGE_0, &phy_24ghz}, 00113 { CHANNEL_PAGE_2, &phy_subghz}, 00114 { CHANNEL_PAGE_0, NULL} 00115 }; 00116 00117 /** 00118 * RF output power write 00119 * 00120 * \brief TX power has to be set before network start. 00121 * 00122 * \param power 00123 * AT86RF233 00124 * 0 = 4 dBm 00125 * 1 = 3.7 dBm 00126 * 2 = 3.4 dBm 00127 * 3 = 3 dBm 00128 * 4 = 2.5 dBm 00129 * 5 = 2 dBm 00130 * 6 = 1 dBm 00131 * 7 = 0 dBm 00132 * 8 = -1 dBm 00133 * 9 = -2 dBm 00134 * 10 = -3 dBm 00135 * 11 = -4 dBm 00136 * 12 = -6 dBm 00137 * 13 = -8 dBm 00138 * 14 = -12 dBm 00139 * 15 = -17 dBm 00140 * 00141 * AT86RF212B 00142 * See datasheet for TX power settings 00143 * 00144 * \return 0, Supported Value 00145 * \return -1, Not Supported Value 00146 */ 00147 static int8_t rf_tx_power_set(uint8_t power); 00148 static rf_trx_part_e rf_radio_type_read(void); 00149 static void rf_ack_wait_timer_start(uint16_t slots); 00150 static void rf_ack_wait_timer_stop(void); 00151 static void rf_handle_cca_ed_done(uint8_t full_trx_status); 00152 static void rf_handle_tx_end(rf_trx_states_t trx_status); 00153 static void rf_handle_rx_end(rf_trx_states_t trx_status); 00154 static void rf_on(void); 00155 static void rf_give_up_on_ack(void); 00156 static void rf_receive(rf_trx_states_t trx_status = STATE_TRANSITION_IN_PROGRESS); 00157 static rf_trx_states_t rf_poll_trx_state_change(rf_trx_states_t trx_state); 00158 static void rf_init(void); 00159 static int8_t rf_device_register(const uint8_t *mac_addr); 00160 static void rf_device_unregister(void); 00161 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol ); 00162 static void rf_cca_abort(void); 00163 static void rf_calibration_cb(void); 00164 static void rf_init_phy_mode(void); 00165 static void rf_ack_wait_timer_interrupt(void); 00166 static void rf_calibration_timer_interrupt(void); 00167 static void rf_calibration_timer_start(uint32_t slots); 00168 static void rf_cca_timer_interrupt(void); 00169 static void rf_cca_timer_start(uint32_t slots); 00170 static uint8_t rf_scale_lqi(int8_t rssi); 00171 00172 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel); 00173 static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr); 00174 static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr); 00175 00176 static void rf_if_cca_timer_start(uint32_t slots); 00177 static void rf_if_enable_promiscuous_mode(void); 00178 static void rf_if_lock(void); 00179 static void rf_if_unlock(void); 00180 static uint8_t rf_if_read_rnd(void); 00181 static void rf_if_calibration_timer_start(uint32_t slots); 00182 static void rf_if_interrupt_handler(void); 00183 static void rf_if_ack_wait_timer_start(uint16_t slots); 00184 static void rf_if_ack_wait_timer_stop(void); 00185 static void rf_if_ack_pending_ctrl(uint8_t state); 00186 static void rf_if_calibration(void); 00187 static uint8_t rf_if_read_register(uint8_t addr); 00188 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask); 00189 static void rf_if_clear_bit(uint8_t addr, uint8_t bit); 00190 static void rf_if_write_register(uint8_t addr, uint8_t data); 00191 static void rf_if_reset_radio(void); 00192 static void rf_if_enable_ant_div(void); 00193 static void rf_if_disable_ant_div(void); 00194 static void rf_if_enable_slptr(void); 00195 static void rf_if_disable_slptr(void); 00196 static void rf_if_write_antenna_diversity_settings(void); 00197 static void rf_if_write_set_tx_power_register(uint8_t value); 00198 static void rf_if_write_rf_settings(void); 00199 static rf_trx_states_t rf_if_read_trx_state(void); 00200 static uint16_t rf_if_read_packet(uint8_t data[RF_MTU], uint8_t *lqi_out, uint8_t *ed_out, bool *crc_good); 00201 static void rf_if_write_short_addr_registers(uint8_t *short_address); 00202 static uint8_t rf_if_last_acked_pending(void); 00203 static void rf_if_write_pan_id_registers(uint8_t *pan_id); 00204 static void rf_if_write_ieee_addr_registers(uint8_t *address); 00205 static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length); 00206 static rf_trx_states_t rf_if_change_trx_state(rf_trx_states_t trx_state); 00207 static void rf_if_start_cca_process(void); 00208 static int8_t rf_if_scale_rssi(uint8_t ed_level); 00209 static void rf_if_set_channel_register(uint8_t channel); 00210 static void rf_if_enable_promiscuous_mode(void); 00211 static void rf_if_disable_promiscuous_mode(void); 00212 static uint8_t rf_if_read_part_num(void); 00213 static void rf_if_enable_irq(void); 00214 static void rf_if_disable_irq(void); 00215 static void rf_if_spi_exchange_n(const void *tx, size_t tx_len, void *rx, size_t rx_len); 00216 00217 static inline rf_trx_states_t rf_if_trx_status_from_full(uint8_t full_trx_status) 00218 { 00219 return (rf_trx_states_t) (full_trx_status & 0x1F); 00220 } 00221 00222 #ifdef MBED_CONF_RTOS_PRESENT 00223 #include "mbed.h" 00224 #include "rtos.h" 00225 00226 static void rf_if_irq_task_process_irq(); 00227 00228 #define SIG_RADIO 1 00229 #define SIG_TIMER_ACK 2 00230 #define SIG_TIMER_CAL 4 00231 #define SIG_TIMER_CCA 8 00232 00233 #define SIG_TIMERS (SIG_TIMER_ACK|SIG_TIMER_CAL|SIG_TIMER_CCA) 00234 #define SIG_ALL (SIG_RADIO|SIG_TIMERS) 00235 #endif 00236 00237 // HW pins to RF chip 00238 00239 class UnlockedSPI : public SPI { 00240 public: 00241 UnlockedSPI(PinName mosi, PinName miso, PinName sclk) : 00242 SPI(mosi, miso, sclk) { } 00243 virtual void lock() { } 00244 virtual void unlock() { } 00245 }; 00246 00247 class RFBits { 00248 public: 00249 RFBits(PinName spi_mosi, PinName spi_miso, 00250 PinName spi_sclk, PinName spi_cs, 00251 PinName spi_rst, PinName spi_slp, PinName spi_irq); 00252 UnlockedSPI spi; 00253 DigitalOut CS; 00254 DigitalOut RST; 00255 DigitalOut SLP_TR; 00256 InterruptIn IRQ; 00257 Timeout ack_timer; 00258 Timeout cal_timer; 00259 Timeout cca_timer; 00260 #ifdef MBED_CONF_RTOS_PRESENT 00261 Thread irq_thread; 00262 Mutex mutex; 00263 void rf_if_irq_task(); 00264 #endif 00265 }; 00266 00267 RFBits::RFBits(PinName spi_mosi, PinName spi_miso, 00268 PinName spi_sclk, PinName spi_cs, 00269 PinName spi_rst, PinName spi_slp, PinName spi_irq) 00270 : spi(spi_mosi, spi_miso, spi_sclk), 00271 CS(spi_cs), 00272 RST(spi_rst), 00273 SLP_TR(spi_slp), 00274 IRQ(spi_irq) 00275 #ifdef MBED_CONF_RTOS_PRESENT 00276 ,irq_thread(osPriorityRealtime, 1024) 00277 #endif 00278 { 00279 #ifdef MBED_CONF_RTOS_PRESENT 00280 irq_thread.start(mbed::callback(this, &RFBits::rf_if_irq_task)); 00281 #endif 00282 } 00283 00284 static RFBits *rf; 00285 static uint8_t rf_part_num = 0; 00286 /*TODO: RSSI Base value setting*/ 00287 static int8_t rf_rssi_base_val = -91; 00288 00289 static void rf_if_lock(void) 00290 { 00291 platform_enter_critical(); 00292 } 00293 00294 static void rf_if_unlock(void) 00295 { 00296 platform_exit_critical(); 00297 } 00298 00299 #ifdef MBED_CONF_RTOS_PRESENT 00300 static void rf_if_cca_timer_signal(void) 00301 { 00302 rf->irq_thread.signal_set(SIG_TIMER_CCA); 00303 } 00304 00305 static void rf_if_cal_timer_signal(void) 00306 { 00307 rf->irq_thread.signal_set(SIG_TIMER_CAL); 00308 } 00309 00310 static void rf_if_ack_timer_signal(void) 00311 { 00312 rf->irq_thread.signal_set(SIG_TIMER_ACK); 00313 } 00314 #endif 00315 00316 00317 /* Delay functions for RF Chip SPI access */ 00318 #ifdef __CC_ARM 00319 __asm static void delay_loop(uint32_t count) 00320 { 00321 1 00322 SUBS a1, a1, #1 00323 BCS %BT1 00324 BX lr 00325 } 00326 #elif defined (__ICCARM__) 00327 static void delay_loop(uint32_t count) 00328 { 00329 __asm volatile( 00330 "loop: \n" 00331 " SUBS %0, %0, #1 \n" 00332 " BCS.n loop\n" 00333 : "+r" (count) 00334 : 00335 : "cc" 00336 ); 00337 } 00338 #else // GCC 00339 static void delay_loop(uint32_t count) 00340 { 00341 __asm__ volatile ( 00342 "%=:\n\t" 00343 #if defined(__thumb__) && !defined(__thumb2__) 00344 "SUB %0, #1\n\t" 00345 #else 00346 "SUBS %0, %0, #1\n\t" 00347 #endif 00348 "BCS %=b\n\t" 00349 : "+l" (count) 00350 : 00351 : "cc" 00352 ); 00353 } 00354 #endif 00355 00356 static void delay_ns(uint32_t ns) 00357 { 00358 uint32_t cycles_per_us = SystemCoreClock / 1000000; 00359 // Cortex-M0 takes 4 cycles per loop (SUB=1, BCS=3) 00360 // Cortex-M3 and M4 takes 3 cycles per loop (SUB=1, BCS=2) 00361 // Cortex-M7 - who knows? 00362 // Cortex M3-M7 have "CYCCNT" - would be better than a software loop, but M0 doesn't 00363 // Assume 3 cycles per loop for now - will be 33% slow on M0. No biggie, 00364 // as original version of code was 300% slow on M4. 00365 // [Note that this very calculation, plus call overhead, will take multiple 00366 // cycles. Could well be 100ns on its own... So round down here, startup is 00367 // worth at least one loop iteration.] 00368 uint32_t count = (cycles_per_us * ns) / 3000; 00369 00370 delay_loop(count); 00371 } 00372 00373 // t1 = 180ns, SEL falling edge to MISO active [SPI setup assumed slow enough to not need manual delay] 00374 #define CS_SELECT() {rf->CS = 0; /* delay_ns(180); */} 00375 // t9 = 250ns, last clock to SEL rising edge, t8 = 250ns, SPI idle time between consecutive access 00376 #define CS_RELEASE() {delay_ns(250); rf->CS = 1; delay_ns(250);} 00377 00378 /* 00379 * \brief Function sets the TX power variable. 00380 * 00381 * \param power TX power setting 00382 * 00383 * \return 0 Success 00384 * \return -1 Fail 00385 */ 00386 MBED_UNUSED static int8_t rf_tx_power_set(uint8_t power) 00387 { 00388 int8_t ret_val = -1; 00389 00390 radio_tx_power = power; 00391 rf_if_lock(); 00392 rf_if_write_set_tx_power_register(radio_tx_power); 00393 rf_if_unlock(); 00394 ret_val = 0; 00395 00396 return ret_val; 00397 } 00398 00399 /* 00400 * \brief Read connected radio part. 00401 * 00402 * This function only return valid information when rf_init() is called 00403 * 00404 * \return 00405 */ 00406 static rf_trx_part_e rf_radio_type_read(void) 00407 { 00408 rf_trx_part_e ret_val = ATMEL_UNKNOW_DEV; 00409 00410 switch (rf_part_num) 00411 { 00412 case PART_AT86RF212: 00413 ret_val = ATMEL_AT86RF212; 00414 break; 00415 case PART_AT86RF233: 00416 ret_val = ATMEL_AT86RF233; 00417 break; 00418 default: 00419 break; 00420 } 00421 00422 return ret_val; 00423 } 00424 00425 00426 /* 00427 * \brief Function starts the ACK wait timeout. 00428 * 00429 * \param slots Given slots, resolution 50us 00430 * 00431 * \return none 00432 */ 00433 static void rf_if_ack_wait_timer_start(uint16_t slots) 00434 { 00435 #ifdef MBED_CONF_RTOS_PRESENT 00436 rf->ack_timer.attach_us(rf_if_ack_timer_signal, slots*50); 00437 #else 00438 rf->ack_timer.attach_us(rf_ack_wait_timer_interrupt, slots*50); 00439 #endif 00440 } 00441 00442 /* 00443 * \brief Function starts the calibration interval. 00444 * 00445 * \param slots Given slots, resolution 50us 00446 * 00447 * \return none 00448 */ 00449 static void rf_if_calibration_timer_start(uint32_t slots) 00450 { 00451 #ifdef MBED_CONF_RTOS_PRESENT 00452 rf->cal_timer.attach_us(rf_if_cal_timer_signal, slots*50); 00453 #else 00454 rf->cal_timer.attach_us(rf_calibration_timer_interrupt, slots*50); 00455 #endif 00456 } 00457 00458 /* 00459 * \brief Function starts the CCA interval. 00460 * 00461 * \param slots Given slots, resolution 50us 00462 * 00463 * \return none 00464 */ 00465 static void rf_if_cca_timer_start(uint32_t slots) 00466 { 00467 #ifdef MBED_CONF_RTOS_PRESENT 00468 rf->cca_timer.attach_us(rf_if_cca_timer_signal, slots*50); 00469 #else 00470 rf->cca_timer.attach_us(rf_cca_timer_interrupt, slots*50); 00471 #endif 00472 } 00473 00474 /* 00475 * \brief Function stops the CCA interval. 00476 * 00477 * \return none 00478 */ 00479 static void rf_if_cca_timer_stop(void) 00480 { 00481 rf->cca_timer.detach(); 00482 } 00483 00484 /* 00485 * \brief Function stops the ACK wait timeout. 00486 * 00487 * \param none 00488 * 00489 * \return none 00490 */ 00491 static void rf_if_ack_wait_timer_stop(void) 00492 { 00493 rf->ack_timer.detach(); 00494 } 00495 00496 /* 00497 * \brief Function sets bit(s) in given RF register. 00498 * 00499 * \param addr Address of the register to set 00500 * \param bit Bit(s) to set 00501 * \param bit_mask Masks the field inside the register 00502 * 00503 * \return none 00504 */ 00505 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask) 00506 { 00507 uint8_t reg = rf_if_read_register(addr); 00508 reg &= ~bit_mask; 00509 reg |= bit; 00510 rf_if_write_register(addr, reg); 00511 } 00512 00513 /* 00514 * \brief Function clears bit(s) in given RF register. 00515 * 00516 * \param addr Address of the register to clear 00517 * \param bit Bit(s) to clear 00518 * 00519 * \return none 00520 */ 00521 static void rf_if_clear_bit(uint8_t addr, uint8_t bit) 00522 { 00523 rf_if_set_bit(addr, 0, bit); 00524 } 00525 00526 /* 00527 * \brief Function writes register in RF. 00528 * 00529 * \param addr Address on the RF 00530 * \param data Written data 00531 * 00532 * \return none 00533 */ 00534 static void rf_if_write_register(uint8_t addr, uint8_t data) 00535 { 00536 const uint8_t tx[2] = { static_cast<uint8_t>(0xC0 | addr), data }; 00537 uint8_t rx[2]; 00538 CS_SELECT(); 00539 rf_if_spi_exchange_n(tx, 2, rx, 2); 00540 CS_RELEASE(); 00541 } 00542 00543 /* 00544 * \brief Function reads RF register, and also outputs PHY_STATUS 00545 * 00546 * \param addr Address on the RF 00547 * \param[out] status_out Pointer to store PHY_STATUS 00548 * 00549 * \return Read register data 00550 */ 00551 static uint8_t rf_if_read_register_with_status(uint8_t addr, uint8_t *status_out) 00552 { 00553 const uint8_t tx[1] = { static_cast<uint8_t>(0x80 | addr) }; 00554 uint8_t rx[2]; 00555 CS_SELECT(); 00556 rf_if_spi_exchange_n(tx, 1, rx, 2); 00557 CS_RELEASE(); 00558 if (status_out) { 00559 *status_out = rx[0]; 00560 } 00561 return rx[1]; 00562 } 00563 00564 /* 00565 * \brief Function reads RF register. 00566 * 00567 * \param addr Address on the RF 00568 * 00569 * \return Read register data 00570 */ 00571 static uint8_t rf_if_read_register(uint8_t addr) 00572 { 00573 return rf_if_read_register_with_status(addr, NULL); 00574 } 00575 00576 /* 00577 * \brief Function resets the RF. 00578 * 00579 * \param none 00580 * 00581 * \return none 00582 */ 00583 static void rf_if_reset_radio(void) 00584 { 00585 #if MBED_CONF_ATMEL_RF_USE_SPI_SPACING_API 00586 rf->spi.frequency(MBED_CONF_ATMEL_RF_FULL_SPI_SPEED); 00587 int spacing = rf->spi.write_spacing(MBED_CONF_ATMEL_RF_FULL_SPI_SPEED_BYTE_SPACING); 00588 if (spacing < MBED_CONF_ATMEL_RF_FULL_SPI_SPEED_BYTE_SPACING) { 00589 rf->spi.frequency(MBED_CONF_ATMEL_RF_LOW_SPI_SPEED); 00590 rf->spi.write_spacing(0); 00591 } 00592 #elif MBED_CONF_ATMEL_RF_ASSUME_SPACED_SPI 00593 rf->spi.frequency(MBED_CONF_ATMEL_RF_FULL_SPI_SPEED); 00594 #else 00595 rf->spi.frequency(MBED_CONF_ATMEL_RF_LOW_SPI_SPEED); 00596 #endif 00597 rf->IRQ.rise(0); 00598 rf->RST = 1; 00599 wait_ms(1); 00600 rf->RST = 0; 00601 wait_ms(10); 00602 CS_RELEASE(); 00603 rf->SLP_TR = 0; 00604 wait_ms(10); 00605 rf->RST = 1; 00606 wait_ms(10); 00607 00608 rf->IRQ.rise(&rf_if_interrupt_handler); 00609 } 00610 00611 /* 00612 * \brief Function enables the promiscuous mode. 00613 * 00614 * \param none 00615 * 00616 * \return none 00617 */ 00618 static void rf_if_enable_promiscuous_mode(void) 00619 { 00620 if (!(xah_ctrl_1 & AACK_PROM_MODE)) { 00621 /*Set AACK_PROM_MODE to enable the promiscuous mode*/ 00622 rf_if_write_register(XAH_CTRL_1, xah_ctrl_1 |= AACK_PROM_MODE); 00623 } 00624 } 00625 00626 /* 00627 * \brief Function disable the promiscuous mode. 00628 * 00629 * \param none 00630 * 00631 * \return none 00632 */ 00633 static void rf_if_disable_promiscuous_mode(void) 00634 { 00635 if (xah_ctrl_1 & AACK_PROM_MODE) { 00636 /*Clear AACK_PROM_MODE to disable the promiscuous mode*/ 00637 rf_if_write_register(XAH_CTRL_1, xah_ctrl_1 &= ~AACK_PROM_MODE); 00638 } 00639 } 00640 00641 /* 00642 * \brief Function enables the Antenna diversity usage. 00643 * 00644 * \param none 00645 * 00646 * \return none 00647 */ 00648 static void rf_if_enable_ant_div(void) 00649 { 00650 /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/ 00651 rf_if_set_bit(ANT_DIV, ANT_EXT_SW_EN, ANT_EXT_SW_EN); 00652 } 00653 00654 /* 00655 * \brief Function disables the Antenna diversity usage. 00656 * 00657 * \param none 00658 * 00659 * \return none 00660 */ 00661 static void rf_if_disable_ant_div(void) 00662 { 00663 rf_if_clear_bit(ANT_DIV, ANT_EXT_SW_EN); 00664 } 00665 00666 /* 00667 * \brief Function sets the SLP TR pin. 00668 * 00669 * \param none 00670 * 00671 * \return none 00672 */ 00673 static void rf_if_enable_slptr(void) 00674 { 00675 rf->SLP_TR = 1; 00676 } 00677 00678 /* 00679 * \brief Function clears the SLP TR pin. 00680 * 00681 * \param none 00682 * 00683 * \return none 00684 */ 00685 static void rf_if_disable_slptr(void) 00686 { 00687 rf->SLP_TR = 0; 00688 } 00689 00690 /* 00691 * \brief Function writes the antenna diversity settings. 00692 * 00693 * \param none 00694 * 00695 * \return none 00696 */ 00697 static void rf_if_write_antenna_diversity_settings(void) 00698 { 00699 /*Recommended setting of PDT_THRES is 3 when antenna diversity is used*/ 00700 rf_if_set_bit(RX_CTRL, 0x03, 0x0f); 00701 rf_if_write_register(ANT_DIV, ANT_DIV_EN | ANT_EXT_SW_EN | ANT_CTRL_DEFAULT); 00702 } 00703 00704 /* 00705 * \brief Function writes the TX output power register. 00706 * 00707 * \param value Given register value 00708 * 00709 * \return none 00710 */ 00711 static void rf_if_write_set_tx_power_register(uint8_t value) 00712 { 00713 rf_if_write_register(PHY_TX_PWR, value); 00714 } 00715 00716 /* 00717 * \brief Function returns the RF part number. 00718 * 00719 * \param none 00720 * 00721 * \return part number 00722 */ 00723 static uint8_t rf_if_read_part_num(void) 00724 { 00725 return rf_if_read_register(PART_NUM); 00726 } 00727 00728 /* 00729 * \brief Function writes the RF settings and initialises SPI interface. 00730 * 00731 * \param none 00732 * 00733 * \return none 00734 */ 00735 static void rf_if_write_rf_settings(void) 00736 { 00737 /*Reset RF module*/ 00738 rf_if_reset_radio(); 00739 00740 rf_part_num = rf_if_read_part_num(); 00741 00742 rf_if_write_register(XAH_CTRL_0,0); 00743 00744 /* Auto CRC on, IRQ status shows unmasked only, TRX_STATUS output on all accesses */ 00745 rf_if_write_register(TRX_CTRL_1, TX_AUTO_CRC_ON | SPI_CMD_MODE_TRX_STATUS); 00746 00747 rf_if_write_register(IRQ_MASK, CCA_ED_DONE | TRX_END | TRX_UR); 00748 00749 xah_ctrl_1 = rf_if_read_register(XAH_CTRL_1); 00750 00751 /*Read transceiver PART_NUM*/ 00752 rf_part_num = rf_if_read_register(PART_NUM); 00753 00754 /*Sub-GHz RF settings*/ 00755 if(rf_part_num == PART_AT86RF212) 00756 { 00757 /*GC_TX_OFFS mode-dependent setting - OQPSK*/ 00758 rf_if_write_register(RF_CTRL_0, 0x32); 00759 00760 if(rf_if_read_register(VERSION_NUM) == VERSION_AT86RF212B) 00761 { 00762 /*TX Output Power setting - 0 dBm North American Band*/ 00763 rf_if_write_register(PHY_TX_PWR, 0x03); 00764 } 00765 else 00766 { 00767 /*TX Output Power setting - 0 dBm North American Band*/ 00768 rf_if_write_register(PHY_TX_PWR, 0x24); 00769 } 00770 00771 /*PHY Mode: IEEE 802.15.4-2006/2011 - OQPSK-SIN-250*/ 00772 rf_if_write_register(TRX_CTRL_2, RX_SAFE_MODE | RF_PHY_MODE); 00773 /*Based on receiver Characteristics. See AT86RF212B Datasheet where RSSI BASE VALUE in range -97 - -100 dBm*/ 00774 rf_rssi_base_val = -98; 00775 } 00776 /*2.4GHz RF settings*/ 00777 else 00778 { 00779 #if 0 00780 /* Disable power saving functions for now - can only impact reliability, 00781 * and don't have any users demanding it. */ 00782 /*Set RPC register*/ 00783 rf_if_write_register(TRX_RPC, RX_RPC_CTRL|RX_RPC_EN|PLL_RPC_EN|XAH_TX_RPC_EN|IPAN_RPC_EN|TRX_RPC_RSVD_1); 00784 #endif 00785 /*PHY Mode: IEEE 802.15.4 - Data Rate 250 kb/s*/ 00786 rf_if_write_register(TRX_CTRL_2, RX_SAFE_MODE); 00787 rf_rssi_base_val = -91; 00788 } 00789 } 00790 00791 /* 00792 * \brief Function returns the RF state 00793 * 00794 * \param none 00795 * 00796 * \return RF state 00797 */ 00798 static rf_trx_states_t rf_if_read_trx_state(void) 00799 { 00800 return rf_if_trx_status_from_full(rf_if_read_register(TRX_STATUS)); 00801 } 00802 00803 /* 00804 * \brief Function reads packet buffer. 00805 * 00806 * \param data_out Output buffer 00807 * \param lqi_out LQI output 00808 * \param ed_out ED output 00809 * \param crc_good CRC good indication 00810 * 00811 * \return PSDU length [0..RF_MTU] 00812 */ 00813 static uint16_t rf_if_read_packet(uint8_t data_out[RF_MTU], uint8_t *lqi_out, uint8_t *ed_out, bool *crc_good) 00814 { 00815 CS_SELECT(); 00816 const uint8_t tx[1] = { 0x20 }; 00817 uint8_t rx[3]; 00818 rf_if_spi_exchange_n(tx, 1, rx, 2); 00819 uint8_t len = rx[1] & 0x7F; 00820 rf_if_spi_exchange_n(NULL, 0, data_out, len); 00821 rf_if_spi_exchange_n(NULL, 0, rx, 3); 00822 *lqi_out = rx[0]; 00823 *ed_out = rx[1]; 00824 *crc_good = rx[2] & 0x80; 00825 CS_RELEASE(); 00826 00827 return len; 00828 } 00829 00830 /* 00831 * \brief Function writes RF short address registers 00832 * 00833 * \param short_address Given short address 00834 * 00835 * \return none 00836 */ 00837 static void rf_if_write_short_addr_registers(uint8_t *short_address) 00838 { 00839 rf_if_write_register(SHORT_ADDR_1, *short_address++); 00840 rf_if_write_register(SHORT_ADDR_0, *short_address); 00841 } 00842 00843 /* 00844 * \brief Function sets the frame pending in ACK message 00845 * 00846 * \param state Given frame pending state 00847 * 00848 * \return none 00849 */ 00850 static void rf_if_ack_pending_ctrl(uint8_t state) 00851 { 00852 rf_if_lock(); 00853 if(state) 00854 { 00855 rf_if_set_bit(CSMA_SEED_1, (1 << AACK_SET_PD), (1 << AACK_SET_PD)); 00856 } 00857 else 00858 { 00859 rf_if_clear_bit(CSMA_SEED_1, (1 << AACK_SET_PD)); 00860 } 00861 rf_if_unlock(); 00862 } 00863 00864 /* 00865 * \brief Function returns the state of frame pending control 00866 * 00867 * \param none 00868 * 00869 * \return Frame pending state 00870 */ 00871 static uint8_t rf_if_last_acked_pending(void) 00872 { 00873 uint8_t last_acked_data_pending; 00874 00875 rf_if_lock(); 00876 if(rf_if_read_register(CSMA_SEED_1) & (1 << AACK_SET_PD)) 00877 last_acked_data_pending = 1; 00878 else 00879 last_acked_data_pending = 0; 00880 rf_if_unlock(); 00881 00882 return last_acked_data_pending; 00883 } 00884 00885 /* 00886 * \brief Function calibrates the RF part. 00887 * 00888 * \param none 00889 * 00890 * \return none 00891 */ 00892 static void rf_if_calibration(void) 00893 { 00894 rf_if_set_bit(FTN_CTRL, FTN_START, FTN_START); 00895 /*Wait while calibration is running*/ 00896 while(rf_if_read_register(FTN_CTRL) & FTN_START); 00897 } 00898 00899 /* 00900 * \brief Function writes RF PAN Id registers 00901 * 00902 * \param pan_id Given PAN Id 00903 * 00904 * \return none 00905 */ 00906 static void rf_if_write_pan_id_registers(uint8_t *pan_id) 00907 { 00908 rf_if_write_register(PAN_ID_1, *pan_id++); 00909 rf_if_write_register(PAN_ID_0, *pan_id); 00910 } 00911 00912 /* 00913 * \brief Function writes RF IEEE Address registers 00914 * 00915 * \param address Given IEEE Address 00916 * 00917 * \return none 00918 */ 00919 static void rf_if_write_ieee_addr_registers(uint8_t *address) 00920 { 00921 uint8_t i; 00922 uint8_t temp = IEEE_ADDR_0; 00923 00924 for(i=0; i<8; i++) 00925 rf_if_write_register(temp++, address[7-i]); 00926 } 00927 00928 /* 00929 * \brief Function writes data in RF frame buffer. 00930 * 00931 * \param ptr Pointer to data (PSDU, except FCS) 00932 * \param length Pointer to length (PSDU length, minus 2 for FCS) 00933 * 00934 * \return none 00935 */ 00936 static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length) 00937 { 00938 const uint8_t cmd[2] = { 0x60, static_cast<uint8_t>(length + 2) }; 00939 00940 CS_SELECT(); 00941 rf_if_spi_exchange_n(cmd, 2, NULL, 0); 00942 rf_if_spi_exchange_n(ptr, length, NULL, 0); 00943 CS_RELEASE(); 00944 } 00945 00946 /* 00947 * \brief Function returns 8-bit random value. 00948 * 00949 * \param none 00950 * 00951 * \return random value 00952 */ 00953 static uint8_t rf_if_read_rnd(void) 00954 { 00955 uint8_t temp; 00956 uint8_t tmp_rpc_val = 0; 00957 /*RPC must be disabled while reading the random number*/ 00958 if(rf_part_num == PART_AT86RF233) 00959 { 00960 tmp_rpc_val = rf_if_read_register(TRX_RPC); 00961 rf_if_write_register(TRX_RPC, RX_RPC_CTRL|TRX_RPC_RSVD_1); 00962 } 00963 00964 wait_ms(1); 00965 temp = ((rf_if_read_register(PHY_RSSI)>>5) << 6); 00966 wait_ms(1); 00967 temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 4); 00968 wait_ms(1); 00969 temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 2); 00970 wait_ms(1); 00971 temp |= ((rf_if_read_register(PHY_RSSI)>>5)); 00972 wait_ms(1); 00973 if(rf_part_num == PART_AT86RF233) 00974 rf_if_write_register(TRX_RPC, tmp_rpc_val); 00975 return temp; 00976 } 00977 00978 /* 00979 * \brief Function changes the state of the RF. 00980 * 00981 * \param trx_state Given RF state 00982 * 00983 * \return none 00984 */ 00985 static rf_trx_states_t rf_if_change_trx_state(rf_trx_states_t trx_state) 00986 { 00987 rf_if_write_register(TRX_STATE, trx_state); 00988 /*Wait while not in desired state*/ 00989 return rf_poll_trx_state_change(trx_state); 00990 } 00991 00992 /* 00993 * \brief Function starts the CCA process 00994 * 00995 * \param none 00996 * 00997 * \return none 00998 */ 00999 static void rf_if_start_cca_process(void) 01000 { 01001 rf_if_write_register(PHY_CC_CCA, CCA_REQUEST | CCA_MODE_3A | rf_phy_channel); 01002 } 01003 01004 /* 01005 * \brief Function scales RSSI 01006 * 01007 * \param ed_level ED level read from chip 01008 * 01009 * \return appropriately scaled RSSI dBm 01010 */ 01011 static int8_t rf_if_scale_rssi(uint8_t ed_level) 01012 { 01013 if (rf_part_num == PART_AT86RF212) { 01014 /* Data sheet says to multiply by 1.03 - this is 1.03125, rounding down */ 01015 ed_level += ed_level >> 5; 01016 } 01017 return rf_rssi_base_val + ed_level; 01018 } 01019 01020 /* 01021 * \brief Function sets the RF channel field 01022 * 01023 * \param Given channel 01024 * 01025 * \return none 01026 */ 01027 static void rf_if_set_channel_register(uint8_t channel) 01028 { 01029 rf_if_set_bit(PHY_CC_CCA, channel, CCA_CHANNEL_MASK); 01030 } 01031 01032 /* 01033 * \brief Function enables RF irq pin interrupts in RF interface. 01034 * 01035 * \param none 01036 * 01037 * \return none 01038 */ 01039 static void rf_if_enable_irq(void) 01040 { 01041 rf->IRQ.enable_irq(); 01042 } 01043 01044 /* 01045 * \brief Function disables RF irq pin interrupts in RF interface. 01046 * 01047 * \param none 01048 * 01049 * \return none 01050 */ 01051 static void rf_if_disable_irq(void) 01052 { 01053 rf->IRQ.disable_irq(); 01054 } 01055 01056 #ifdef MBED_CONF_RTOS_PRESENT 01057 static void rf_if_interrupt_handler(void) 01058 { 01059 rf->irq_thread.signal_set(SIG_RADIO); 01060 } 01061 01062 // Started during construction of rf, so variable 01063 // rf isn't set at the start. Uses 'this' instead. 01064 void RFBits::rf_if_irq_task(void) 01065 { 01066 for (;;) { 01067 osEvent event = irq_thread.signal_wait(0); 01068 if (event.status != osEventSignal) { 01069 continue; 01070 } 01071 rf_if_lock(); 01072 if (event.value.signals & SIG_RADIO) { 01073 rf_if_irq_task_process_irq(); 01074 } 01075 if (event.value.signals & SIG_TIMER_ACK) { 01076 rf_ack_wait_timer_interrupt(); 01077 } 01078 if (event.value.signals & SIG_TIMER_CCA) { 01079 rf_cca_timer_interrupt(); 01080 } 01081 if (event.value.signals & SIG_TIMER_CAL) { 01082 rf_calibration_timer_interrupt(); 01083 } 01084 rf_if_unlock(); 01085 } 01086 } 01087 01088 static void rf_if_irq_task_process_irq(void) 01089 #else 01090 /* 01091 * \brief Function is a RF interrupt vector. End of frame in RX and TX are handled here as well as CCA process interrupt. 01092 * 01093 * \param none 01094 * 01095 * \return none 01096 */ 01097 static void rf_if_interrupt_handler(void) 01098 #endif 01099 { 01100 static uint8_t last_is, last_ts; 01101 uint8_t irq_status, full_trx_status; 01102 uint8_t orig_xah_ctrl_1 = xah_ctrl_1; 01103 01104 /*Read and clear interrupt flag, and pick up trx_status*/ 01105 irq_status = rf_if_read_register_with_status(IRQ_STATUS, &full_trx_status); 01106 uint8_t orig_flags = rf_flags; 01107 01108 /*Frame end interrupt (RX and TX)*/ 01109 if(irq_status & TRX_END) 01110 { 01111 /*TX done interrupt*/ 01112 rf_trx_states_t trx_status = rf_if_trx_status_from_full(full_trx_status); 01113 if(trx_status == PLL_ON || trx_status == TX_ARET_ON) 01114 { 01115 rf_handle_tx_end(trx_status); 01116 } 01117 /*Frame received interrupt*/ 01118 else 01119 { 01120 rf_handle_rx_end(trx_status); 01121 } 01122 } 01123 if(irq_status & CCA_ED_DONE) 01124 { 01125 rf_handle_cca_ed_done(full_trx_status); 01126 } 01127 if (irq_status & TRX_UR) 01128 { 01129 tr_error("Radio underrun is %x->%x ts %x->%x fl %x->%x x1 %x", last_is, irq_status, last_ts, full_trx_status, orig_flags, rf_flags, orig_xah_ctrl_1); 01130 } 01131 last_is = irq_status; 01132 last_ts = full_trx_status; 01133 } 01134 01135 /* 01136 * \brief Function writes/read data in SPI interface 01137 */ 01138 static void rf_if_spi_exchange_n(const void *tx, size_t tx_len, void *rx, size_t rx_len) 01139 { 01140 #if 1 01141 rf->spi.write(static_cast<const char *>(tx), tx_len, 01142 static_cast<char *>(rx), rx_len); 01143 #else 01144 const uint8_t *txb = static_cast<const uint8_t *>(tx); 01145 uint8_t *rxb = static_cast<uint8_t *>(rx); 01146 while (tx_len > 0 || rx_len > 0) { 01147 uint8_t b; 01148 if (tx_len) { 01149 tx_len--; 01150 b = *txb++; 01151 } else { 01152 b = 0xFF; 01153 } 01154 b = rf->spi.write(b); 01155 if (rx_len) { 01156 rx_len--; 01157 *rxb++ = b; 01158 } 01159 } 01160 #endif 01161 } 01162 01163 /* 01164 * \brief Function sets given RF flag on. 01165 * 01166 * \param x Given RF flag 01167 * 01168 * \return none 01169 */ 01170 static void rf_flags_set(uint8_t x) 01171 { 01172 rf_flags |= x; 01173 } 01174 01175 /* 01176 * \brief Function clears given RF flag on. 01177 * 01178 * \param x Given RF flag 01179 * 01180 * \return none 01181 */ 01182 static void rf_flags_clear(uint8_t x) 01183 { 01184 rf_flags &= ~x; 01185 } 01186 01187 /* 01188 * \brief Function checks if given RF flag is on. 01189 * 01190 * \param x Given RF flag 01191 * 01192 * \return states of the given flags 01193 */ 01194 static uint8_t rf_flags_check(uint8_t x) 01195 { 01196 return (rf_flags & x); 01197 } 01198 01199 /* 01200 * \brief Function clears all RF flags. 01201 * 01202 * \param none 01203 * 01204 * \return none 01205 */ 01206 static void rf_flags_reset(void) 01207 { 01208 rf_flags = 0; 01209 } 01210 01211 /* 01212 * \brief Function initialises and registers the RF driver. 01213 * 01214 * \param none 01215 * 01216 * \return rf_radio_driver_id Driver ID given by NET library 01217 */ 01218 static int8_t rf_device_register(const uint8_t *mac_addr) 01219 { 01220 rf_trx_part_e radio_type; 01221 01222 rf_init(); 01223 01224 radio_type = rf_radio_type_read(); 01225 if(radio_type != ATMEL_UNKNOW_DEV) 01226 { 01227 /*Set pointer to MAC address*/ 01228 device_driver.PHY_MAC = (uint8_t *)mac_addr; 01229 device_driver.driver_description = (char*)"ATMEL_MAC"; 01230 //Create setup Used Radio chips 01231 if(radio_type == ATMEL_AT86RF212) 01232 { 01233 device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE; 01234 } 01235 else 01236 { 01237 device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE; 01238 } 01239 device_driver.phy_channel_pages = phy_channel_pages; 01240 /*Maximum size of payload is 127*/ 01241 device_driver.phy_MTU = 127; 01242 /*No header in PHY*/ 01243 device_driver.phy_header_length = 0; 01244 /*No tail in PHY*/ 01245 device_driver.phy_tail_length = 0; 01246 /*Set address write function*/ 01247 device_driver.address_write = &rf_address_write; 01248 /*Set RF extension function*/ 01249 device_driver.extension = &rf_extension; 01250 /*Set RF state control function*/ 01251 device_driver.state_control = &rf_interface_state_control; 01252 /*Set transmit function*/ 01253 device_driver.tx = &rf_start_cca; 01254 /*NULLIFY rx and tx_done callbacks*/ 01255 device_driver.phy_rx_cb = NULL; 01256 device_driver.phy_tx_done_cb = NULL; 01257 /*Register device driver*/ 01258 rf_radio_driver_id = arm_net_phy_register(&device_driver); 01259 } else { 01260 rf_if_disable_irq(); 01261 } 01262 return rf_radio_driver_id; 01263 } 01264 01265 /* 01266 * \brief Function unregisters the RF driver. 01267 * 01268 * \param none 01269 * 01270 * \return none 01271 */ 01272 static void rf_device_unregister() 01273 { 01274 if (rf_radio_driver_id >= 0) { 01275 arm_net_phy_unregister(rf_radio_driver_id); 01276 rf_radio_driver_id = -1; 01277 } 01278 } 01279 01280 01281 /* 01282 * \brief Function is a call back for ACK wait timeout. 01283 * 01284 * \param none 01285 * 01286 * \return none 01287 */ 01288 static void rf_ack_wait_timer_interrupt(void) 01289 { 01290 rf_if_lock(); 01291 rf_give_up_on_ack(); 01292 rf_if_unlock(); 01293 } 01294 01295 /* 01296 * \brief Function is a call back for calibration interval timer. 01297 * 01298 * \param none 01299 * 01300 * \return none 01301 */ 01302 static void rf_calibration_timer_interrupt(void) 01303 { 01304 /*Calibrate RF*/ 01305 rf_calibration_cb(); 01306 /*Start new calibration timeout*/ 01307 rf_calibration_timer_start(RF_CALIBRATION_INTERVAL); 01308 } 01309 01310 /* 01311 * \brief Function is a call back for cca interval timer. 01312 * 01313 * \param none 01314 * 01315 * \return none 01316 */ 01317 static void rf_cca_timer_interrupt(void) 01318 { 01319 rf_flags_set(RFF_CCA); 01320 /*Start CCA process*/ 01321 rf_if_start_cca_process(); 01322 } 01323 01324 /* 01325 * \brief Function starts the ACK wait timeout. 01326 * 01327 * \param slots Given slots, resolution 50us 01328 * 01329 * \return none 01330 */ 01331 static void rf_ack_wait_timer_start(uint16_t slots) 01332 { 01333 rf_if_ack_wait_timer_start(slots); 01334 } 01335 01336 /* 01337 * \brief Function starts the calibration interval. 01338 * 01339 * \param slots Given slots, resolution 50us 01340 * 01341 * \return none 01342 */ 01343 static void rf_calibration_timer_start(uint32_t slots) 01344 { 01345 rf_if_calibration_timer_start(slots); 01346 } 01347 01348 /* 01349 * \brief Function starts the CCA backoff. 01350 * 01351 * \param slots Given slots, resolution 50us 01352 * 01353 * \return none 01354 */ 01355 static void rf_cca_timer_start(uint32_t slots) 01356 { 01357 rf_if_cca_timer_start(slots); 01358 } 01359 01360 /* 01361 * \brief Function stops the CCA backoff. 01362 * 01363 * \return none 01364 */ 01365 static void rf_cca_timer_stop(void) 01366 { 01367 rf_if_cca_timer_stop(); 01368 } 01369 01370 /* 01371 * \brief Function stops the ACK wait timeout. 01372 * 01373 * \param none 01374 * 01375 * \return none 01376 */ 01377 static void rf_ack_wait_timer_stop(void) 01378 { 01379 rf_if_ack_wait_timer_stop(); 01380 } 01381 01382 /* 01383 * \brief Function writes various RF settings in startup. 01384 * 01385 * \param none 01386 * 01387 * \return none 01388 */ 01389 static void rf_write_settings(void) 01390 { 01391 rf_if_lock(); 01392 rf_if_write_rf_settings(); 01393 /*Set output power*/ 01394 rf_if_write_set_tx_power_register(radio_tx_power); 01395 /*Initialise Antenna Diversity*/ 01396 if(rf_use_antenna_diversity) 01397 rf_if_write_antenna_diversity_settings(); 01398 rf_if_unlock(); 01399 } 01400 01401 /* 01402 * \brief Function writes 16-bit address in RF address filter. 01403 * 01404 * \param short_address Given short address 01405 * 01406 * \return none 01407 */ 01408 static void rf_set_short_adr(uint8_t * short_address) 01409 { 01410 rf_if_lock(); 01411 /*Wake up RF if sleeping*/ 01412 if(rf_flags_check(RFF_ON) == 0) 01413 { 01414 rf_if_disable_slptr(); 01415 rf_poll_trx_state_change(TRX_OFF); 01416 } 01417 /*Write address filter registers*/ 01418 rf_if_write_short_addr_registers(short_address); 01419 /*RF back to sleep*/ 01420 if(rf_flags_check(RFF_ON) == 0) 01421 { 01422 rf_if_enable_slptr(); 01423 } 01424 rf_if_unlock(); 01425 } 01426 01427 /* 01428 * \brief Function writes PAN Id in RF PAN Id filter. 01429 * 01430 * \param pan_id Given PAN Id 01431 * 01432 * \return none 01433 */ 01434 static void rf_set_pan_id(uint8_t *pan_id) 01435 { 01436 rf_if_lock(); 01437 /*Wake up RF if sleeping*/ 01438 if(rf_flags_check(RFF_ON) == 0) 01439 { 01440 rf_if_disable_slptr(); 01441 rf_poll_trx_state_change(TRX_OFF); 01442 } 01443 /*Write address filter registers*/ 01444 rf_if_write_pan_id_registers(pan_id); 01445 /*RF back to sleep*/ 01446 if(rf_flags_check(RFF_ON) == 0) 01447 { 01448 rf_if_enable_slptr(); 01449 } 01450 rf_if_unlock(); 01451 } 01452 01453 /* 01454 * \brief Function writes 64-bit address in RF address filter. 01455 * 01456 * \param address Given 64-bit address 01457 * 01458 * \return none 01459 */ 01460 static void rf_set_address(uint8_t *address) 01461 { 01462 rf_if_lock(); 01463 /*Wake up RF if sleeping*/ 01464 if(rf_flags_check(RFF_ON) == 0) 01465 { 01466 rf_if_disable_slptr(); 01467 rf_poll_trx_state_change(TRX_OFF); 01468 } 01469 /*Write address filter registers*/ 01470 rf_if_write_ieee_addr_registers(address); 01471 /*RF back to sleep*/ 01472 if(rf_flags_check(RFF_ON) == 0) 01473 { 01474 rf_if_enable_slptr(); 01475 } 01476 rf_if_unlock(); 01477 } 01478 01479 /* 01480 * \brief Function sets the RF channel. 01481 * 01482 * \param ch New channel 01483 * 01484 * \return none 01485 */ 01486 static void rf_channel_set(uint8_t ch) 01487 { 01488 rf_if_lock(); 01489 rf_phy_channel = ch; 01490 if(ch < 0x1f) 01491 rf_if_set_channel_register(ch); 01492 rf_if_unlock(); 01493 } 01494 01495 01496 /* 01497 * \brief Function initialises the radio driver and resets the radio. 01498 * 01499 * \param none 01500 * 01501 * \return none 01502 */ 01503 static void rf_init(void) 01504 { 01505 rf_if_lock(); 01506 01507 /*Write RF settings*/ 01508 rf_write_settings(); 01509 /*Initialise PHY mode*/ 01510 rf_init_phy_mode(); 01511 /*Clear RF flags*/ 01512 rf_flags_reset(); 01513 /*Set RF in TRX OFF state*/ 01514 rf_if_change_trx_state(TRX_OFF); 01515 /*Set RF in PLL_ON state*/ 01516 rf_trx_states_t trx_status = rf_if_change_trx_state(PLL_ON); 01517 /*Start receiver*/ 01518 rf_receive(trx_status); 01519 /*Read randomness, and add to seed*/ 01520 randLIB_add_seed(rf_if_read_rnd()); 01521 /*Start RF calibration timer*/ 01522 rf_calibration_timer_start(RF_CALIBRATION_INTERVAL); 01523 01524 rf_if_unlock(); 01525 } 01526 01527 /** 01528 * \brief Function gets called when MAC is setting radio off. 01529 * 01530 * \param none 01531 * 01532 * \return none 01533 */ 01534 static void rf_off(void) 01535 { 01536 if(rf_flags_check(RFF_ON)) 01537 { 01538 rf_if_lock(); 01539 rf_cca_abort(); 01540 uint16_t while_counter = 0; 01541 /*Wait while receiving*/ 01542 while(rf_if_read_trx_state() == BUSY_RX_AACK) 01543 { 01544 while_counter++; 01545 if(while_counter == 0xffff) 01546 break; 01547 } 01548 /*RF state change: RX_AACK_ON->PLL_ON->TRX_OFF->SLEEP*/ 01549 if(rf_if_read_trx_state() == RX_AACK_ON) 01550 { 01551 rf_if_change_trx_state(PLL_ON); 01552 } 01553 rf_if_change_trx_state(TRX_OFF); 01554 rf_if_enable_slptr(); 01555 01556 /*Disable Antenna Diversity*/ 01557 if(rf_use_antenna_diversity) 01558 rf_if_disable_ant_div(); 01559 rf_if_unlock(); 01560 } 01561 01562 /*Clears all flags*/ 01563 rf_flags_reset(); 01564 } 01565 01566 /* 01567 * \brief Function polls the RF state until it has changed to desired state. 01568 * 01569 * \param trx_state RF state 01570 * 01571 * \return none 01572 */ 01573 static rf_trx_states_t rf_poll_trx_state_change(rf_trx_states_t trx_state) 01574 { 01575 uint16_t while_counter = 0; 01576 01577 if(trx_state == FORCE_PLL_ON) 01578 trx_state = PLL_ON; 01579 else if(trx_state == FORCE_TRX_OFF) 01580 trx_state = TRX_OFF; 01581 01582 rf_trx_states_t state_out; 01583 while((state_out = rf_if_read_trx_state()) != trx_state) 01584 { 01585 while_counter++; 01586 if(while_counter == 0x1ff) 01587 break; 01588 } 01589 01590 return state_out; 01591 } 01592 01593 /* 01594 * \brief Function polls the RF state until it is no longer transitioning. 01595 * 01596 * \param trx_state RF state 01597 * 01598 * \return none 01599 */ 01600 static rf_trx_states_t rf_poll_for_state(void) 01601 { 01602 rf_trx_states_t state_out; 01603 while((state_out = rf_if_read_trx_state()) == STATE_TRANSITION_IN_PROGRESS) 01604 { 01605 } 01606 01607 return state_out; 01608 } 01609 01610 /* 01611 * \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO. 01612 * 01613 * \param data_ptr Pointer to TX data (excluding FCS) 01614 * \param data_length Length of the TX data (excluding FCS) 01615 * \param tx_handle Handle to transmission 01616 * \return 0 Success 01617 * \return -1 Busy 01618 */ 01619 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol ) 01620 { 01621 (void)data_protocol; 01622 rf_if_lock(); 01623 /*Check if transmitter is busy*/ 01624 rf_trx_states_t trx_state = rf_if_read_trx_state(); 01625 if(trx_state == BUSY_RX || trx_state == BUSY_RX_AACK || data_length > RF_MTU - 2) 01626 { 01627 rf_if_unlock(); 01628 /*Return busy*/ 01629 return -1; 01630 } 01631 else 01632 { 01633 rf_give_up_on_ack(); 01634 01635 /*Nanostack has a static TX buffer, which will remain valid until we*/ 01636 /*generate a callback, so we just note the pointer for reading later.*/ 01637 rf_tx_data = data_ptr; 01638 rf_tx_length = data_length; 01639 /*Start CCA timeout*/ 01640 rf_cca_timer_start(RF_CCA_BASE_BACKOFF + randLIB_get_random_in_range(0, RF_CCA_RANDOM_BACKOFF)); 01641 /*Store TX handle*/ 01642 mac_tx_handle = tx_handle; 01643 rf_if_unlock(); 01644 } 01645 01646 /*Return success*/ 01647 return 0; 01648 } 01649 01650 /* 01651 * \brief Function aborts CCA process. 01652 * 01653 * \param none 01654 * 01655 * \return none 01656 */ 01657 static void rf_cca_abort(void) 01658 { 01659 rf_cca_timer_stop(); 01660 rf_flags_clear(RFF_CCA); 01661 } 01662 01663 /* 01664 * \brief Function starts the transmission of the frame. 01665 * 01666 * \param none 01667 * 01668 * \return none 01669 */ 01670 static bool rf_start_tx() 01671 { 01672 /* Attempt change to PLL_ON */ 01673 rf_if_write_register(TRX_STATE, PLL_ON); 01674 01675 // It appears that if radio is busy, rather than ignoring the state change, 01676 // the state change happens when it stops being busy - eg 01677 // after address match fail or finishing reception. If this happens, we do 01678 // not want to transmit - our channel clear check is stale (either someone is 01679 // still transmitting, or it's a long time since we checked). So wait for the 01680 // PLL_ON change and then go to receive mode without trying to transmit. 01681 rf_trx_states_t state = rf_poll_for_state(); 01682 int poll_count = 0; 01683 while (state != PLL_ON) { 01684 /* Change didn't work (yet) - must be busy - assume it will eventually change */ 01685 state = rf_poll_for_state(); 01686 poll_count++; 01687 } 01688 01689 rf_flags_clear(RFF_RX); 01690 // Check whether we saw any delay in the PLL_ON transition. 01691 if (poll_count > 0) { 01692 tr_warning("PLL_ON delayed, retry count: %d", poll_count); 01693 // let's get back to the receiving state. 01694 rf_receive(state); 01695 return false; 01696 } 01697 01698 rf_flags_set(RFF_TX); 01699 /*RF state change: SLP_TR pulse triggers PLL_ON->BUSY_TX*/ 01700 rf_if_enable_slptr(); 01701 /*Chip permits us to write frame buffer while it is transmitting*/ 01702 /*As long as first byte of data is in within 176us of TX start, we're good */ 01703 rf_if_write_frame_buffer(rf_tx_data, rf_tx_length); 01704 rf_if_disable_slptr(); 01705 return true; 01706 } 01707 01708 /* 01709 * \brief Function sets the RF in RX state. 01710 * 01711 * \param none 01712 * 01713 * \return none 01714 */ 01715 static void rf_receive(rf_trx_states_t trx_status) 01716 { 01717 uint16_t while_counter = 0; 01718 if(rf_flags_check(RFF_ON) == 0) 01719 { 01720 rf_on(); 01721 rf_channel_set(rf_phy_channel); 01722 trx_status = TRX_OFF; 01723 } 01724 /*If not yet in RX state set it*/ 01725 if(rf_flags_check(RFF_RX) == 0) 01726 { 01727 /*Wait while receiving data. Just making sure, usually this shouldn't happen. */ 01728 while(trx_status == BUSY_RX || trx_status == BUSY_RX_AACK || trx_status == STATE_TRANSITION_IN_PROGRESS) 01729 { 01730 while_counter++; 01731 if(while_counter == 0xffff) 01732 { 01733 break; 01734 } 01735 trx_status = rf_if_read_trx_state(); 01736 } 01737 01738 if((rf_mode == RF_MODE_SNIFFER) || (rf_mode == RF_MODE_ED)) 01739 { 01740 if (trx_status != RX_ON) { 01741 trx_status = rf_if_change_trx_state(RX_ON); 01742 } 01743 } 01744 else 01745 { 01746 /*ACK is always received in promiscuous mode to bypass address filters*/ 01747 if(rf_rx_mode) 01748 { 01749 rf_rx_mode = 0; 01750 rf_if_enable_promiscuous_mode(); 01751 } 01752 else 01753 { 01754 rf_if_disable_promiscuous_mode(); 01755 } 01756 if (trx_status != RX_AACK_ON) { 01757 trx_status = rf_if_change_trx_state(RX_AACK_ON); 01758 } 01759 } 01760 /*If calibration timer was unable to calibrate the RF, run calibration now*/ 01761 if(!rf_tuned) 01762 { 01763 /*Start calibration. This can be done in states TRX_OFF, PLL_ON or in any receive state*/ 01764 rf_if_calibration(); 01765 /*RF is tuned now*/ 01766 rf_tuned = 1; 01767 } 01768 01769 rf_flags_set(RFF_RX); 01770 } 01771 } 01772 01773 /* 01774 * \brief Function calibrates the radio. 01775 * 01776 * \param none 01777 * 01778 * \return none 01779 */ 01780 static void rf_calibration_cb(void) 01781 { 01782 /*clear tuned flag to start tuning in rf_receive*/ 01783 rf_tuned = 0; 01784 /*If RF is in default receive state, start calibration*/ 01785 if(rf_if_read_trx_state() == RX_AACK_ON) 01786 { 01787 rf_if_lock(); 01788 /*Set RF in PLL_ON state*/ 01789 rf_if_change_trx_state(PLL_ON); 01790 /*Set RF in TRX_OFF state to start PLL tuning*/ 01791 rf_if_change_trx_state(TRX_OFF); 01792 /*Set RF in RX_ON state to calibrate*/ 01793 rf_trx_states_t trx_status = rf_if_change_trx_state(RX_ON); 01794 /*Calibrate FTN*/ 01795 rf_if_calibration(); 01796 /*RF is tuned now*/ 01797 rf_tuned = 1; 01798 /*Back to default receive state*/ 01799 rf_flags_clear(RFF_RX); 01800 rf_receive(trx_status); 01801 rf_if_unlock(); 01802 } 01803 } 01804 01805 /* 01806 * \brief Function sets RF_ON flag when radio is powered. 01807 * 01808 * \param none 01809 * 01810 * \return none 01811 */ 01812 static void rf_on(void) 01813 { 01814 /*Set RFF_ON flag*/ 01815 if(rf_flags_check(RFF_ON) == 0) 01816 { 01817 rf_if_lock(); 01818 rf_flags_set(RFF_ON); 01819 /*Enable Antenna diversity*/ 01820 if(rf_use_antenna_diversity) 01821 /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/ 01822 rf_if_enable_ant_div(); 01823 01824 /*Wake up from sleep state*/ 01825 rf_if_disable_slptr(); 01826 rf_poll_trx_state_change(TRX_OFF); 01827 rf_if_unlock(); 01828 } 01829 } 01830 01831 /* 01832 * \brief Abandon waiting for an ack frame 01833 01834 * \return none 01835 */ 01836 static void rf_give_up_on_ack(void) 01837 { 01838 if (expected_ack_sequence == -1) { 01839 return; 01840 } 01841 01842 rf_if_disable_promiscuous_mode(); 01843 rf_if_ack_wait_timer_stop(); 01844 expected_ack_sequence = -1; 01845 01846 if(device_driver.phy_tx_done_cb){ 01847 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_FAIL, 0, 0); 01848 } 01849 } 01850 01851 /* 01852 * \brief Function handles the received ACK frame. 01853 * 01854 * \param seq_number Sequence number of received ACK 01855 * \param data_pending Pending bit state in received ACK 01856 * 01857 * \return none 01858 */ 01859 static void rf_handle_ack(uint8_t seq_number, uint8_t data_pending) 01860 { 01861 phy_link_tx_status_e phy_status; 01862 /*Received ACK sequence must be equal with transmitted packet sequence*/ 01863 if(expected_ack_sequence == seq_number) 01864 { 01865 rf_if_disable_promiscuous_mode(); 01866 rf_if_ack_wait_timer_stop(); 01867 expected_ack_sequence = -1; 01868 01869 /*When data pending bit in ACK frame is set, inform NET library*/ 01870 if(data_pending) 01871 phy_status = PHY_LINK_TX_DONE_PENDING; 01872 else 01873 phy_status = PHY_LINK_TX_DONE; 01874 /*Call PHY TX Done API*/ 01875 if(device_driver.phy_tx_done_cb){ 01876 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle,phy_status, 0, 0); 01877 } 01878 } else { 01879 rf_give_up_on_ack(); 01880 } 01881 } 01882 01883 /* 01884 * \brief Function is a call back for RX end interrupt. 01885 * 01886 * \param none 01887 * 01888 * \return none 01889 */ 01890 static void rf_handle_rx_end(rf_trx_states_t trx_status) 01891 { 01892 /*Frame received interrupt*/ 01893 if(!rf_flags_check(RFF_RX)) { 01894 return; 01895 } 01896 01897 static uint8_t rf_buffer[RF_MTU]; 01898 uint8_t rf_lqi, rf_ed; 01899 int8_t rf_rssi; 01900 bool crc_good; 01901 01902 /*Read received packet*/ 01903 uint8_t len = rf_if_read_packet(rf_buffer, &rf_lqi, &rf_ed, &crc_good); 01904 01905 if (len < 5 || !crc_good) { 01906 rf_give_up_on_ack(); 01907 return; 01908 } 01909 01910 /* Convert raw ED to dBm value (chip-dependent) */ 01911 rf_rssi = rf_if_scale_rssi(rf_ed); 01912 01913 /* Create a virtual LQI using received RSSI, forgetting actual HW LQI */ 01914 /* (should be done through PHY_EXTENSION_CONVERT_SIGNAL_INFO) */ 01915 rf_lqi = rf_scale_lqi(rf_rssi); 01916 01917 /*Handle received ACK*/ 01918 if((rf_buffer[0] & 0x07) == 0x02 && rf_mode != RF_MODE_SNIFFER) 01919 { 01920 /*Check if data is pending*/ 01921 bool pending = (rf_buffer[0] & 0x10); 01922 01923 /*Send sequence number in ACK handler*/ 01924 rf_handle_ack(rf_buffer[2], pending); 01925 } else { 01926 rf_give_up_on_ack(); 01927 if( device_driver.phy_rx_cb ){ 01928 device_driver.phy_rx_cb(rf_buffer, len - 2, rf_lqi, rf_rssi, rf_radio_driver_id); 01929 } 01930 } 01931 } 01932 01933 /* 01934 * \brief Function is called when MAC is shutting down the radio. 01935 * 01936 * \param none 01937 * 01938 * \return none 01939 */ 01940 static void rf_shutdown(void) 01941 { 01942 /*Call RF OFF*/ 01943 rf_off(); 01944 } 01945 01946 /* 01947 * \brief Function is a call back for TX end interrupt. 01948 * 01949 * \param none 01950 * 01951 * \return none 01952 */ 01953 static void rf_handle_tx_end(rf_trx_states_t trx_status) 01954 { 01955 rf_rx_mode = 0; 01956 /*If ACK is needed for this transmission*/ 01957 if((rf_tx_data[0] & 0x20) && rf_flags_check(RFF_TX)) 01958 { 01959 expected_ack_sequence = rf_tx_data[2]; 01960 rf_ack_wait_timer_start(rf_ack_wait_duration); 01961 rf_rx_mode = 1; 01962 } 01963 rf_flags_clear(RFF_TX); 01964 /*Start receiver*/ 01965 rf_receive(trx_status); 01966 01967 /*Call PHY TX Done API*/ 01968 if(device_driver.phy_tx_done_cb){ 01969 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 0, 0); 01970 } 01971 } 01972 01973 /* 01974 * \brief Function is a call back for CCA ED done interrupt. 01975 * 01976 * \param none 01977 * 01978 * \return none 01979 */ 01980 static void rf_handle_cca_ed_done(uint8_t full_trx_status) 01981 { 01982 if (!rf_flags_check(RFF_CCA)) { 01983 return; 01984 } 01985 rf_flags_clear(RFF_CCA); 01986 01987 bool success = false; 01988 01989 /*Check the result of CCA process*/ 01990 if((full_trx_status & CCA_STATUS) && rf_if_trx_status_from_full(full_trx_status) == RX_AACK_ON) 01991 { 01992 success = rf_start_tx(); 01993 } 01994 01995 if (!success) 01996 { 01997 /*Send CCA fail notification*/ 01998 if(device_driver.phy_tx_done_cb){ 01999 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0); 02000 } 02001 } 02002 } 02003 02004 /* 02005 * \brief Function returns the TX power variable. 02006 * 02007 * \param none 02008 * 02009 * \return radio_tx_power TX power variable 02010 */ 02011 MBED_UNUSED static uint8_t rf_tx_power_get(void) 02012 { 02013 return radio_tx_power; 02014 } 02015 02016 /* 02017 * \brief Function enables the usage of Antenna diversity. 02018 * 02019 * \param none 02020 * 02021 * \return 0 Success 02022 */ 02023 MBED_UNUSED static int8_t rf_enable_antenna_diversity(void) 02024 { 02025 int8_t ret_val = 0; 02026 rf_use_antenna_diversity = 1; 02027 return ret_val; 02028 } 02029 02030 /* 02031 * \brief Function gives the control of RF states to MAC. 02032 * 02033 * \param new_state RF state 02034 * \param rf_channel RF channel 02035 * 02036 * \return 0 Success 02037 */ 02038 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel) 02039 { 02040 int8_t ret_val = 0; 02041 switch (new_state) 02042 { 02043 /*Reset PHY driver and set to idle*/ 02044 case PHY_INTERFACE_RESET: 02045 break; 02046 /*Disable PHY Interface driver*/ 02047 case PHY_INTERFACE_DOWN: 02048 rf_shutdown(); 02049 break; 02050 /*Enable PHY Interface driver*/ 02051 case PHY_INTERFACE_UP: 02052 rf_if_lock(); 02053 rf_mode = RF_MODE_NORMAL; 02054 rf_channel_set(rf_channel); 02055 rf_receive(); 02056 rf_if_enable_irq(); 02057 rf_if_unlock(); 02058 break; 02059 /*Enable wireless interface ED scan mode*/ 02060 case PHY_INTERFACE_RX_ENERGY_STATE: 02061 rf_mode = RF_MODE_ED; 02062 rf_channel_set(rf_channel); 02063 rf_receive(); 02064 rf_if_disable_irq(); 02065 // Read status to clear pending flags. 02066 rf_if_read_register(IRQ_STATUS); 02067 // ED can be initiated by writing arbitrary value to PHY_ED_LEVEL 02068 rf_if_write_register(PHY_ED_LEVEL, 0xff); 02069 break; 02070 case PHY_INTERFACE_SNIFFER_STATE: /**< Enable Sniffer state */ 02071 rf_mode = RF_MODE_SNIFFER; 02072 rf_channel_set(rf_channel); 02073 rf_flags_clear(RFF_RX); 02074 rf_receive(); 02075 rf_if_enable_irq(); 02076 break; 02077 } 02078 return ret_val; 02079 } 02080 02081 /* 02082 * \brief Function controls the ACK pending, channel setting and energy detection. 02083 * 02084 * \param extension_type Type of control 02085 * \param data_ptr Data from NET library 02086 * 02087 * \return 0 Success 02088 */ 02089 static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr) 02090 { 02091 switch (extension_type) 02092 { 02093 /*Control MAC pending bit for Indirect data transmission*/ 02094 case PHY_EXTENSION_CTRL_PENDING_BIT: 02095 if(*data_ptr) 02096 { 02097 rf_if_ack_pending_ctrl(1); 02098 } 02099 else 02100 { 02101 rf_if_ack_pending_ctrl(0); 02102 } 02103 break; 02104 /*Return frame pending status*/ 02105 case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS: 02106 *data_ptr = rf_if_last_acked_pending(); 02107 break; 02108 /*Set channel*/ 02109 case PHY_EXTENSION_SET_CHANNEL: 02110 break; 02111 /*Read energy on the channel*/ 02112 case PHY_EXTENSION_READ_CHANNEL_ENERGY: 02113 // End of the ED measurement is indicated by CCA_ED_DONE 02114 while (!(rf_if_read_register(IRQ_STATUS) & CCA_ED_DONE)); 02115 // RF input power: RSSI base level + 1[db] * PHY_ED_LEVEL 02116 *data_ptr = rf_sensitivity + rf_if_read_register(PHY_ED_LEVEL); 02117 // Read status to clear pending flags. 02118 rf_if_read_register(IRQ_STATUS); 02119 // Next ED measurement is started, next PHY_EXTENSION_READ_CHANNEL_ENERGY call will return the result. 02120 rf_if_write_register(PHY_ED_LEVEL, 0xff); 02121 break; 02122 /*Read status of the link*/ 02123 case PHY_EXTENSION_READ_LINK_STATUS: 02124 break; 02125 default: 02126 break; 02127 } 02128 return 0; 02129 } 02130 02131 /* 02132 * \brief Function sets the addresses to RF address filters. 02133 * 02134 * \param address_type Type of address 02135 * \param address_ptr Pointer to given address 02136 * 02137 * \return 0 Success 02138 */ 02139 static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr) 02140 { 02141 int8_t ret_val = 0; 02142 switch (address_type) 02143 { 02144 /*Set 48-bit address*/ 02145 case PHY_MAC_48BIT: 02146 break; 02147 /*Set 64-bit address*/ 02148 case PHY_MAC_64BIT: 02149 rf_set_address(address_ptr); 02150 break; 02151 /*Set 16-bit address*/ 02152 case PHY_MAC_16BIT: 02153 rf_set_short_adr(address_ptr); 02154 break; 02155 /*Set PAN Id*/ 02156 case PHY_MAC_PANID: 02157 rf_set_pan_id(address_ptr); 02158 break; 02159 } 02160 return ret_val; 02161 } 02162 02163 /* 02164 * \brief Function initialises the ACK wait time and returns the used PHY mode. 02165 * 02166 * \param none 02167 * 02168 * \return tmp Used PHY mode 02169 */ 02170 static void rf_init_phy_mode(void) 02171 { 02172 uint8_t tmp = 0; 02173 uint8_t part = rf_if_read_part_num(); 02174 /*Read used PHY Mode*/ 02175 tmp = rf_if_read_register(TRX_CTRL_2); 02176 /*Set ACK wait time for used data rate*/ 02177 if(part == PART_AT86RF212) 02178 { 02179 if((tmp & 0x1f) == 0x00) 02180 { 02181 rf_sensitivity = -110; 02182 rf_ack_wait_duration = 938; 02183 tmp = BPSK_20; 02184 } 02185 else if((tmp & 0x1f) == 0x04) 02186 { 02187 rf_sensitivity = -108; 02188 rf_ack_wait_duration = 469; 02189 tmp = BPSK_40; 02190 } 02191 else if((tmp & 0x1f) == 0x14) 02192 { 02193 rf_sensitivity = -108; 02194 rf_ack_wait_duration = 469; 02195 tmp = BPSK_40_ALT; 02196 } 02197 else if((tmp & 0x1f) == 0x08) 02198 { 02199 rf_sensitivity = -101; 02200 rf_ack_wait_duration = 50; 02201 tmp = OQPSK_SIN_RC_100; 02202 } 02203 else if((tmp & 0x1f) == 0x09) 02204 { 02205 rf_sensitivity = -99; 02206 rf_ack_wait_duration = 30; 02207 tmp = OQPSK_SIN_RC_200; 02208 } 02209 else if((tmp & 0x1f) == 0x18) 02210 { 02211 rf_sensitivity = -102; 02212 rf_ack_wait_duration = 50; 02213 tmp = OQPSK_RC_100; 02214 } 02215 else if((tmp & 0x1f) == 0x19) 02216 { 02217 rf_sensitivity = -100; 02218 rf_ack_wait_duration = 30; 02219 tmp = OQPSK_RC_200; 02220 } 02221 else if((tmp & 0x1f) == 0x0c) 02222 { 02223 rf_sensitivity = -100; 02224 rf_ack_wait_duration = 20; 02225 tmp = OQPSK_SIN_250; 02226 } 02227 else if((tmp & 0x1f) == 0x0d) 02228 { 02229 rf_sensitivity = -98; 02230 rf_ack_wait_duration = 25; 02231 tmp = OQPSK_SIN_500; 02232 } 02233 else if((tmp & 0x1f) == 0x0f) 02234 { 02235 rf_sensitivity = -98; 02236 rf_ack_wait_duration = 25; 02237 tmp = OQPSK_SIN_500_ALT; 02238 } 02239 else if((tmp & 0x1f) == 0x1c) 02240 { 02241 rf_sensitivity = -101; 02242 rf_ack_wait_duration = 20; 02243 tmp = OQPSK_RC_250; 02244 } 02245 else if((tmp & 0x1f) == 0x1d) 02246 { 02247 rf_sensitivity = -99; 02248 rf_ack_wait_duration = 25; 02249 tmp = OQPSK_RC_500; 02250 } 02251 else if((tmp & 0x1f) == 0x1f) 02252 { 02253 rf_sensitivity = -99; 02254 rf_ack_wait_duration = 25; 02255 tmp = OQPSK_RC_500_ALT; 02256 } 02257 else if((tmp & 0x3f) == 0x2A) 02258 { 02259 rf_sensitivity = -91; 02260 rf_ack_wait_duration = 25; 02261 tmp = OQPSK_SIN_RC_400_SCR_ON; 02262 } 02263 else if((tmp & 0x3f) == 0x0A) 02264 { 02265 rf_sensitivity = -91; 02266 rf_ack_wait_duration = 25; 02267 tmp = OQPSK_SIN_RC_400_SCR_OFF; 02268 } 02269 else if((tmp & 0x3f) == 0x3A) 02270 { 02271 rf_sensitivity = -97; 02272 rf_ack_wait_duration = 25; 02273 tmp = OQPSK_RC_400_SCR_ON; 02274 } 02275 else if((tmp & 0x3f) == 0x1A) 02276 { 02277 rf_sensitivity = -97; 02278 rf_ack_wait_duration = 25; 02279 tmp = OQPSK_RC_400_SCR_OFF; 02280 } 02281 else if((tmp & 0x3f) == 0x2E) 02282 { 02283 rf_sensitivity = -93; 02284 rf_ack_wait_duration = 13; 02285 tmp = OQPSK_SIN_1000_SCR_ON; 02286 } 02287 else if((tmp & 0x3f) == 0x0E) 02288 { 02289 rf_sensitivity = -93; 02290 rf_ack_wait_duration = 13; 02291 tmp = OQPSK_SIN_1000_SCR_OFF; 02292 } 02293 else if((tmp & 0x3f) == 0x3E) 02294 { 02295 rf_sensitivity = -95; 02296 rf_ack_wait_duration = 13; 02297 tmp = OQPSK_RC_1000_SCR_ON; 02298 } 02299 else if((tmp & 0x3f) == 0x1E) 02300 { 02301 rf_sensitivity = -95; 02302 rf_ack_wait_duration = 13; 02303 tmp = OQPSK_RC_1000_SCR_OFF; 02304 } 02305 } 02306 else 02307 { 02308 rf_sensitivity = -101; 02309 rf_ack_wait_duration = 20; 02310 } 02311 /*Board design might reduces the sensitivity*/ 02312 //rf_sensitivity += RF_SENSITIVITY_CALIBRATION; 02313 } 02314 02315 02316 static uint8_t rf_scale_lqi(int8_t rssi) 02317 { 02318 uint8_t scaled_lqi; 02319 02320 /*rssi < RF sensitivity*/ 02321 if(rssi < rf_sensitivity) 02322 scaled_lqi=0; 02323 /*-91 dBm < rssi < -81 dBm (AT86RF233 XPro)*/ 02324 /*-90 dBm < rssi < -80 dBm (AT86RF212B XPro)*/ 02325 else if(rssi < (rf_sensitivity + 10)) 02326 scaled_lqi=31; 02327 /*-81 dBm < rssi < -71 dBm (AT86RF233 XPro)*/ 02328 /*-80 dBm < rssi < -70 dBm (AT86RF212B XPro)*/ 02329 else if(rssi < (rf_sensitivity + 20)) 02330 scaled_lqi=207; 02331 /*-71 dBm < rssi < -61 dBm (AT86RF233 XPro)*/ 02332 /*-70 dBm < rssi < -60 dBm (AT86RF212B XPro)*/ 02333 else if(rssi < (rf_sensitivity + 30)) 02334 scaled_lqi=255; 02335 /*-61 dBm < rssi < -51 dBm (AT86RF233 XPro)*/ 02336 /*-60 dBm < rssi < -50 dBm (AT86RF212B XPro)*/ 02337 else if(rssi < (rf_sensitivity + 40)) 02338 scaled_lqi=255; 02339 /*-51 dBm < rssi < -41 dBm (AT86RF233 XPro)*/ 02340 /*-50 dBm < rssi < -40 dBm (AT86RF212B XPro)*/ 02341 else if(rssi < (rf_sensitivity + 50)) 02342 scaled_lqi=255; 02343 /*-41 dBm < rssi < -31 dBm (AT86RF233 XPro)*/ 02344 /*-40 dBm < rssi < -30 dBm (AT86RF212B XPro)*/ 02345 else if(rssi < (rf_sensitivity + 60)) 02346 scaled_lqi=255; 02347 /*-31 dBm < rssi < -21 dBm (AT86RF233 XPro)*/ 02348 /*-30 dBm < rssi < -20 dBm (AT86RF212B XPro)*/ 02349 else if(rssi < (rf_sensitivity + 70)) 02350 scaled_lqi=255; 02351 /*rssi > RF saturation*/ 02352 else if(rssi > (rf_sensitivity + 80)) 02353 scaled_lqi=111; 02354 /*-21 dBm < rssi < -11 dBm (AT86RF233 XPro)*/ 02355 /*-20 dBm < rssi < -10 dBm (AT86RF212B XPro)*/ 02356 else 02357 scaled_lqi=255; 02358 02359 return scaled_lqi; 02360 } 02361 02362 NanostackRfPhyAtmel::NanostackRfPhyAtmel(PinName spi_mosi, PinName spi_miso, 02363 PinName spi_sclk, PinName spi_cs, PinName spi_rst, PinName spi_slp, PinName spi_irq, 02364 PinName i2c_sda, PinName i2c_scl) 02365 : _mac(i2c_sda, i2c_scl), _mac_addr(), _rf(NULL), _mac_set(false), 02366 _spi_mosi(spi_mosi), _spi_miso(spi_miso), _spi_sclk(spi_sclk), 02367 _spi_cs(spi_cs), _spi_rst(spi_rst), _spi_slp(spi_slp), _spi_irq(spi_irq) 02368 { 02369 _rf = new RFBits(_spi_mosi, _spi_miso, _spi_sclk, _spi_cs, _spi_rst, _spi_slp, _spi_irq); 02370 } 02371 02372 NanostackRfPhyAtmel::~NanostackRfPhyAtmel() 02373 { 02374 delete _rf; 02375 } 02376 02377 int8_t NanostackRfPhyAtmel::rf_register() 02378 { 02379 if (NULL == _rf) { 02380 return -1; 02381 } 02382 02383 rf_if_lock(); 02384 02385 if (rf != NULL) { 02386 rf_if_unlock(); 02387 error("Multiple registrations of NanostackRfPhyAtmel not supported"); 02388 return -1; 02389 } 02390 02391 // Read the mac address if it hasn't been set by a user 02392 rf = _rf; 02393 if (!_mac_set) { 02394 int ret = _mac.read_eui64((void*)_mac_addr); 02395 if (ret < 0) { 02396 rf = NULL; 02397 rf_if_unlock(); 02398 return -1; 02399 } 02400 } 02401 02402 int8_t radio_id = rf_device_register(_mac_addr); 02403 if (radio_id < 0) { 02404 rf = NULL; 02405 } 02406 02407 rf_if_unlock(); 02408 return radio_id; 02409 } 02410 02411 void NanostackRfPhyAtmel::rf_unregister() 02412 { 02413 rf_if_lock(); 02414 02415 if (NULL == rf) { 02416 rf_if_unlock(); 02417 return; 02418 } 02419 02420 rf_device_unregister(); 02421 rf = NULL; 02422 02423 rf_if_unlock(); 02424 } 02425 02426 void NanostackRfPhyAtmel::get_mac_address(uint8_t *mac) 02427 { 02428 rf_if_lock(); 02429 02430 if (NULL == rf) { 02431 error("NanostackRfPhyAtmel Must be registered to read mac address"); 02432 rf_if_unlock(); 02433 return; 02434 } 02435 memcpy((void*)mac, (void*)_mac_addr, sizeof(_mac_addr)); 02436 02437 rf_if_unlock(); 02438 } 02439 02440 void NanostackRfPhyAtmel::set_mac_address(uint8_t *mac) 02441 { 02442 rf_if_lock(); 02443 02444 if (NULL != rf) { 02445 error("NanostackRfPhyAtmel cannot change mac address when running"); 02446 rf_if_unlock(); 02447 return; 02448 } 02449 memcpy((void*)_mac_addr, (void*)mac, sizeof(_mac_addr)); 02450 _mac_set = true; 02451 02452 rf_if_unlock(); 02453 } 02454 02455 #endif // MBED_CONF_NANOSTACK_CONFIGURATION
Generated on Tue Jul 12 2022 16:22:08 by
1.7.2