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Dependents:   20180621_FT813

Fork of BurstSPI by Erik -

Committer:
frankvnk
Date:
Fri Jan 04 09:51:42 2013 +0000
Revision:
2:a8e55f7cbfee
Parent:
1:5ef4a019e0db
Child:
3:7d9b64d67b22
none

Who changed what in which revision?

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Sissors 0:600eecd89a78 1 #ifndef BURSTSPI_H
Sissors 0:600eecd89a78 2 #define BURSTSPI_H
Sissors 0:600eecd89a78 3
Sissors 0:600eecd89a78 4 #include "mbed.h"
Sissors 0:600eecd89a78 5
Sissors 0:600eecd89a78 6
Sissors 0:600eecd89a78 7 /** An SPI Master, used for communicating with SPI slave devices at very high speeds
Sissors 0:600eecd89a78 8 *
frankvnk 2:a8e55f7cbfee 9 * The default mbed SPI class allows for communication via the SPI bus at high clock frequencies,
frankvnk 2:a8e55f7cbfee 10 * however at these frequencies there is alot of overhead from the mbed code.
frankvnk 2:a8e55f7cbfee 11 * While this code makes sure your code is alot more robust, it is also relative slow.
frankvnk 2:a8e55f7cbfee 12 * This library adds to your default SPI commands some extra commands to transmit data rapidly with
frankvnk 2:a8e55f7cbfee 13 * very little overhead. Downsides are that currently it is TX only (all RX packets are discarded),
frankvnk 2:a8e55f7cbfee 14 * and it requires some extra commands.
Sissors 0:600eecd89a78 15 *
Sissors 0:600eecd89a78 16 * Example:
Sissors 0:600eecd89a78 17 * @code
Sissors 0:600eecd89a78 18 * //Send 1000 SPI packets as fast as possible
Sissors 0:600eecd89a78 19 * spi.setFormat();
Sissors 0:600eecd89a78 20 * for (int i = 0; i<1000; i++)
Sissors 0:600eecd89a78 21 * spi.fastWrite(data[i]);
Sissors 0:600eecd89a78 22 * spi.clearRX();
Sissors 0:600eecd89a78 23 * @endcode
Sissors 0:600eecd89a78 24 *
frankvnk 2:a8e55f7cbfee 25 * As an example, writing 76,800 16-bit data packets to an LCD screen at 48MHz requires 111ms with
frankvnk 2:a8e55f7cbfee 26 * the normal mbed library. With this library it takes 25ms, which is also the theoretical
Sissors 0:600eecd89a78 27 * amount of time it should take. If you are running at 1MHz this will do alot less.
Sissors 0:600eecd89a78 28 */
Sissors 0:600eecd89a78 29 class BurstSPI : public SPI {
Sissors 0:600eecd89a78 30 public:
Sissors 0:600eecd89a78 31 /** Create a SPI master connected to the specified pins
Sissors 0:600eecd89a78 32 *
Sissors 0:600eecd89a78 33 * Pin Options:
Sissors 0:600eecd89a78 34 * (5, 6, 7) or (11, 12, 13)
Sissors 0:600eecd89a78 35 *
Sissors 0:600eecd89a78 36 * mosi or miso can be specfied as NC if not used
Sissors 0:600eecd89a78 37 *
Sissors 0:600eecd89a78 38 * @param mosi SPI Master Out, Slave In pin
Sissors 0:600eecd89a78 39 * @param miso SPI Master In, Slave Out pin
Sissors 0:600eecd89a78 40 * @param sclk SPI Clock pin
Sissors 0:600eecd89a78 41 */
Sissors 0:600eecd89a78 42 BurstSPI(PinName mosi, PinName miso, PinName sclk);
Sissors 0:600eecd89a78 43
Sissors 0:600eecd89a78 44 /** Put data packet in the SPI TX FIFO buffer
Sissors 0:600eecd89a78 45 *
frankvnk 2:a8e55f7cbfee 46 * If there is no space in the FIFO buffer it will block until there is space.
frankvnk 2:a8e55f7cbfee 47 * The FIFO buffer will automatically send the packets. There is no receiving here, only transmitting.
Sissors 0:600eecd89a78 48 *
Sissors 0:600eecd89a78 49 * @param data Data to be sent to the SPI slave
Sissors 0:600eecd89a78 50 */
Sissors 0:600eecd89a78 51 void fastWrite(int data);
Sissors 0:600eecd89a78 52
Sissors 0:600eecd89a78 53 /** Use this function before fastWrite to set the correct settings
Sissors 0:600eecd89a78 54 *
frankvnk 2:a8e55f7cbfee 55 * It is not needed to use this if the last SPI commands were either normal SPI transmissions,
frankvnk 2:a8e55f7cbfee 56 * or setting different format/frequency for this object. It is required to call this
frankvnk 2:a8e55f7cbfee 57 * function when several SPI objects use the same peripheral, and your last transmission was
frankvnk 2:a8e55f7cbfee 58 * from a different object with different settings. Not sure if you should use it?
Sissors 0:600eecd89a78 59 * Use it, it takes very little time to execute, so can't hurt.
Sissors 0:600eecd89a78 60 */
Sissors 0:600eecd89a78 61 void setFormat( void );
Sissors 0:600eecd89a78 62
Sissors 0:600eecd89a78 63 /** After you are done with fastWrite, call this function
Sissors 0:600eecd89a78 64 *
frankvnk 2:a8e55f7cbfee 65 * FastWrite simply fills the SPI's (SSP's actually) TX FIFO buffer as fast as it can,
frankvnk 2:a8e55f7cbfee 66 * and that is the only thing it does. It doesn't do anything with received packages (currently, may change),
frankvnk 2:a8e55f7cbfee 67 * so the the RX buffer is full with unneeded packets. This function waits until transmission is finished,
frankvnk 2:a8e55f7cbfee 68 * and clears the RX buffer. You always have to call this before you want to receive
Sissors 0:600eecd89a78 69 * SPI data after using fastWrite.
Sissors 0:600eecd89a78 70 */
Sissors 0:600eecd89a78 71 void clearRX( void );
Sissors 0:600eecd89a78 72
Sissors 0:600eecd89a78 73
Sissors 0:600eecd89a78 74 //Just for documentation:
Sissors 1:5ef4a019e0db 75 #if 0
Sissors 0:600eecd89a78 76 /** Configure the data transmission format
Sissors 0:600eecd89a78 77 *
Sissors 0:600eecd89a78 78 * @param bits Number of bits per SPI frame (4 - 16)
Sissors 0:600eecd89a78 79 * @param mode Clock polarity and phase mode (0 - 3)
Sissors 0:600eecd89a78 80 *
Sissors 0:600eecd89a78 81 * @code
Sissors 0:600eecd89a78 82 * mode | POL PHA
Sissors 0:600eecd89a78 83 * -----+--------
Sissors 0:600eecd89a78 84 * 0 | 0 0
Sissors 0:600eecd89a78 85 * 1 | 0 1
Sissors 0:600eecd89a78 86 * 2 | 1 0
Sissors 0:600eecd89a78 87 * 3 | 1 1
Sissors 0:600eecd89a78 88 * @endcode
Sissors 0:600eecd89a78 89 */
Sissors 0:600eecd89a78 90 void format(int bits, int mode = 0);
Sissors 0:600eecd89a78 91
Sissors 0:600eecd89a78 92 /** Set the spi bus clock frequency
Sissors 0:600eecd89a78 93 *
Sissors 0:600eecd89a78 94 * @param hz SCLK frequency in hz (default = 1MHz)
Sissors 0:600eecd89a78 95 */
Sissors 0:600eecd89a78 96 void frequency(int hz = 1000000);
Sissors 0:600eecd89a78 97
Sissors 0:600eecd89a78 98 /** Write to the SPI Slave and return the response
Sissors 0:600eecd89a78 99 *
Sissors 0:600eecd89a78 100 * @param value Data to be sent to the SPI slave
Sissors 0:600eecd89a78 101 *
Sissors 0:600eecd89a78 102 * @returns
Sissors 0:600eecd89a78 103 * Response from the SPI slave
Sissors 0:600eecd89a78 104 */
Sissors 0:600eecd89a78 105 virtual int write(int value);
Sissors 0:600eecd89a78 106 #endif
Sissors 0:600eecd89a78 107
Sissors 0:600eecd89a78 108 };
Sissors 0:600eecd89a78 109
Sissors 0:600eecd89a78 110 #endif