MCUGearBaseA.cpp

00001 /* MCU Gear Library, only for testing MCUGear without any circuit you connected.
00002  * Copyright (c) 2013, NestEgg Inc., http://www.mcugear.com/
00003  *
00004  * Permission is hereby granted, free of charge, to any person obtaining a copy
00005  * of this software and associated documentation files (the "Software"), to deal
00006  * in the Software without restriction, including without limitation the rights
00007  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
00008  * copies of the Software, and to permit persons to whom the Software is
00009  * furnished to do so, subject to the following conditions:
00010  *
00011  * The above copyright notice and this permission notice shall be included in
00012  * all copies or substantial portions of the Software.
00013  *
00014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
00015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
00016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
00017  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
00018  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
00019  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
00020  * THE SOFTWARE.
00021  */
00022 
00023 #include "mbed.h"
00024 #include "MCUGearBaseA.h"
00025 
00026 #if defined TARGET_LPC1768
00027 I2C fpga_i2c(p28, p27);
00028 #endif
00029 
00030 #if defined TARGET_KL25Z
00031 I2C fpga_i2c(PTE0, PTE1);
00032 #endif
00033 
00034 void fpga_write(int dev_adr,unsigned char adr, unsigned char data) {
00035   char cmd[2];
00036   cmd[0] = adr;
00037   cmd[1] = data;
00038   fpga_i2c.frequency (FPGA_I2C_CLOCK);
00039   fpga_i2c.write(dev_adr, cmd, 2);
00040 
00041 }
00042 
00043 unsigned char fpga_read(int dev_adr,unsigned char adr) {
00044   char cmd[2];
00045   cmd[0] = adr;
00046   fpga_i2c.write(dev_adr, cmd, 1);
00047   fpga_i2c.read(dev_adr, cmd, 1);
00048   return cmd[0];
00049 }
00050 
00051 void initBase(void){
00052 
00053     // FPGA reg clear
00054      for (int i=0;i<20;i++)
00055        fpga_write(FPGA_I2C_ADR,0x80+i,0);
00056      
00057     // read FPGA registers
00058     fpga_read(FPGA_I2C_ADR,FPGA_SYSINFO_0);
00059     fpga_read(FPGA_I2C_ADR,FPGA_SYSINFO_0+1);
00060     fpga_read(FPGA_I2C_ADR,FPGA_SYSINFO_0+2);
00061     fpga_read(FPGA_I2C_ADR,FPGA_SYSINFO_0+3);
00062     // FPGA enable
00063     fpga_write(FPGA_I2C_ADR,FPGA_ENABLE,1);   
00064 }
00065 
00066 void I2Cwrite(char addr, char data){
00067 
00068     char cmd[1];
00069     cmd[0] = data;
00070     fpga_i2c.write(addr, cmd, 1);
00071     //wait(0.01);
00072     
00073 }
00074 
00075 void changeBank(uint8_t bank){
00076     fpga_write(FPGA_I2C_ADR,0x10,bank);
00077 }
00078 
00079 void deleteBank(uint8_t bank){
00080     fpga_write(FPGA_I2C_ADR,0x0c,(bank|0x80));
00081     fpga_write(FPGA_I2C_ADR,0x10, bank);
00082 }
00083 /*
00084 void startReg(uint8_t bank){
00085     fpga_write(FPGA_I2C_ADR,0x0c,bank);
00086 }
00087 
00088 void endReg(uint8_t bank){
00089     fpga_write(FPGA_I2C_ADR,0x10, (bank|0x04));
00090 }
00091 */
00092 
00093