INIT_HW.cpp

00001 #include "mbed.h"
00002 #include "FastPWM.h"
00003 #include "setting.h"
00004 
00005 void Init_ADC(void){
00006     // ADC Setup
00007      RCC->APB2ENR |= RCC_APB2ENR_ADC3EN;                        // clock for ADC3
00008      RCC->APB2ENR |= RCC_APB2ENR_ADC2EN;                        // clock for ADC2
00009      RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;                        // clock for ADC1
00010      
00011      RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;                        // Enable clock for GPIOC
00012      RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN;                        // Enable clock for GPIOA
00013     
00014      ADC->CCR = 0x00000016;                                     // Regular simultaneous mode only
00015      ADC1->CR2 |= ADC_CR2_ADON;//0x00000001;                    // ADC1 ON
00016      ADC1->SQR3 = 0x0000000E;                    //channel      // use PC_4 as input- ADC1_IN14
00017      ADC2->CR2 |= ADC_CR2_ADON;//0x00000001;                    // ADC2 ON
00018      ADC2->SQR3 = 0x00000008;                                   // use PB_0 as input - ADC2_IN8
00019      ADC3->CR2 |= ADC_CR2_ADON;                                 // ADC3 ON
00020      ADC3->SQR3 = 0x0000000B;                                   // use PC_1, - ADC3_IN11
00021      GPIOC->MODER |= 0b1100001100;             //each channel   // PC_4, PC_1 are analog inputs 
00022      GPIOB->MODER |= 0x3;                                       // PB_0 as analog input
00023      
00024      ADC1->SMPR1 |= 0x00001000;                                     // 15 cycles on CH_14, 0b0001000000000000
00025      ADC2->SMPR2 |= 0x01000000;                                     // 15 cycles on CH_8,  0b0000000100000000<<16
00026      ADC3->SMPR1 |= 0x00000008;                                     // 15 cycles on CH_11, 0b0000000000001000
00027 
00028     }
00029     
00030 void Init_PWM(){
00031 
00032     RCC->APB1ENR |= RCC_APB1ENR_TIM4EN;                         // enable TIM4 clock
00033     FastPWM pwm_v(PIN_V);
00034     FastPWM pwm_w(PIN_W);
00035     
00036      //ISR Setup     
00037     
00038     NVIC_EnableIRQ(TIM4_IRQn);                         //Enable TIM4 IRQ
00039 
00040     TIM4->DIER |= TIM_DIER_UIE;                                 // enable update interrupt
00041     TIM4->CR1 = 0x40;                                           // CMS = 10, interrupt only when counting up // Center-aligned mode
00042     TIM4->CR1 |= TIM_CR1_UDIS;
00043     TIM4->CR1 |= TIM_CR1_ARPE;                                  // autoreload on, 
00044     TIM4->RCR |= 0x001;                                         // update event once per up/down count of TIM4 
00045     TIM4->EGR |= TIM_EGR_UG;
00046  
00047     //PWM Setup
00048 
00049     TIM4->PSC = 0x0;                                            // no prescaler, timer counts up in sync with the peripheral clock
00050     TIM4->ARR = PWM_ARR;                                          // set auto reload
00051     TIM4->CCER |= ~(TIM_CCER_CC1NP);                            // Interupt when low side is on.
00052     TIM4->CR1 |= TIM_CR1_CEN;                                   // enable TIM4
00053     
00054 }
00055 
00056 void Init_TMR3(){
00057     RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;                         // enable TIM3 clock
00058     
00059      //ISR Setup     
00060     
00061     NVIC_EnableIRQ(TIM3_IRQn);                         //Enable TIM3 IRQ
00062 
00063     TIM3->DIER |= TIM_DIER_UIE;                                 // enable update interrupt
00064     TIM3->CR1 = 0x40;                                           // CMS = 10, interrupt only when counting up // Center-aligned mode
00065     TIM3->CR1 |= TIM_CR1_UDIS;
00066     TIM3->CR1 |= TIM_CR1_ARPE;                                  // autoreload on, 
00067     TIM3->RCR |= 0x001;                                         // update event once per up/down count of TIM3 
00068     TIM3->EGR |= TIM_EGR_UG;
00069 
00070     TIM3->PSC = 0x00;                                            // no prescaler, timer counts up in sync with the peripheral clock
00071     TIM3->ARR = TMR3_COUNT;                                          // set auto reload, 5 khz
00072     TIM3->CCER |= ~(TIM_CCER_CC1NP);                            // Interupt when low side is on.
00073     TIM3->CR1 |= TIM_CR1_CEN;                                   // enable TIM4
00074 }
00075 
00076 void Init_TMR2(){
00077     RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;                         // enable TIM5 clock
00078     
00079      //ISR Setup     
00080     
00081     NVIC_EnableIRQ(TIM2_IRQn);                         //Enable TIM5 IRQ
00082 
00083     TIM2->DIER |= TIM_DIER_UIE;                                 // enable update interrupt
00084     TIM2->CR1 = 0x40;                                           // CMS = 10, interrupt only when counting up // Center-aligned mode
00085     TIM2->CR1 |= TIM_CR1_UDIS;
00086     TIM2->CR1 |= TIM_CR1_ARPE;                                  // autoreload on, 
00087     TIM2->RCR |= 0x001;                                         // update event once per up/down count of TIM5
00088     TIM2->EGR |= TIM_EGR_UG;
00089 
00090     TIM2->PSC = 0x12;                                            // no prescaler, timer counts up in sync with the peripheral clock
00091     TIM2->ARR = TMR2_COUNT;                                          // set auto reload, 5 khz
00092     TIM2->CCER |= ~(TIM_CCER_CC1NP);                            // Interupt when low side is on.
00093     TIM2->CR1 |= TIM_CR1_CEN;                                   // enable TIM5
00094 }