BLE_Nano nRF51 Central heart rate
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nrf51_deprecated.h
00001 /* Copyright (c) 2015, Nordic Semiconductor ASA 00002 * All rights reserved. 00003 * 00004 * Redistribution and use in source and binary forms, with or without 00005 * modification, are permitted provided that the following conditions are met: 00006 * 00007 * * Redistributions of source code must retain the above copyright notice, this 00008 * list of conditions and the following disclaimer. 00009 * 00010 * * Redistributions in binary form must reproduce the above copyright notice, 00011 * this list of conditions and the following disclaimer in the documentation 00012 * and/or other materials provided with the distribution. 00013 * 00014 * * Neither the name of Nordic Semiconductor ASA nor the names of its 00015 * contributors may be used to endorse or promote products derived from 00016 * this software without specific prior written permission. 00017 * 00018 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00019 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00020 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00021 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00022 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00023 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00024 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00025 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00026 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00027 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00028 * 00029 */ 00030 00031 #ifndef NRF51_DEPRECATED_H 00032 #define NRF51_DEPRECATED_H 00033 00034 /*lint ++flb "Enter library region */ 00035 00036 /* This file is given to prevent your SW from not compiling with the updates made to nrf51.h and 00037 * nrf51_bitfields.h. The macros defined in this file were available previously. Do not use these 00038 * macros on purpose. Use the ones defined in nrf51.h and nrf51_bitfields.h instead. 00039 */ 00040 00041 /* NVMC */ 00042 /* The register ERASEPROTECTEDPAGE is called ERASEPCR0 in the documentation. */ 00043 #define ERASEPROTECTEDPAGE ERASEPCR0 00044 00045 00046 /* LPCOMP */ 00047 /* The interrupt ISR was renamed. Adding old name to the macros. */ 00048 #define LPCOMP_COMP_IRQHandler LPCOMP_IRQHandler 00049 #define LPCOMP_COMP_IRQn LPCOMP_IRQn 00050 00051 00052 /* MPU */ 00053 /* The field MPU.PERR0.LPCOMP_COMP was renamed. Added into deprecated in case somebody was using the macros defined for it. */ 00054 #define MPU_PERR0_LPCOMP_COMP_Pos MPU_PERR0_LPCOMP_Pos 00055 #define MPU_PERR0_LPCOMP_COMP_Msk MPU_PERR0_LPCOMP_Msk 00056 #define MPU_PERR0_LPCOMP_COMP_InRegion1 MPU_PERR0_LPCOMP_InRegion1 00057 #define MPU_PERR0_LPCOMP_COMP_InRegion0 MPU_PERR0_LPCOMP_InRegion0 00058 00059 00060 /* POWER */ 00061 /* The field POWER.RAMON.OFFRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */ 00062 #define POWER_RAMON_OFFRAM3_Pos (19UL) 00063 #define POWER_RAMON_OFFRAM3_Msk (0x1UL << POWER_RAMON_OFFRAM3_Pos) 00064 #define POWER_RAMON_OFFRAM3_RAM3Off (0UL) 00065 #define POWER_RAMON_OFFRAM3_RAM3On (1UL) 00066 /* The field POWER.RAMON.OFFRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */ 00067 #define POWER_RAMON_OFFRAM2_Pos (18UL) 00068 #define POWER_RAMON_OFFRAM2_Msk (0x1UL << POWER_RAMON_OFFRAM2_Pos) 00069 #define POWER_RAMON_OFFRAM2_RAM2Off (0UL) 00070 #define POWER_RAMON_OFFRAM2_RAM2On (1UL) 00071 /* The field POWER.RAMON.ONRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */ 00072 #define POWER_RAMON_ONRAM3_Pos (3UL) 00073 #define POWER_RAMON_ONRAM3_Msk (0x1UL << POWER_RAMON_ONRAM3_Pos) 00074 #define POWER_RAMON_ONRAM3_RAM3Off (0UL) 00075 #define POWER_RAMON_ONRAM3_RAM3On (1UL) 00076 /* The field POWER.RAMON.ONRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */ 00077 #define POWER_RAMON_ONRAM2_Pos (2UL) 00078 #define POWER_RAMON_ONRAM2_Msk (0x1UL << POWER_RAMON_ONRAM2_Pos) 00079 #define POWER_RAMON_ONRAM2_RAM2Off (0UL) 00080 #define POWER_RAMON_ONRAM2_RAM2On (1UL) 00081 00082 00083 /* RADIO */ 00084 /* The enumerated value RADIO.TXPOWER.TXPOWER.Neg40dBm was renamed. Added into deprecated with the new macro name. */ 00085 #define RADIO_TXPOWER_TXPOWER_Neg40dBm RADIO_TXPOWER_TXPOWER_Neg30dBm 00086 /* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */ 00087 #define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos 00088 #define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk 00089 #define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include 00090 #define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip 00091 /* The name of the field PLLLOCK was corrected. Old macros added for compatibility. */ 00092 #define RADIO_TEST_PLL_LOCK_Pos RADIO_TEST_PLLLOCK_Pos 00093 #define RADIO_TEST_PLL_LOCK_Msk RADIO_TEST_PLLLOCK_Msk 00094 #define RADIO_TEST_PLL_LOCK_Disabled RADIO_TEST_PLLLOCK_Disabled 00095 #define RADIO_TEST_PLL_LOCK_Enabled RADIO_TEST_PLLLOCK_Enabled 00096 /* The name of the field CONSTCARRIER was corrected. Old macros added for compatibility. */ 00097 #define RADIO_TEST_CONST_CARRIER_Pos RADIO_TEST_CONSTCARRIER_Pos 00098 #define RADIO_TEST_CONST_CARRIER_Msk RADIO_TEST_CONSTCARRIER_Msk 00099 #define RADIO_TEST_CONST_CARRIER_Disabled RADIO_TEST_CONSTCARRIER_Disabled 00100 #define RADIO_TEST_CONST_CARRIER_Enabled RADIO_TEST_CONSTCARRIER_Enabled 00101 00102 00103 /* FICR */ 00104 /* The registers FICR.SIZERAMBLOCK0, FICR.SIZERAMBLOCK1, FICR.SIZERAMBLOCK2 and FICR.SIZERAMBLOCK3 were renamed into an array. */ 00105 #define SIZERAMBLOCK0 SIZERAMBLOCKS 00106 #define SIZERAMBLOCK1 SIZERAMBLOCKS 00107 #define SIZERAMBLOCK2 SIZERAMBLOCK[2] /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */ 00108 #define SIZERAMBLOCK3 SIZERAMBLOCK[3] /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */ 00109 /* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */ 00110 #define DEVICEID0 DEVICEID[0] 00111 #define DEVICEID1 DEVICEID[1] 00112 /* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */ 00113 #define ER0 ER[0] 00114 #define ER1 ER[1] 00115 #define ER2 ER[2] 00116 #define ER3 ER[3] 00117 /* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */ 00118 #define IR0 IR[0] 00119 #define IR1 IR[1] 00120 #define IR2 IR[2] 00121 #define IR3 IR[3] 00122 /* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */ 00123 #define DEVICEADDR0 DEVICEADDR[0] 00124 #define DEVICEADDR1 DEVICEADDR[1] 00125 00126 00127 /* PPI */ 00128 /* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */ 00129 #define TASKS_CHG0EN TASKS_CHG[0].EN 00130 #define TASKS_CHG0DIS TASKS_CHG[0].DIS 00131 #define TASKS_CHG1EN TASKS_CHG[1].EN 00132 #define TASKS_CHG1DIS TASKS_CHG[1].DIS 00133 #define TASKS_CHG2EN TASKS_CHG[2].EN 00134 #define TASKS_CHG2DIS TASKS_CHG[2].DIS 00135 #define TASKS_CHG3EN TASKS_CHG[3].EN 00136 #define TASKS_CHG3DIS TASKS_CHG[3].DIS 00137 /* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */ 00138 #define CH0_EEP CH[0].EEP 00139 #define CH0_TEP CH[0].TEP 00140 #define CH1_EEP CH[1].EEP 00141 #define CH1_TEP CH[1].TEP 00142 #define CH2_EEP CH[2].EEP 00143 #define CH2_TEP CH[2].TEP 00144 #define CH3_EEP CH[3].EEP 00145 #define CH3_TEP CH[3].TEP 00146 #define CH4_EEP CH[4].EEP 00147 #define CH4_TEP CH[4].TEP 00148 #define CH5_EEP CH[5].EEP 00149 #define CH5_TEP CH[5].TEP 00150 #define CH6_EEP CH[6].EEP 00151 #define CH6_TEP CH[6].TEP 00152 #define CH7_EEP CH[7].EEP 00153 #define CH7_TEP CH[7].TEP 00154 #define CH8_EEP CH[8].EEP 00155 #define CH8_TEP CH[8].TEP 00156 #define CH9_EEP CH[9].EEP 00157 #define CH9_TEP CH[9].TEP 00158 #define CH10_EEP CH[10].EEP 00159 #define CH10_TEP CH[10].TEP 00160 #define CH11_EEP CH[11].EEP 00161 #define CH11_TEP CH[11].TEP 00162 #define CH12_EEP CH[12].EEP 00163 #define CH12_TEP CH[12].TEP 00164 #define CH13_EEP CH[13].EEP 00165 #define CH13_TEP CH[13].TEP 00166 #define CH14_EEP CH[14].EEP 00167 #define CH14_TEP CH[14].TEP 00168 #define CH15_EEP CH[15].EEP 00169 #define CH15_TEP CH[15].TEP 00170 /* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */ 00171 #define CHG0 CHG[0] 00172 #define CHG1 CHG[1] 00173 #define CHG2 CHG[2] 00174 #define CHG3 CHG[3] 00175 /* All bitfield macros for the CHGx registers therefore changed name. */ 00176 #define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos 00177 #define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk 00178 #define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded 00179 #define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included 00180 #define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos 00181 #define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk 00182 #define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded 00183 #define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included 00184 #define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos 00185 #define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk 00186 #define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded 00187 #define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included 00188 #define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos 00189 #define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk 00190 #define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded 00191 #define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included 00192 #define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos 00193 #define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk 00194 #define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded 00195 #define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included 00196 #define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos 00197 #define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk 00198 #define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded 00199 #define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included 00200 #define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos 00201 #define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk 00202 #define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded 00203 #define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included 00204 #define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos 00205 #define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk 00206 #define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded 00207 #define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included 00208 #define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos 00209 #define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk 00210 #define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded 00211 #define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included 00212 #define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos 00213 #define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk 00214 #define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded 00215 #define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included 00216 #define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos 00217 #define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk 00218 #define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded 00219 #define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included 00220 #define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos 00221 #define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk 00222 #define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded 00223 #define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included 00224 #define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos 00225 #define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk 00226 #define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded 00227 #define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included 00228 #define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos 00229 #define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk 00230 #define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded 00231 #define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included 00232 #define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos 00233 #define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk 00234 #define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded 00235 #define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included 00236 #define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos 00237 #define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk 00238 #define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded 00239 #define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included 00240 #define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos 00241 #define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk 00242 #define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded 00243 #define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included 00244 #define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos 00245 #define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk 00246 #define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded 00247 #define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included 00248 #define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos 00249 #define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk 00250 #define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded 00251 #define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included 00252 #define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos 00253 #define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk 00254 #define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded 00255 #define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included 00256 #define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos 00257 #define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk 00258 #define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded 00259 #define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included 00260 #define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos 00261 #define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk 00262 #define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded 00263 #define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included 00264 #define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos 00265 #define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk 00266 #define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded 00267 #define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included 00268 #define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos 00269 #define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk 00270 #define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded 00271 #define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included 00272 #define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos 00273 #define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk 00274 #define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded 00275 #define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included 00276 #define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos 00277 #define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk 00278 #define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded 00279 #define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included 00280 #define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos 00281 #define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk 00282 #define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded 00283 #define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included 00284 #define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos 00285 #define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk 00286 #define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded 00287 #define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included 00288 #define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos 00289 #define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk 00290 #define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded 00291 #define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included 00292 #define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos 00293 #define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk 00294 #define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded 00295 #define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included 00296 #define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos 00297 #define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk 00298 #define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded 00299 #define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included 00300 #define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos 00301 #define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk 00302 #define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded 00303 #define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included 00304 #define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos 00305 #define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk 00306 #define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded 00307 #define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included 00308 #define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos 00309 #define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk 00310 #define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded 00311 #define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included 00312 #define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos 00313 #define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk 00314 #define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded 00315 #define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included 00316 #define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos 00317 #define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk 00318 #define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded 00319 #define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included 00320 #define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos 00321 #define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk 00322 #define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded 00323 #define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included 00324 #define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos 00325 #define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk 00326 #define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded 00327 #define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included 00328 #define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos 00329 #define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk 00330 #define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded 00331 #define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included 00332 #define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos 00333 #define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk 00334 #define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded 00335 #define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included 00336 #define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos 00337 #define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk 00338 #define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded 00339 #define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included 00340 #define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos 00341 #define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk 00342 #define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded 00343 #define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included 00344 #define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos 00345 #define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk 00346 #define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded 00347 #define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included 00348 #define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos 00349 #define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk 00350 #define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded 00351 #define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included 00352 #define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos 00353 #define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk 00354 #define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded 00355 #define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included 00356 #define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos 00357 #define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk 00358 #define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded 00359 #define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included 00360 #define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos 00361 #define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk 00362 #define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded 00363 #define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included 00364 #define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos 00365 #define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk 00366 #define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded 00367 #define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included 00368 #define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos 00369 #define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk 00370 #define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded 00371 #define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included 00372 #define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos 00373 #define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk 00374 #define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded 00375 #define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included 00376 #define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos 00377 #define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk 00378 #define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded 00379 #define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included 00380 #define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos 00381 #define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk 00382 #define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded 00383 #define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included 00384 #define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos 00385 #define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk 00386 #define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded 00387 #define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included 00388 #define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos 00389 #define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk 00390 #define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded 00391 #define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included 00392 #define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos 00393 #define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk 00394 #define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded 00395 #define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included 00396 #define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos 00397 #define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk 00398 #define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded 00399 #define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included 00400 #define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos 00401 #define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk 00402 #define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded 00403 #define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included 00404 #define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos 00405 #define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk 00406 #define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded 00407 #define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included 00408 #define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos 00409 #define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk 00410 #define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded 00411 #define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included 00412 #define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos 00413 #define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk 00414 #define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded 00415 #define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included 00416 #define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos 00417 #define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk 00418 #define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded 00419 #define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included 00420 #define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos 00421 #define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk 00422 #define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded 00423 #define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included 00424 #define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos 00425 #define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk 00426 #define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded 00427 #define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included 00428 #define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos 00429 #define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk 00430 #define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded 00431 #define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included 00432 00433 00434 00435 /*lint --flb "Leave library region" */ 00436 00437 #endif /* NRF51_DEPRECATED_H */ 00438 00439
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