Maxim Integrated / USBDevice

USBDevice with MAX32620HSP platform support

Fork of USBDevice by mbed official

USBDevice/TARGET_RENESAS/TARGET_VK_RZ_A1H/usb0/src/userdef/usb0_function_dmacdrv.c@62:c1549af978d6, 2016-04-29 (annotated)

Committer:
mbed_official
Date:
Fri Apr 29 01:16:25 2016 +0100
Revision:
62:c1549af978d6
Synchronized with git revision fe9720f24b1adc71ab6962506ec51290f6afd270



Full URL: https://github.com/mbedmicro/mbed/commit/fe9720f24b1adc71ab6962506ec51290f6afd270/



[Renesas RZ/A1H] Enable asynchronous communications

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 62:c1549af978d6 1 /*******************************************************************************
mbed_official 62:c1549af978d6 2 * DISCLAIMER
mbed_official 62:c1549af978d6 3 * This software is supplied by Renesas Electronics Corporation and is only
mbed_official 62:c1549af978d6 4 * intended for use with Renesas products. No other uses are authorized. This
mbed_official 62:c1549af978d6 5 * software is owned by Renesas Electronics Corporation and is protected under
mbed_official 62:c1549af978d6 6 * all applicable laws, including copyright laws.
mbed_official 62:c1549af978d6 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
mbed_official 62:c1549af978d6 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
mbed_official 62:c1549af978d6 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
mbed_official 62:c1549af978d6 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
mbed_official 62:c1549af978d6 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
mbed_official 62:c1549af978d6 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
mbed_official 62:c1549af978d6 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
mbed_official 62:c1549af978d6 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
mbed_official 62:c1549af978d6 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
mbed_official 62:c1549af978d6 16 * Renesas reserves the right, without notice, to make changes to this software
mbed_official 62:c1549af978d6 17 * and to discontinue the availability of this software. By using this software,
mbed_official 62:c1549af978d6 18 * you agree to the additional terms and conditions found by accessing the
mbed_official 62:c1549af978d6 19 * following link:
mbed_official 62:c1549af978d6 20 * http://www.renesas.com/disclaimer
mbed_official 62:c1549af978d6 21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
mbed_official 62:c1549af978d6 22 *******************************************************************************/
mbed_official 62:c1549af978d6 23 /*******************************************************************************
mbed_official 62:c1549af978d6 24 * File Name : usb0_function_dmacdrv.c
mbed_official 62:c1549af978d6 25 * $Rev: 1116 $
mbed_official 62:c1549af978d6 26 * $Date:: 2014-07-09 16:29:19 +0900#$
mbed_official 62:c1549af978d6 27 * Device(s) : RZ/A1H
mbed_official 62:c1549af978d6 28 * Tool-Chain :
mbed_official 62:c1549af978d6 29 * OS : None
mbed_official 62:c1549af978d6 30 * H/W Platform :
mbed_official 62:c1549af978d6 31 * Description : RZ/A1H R7S72100 USB Sample Program
mbed_official 62:c1549af978d6 32 * Operation :
mbed_official 62:c1549af978d6 33 * Limitations :
mbed_official 62:c1549af978d6 34 *******************************************************************************/
mbed_official 62:c1549af978d6 35
mbed_official 62:c1549af978d6 36
mbed_official 62:c1549af978d6 37 /*******************************************************************************
mbed_official 62:c1549af978d6 38 Includes <System Includes> , "Project Includes"
mbed_official 62:c1549af978d6 39 *******************************************************************************/
mbed_official 62:c1549af978d6 40 #include <stdio.h>
mbed_official 62:c1549af978d6 41 #include "r_typedefs.h"
mbed_official 62:c1549af978d6 42 #include "iodefine.h"
mbed_official 62:c1549af978d6 43 #include "rza_io_regrw.h"
mbed_official 62:c1549af978d6 44 #include "usb0_function_dmacdrv.h"
mbed_official 62:c1549af978d6 45
mbed_official 62:c1549af978d6 46
mbed_official 62:c1549af978d6 47 /*******************************************************************************
mbed_official 62:c1549af978d6 48 Typedef definitions
mbed_official 62:c1549af978d6 49 *******************************************************************************/
mbed_official 62:c1549af978d6 50
mbed_official 62:c1549af978d6 51
mbed_official 62:c1549af978d6 52 /*******************************************************************************
mbed_official 62:c1549af978d6 53 Macro definitions
mbed_official 62:c1549af978d6 54 *******************************************************************************/
mbed_official 62:c1549af978d6 55 #define DMAC_INDEFINE (255) /* Macro definition when REQD bit is not used */
mbed_official 62:c1549af978d6 56
mbed_official 62:c1549af978d6 57 /* ==== Request setting information for on-chip peripheral module ==== */
mbed_official 62:c1549af978d6 58 typedef enum dmac_peri_req_reg_type
mbed_official 62:c1549af978d6 59 {
mbed_official 62:c1549af978d6 60 DMAC_REQ_MID,
mbed_official 62:c1549af978d6 61 DMAC_REQ_RID,
mbed_official 62:c1549af978d6 62 DMAC_REQ_AM,
mbed_official 62:c1549af978d6 63 DMAC_REQ_LVL,
mbed_official 62:c1549af978d6 64 DMAC_REQ_REQD
mbed_official 62:c1549af978d6 65 } dmac_peri_req_reg_type_t;
mbed_official 62:c1549af978d6 66
mbed_official 62:c1549af978d6 67
mbed_official 62:c1549af978d6 68 /*******************************************************************************
mbed_official 62:c1549af978d6 69 Imported global variables and functions (from other files)
mbed_official 62:c1549af978d6 70 *******************************************************************************/
mbed_official 62:c1549af978d6 71
mbed_official 62:c1549af978d6 72
mbed_official 62:c1549af978d6 73 /*******************************************************************************
mbed_official 62:c1549af978d6 74 Exported global variables and functions (to be accessed by other files)
mbed_official 62:c1549af978d6 75 *******************************************************************************/
mbed_official 62:c1549af978d6 76
mbed_official 62:c1549af978d6 77
mbed_official 62:c1549af978d6 78 /*******************************************************************************
mbed_official 62:c1549af978d6 79 Private global variables and functions
mbed_official 62:c1549af978d6 80 *******************************************************************************/
mbed_official 62:c1549af978d6 81 /* ==== Prototype declaration ==== */
mbed_official 62:c1549af978d6 82
mbed_official 62:c1549af978d6 83 /* ==== Global variable ==== */
mbed_official 62:c1549af978d6 84 /* On-chip peripheral module request setting table */
mbed_official 62:c1549af978d6 85 static const uint8_t usb0_function_dmac_peri_req_init_table[8][5] =
mbed_official 62:c1549af978d6 86 {
mbed_official 62:c1549af978d6 87 /* MID,RID,AM,LVL,REQD */
mbed_official 62:c1549af978d6 88 {32, 3, 2, 1, 1}, /* USB_0 channel 0 transmit FIFO empty */
mbed_official 62:c1549af978d6 89 {32, 3, 2, 1, 0}, /* USB_0 channel 0 receive FIFO full */
mbed_official 62:c1549af978d6 90 {33, 3, 2, 1, 1}, /* USB_0 channel 1 transmit FIFO empty */
mbed_official 62:c1549af978d6 91 {33, 3, 2, 1, 0}, /* USB_0 channel 1 receive FIFO full */
mbed_official 62:c1549af978d6 92 {34, 3, 2, 1, 1}, /* USB_1 channel 0 transmit FIFO empty */
mbed_official 62:c1549af978d6 93 {34, 3, 2, 1, 0}, /* USB_1 channel 0 receive FIFO full */
mbed_official 62:c1549af978d6 94 {35, 3, 2, 1, 1}, /* USB_1 channel 1 transmit FIFO empty */
mbed_official 62:c1549af978d6 95 {35, 3, 2, 1, 0}, /* USB_1 channel 1 receive FIFO full */
mbed_official 62:c1549af978d6 96 };
mbed_official 62:c1549af978d6 97
mbed_official 62:c1549af978d6 98
mbed_official 62:c1549af978d6 99 /*******************************************************************************
mbed_official 62:c1549af978d6 100 * Function Name: usb0_function_DMAC1_PeriReqInit
mbed_official 62:c1549af978d6 101 * Description : Sets the register mode for DMA mode and the on-chip peripheral
mbed_official 62:c1549af978d6 102 * : module request for transfer request for DMAC channel 1.
mbed_official 62:c1549af978d6 103 * : Executes DMAC initial setting using the DMA information
mbed_official 62:c1549af978d6 104 * : specified by the argument *trans_info and the enabled/disabled
mbed_official 62:c1549af978d6 105 * : continuous transfer specified by the argument continuation.
mbed_official 62:c1549af978d6 106 * : Registers DMAC channel 1 interrupt handler function and sets
mbed_official 62:c1549af978d6 107 * : the interrupt priority level. Then enables transfer completion
mbed_official 62:c1549af978d6 108 * : interrupt.
mbed_official 62:c1549af978d6 109 * Arguments : dmac_transinfo_t *trans_info : Setting information to DMAC register
mbed_official 62:c1549af978d6 110 * : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
mbed_official 62:c1549af978d6 111 * : uint32_t continuation : Set continuous transfer to be valid
mbed_official 62:c1549af978d6 112 * : after DMA transfer has been completed
mbed_official 62:c1549af978d6 113 * : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
mbed_official 62:c1549af978d6 114 * : DMAC_SAMPLE_SINGLE : Do not execute continuous transfer
mbed_official 62:c1549af978d6 115 * : uint32_t request_factor : Factor for on-chip peripheral module request
mbed_official 62:c1549af978d6 116 * : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
mbed_official 62:c1549af978d6 117 * : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
mbed_official 62:c1549af978d6 118 * : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
mbed_official 62:c1549af978d6 119 * : :
mbed_official 62:c1549af978d6 120 * : uint32_t req_direction: Setting value of CHCFG_n register REQD bit
mbed_official 62:c1549af978d6 121 * Return Value : none
mbed_official 62:c1549af978d6 122 *******************************************************************************/
mbed_official 62:c1549af978d6 123 void usb0_function_DMAC1_PeriReqInit (const dmac_transinfo_t * trans_info,
mbed_official 62:c1549af978d6 124 uint32_t dmamode, uint32_t continuation,
mbed_official 62:c1549af978d6 125 uint32_t request_factor, uint32_t req_direction)
mbed_official 62:c1549af978d6 126 {
mbed_official 62:c1549af978d6 127 /* ==== Register mode ==== */
mbed_official 62:c1549af978d6 128 if (DMAC_MODE_REGISTER == dmamode)
mbed_official 62:c1549af978d6 129 {
mbed_official 62:c1549af978d6 130 /* ==== Next0 register set ==== */
mbed_official 62:c1549af978d6 131 DMAC1.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
mbed_official 62:c1549af978d6 132 DMAC1.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
mbed_official 62:c1549af978d6 133 DMAC1.N0TB_n = trans_info->count; /* Total transfer byte count */
mbed_official 62:c1549af978d6 134
mbed_official 62:c1549af978d6 135 /* DAD : Transfer destination address counting direction */
mbed_official 62:c1549af978d6 136 /* SAD : Transfer source address counting direction */
mbed_official 62:c1549af978d6 137 /* DDS : Transfer destination transfer size */
mbed_official 62:c1549af978d6 138 /* SDS : Transfer source transfer size */
mbed_official 62:c1549af978d6 139 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 140 trans_info->daddr_dir,
mbed_official 62:c1549af978d6 141 DMAC1_CHCFG_n_DAD_SHIFT,
mbed_official 62:c1549af978d6 142 DMAC1_CHCFG_n_DAD);
mbed_official 62:c1549af978d6 143 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 144 trans_info->saddr_dir,
mbed_official 62:c1549af978d6 145 DMAC1_CHCFG_n_SAD_SHIFT,
mbed_official 62:c1549af978d6 146 DMAC1_CHCFG_n_SAD);
mbed_official 62:c1549af978d6 147 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 148 trans_info->dst_size,
mbed_official 62:c1549af978d6 149 DMAC1_CHCFG_n_DDS_SHIFT,
mbed_official 62:c1549af978d6 150 DMAC1_CHCFG_n_DDS);
mbed_official 62:c1549af978d6 151 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 152 trans_info->src_size,
mbed_official 62:c1549af978d6 153 DMAC1_CHCFG_n_SDS_SHIFT,
mbed_official 62:c1549af978d6 154 DMAC1_CHCFG_n_SDS);
mbed_official 62:c1549af978d6 155
mbed_official 62:c1549af978d6 156 /* DMS : Register mode */
mbed_official 62:c1549af978d6 157 /* RSEL : Select Next0 register set */
mbed_official 62:c1549af978d6 158 /* SBE : No discharge of buffer data when aborted */
mbed_official 62:c1549af978d6 159 /* DEM : No DMA interrupt mask */
mbed_official 62:c1549af978d6 160 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 161 0,
mbed_official 62:c1549af978d6 162 DMAC1_CHCFG_n_DMS_SHIFT,
mbed_official 62:c1549af978d6 163 DMAC1_CHCFG_n_DMS);
mbed_official 62:c1549af978d6 164 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 165 0,
mbed_official 62:c1549af978d6 166 DMAC1_CHCFG_n_RSEL_SHIFT,
mbed_official 62:c1549af978d6 167 DMAC1_CHCFG_n_RSEL);
mbed_official 62:c1549af978d6 168 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 169 0,
mbed_official 62:c1549af978d6 170 DMAC1_CHCFG_n_SBE_SHIFT,
mbed_official 62:c1549af978d6 171 DMAC1_CHCFG_n_SBE);
mbed_official 62:c1549af978d6 172 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 173 0,
mbed_official 62:c1549af978d6 174 DMAC1_CHCFG_n_DEM_SHIFT,
mbed_official 62:c1549af978d6 175 DMAC1_CHCFG_n_DEM);
mbed_official 62:c1549af978d6 176
mbed_official 62:c1549af978d6 177 /* ---- Continuous transfer ---- */
mbed_official 62:c1549af978d6 178 if (DMAC_SAMPLE_CONTINUATION == continuation)
mbed_official 62:c1549af978d6 179 {
mbed_official 62:c1549af978d6 180 /* REN : Execute continuous transfer */
mbed_official 62:c1549af978d6 181 /* RSW : Change register set when DMA transfer is completed. */
mbed_official 62:c1549af978d6 182 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 183 1,
mbed_official 62:c1549af978d6 184 DMAC1_CHCFG_n_REN_SHIFT,
mbed_official 62:c1549af978d6 185 DMAC1_CHCFG_n_REN);
mbed_official 62:c1549af978d6 186 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 187 1,
mbed_official 62:c1549af978d6 188 DMAC1_CHCFG_n_RSW_SHIFT,
mbed_official 62:c1549af978d6 189 DMAC1_CHCFG_n_RSW);
mbed_official 62:c1549af978d6 190 }
mbed_official 62:c1549af978d6 191 /* ---- Single transfer ---- */
mbed_official 62:c1549af978d6 192 else
mbed_official 62:c1549af978d6 193 {
mbed_official 62:c1549af978d6 194 /* REN : Do not execute continuous transfer */
mbed_official 62:c1549af978d6 195 /* RSW : Do not change register set when DMA transfer is completed. */
mbed_official 62:c1549af978d6 196 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 197 0,
mbed_official 62:c1549af978d6 198 DMAC1_CHCFG_n_REN_SHIFT,
mbed_official 62:c1549af978d6 199 DMAC1_CHCFG_n_REN);
mbed_official 62:c1549af978d6 200 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 201 0,
mbed_official 62:c1549af978d6 202 DMAC1_CHCFG_n_RSW_SHIFT,
mbed_official 62:c1549af978d6 203 DMAC1_CHCFG_n_RSW);
mbed_official 62:c1549af978d6 204 }
mbed_official 62:c1549af978d6 205
mbed_official 62:c1549af978d6 206 /* TM : Single transfer */
mbed_official 62:c1549af978d6 207 /* SEL : Channel setting */
mbed_official 62:c1549af978d6 208 /* HIEN, LOEN : On-chip peripheral module request */
mbed_official 62:c1549af978d6 209 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 210 0,
mbed_official 62:c1549af978d6 211 DMAC1_CHCFG_n_TM_SHIFT,
mbed_official 62:c1549af978d6 212 DMAC1_CHCFG_n_TM);
mbed_official 62:c1549af978d6 213 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 214 1,
mbed_official 62:c1549af978d6 215 DMAC1_CHCFG_n_SEL_SHIFT,
mbed_official 62:c1549af978d6 216 DMAC1_CHCFG_n_SEL);
mbed_official 62:c1549af978d6 217 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 218 1,
mbed_official 62:c1549af978d6 219 DMAC1_CHCFG_n_HIEN_SHIFT,
mbed_official 62:c1549af978d6 220 DMAC1_CHCFG_n_HIEN);
mbed_official 62:c1549af978d6 221 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 222 0,
mbed_official 62:c1549af978d6 223 DMAC1_CHCFG_n_LOEN_SHIFT,
mbed_official 62:c1549af978d6 224 DMAC1_CHCFG_n_LOEN);
mbed_official 62:c1549af978d6 225
mbed_official 62:c1549af978d6 226 /* ---- Set factor by specified on-chip peripheral module request ---- */
mbed_official 62:c1549af978d6 227 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 228 usb0_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
mbed_official 62:c1549af978d6 229 DMAC1_CHCFG_n_AM_SHIFT,
mbed_official 62:c1549af978d6 230 DMAC1_CHCFG_n_AM);
mbed_official 62:c1549af978d6 231 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 232 usb0_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
mbed_official 62:c1549af978d6 233 DMAC1_CHCFG_n_LVL_SHIFT,
mbed_official 62:c1549af978d6 234 DMAC1_CHCFG_n_LVL);
mbed_official 62:c1549af978d6 235
mbed_official 62:c1549af978d6 236 if (usb0_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
mbed_official 62:c1549af978d6 237 {
mbed_official 62:c1549af978d6 238 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 239 usb0_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
mbed_official 62:c1549af978d6 240 DMAC1_CHCFG_n_REQD_SHIFT,
mbed_official 62:c1549af978d6 241 DMAC1_CHCFG_n_REQD);
mbed_official 62:c1549af978d6 242 }
mbed_official 62:c1549af978d6 243 else
mbed_official 62:c1549af978d6 244 {
mbed_official 62:c1549af978d6 245 RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
mbed_official 62:c1549af978d6 246 req_direction,
mbed_official 62:c1549af978d6 247 DMAC1_CHCFG_n_REQD_SHIFT,
mbed_official 62:c1549af978d6 248 DMAC1_CHCFG_n_REQD);
mbed_official 62:c1549af978d6 249 }
mbed_official 62:c1549af978d6 250
mbed_official 62:c1549af978d6 251 RZA_IO_RegWrite_32(&DMAC01.DMARS,
mbed_official 62:c1549af978d6 252 usb0_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
mbed_official 62:c1549af978d6 253 DMAC01_DMARS_CH1_RID_SHIFT,
mbed_official 62:c1549af978d6 254 DMAC01_DMARS_CH1_RID);
mbed_official 62:c1549af978d6 255 RZA_IO_RegWrite_32(&DMAC01.DMARS,
mbed_official 62:c1549af978d6 256 usb0_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
mbed_official 62:c1549af978d6 257 DMAC01_DMARS_CH1_MID_SHIFT,
mbed_official 62:c1549af978d6 258 DMAC01_DMARS_CH1_MID);
mbed_official 62:c1549af978d6 259
mbed_official 62:c1549af978d6 260 /* PR : Round robin mode */
mbed_official 62:c1549af978d6 261 RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
mbed_official 62:c1549af978d6 262 1,
mbed_official 62:c1549af978d6 263 DMAC07_DCTRL_0_7_PR_SHIFT,
mbed_official 62:c1549af978d6 264 DMAC07_DCTRL_0_7_PR);
mbed_official 62:c1549af978d6 265 }
mbed_official 62:c1549af978d6 266 }
mbed_official 62:c1549af978d6 267
mbed_official 62:c1549af978d6 268 /*******************************************************************************
mbed_official 62:c1549af978d6 269 * Function Name: usb0_function_DMAC1_Open
mbed_official 62:c1549af978d6 270 * Description : Enables DMAC channel 1 transfer.
mbed_official 62:c1549af978d6 271 * Arguments : uint32_t req : DMAC request mode
mbed_official 62:c1549af978d6 272 * Return Value : 0 : Succeeded in enabling DMA transfer
mbed_official 62:c1549af978d6 273 * : -1 : Failed to enable DMA transfer (due to DMA operation)
mbed_official 62:c1549af978d6 274 *******************************************************************************/
mbed_official 62:c1549af978d6 275 int32_t usb0_function_DMAC1_Open (uint32_t req)
mbed_official 62:c1549af978d6 276 {
mbed_official 62:c1549af978d6 277 int32_t ret;
mbed_official 62:c1549af978d6 278 volatile uint8_t dummy;
mbed_official 62:c1549af978d6 279
mbed_official 62:c1549af978d6 280 /* Transferable? */
mbed_official 62:c1549af978d6 281 if ((0 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
mbed_official 62:c1549af978d6 282 DMAC1_CHSTAT_n_EN_SHIFT,
mbed_official 62:c1549af978d6 283 DMAC1_CHSTAT_n_EN)) &&
mbed_official 62:c1549af978d6 284 (0 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
mbed_official 62:c1549af978d6 285 DMAC1_CHSTAT_n_TACT_SHIFT,
mbed_official 62:c1549af978d6 286 DMAC1_CHSTAT_n_TACT)))
mbed_official 62:c1549af978d6 287 {
mbed_official 62:c1549af978d6 288 /* Clear Channel Status Register */
mbed_official 62:c1549af978d6 289 RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
mbed_official 62:c1549af978d6 290 1,
mbed_official 62:c1549af978d6 291 DMAC1_CHCTRL_n_SWRST_SHIFT,
mbed_official 62:c1549af978d6 292 DMAC1_CHCTRL_n_SWRST);
mbed_official 62:c1549af978d6 293 dummy = RZA_IO_RegRead_32(&DMAC1.CHCTRL_n,
mbed_official 62:c1549af978d6 294 DMAC1_CHCTRL_n_SWRST_SHIFT,
mbed_official 62:c1549af978d6 295 DMAC1_CHCTRL_n_SWRST);
mbed_official 62:c1549af978d6 296 /* Enable DMA transfer */
mbed_official 62:c1549af978d6 297 RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
mbed_official 62:c1549af978d6 298 1,
mbed_official 62:c1549af978d6 299 DMAC1_CHCTRL_n_SETEN_SHIFT,
mbed_official 62:c1549af978d6 300 DMAC1_CHCTRL_n_SETEN);
mbed_official 62:c1549af978d6 301
mbed_official 62:c1549af978d6 302 /* ---- Request by software ---- */
mbed_official 62:c1549af978d6 303 if (DMAC_REQ_MODE_SOFT == req)
mbed_official 62:c1549af978d6 304 {
mbed_official 62:c1549af978d6 305 /* DMA transfer Request by software */
mbed_official 62:c1549af978d6 306 RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
mbed_official 62:c1549af978d6 307 1,
mbed_official 62:c1549af978d6 308 DMAC1_CHCTRL_n_STG_SHIFT,
mbed_official 62:c1549af978d6 309 DMAC1_CHCTRL_n_STG);
mbed_official 62:c1549af978d6 310 }
mbed_official 62:c1549af978d6 311
mbed_official 62:c1549af978d6 312 ret = 0;
mbed_official 62:c1549af978d6 313 }
mbed_official 62:c1549af978d6 314 else
mbed_official 62:c1549af978d6 315 {
mbed_official 62:c1549af978d6 316 ret = -1;
mbed_official 62:c1549af978d6 317 }
mbed_official 62:c1549af978d6 318
mbed_official 62:c1549af978d6 319 return ret;
mbed_official 62:c1549af978d6 320 }
mbed_official 62:c1549af978d6 321
mbed_official 62:c1549af978d6 322 /*******************************************************************************
mbed_official 62:c1549af978d6 323 * Function Name: usb0_function_DMAC1_Close
mbed_official 62:c1549af978d6 324 * Description : Aborts DMAC channel 1 transfer. Returns the remaining transfer
mbed_official 62:c1549af978d6 325 * : byte count at the time of DMA transfer abort to the argument
mbed_official 62:c1549af978d6 326 * : *remain.
mbed_official 62:c1549af978d6 327 * Arguments : uint32_t * remain : Remaining transfer byte count when
mbed_official 62:c1549af978d6 328 * : : DMA transfer is aborted
mbed_official 62:c1549af978d6 329 * Return Value : none
mbed_official 62:c1549af978d6 330 *******************************************************************************/
mbed_official 62:c1549af978d6 331 void usb0_function_DMAC1_Close (uint32_t * remain)
mbed_official 62:c1549af978d6 332 {
mbed_official 62:c1549af978d6 333
mbed_official 62:c1549af978d6 334 /* ==== Abort transfer ==== */
mbed_official 62:c1549af978d6 335 RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
mbed_official 62:c1549af978d6 336 1,
mbed_official 62:c1549af978d6 337 DMAC1_CHCTRL_n_CLREN_SHIFT,
mbed_official 62:c1549af978d6 338 DMAC1_CHCTRL_n_CLREN);
mbed_official 62:c1549af978d6 339
mbed_official 62:c1549af978d6 340 while (1 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
mbed_official 62:c1549af978d6 341 DMAC1_CHSTAT_n_TACT_SHIFT,
mbed_official 62:c1549af978d6 342 DMAC1_CHSTAT_n_TACT))
mbed_official 62:c1549af978d6 343 {
mbed_official 62:c1549af978d6 344 /* Loop until transfer is aborted */
mbed_official 62:c1549af978d6 345 }
mbed_official 62:c1549af978d6 346
mbed_official 62:c1549af978d6 347 while (1 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
mbed_official 62:c1549af978d6 348 DMAC1_CHSTAT_n_EN_SHIFT,
mbed_official 62:c1549af978d6 349 DMAC1_CHSTAT_n_EN))
mbed_official 62:c1549af978d6 350 {
mbed_official 62:c1549af978d6 351 /* Loop until 0 is set in EN before checking the remaining transfer byte count */
mbed_official 62:c1549af978d6 352 }
mbed_official 62:c1549af978d6 353 /* ==== Obtain remaining transfer byte count ==== */
mbed_official 62:c1549af978d6 354 *remain = DMAC1.CRTB_n;
mbed_official 62:c1549af978d6 355 }
mbed_official 62:c1549af978d6 356
mbed_official 62:c1549af978d6 357 /*******************************************************************************
mbed_official 62:c1549af978d6 358 * Function Name: usb0_function_DMAC1_Load_Set
mbed_official 62:c1549af978d6 359 * Description : Sets the transfer source address, transfer destination
mbed_official 62:c1549af978d6 360 * : address, and total transfer byte count respectively
mbed_official 62:c1549af978d6 361 * : specified by the argument src_addr, dst_addr, and count to
mbed_official 62:c1549af978d6 362 * : DMAC channel 1 as DMA transfer information.
mbed_official 62:c1549af978d6 363 * : Sets the register set selected by the CHCFG_n register
mbed_official 62:c1549af978d6 364 * : RSEL bit from the Next0 or Next1 register set.
mbed_official 62:c1549af978d6 365 * : This function should be called when DMA transfer of DMAC
mbed_official 62:c1549af978d6 366 * : channel 1 is aboted.
mbed_official 62:c1549af978d6 367 * Arguments : uint32_t src_addr : Transfer source address
mbed_official 62:c1549af978d6 368 * : uint32_t dst_addr : Transfer destination address
mbed_official 62:c1549af978d6 369 * : uint32_t count : Total transfer byte count
mbed_official 62:c1549af978d6 370 * Return Value : none
mbed_official 62:c1549af978d6 371 *******************************************************************************/
mbed_official 62:c1549af978d6 372 void usb0_function_DMAC1_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
mbed_official 62:c1549af978d6 373 {
mbed_official 62:c1549af978d6 374 uint8_t reg_set;
mbed_official 62:c1549af978d6 375
mbed_official 62:c1549af978d6 376 /* Obtain register set in use */
mbed_official 62:c1549af978d6 377 reg_set = RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
mbed_official 62:c1549af978d6 378 DMAC1_CHSTAT_n_SR_SHIFT,
mbed_official 62:c1549af978d6 379 DMAC1_CHSTAT_n_SR);
mbed_official 62:c1549af978d6 380
mbed_official 62:c1549af978d6 381 /* ==== Load ==== */
mbed_official 62:c1549af978d6 382 if (0 == reg_set)
mbed_official 62:c1549af978d6 383 {
mbed_official 62:c1549af978d6 384 /* ---- Next0 Register Set ---- */
mbed_official 62:c1549af978d6 385 DMAC1.N0SA_n = src_addr; /* Start address of transfer source */
mbed_official 62:c1549af978d6 386 DMAC1.N0DA_n = dst_addr; /* Start address of transfer destination */
mbed_official 62:c1549af978d6 387 DMAC1.N0TB_n = count; /* Total transfer byte count */
mbed_official 62:c1549af978d6 388 }
mbed_official 62:c1549af978d6 389 else
mbed_official 62:c1549af978d6 390 {
mbed_official 62:c1549af978d6 391 /* ---- Next1 Register Set ---- */
mbed_official 62:c1549af978d6 392 DMAC1.N1SA_n = src_addr; /* Start address of transfer source */
mbed_official 62:c1549af978d6 393 DMAC1.N1DA_n = dst_addr; /* Start address of transfer destination */
mbed_official 62:c1549af978d6 394 DMAC1.N1TB_n = count; /* Total transfer byte count */
mbed_official 62:c1549af978d6 395 }
mbed_official 62:c1549af978d6 396 }
mbed_official 62:c1549af978d6 397
mbed_official 62:c1549af978d6 398 /*******************************************************************************
mbed_official 62:c1549af978d6 399 * Function Name: usb0_function_DMAC2_PeriReqInit
mbed_official 62:c1549af978d6 400 * Description : Sets the register mode for DMA mode and the on-chip peripheral
mbed_official 62:c1549af978d6 401 * : module request for transfer request for DMAC channel 2.
mbed_official 62:c1549af978d6 402 * : Executes DMAC initial setting using the DMA information
mbed_official 62:c1549af978d6 403 * : specified by the argument *trans_info and the enabled/disabled
mbed_official 62:c1549af978d6 404 * : continuous transfer specified by the argument continuation.
mbed_official 62:c1549af978d6 405 * : Registers DMAC channel 2 interrupt handler function and sets
mbed_official 62:c1549af978d6 406 * : the interrupt priority level. Then enables transfer completion
mbed_official 62:c1549af978d6 407 * : interrupt.
mbed_official 62:c1549af978d6 408 * Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
mbed_official 62:c1549af978d6 409 * : : register
mbed_official 62:c1549af978d6 410 * : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
mbed_official 62:c1549af978d6 411 * : uint32_t continuation : Set continuous transfer to be valid
mbed_official 62:c1549af978d6 412 * : : after DMA transfer has been completed
mbed_official 62:c1549af978d6 413 * : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
mbed_official 62:c1549af978d6 414 * : DMAC_SAMPLE_SINGLE : Do not execute continuous
mbed_official 62:c1549af978d6 415 * : : transfer
mbed_official 62:c1549af978d6 416 * : uint32_t request_factor : Factor for on-chip peripheral module
mbed_official 62:c1549af978d6 417 * : : request
mbed_official 62:c1549af978d6 418 * : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
mbed_official 62:c1549af978d6 419 * : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
mbed_official 62:c1549af978d6 420 * : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
mbed_official 62:c1549af978d6 421 * : :
mbed_official 62:c1549af978d6 422 * : uint32_t req_direction : Setting value of CHCFG_n register
mbed_official 62:c1549af978d6 423 * : : REQD bit
mbed_official 62:c1549af978d6 424 *******************************************************************************/
mbed_official 62:c1549af978d6 425 void usb0_function_DMAC2_PeriReqInit (const dmac_transinfo_t * trans_info,
mbed_official 62:c1549af978d6 426 uint32_t dmamode, uint32_t continuation,
mbed_official 62:c1549af978d6 427 uint32_t request_factor, uint32_t req_direction)
mbed_official 62:c1549af978d6 428 {
mbed_official 62:c1549af978d6 429 /* ==== Register mode ==== */
mbed_official 62:c1549af978d6 430 if (DMAC_MODE_REGISTER == dmamode)
mbed_official 62:c1549af978d6 431 {
mbed_official 62:c1549af978d6 432 /* ==== Next0 register set ==== */
mbed_official 62:c1549af978d6 433 DMAC2.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
mbed_official 62:c1549af978d6 434 DMAC2.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
mbed_official 62:c1549af978d6 435 DMAC2.N0TB_n = trans_info->count; /* Total transfer byte count */
mbed_official 62:c1549af978d6 436
mbed_official 62:c1549af978d6 437 /* DAD : Transfer destination address counting direction */
mbed_official 62:c1549af978d6 438 /* SAD : Transfer source address counting direction */
mbed_official 62:c1549af978d6 439 /* DDS : Transfer destination transfer size */
mbed_official 62:c1549af978d6 440 /* SDS : Transfer source transfer size */
mbed_official 62:c1549af978d6 441 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 442 trans_info->daddr_dir,
mbed_official 62:c1549af978d6 443 DMAC2_CHCFG_n_DAD_SHIFT,
mbed_official 62:c1549af978d6 444 DMAC2_CHCFG_n_DAD);
mbed_official 62:c1549af978d6 445 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 446 trans_info->saddr_dir,
mbed_official 62:c1549af978d6 447 DMAC2_CHCFG_n_SAD_SHIFT,
mbed_official 62:c1549af978d6 448 DMAC2_CHCFG_n_SAD);
mbed_official 62:c1549af978d6 449 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 450 trans_info->dst_size,
mbed_official 62:c1549af978d6 451 DMAC2_CHCFG_n_DDS_SHIFT,
mbed_official 62:c1549af978d6 452 DMAC2_CHCFG_n_DDS);
mbed_official 62:c1549af978d6 453 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 454 trans_info->src_size,
mbed_official 62:c1549af978d6 455 DMAC2_CHCFG_n_SDS_SHIFT,
mbed_official 62:c1549af978d6 456 DMAC2_CHCFG_n_SDS);
mbed_official 62:c1549af978d6 457
mbed_official 62:c1549af978d6 458 /* DMS : Register mode */
mbed_official 62:c1549af978d6 459 /* RSEL : Select Next0 register set */
mbed_official 62:c1549af978d6 460 /* SBE : No discharge of buffer data when aborted */
mbed_official 62:c1549af978d6 461 /* DEM : No DMA interrupt mask */
mbed_official 62:c1549af978d6 462 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 463 0,
mbed_official 62:c1549af978d6 464 DMAC2_CHCFG_n_DMS_SHIFT,
mbed_official 62:c1549af978d6 465 DMAC2_CHCFG_n_DMS);
mbed_official 62:c1549af978d6 466 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 467 0,
mbed_official 62:c1549af978d6 468 DMAC2_CHCFG_n_RSEL_SHIFT,
mbed_official 62:c1549af978d6 469 DMAC2_CHCFG_n_RSEL);
mbed_official 62:c1549af978d6 470 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 471 0,
mbed_official 62:c1549af978d6 472 DMAC2_CHCFG_n_SBE_SHIFT,
mbed_official 62:c1549af978d6 473 DMAC2_CHCFG_n_SBE);
mbed_official 62:c1549af978d6 474 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 475 0,
mbed_official 62:c1549af978d6 476 DMAC2_CHCFG_n_DEM_SHIFT,
mbed_official 62:c1549af978d6 477 DMAC2_CHCFG_n_DEM);
mbed_official 62:c1549af978d6 478
mbed_official 62:c1549af978d6 479 /* ---- Continuous transfer ---- */
mbed_official 62:c1549af978d6 480 if (DMAC_SAMPLE_CONTINUATION == continuation)
mbed_official 62:c1549af978d6 481 {
mbed_official 62:c1549af978d6 482 /* REN : Execute continuous transfer */
mbed_official 62:c1549af978d6 483 /* RSW : Change register set when DMA transfer is completed. */
mbed_official 62:c1549af978d6 484 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 485 1,
mbed_official 62:c1549af978d6 486 DMAC2_CHCFG_n_REN_SHIFT,
mbed_official 62:c1549af978d6 487 DMAC2_CHCFG_n_REN);
mbed_official 62:c1549af978d6 488 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 489 1,
mbed_official 62:c1549af978d6 490 DMAC2_CHCFG_n_RSW_SHIFT,
mbed_official 62:c1549af978d6 491 DMAC2_CHCFG_n_RSW);
mbed_official 62:c1549af978d6 492 }
mbed_official 62:c1549af978d6 493 /* ---- Single transfer ---- */
mbed_official 62:c1549af978d6 494 else
mbed_official 62:c1549af978d6 495 {
mbed_official 62:c1549af978d6 496 /* REN : Do not execute continuous transfer */
mbed_official 62:c1549af978d6 497 /* RSW : Do not change register set when DMA transfer is completed. */
mbed_official 62:c1549af978d6 498 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 499 0,
mbed_official 62:c1549af978d6 500 DMAC2_CHCFG_n_REN_SHIFT,
mbed_official 62:c1549af978d6 501 DMAC2_CHCFG_n_REN);
mbed_official 62:c1549af978d6 502 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 503 0,
mbed_official 62:c1549af978d6 504 DMAC2_CHCFG_n_RSW_SHIFT,
mbed_official 62:c1549af978d6 505 DMAC2_CHCFG_n_RSW);
mbed_official 62:c1549af978d6 506 }
mbed_official 62:c1549af978d6 507
mbed_official 62:c1549af978d6 508 /* TM : Single transfer */
mbed_official 62:c1549af978d6 509 /* SEL : Channel setting */
mbed_official 62:c1549af978d6 510 /* HIEN, LOEN : On-chip peripheral module request */
mbed_official 62:c1549af978d6 511 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 512 0,
mbed_official 62:c1549af978d6 513 DMAC2_CHCFG_n_TM_SHIFT,
mbed_official 62:c1549af978d6 514 DMAC2_CHCFG_n_TM);
mbed_official 62:c1549af978d6 515 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 516 2,
mbed_official 62:c1549af978d6 517 DMAC2_CHCFG_n_SEL_SHIFT,
mbed_official 62:c1549af978d6 518 DMAC2_CHCFG_n_SEL);
mbed_official 62:c1549af978d6 519 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 520 1,
mbed_official 62:c1549af978d6 521 DMAC2_CHCFG_n_HIEN_SHIFT,
mbed_official 62:c1549af978d6 522 DMAC2_CHCFG_n_HIEN);
mbed_official 62:c1549af978d6 523 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 524 0,
mbed_official 62:c1549af978d6 525 DMAC2_CHCFG_n_LOEN_SHIFT,
mbed_official 62:c1549af978d6 526 DMAC2_CHCFG_n_LOEN);
mbed_official 62:c1549af978d6 527
mbed_official 62:c1549af978d6 528 /* ---- Set factor by specified on-chip peripheral module request ---- */
mbed_official 62:c1549af978d6 529 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 530 usb0_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
mbed_official 62:c1549af978d6 531 DMAC2_CHCFG_n_AM_SHIFT,
mbed_official 62:c1549af978d6 532 DMAC2_CHCFG_n_AM);
mbed_official 62:c1549af978d6 533 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 534 usb0_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
mbed_official 62:c1549af978d6 535 DMAC2_CHCFG_n_LVL_SHIFT,
mbed_official 62:c1549af978d6 536 DMAC2_CHCFG_n_LVL);
mbed_official 62:c1549af978d6 537 if (usb0_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
mbed_official 62:c1549af978d6 538 {
mbed_official 62:c1549af978d6 539 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 540 usb0_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
mbed_official 62:c1549af978d6 541 DMAC2_CHCFG_n_REQD_SHIFT,
mbed_official 62:c1549af978d6 542 DMAC2_CHCFG_n_REQD);
mbed_official 62:c1549af978d6 543 }
mbed_official 62:c1549af978d6 544 else
mbed_official 62:c1549af978d6 545 {
mbed_official 62:c1549af978d6 546 RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
mbed_official 62:c1549af978d6 547 req_direction,
mbed_official 62:c1549af978d6 548 DMAC2_CHCFG_n_REQD_SHIFT,
mbed_official 62:c1549af978d6 549 DMAC2_CHCFG_n_REQD);
mbed_official 62:c1549af978d6 550 }
mbed_official 62:c1549af978d6 551 RZA_IO_RegWrite_32(&DMAC23.DMARS,
mbed_official 62:c1549af978d6 552 usb0_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
mbed_official 62:c1549af978d6 553 DMAC23_DMARS_CH2_RID_SHIFT,
mbed_official 62:c1549af978d6 554 DMAC23_DMARS_CH2_RID);
mbed_official 62:c1549af978d6 555 RZA_IO_RegWrite_32(&DMAC23.DMARS,
mbed_official 62:c1549af978d6 556 usb0_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
mbed_official 62:c1549af978d6 557 DMAC23_DMARS_CH2_MID_SHIFT,
mbed_official 62:c1549af978d6 558 DMAC23_DMARS_CH2_MID);
mbed_official 62:c1549af978d6 559
mbed_official 62:c1549af978d6 560 /* PR : Round robin mode */
mbed_official 62:c1549af978d6 561 RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
mbed_official 62:c1549af978d6 562 1,
mbed_official 62:c1549af978d6 563 DMAC07_DCTRL_0_7_PR_SHIFT,
mbed_official 62:c1549af978d6 564 DMAC07_DCTRL_0_7_PR);
mbed_official 62:c1549af978d6 565 }
mbed_official 62:c1549af978d6 566 }
mbed_official 62:c1549af978d6 567
mbed_official 62:c1549af978d6 568 /*******************************************************************************
mbed_official 62:c1549af978d6 569 * Function Name: usb0_function_DMAC2_Open
mbed_official 62:c1549af978d6 570 * Description : Enables DMAC channel 2 transfer.
mbed_official 62:c1549af978d6 571 * Arguments : uint32_t req : DMAC request mode
mbed_official 62:c1549af978d6 572 * Return Value : 0 : Succeeded in enabling DMA transfer
mbed_official 62:c1549af978d6 573 * : -1 : Failed to enable DMA transfer (due to DMA operation)
mbed_official 62:c1549af978d6 574 *******************************************************************************/
mbed_official 62:c1549af978d6 575 int32_t usb0_function_DMAC2_Open (uint32_t req)
mbed_official 62:c1549af978d6 576 {
mbed_official 62:c1549af978d6 577 int32_t ret;
mbed_official 62:c1549af978d6 578 volatile uint8_t dummy;
mbed_official 62:c1549af978d6 579
mbed_official 62:c1549af978d6 580 /* Transferable? */
mbed_official 62:c1549af978d6 581 if ((0 == RZA_IO_RegRead_32(&DMAC.CHSTAT_2,
mbed_official 62:c1549af978d6 582 DMAC2_CHSTAT_n_EN_SHIFT,
mbed_official 62:c1549af978d6 583 DMAC2_CHSTAT_n_EN)) &&
mbed_official 62:c1549af978d6 584 (0 == RZA_IO_RegRead_32(&DMAC.CHSTAT_2,
mbed_official 62:c1549af978d6 585 DMAC2_CHSTAT_n_TACT_SHIFT,
mbed_official 62:c1549af978d6 586 DMAC2_CHSTAT_n_TACT)))
mbed_official 62:c1549af978d6 587 {
mbed_official 62:c1549af978d6 588 /* Clear Channel Status Register */
mbed_official 62:c1549af978d6 589 RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
mbed_official 62:c1549af978d6 590 1,
mbed_official 62:c1549af978d6 591 DMAC2_CHCTRL_n_SWRST_SHIFT,
mbed_official 62:c1549af978d6 592 DMAC2_CHCTRL_n_SWRST);
mbed_official 62:c1549af978d6 593 dummy = RZA_IO_RegRead_32(&DMAC2.CHCTRL_n,
mbed_official 62:c1549af978d6 594 DMAC2_CHCTRL_n_SWRST_SHIFT,
mbed_official 62:c1549af978d6 595 DMAC2_CHCTRL_n_SWRST);
mbed_official 62:c1549af978d6 596 /* Enable DMA transfer */
mbed_official 62:c1549af978d6 597 RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
mbed_official 62:c1549af978d6 598 1,
mbed_official 62:c1549af978d6 599 DMAC2_CHCTRL_n_SETEN_SHIFT,
mbed_official 62:c1549af978d6 600 DMAC2_CHCTRL_n_SETEN);
mbed_official 62:c1549af978d6 601
mbed_official 62:c1549af978d6 602 /* ---- Request by software ---- */
mbed_official 62:c1549af978d6 603 if (DMAC_REQ_MODE_SOFT == req)
mbed_official 62:c1549af978d6 604 {
mbed_official 62:c1549af978d6 605 /* DMA transfer Request by software */
mbed_official 62:c1549af978d6 606 RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
mbed_official 62:c1549af978d6 607 1,
mbed_official 62:c1549af978d6 608 DMAC2_CHCTRL_n_STG_SHIFT,
mbed_official 62:c1549af978d6 609 DMAC2_CHCTRL_n_STG);
mbed_official 62:c1549af978d6 610 }
mbed_official 62:c1549af978d6 611
mbed_official 62:c1549af978d6 612 ret = 0;
mbed_official 62:c1549af978d6 613 }
mbed_official 62:c1549af978d6 614 else
mbed_official 62:c1549af978d6 615 {
mbed_official 62:c1549af978d6 616 ret = -1;
mbed_official 62:c1549af978d6 617 }
mbed_official 62:c1549af978d6 618
mbed_official 62:c1549af978d6 619 return ret;
mbed_official 62:c1549af978d6 620 }
mbed_official 62:c1549af978d6 621
mbed_official 62:c1549af978d6 622 /*******************************************************************************
mbed_official 62:c1549af978d6 623 * Function Name: usb0_function_DMAC2_Close
mbed_official 62:c1549af978d6 624 * Description : Aborts DMAC channel 2 transfer. Returns the remaining transfer
mbed_official 62:c1549af978d6 625 * : byte count at the time of DMA transfer abort to the argument
mbed_official 62:c1549af978d6 626 * : *remain.
mbed_official 62:c1549af978d6 627 * Arguments : uint32_t * remain : Remaining transfer byte count when
mbed_official 62:c1549af978d6 628 * : : DMA transfer is aborted
mbed_official 62:c1549af978d6 629 * Return Value : none
mbed_official 62:c1549af978d6 630 *******************************************************************************/
mbed_official 62:c1549af978d6 631 void usb0_function_DMAC2_Close (uint32_t * remain)
mbed_official 62:c1549af978d6 632 {
mbed_official 62:c1549af978d6 633
mbed_official 62:c1549af978d6 634 /* ==== Abort transfer ==== */
mbed_official 62:c1549af978d6 635 RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
mbed_official 62:c1549af978d6 636 1,
mbed_official 62:c1549af978d6 637 DMAC2_CHCTRL_n_CLREN_SHIFT,
mbed_official 62:c1549af978d6 638 DMAC2_CHCTRL_n_CLREN);
mbed_official 62:c1549af978d6 639
mbed_official 62:c1549af978d6 640 while (1 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
mbed_official 62:c1549af978d6 641 DMAC2_CHSTAT_n_TACT_SHIFT,
mbed_official 62:c1549af978d6 642 DMAC2_CHSTAT_n_TACT))
mbed_official 62:c1549af978d6 643 {
mbed_official 62:c1549af978d6 644 /* Loop until transfer is aborted */
mbed_official 62:c1549af978d6 645 }
mbed_official 62:c1549af978d6 646
mbed_official 62:c1549af978d6 647 while (1 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
mbed_official 62:c1549af978d6 648 DMAC2_CHSTAT_n_EN_SHIFT,
mbed_official 62:c1549af978d6 649 DMAC2_CHSTAT_n_EN))
mbed_official 62:c1549af978d6 650 {
mbed_official 62:c1549af978d6 651 /* Loop until 0 is set in EN before checking the remaining transfer byte count */
mbed_official 62:c1549af978d6 652 }
mbed_official 62:c1549af978d6 653 /* ==== Obtain remaining transfer byte count ==== */
mbed_official 62:c1549af978d6 654 *remain = DMAC2.CRTB_n;
mbed_official 62:c1549af978d6 655 }
mbed_official 62:c1549af978d6 656
mbed_official 62:c1549af978d6 657 /*******************************************************************************
mbed_official 62:c1549af978d6 658 * Function Name: usb0_function_DMAC2_Load_Set
mbed_official 62:c1549af978d6 659 * Description : Sets the transfer source address, transfer destination
mbed_official 62:c1549af978d6 660 * : address, and total transfer byte count respectively
mbed_official 62:c1549af978d6 661 * : specified by the argument src_addr, dst_addr, and count to
mbed_official 62:c1549af978d6 662 * : DMAC channel 2 as DMA transfer information.
mbed_official 62:c1549af978d6 663 * : Sets the register set selected by the CHCFG_n register
mbed_official 62:c1549af978d6 664 * : RSEL bit from the Next0 or Next1 register set.
mbed_official 62:c1549af978d6 665 * : This function should be called when DMA transfer of DMAC
mbed_official 62:c1549af978d6 666 * : channel 2 is aboted.
mbed_official 62:c1549af978d6 667 * Arguments : uint32_t src_addr : Transfer source address
mbed_official 62:c1549af978d6 668 * : uint32_t dst_addr : Transfer destination address
mbed_official 62:c1549af978d6 669 * : uint32_t count : Total transfer byte count
mbed_official 62:c1549af978d6 670 * Return Value : none
mbed_official 62:c1549af978d6 671 *******************************************************************************/
mbed_official 62:c1549af978d6 672 void usb0_function_DMAC2_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
mbed_official 62:c1549af978d6 673 {
mbed_official 62:c1549af978d6 674 uint8_t reg_set;
mbed_official 62:c1549af978d6 675
mbed_official 62:c1549af978d6 676 /* Obtain register set in use */
mbed_official 62:c1549af978d6 677 reg_set = RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
mbed_official 62:c1549af978d6 678 DMAC2_CHSTAT_n_SR_SHIFT,
mbed_official 62:c1549af978d6 679 DMAC2_CHSTAT_n_SR);
mbed_official 62:c1549af978d6 680
mbed_official 62:c1549af978d6 681 /* ==== Load ==== */
mbed_official 62:c1549af978d6 682 if (0 == reg_set)
mbed_official 62:c1549af978d6 683 {
mbed_official 62:c1549af978d6 684 /* ---- Next0 Register Set ---- */
mbed_official 62:c1549af978d6 685 DMAC2.N0SA_n = src_addr; /* Start address of transfer source */
mbed_official 62:c1549af978d6 686 DMAC2.N0DA_n = dst_addr; /* Start address of transfer destination */
mbed_official 62:c1549af978d6 687 DMAC2.N0TB_n = count; /* Total transfer byte count */
mbed_official 62:c1549af978d6 688 }
mbed_official 62:c1549af978d6 689 else
mbed_official 62:c1549af978d6 690 {
mbed_official 62:c1549af978d6 691 /* ---- Next1 Register Set ---- */
mbed_official 62:c1549af978d6 692 DMAC2.N1SA_n = src_addr; /* Start address of transfer source */
mbed_official 62:c1549af978d6 693 DMAC2.N1DA_n = dst_addr; /* Start address of transfer destination */
mbed_official 62:c1549af978d6 694 DMAC2.N1TB_n = count; /* Total transfer byte count */
mbed_official 62:c1549af978d6 695 }
mbed_official 62:c1549af978d6 696 }
mbed_official 62:c1549af978d6 697
mbed_official 62:c1549af978d6 698 /* End of File */