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10 years, 8 months ago.
Is the KL25Z running at 48MHz?
How can I change its speed?
2 Answers
10 years, 8 months ago.
Hello Alexandre Aguiar,
This one is default :
Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
Reference clock source for MCG module is an external crystal 8MHz
Core clock = 48MHz, BusClock = 24MHz
To change the speed, check system file: https://github.com/mbedmicro/mbed/blob/master/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/system_MKL25Z4.c
Write your own routine to change clock speed, then call SystemCoreClockUpdate(). What speed to you need? Provide more details, I could generate the code for you.
Regards,
0xc0170
10 years, 8 months ago.
I'd be interested in finding out how to set up the KL25Z to run off the FLL with the core at 48MHz. I don't need USB, so using the internal oscillator is fine.
Using the internal oscillator will help shave the cost and space of an external crystal/resonator and the caps for them off the little boards I'm making with the QFN32 variant of the KL25Z...
Hello david dicarlo,
here should be working code for freedom KL25Z (not tested, if it fails, get back to me with results).
SIM_COPC = 0x00U;
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK; /* Enable clock gate for ports to enable pin routing */
/* SIM_CLKDIV1: OUTDIV1=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV4(0x01); /* Update system prescalers */
/* SIM_SOPT2: PLLFLLSEL=0 */
SIM_SOPT2 &= (uint32_t)~(uint32_t)(SIM_SOPT2_PLLFLLSEL_MASK); /* Select FLL as a clock source for various peripherals */
/* SIM_SOPT1: OSC32KSEL=3 */
SIM_SOPT1 |= SIM_SOPT1_OSC32KSEL(0x03); /* LPO 1kHz oscillator drives 32 kHz clock for various peripherals */
/* SIM_SOPT2: TPMSRC=1 */
SIM_SOPT2 = (uint32_t)((SIM_SOPT2 & (uint32_t)~(uint32_t)(
SIM_SOPT2_TPMSRC(0x02)
)) | (uint32_t)(
SIM_SOPT2_TPMSRC(0x01)
)); /* Set the TPM clock */
/* Switch to FEI Mode */
/* MCG_C1: CLKS=0,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
MCG_C1 = (MCG_C1_IREFS_MASK | MCG_C1_IRCLKEN_MASK);
/* MCG_C2: LOCRE0=0,??=0,RANGE0=0,HGO0=0,EREFS0=0,LP=0,IRCS=0 */
MCG_C2 = 0x00U;
/* MCG_C4: DMX32=1,DRST_DRS=1 */
MCG_C4 = (uint8_t)((MCG_C4 & (uint8_t)~(uint8_t)(
MCG_C4_DRST_DRS(0x02)
)) | (uint8_t)(
MCG_C4_DMX32_MASK |
MCG_C4_DRST_DRS(0x01)
));
/* OSC0_CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
OSC0_CR = OSC_CR_ERCLKEN_MASK;
/* MCG_C5: ??=0,PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */
MCG_C5 = 0x00U;
/* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */
MCG_C6 = 0x00U;
while((MCG_S & MCG_S_IREFST_MASK) == 0x00U) { /* Check that the source of the FLL reference clock is the internal reference clock. */
}
while((MCG_S & 0x0CU) != 0x00U) { /* Wait until output of the FLL is selected */
}
The code above initializes FEI mode with the CPU clock at 47.972352 MHz and the Bus Clock at 23.986176.
Regards,
0xc0170
Thanks for the code above.
I imported the mbed-src. Although I still have to go through it an analyze the differences, my quick attempt at adding an extra elif containing the code above to system_MKL25Z4.c and then changing the CLOCK_SETUP define to 3 (my new elif condition) did not work.
I also had to add another block to the define clock sources block, but I just copied another section - I still need to properly list out the various clock sources for the internal oscillator, but that's not what was preventing it from compiling.
At first glance, the differences were on the order of SIM_COPC vs SIM->COPC.
If I were to make the mod above within the main routine, how should it be encapsulated? I added #include "system_MKL25Z4.h" but there were still undefined symbols, which made me attempt the above. I'm not much of a C coder yet, so please forgive me ignorance.
The eventual goal is to purchase some KL25Zs in the QFN32 package and build up some small boards I'm working on. I don't need the accuracy of a crystal or resonator, so I'm leaving them off but I still need the core to run at 48MHz.
thanks.
posted by 04 Sep 2013Ah, sorry david, I forgot to emphasize that the above code is based on KL25Z header from freescale, not cmsis header which is used in mbed. They have different naming convection (as you already noticed).
0xc0170
posted by 05 Sep 2013No problem - I can usually get things to work if I have a good starting point, which you've given with the code snippet and pointing to the system_MKL25Z4.c file. I just didn't have time yesterday to compare the differences and dig into the register settings to understand better what's going on.
May I ask what the 0xc0170 means?
posted by 05 Sep 2013