Zainul Charbiwala / Mbed 2 deprecated ECGAFE_copy

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Dependencies:   DS1307 MAX17048 MODSERIAL SSD1308_128x64_I2C WatchDog mbed-rpc mbed

Fork of ECGAFE_copy by Zainul Charbiwala

ADS1298.cpp@0:ee0649a9025a, 2015-09-30 (annotated)

Committer:
zainulcharbiwala
Date:
Wed Sep 30 11:30:56 2015 +0000
Revision:
0:ee0649a9025a
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Who changed what in which revision?

UserRevisionLine numberNew contents of line
zainulcharbiwala 0:ee0649a9025a 1 #include "ADS1298.h"
zainulcharbiwala 0:ee0649a9025a 2
zainulcharbiwala 0:ee0649a9025a 3
zainulcharbiwala 0:ee0649a9025a 4 ADS1298::ADS1298(PinName mosi,
zainulcharbiwala 0:ee0649a9025a 5 PinName miso,
zainulcharbiwala 0:ee0649a9025a 6 PinName sck,
zainulcharbiwala 0:ee0649a9025a 7 PinName csn,
zainulcharbiwala 0:ee0649a9025a 8 PinName reset,
zainulcharbiwala 0:ee0649a9025a 9 PinName drdy,
zainulcharbiwala 0:ee0649a9025a 10 PinName start) : spi_(mosi, miso, sck), cs_(csn), reset_(reset), drdy_(drdy), start_(start) {
zainulcharbiwala 0:ee0649a9025a 11 }
zainulcharbiwala 0:ee0649a9025a 12
zainulcharbiwala 0:ee0649a9025a 13 void ADS1298::sendCommand(uint8_t cmd)
zainulcharbiwala 0:ee0649a9025a 14 {
zainulcharbiwala 0:ee0649a9025a 15 // Select the device by seting chip select low
zainulcharbiwala 0:ee0649a9025a 16 cs_ = 0;
zainulcharbiwala 0:ee0649a9025a 17 wait_us(TCSSC);
zainulcharbiwala 0:ee0649a9025a 18
zainulcharbiwala 0:ee0649a9025a 19 // Send SDATAC, as device comes up in RDATAC
zainulcharbiwala 0:ee0649a9025a 20 spi_.write(cmd);
zainulcharbiwala 0:ee0649a9025a 21 wait_us(TCMD);
zainulcharbiwala 0:ee0649a9025a 22
zainulcharbiwala 0:ee0649a9025a 23 // Deselect the device
zainulcharbiwala 0:ee0649a9025a 24 wait_us(TSCCS);
zainulcharbiwala 0:ee0649a9025a 25 cs_ = 1;
zainulcharbiwala 0:ee0649a9025a 26 // Wait between commands
zainulcharbiwala 0:ee0649a9025a 27 wait_us(TCSH);
zainulcharbiwala 0:ee0649a9025a 28 }
zainulcharbiwala 0:ee0649a9025a 29
zainulcharbiwala 0:ee0649a9025a 30 void ADS1298::writeRegister(uint8_t reg, uint8_t val)
zainulcharbiwala 0:ee0649a9025a 31 {
zainulcharbiwala 0:ee0649a9025a 32 // Select the device by seting chip select low
zainulcharbiwala 0:ee0649a9025a 33 cs_ = 0;
zainulcharbiwala 0:ee0649a9025a 34 wait_us(TCSSC);
zainulcharbiwala 0:ee0649a9025a 35
zainulcharbiwala 0:ee0649a9025a 36 // Write register address
zainulcharbiwala 0:ee0649a9025a 37 spi_.write(WREG|reg);
zainulcharbiwala 0:ee0649a9025a 38 wait_us(TCMD);
zainulcharbiwala 0:ee0649a9025a 39
zainulcharbiwala 0:ee0649a9025a 40 // Writing one register
zainulcharbiwala 0:ee0649a9025a 41 spi_.write(0x00);
zainulcharbiwala 0:ee0649a9025a 42 wait_us(TCMD);
zainulcharbiwala 0:ee0649a9025a 43
zainulcharbiwala 0:ee0649a9025a 44 // Write the value
zainulcharbiwala 0:ee0649a9025a 45 spi_.write(val);
zainulcharbiwala 0:ee0649a9025a 46 wait_us(TCMD);
zainulcharbiwala 0:ee0649a9025a 47
zainulcharbiwala 0:ee0649a9025a 48 // Deselect the device
zainulcharbiwala 0:ee0649a9025a 49 wait_us(TSCCS);
zainulcharbiwala 0:ee0649a9025a 50 cs_ = 1;
zainulcharbiwala 0:ee0649a9025a 51
zainulcharbiwala 0:ee0649a9025a 52 // Wait between commands
zainulcharbiwala 0:ee0649a9025a 53 wait_us(TCSH);
zainulcharbiwala 0:ee0649a9025a 54 }
zainulcharbiwala 0:ee0649a9025a 55
zainulcharbiwala 0:ee0649a9025a 56 uint8_t ADS1298::readRegister(uint8_t reg)
zainulcharbiwala 0:ee0649a9025a 57 {
zainulcharbiwala 0:ee0649a9025a 58 uint8_t res;
zainulcharbiwala 0:ee0649a9025a 59 // Select the device by seting chip select low
zainulcharbiwala 0:ee0649a9025a 60 cs_ = 0;
zainulcharbiwala 0:ee0649a9025a 61 wait_us(TCSSC);
zainulcharbiwala 0:ee0649a9025a 62
zainulcharbiwala 0:ee0649a9025a 63 // Write register address
zainulcharbiwala 0:ee0649a9025a 64 spi_.write(RREG|reg);
zainulcharbiwala 0:ee0649a9025a 65 wait_us(TCMD);
zainulcharbiwala 0:ee0649a9025a 66
zainulcharbiwala 0:ee0649a9025a 67 // Reading one register
zainulcharbiwala 0:ee0649a9025a 68 spi_.write(0x00);
zainulcharbiwala 0:ee0649a9025a 69 wait_us(TCMD);
zainulcharbiwala 0:ee0649a9025a 70
zainulcharbiwala 0:ee0649a9025a 71 // Write a dummy value to read the register
zainulcharbiwala 0:ee0649a9025a 72 res = spi_.write(0x00);
zainulcharbiwala 0:ee0649a9025a 73 wait_us(TCMD);
zainulcharbiwala 0:ee0649a9025a 74
zainulcharbiwala 0:ee0649a9025a 75 // Deselect the device
zainulcharbiwala 0:ee0649a9025a 76 wait_us(TSCCS);
zainulcharbiwala 0:ee0649a9025a 77 cs_ = 1;
zainulcharbiwala 0:ee0649a9025a 78
zainulcharbiwala 0:ee0649a9025a 79 // Wait between commands
zainulcharbiwala 0:ee0649a9025a 80 wait_us(TCSH);
zainulcharbiwala 0:ee0649a9025a 81 return res;
zainulcharbiwala 0:ee0649a9025a 82 }
zainulcharbiwala 0:ee0649a9025a 83
zainulcharbiwala 0:ee0649a9025a 84 void ADS1298::readData(uint8_t *data)
zainulcharbiwala 0:ee0649a9025a 85 {
zainulcharbiwala 0:ee0649a9025a 86 // Select the device by seting chip select low
zainulcharbiwala 0:ee0649a9025a 87 cs_ = 0;
zainulcharbiwala 0:ee0649a9025a 88 wait_us(TCSSC);
zainulcharbiwala 0:ee0649a9025a 89
zainulcharbiwala 0:ee0649a9025a 90 for (int i=0; i<27; i++) {
zainulcharbiwala 0:ee0649a9025a 91 // Write a dummy value to read the register
zainulcharbiwala 0:ee0649a9025a 92 *(data+i) = spi_.write(0x00);
zainulcharbiwala 0:ee0649a9025a 93 }
zainulcharbiwala 0:ee0649a9025a 94 wait_us(TCMD);
zainulcharbiwala 0:ee0649a9025a 95
zainulcharbiwala 0:ee0649a9025a 96 // Deselect the device
zainulcharbiwala 0:ee0649a9025a 97 wait_us(TSCCS);
zainulcharbiwala 0:ee0649a9025a 98 cs_ = 1;
zainulcharbiwala 0:ee0649a9025a 99
zainulcharbiwala 0:ee0649a9025a 100 // Wait between commands
zainulcharbiwala 0:ee0649a9025a 101 wait_us(TCSH);
zainulcharbiwala 0:ee0649a9025a 102 }
zainulcharbiwala 0:ee0649a9025a 103
zainulcharbiwala 0:ee0649a9025a 104 void ADS1298::initialize(void (*dataReady)(void))
zainulcharbiwala 0:ee0649a9025a 105 {
zainulcharbiwala 0:ee0649a9025a 106 // Initialize signals
zainulcharbiwala 0:ee0649a9025a 107 cs_ = 1;
zainulcharbiwala 0:ee0649a9025a 108 start_ = 0;
zainulcharbiwala 0:ee0649a9025a 109 reset_ = 1;
zainulcharbiwala 0:ee0649a9025a 110 drdy_.fall(dataReady);
zainulcharbiwala 0:ee0649a9025a 111
zainulcharbiwala 0:ee0649a9025a 112 // Set up SPI
zainulcharbiwala 0:ee0649a9025a 113 spi_.format(8,1);
zainulcharbiwala 0:ee0649a9025a 114 // Choosing 1MHz arbitrarily for now
zainulcharbiwala 0:ee0649a9025a 115 spi_.frequency(1000000);
zainulcharbiwala 0:ee0649a9025a 116
zainulcharbiwala 0:ee0649a9025a 117
zainulcharbiwala 0:ee0649a9025a 118 // Power on reset
zainulcharbiwala 0:ee0649a9025a 119 wait_us(TPOR);
zainulcharbiwala 0:ee0649a9025a 120
zainulcharbiwala 0:ee0649a9025a 121 // Reset the device
zainulcharbiwala 0:ee0649a9025a 122 reset_ = 0;
zainulcharbiwala 0:ee0649a9025a 123 wait_us(TRST);
zainulcharbiwala 0:ee0649a9025a 124 reset_ = 1;
zainulcharbiwala 0:ee0649a9025a 125 wait_us(TRST2);
zainulcharbiwala 0:ee0649a9025a 126
zainulcharbiwala 0:ee0649a9025a 127 // Send SDATAC, as device comes up in RDATAC
zainulcharbiwala 0:ee0649a9025a 128 sendCommand(SDATAC);
zainulcharbiwala 0:ee0649a9025a 129
zainulcharbiwala 0:ee0649a9025a 130 //pc.printf("ID = 0x%02X\r\n", readRegister(ID));
zainulcharbiwala 0:ee0649a9025a 131 //pc.printf("CONFIG1 = 0x%02X\r\n", readRegister(CONFIG1));
zainulcharbiwala 0:ee0649a9025a 132 //pc.printf("CONFIG2 = 0x%02X\r\n", readRegister(CONFIG2));
zainulcharbiwala 0:ee0649a9025a 133 //pc.printf("CONFIG3 = 0x%02X\r\n", readRegister(CONFIG3));
zainulcharbiwala 0:ee0649a9025a 134
zainulcharbiwala 0:ee0649a9025a 135 // Turn on internal reference and wait for it to settle
zainulcharbiwala 0:ee0649a9025a 136 writeRegister(CONFIG3, CONFIG3_DEFAULT | CONFIG3_PD_REFBUF);
zainulcharbiwala 0:ee0649a9025a 137 wait_us(TINTREF);
zainulcharbiwala 0:ee0649a9025a 138 //pc.printf("CONFIG3 = 0x%02X\r\n", readRegister(CONFIG3));
zainulcharbiwala 0:ee0649a9025a 139
zainulcharbiwala 0:ee0649a9025a 140 /*
zainulcharbiwala 0:ee0649a9025a 141 // Set up device
zainulcharbiwala 0:ee0649a9025a 142 writeRegister(CONFIG1, CONFIG1_HR | CONFIG1_DR2 | CONFIG1_DR1);
zainulcharbiwala 0:ee0649a9025a 143 pc.printf("CONFIG1 = 0x%02X\r\n", readRegister(CONFIG1));
zainulcharbiwala 0:ee0649a9025a 144 writeRegister(CONFIG2, CONFIG2_DEFAULT);
zainulcharbiwala 0:ee0649a9025a 145 pc.printf("CONFIG2 = 0x%02X\r\n", readRegister(CONFIG2));
zainulcharbiwala 0:ee0649a9025a 146
zainulcharbiwala 0:ee0649a9025a 147 // Input short on all channels
zainulcharbiwala 0:ee0649a9025a 148 writeRegister(CH1SET, CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 149 writeRegister(CH2SET, CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 150 writeRegister(CH3SET, CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 151 writeRegister(CH4SET, CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 152 writeRegister(CH5SET, CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 153 writeRegister(CH6SET, CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 154 writeRegister(CH7SET, CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 155 writeRegister(CH8SET, CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 156 pc.printf("CH1SET = 0x%02X\r\n", readRegister(CH1SET));
zainulcharbiwala 0:ee0649a9025a 157 pc.printf("CH2SET = 0x%02X\r\n", readRegister(CH2SET));
zainulcharbiwala 0:ee0649a9025a 158 pc.printf("CH3SET = 0x%02X\r\n", readRegister(CH3SET));
zainulcharbiwala 0:ee0649a9025a 159 pc.printf("CH4SET = 0x%02X\r\n", readRegister(CH4SET));
zainulcharbiwala 0:ee0649a9025a 160 pc.printf("CH5SET = 0x%02X\r\n", readRegister(CH5SET));
zainulcharbiwala 0:ee0649a9025a 161 pc.printf("CH6SET = 0x%02X\r\n", readRegister(CH6SET));
zainulcharbiwala 0:ee0649a9025a 162 pc.printf("CH7SET = 0x%02X\r\n", readRegister(CH7SET));
zainulcharbiwala 0:ee0649a9025a 163 pc.printf("CH8SET = 0x%02X\r\n", readRegister(CH8SET));
zainulcharbiwala 0:ee0649a9025a 164 */
zainulcharbiwala 0:ee0649a9025a 165
zainulcharbiwala 0:ee0649a9025a 166 /*
zainulcharbiwala 0:ee0649a9025a 167 // Set up device
zainulcharbiwala 0:ee0649a9025a 168 writeRegister(CONFIG1, CONFIG1_HR | CONFIG1_DR2 | CONFIG1_DR1);
zainulcharbiwala 0:ee0649a9025a 169 writeRegister(CONFIG2, CONFIG2_DEFAULT | CONFIG2_INTTEST);
zainulcharbiwala 0:ee0649a9025a 170
zainulcharbiwala 0:ee0649a9025a 171 // Input test on all channels
zainulcharbiwala 0:ee0649a9025a 172 writeRegister(CH1SET, CHNSET_MUXN2 | CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 173 writeRegister(CH2SET, CHNSET_MUXN2 | CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 174 writeRegister(CH3SET, CHNSET_MUXN2 | CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 175 writeRegister(CH4SET, CHNSET_MUXN2 | CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 176 writeRegister(CH5SET, CHNSET_MUXN2 | CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 177 writeRegister(CH6SET, CHNSET_MUXN2 | CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 178 writeRegister(CH7SET, CHNSET_MUXN2 | CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 179 writeRegister(CH8SET, CHNSET_MUXN2 | CHNSET_MUXN0);
zainulcharbiwala 0:ee0649a9025a 180 */
zainulcharbiwala 0:ee0649a9025a 181
zainulcharbiwala 0:ee0649a9025a 182 // Set up device
zainulcharbiwala 0:ee0649a9025a 183 writeRegister(CONFIG1, CONFIG1_HR | CONFIG1_DR2 | CONFIG1_DR1);
zainulcharbiwala 0:ee0649a9025a 184 writeRegister(CONFIG2, CONFIG2_DEFAULT);
zainulcharbiwala 0:ee0649a9025a 185 writeRegister(CONFIG3, CONFIG3_DEFAULT | CONFIG3_PD_REFBUF |
zainulcharbiwala 0:ee0649a9025a 186 CONFIG3_RLDREF_INT | CONFIG3_PD_RLD);
zainulcharbiwala 0:ee0649a9025a 187 writeRegister(CONFIG4, CONFIG4_PD_LOFF_COMP);
zainulcharbiwala 0:ee0649a9025a 188 writeRegister(LOFF, LOFF_VLEAD_OFF_EN | LOFF_FLEAD_OFF1 | LOFF_FLEAD_OFF0);
zainulcharbiwala 0:ee0649a9025a 189 writeRegister(LOFF_SENSP, 0xFF); // for V6, LA, LL, V2, V3, V4, V5, V1
zainulcharbiwala 0:ee0649a9025a 190 writeRegister(LOFF_SENSN, 0x02); // for RA only
zainulcharbiwala 0:ee0649a9025a 191 writeRegister(RLD_SENSP, 0x06); // for LA, LL
zainulcharbiwala 0:ee0649a9025a 192 writeRegister(RLD_SENSN, 0x02); // for RA
zainulcharbiwala 0:ee0649a9025a 193 writeRegister(WCT1, WCT1_PD_WCTA | WCT1_WCTA1); // WCTA to CH2P = LA
zainulcharbiwala 0:ee0649a9025a 194 writeRegister(WCT2, WCT2_PD_WCTC | WCT2_PD_WCTB |
zainulcharbiwala 0:ee0649a9025a 195 WCT2_WCTB2 | WCT2_WCTC1 |
zainulcharbiwala 0:ee0649a9025a 196 WCT2_WCTC0); // WCTB to CH3P = LL, WCTC to CH2N = RA
zainulcharbiwala 0:ee0649a9025a 197
zainulcharbiwala 0:ee0649a9025a 198 // Input test on all channels
zainulcharbiwala 0:ee0649a9025a 199 writeRegister(CH1SET, CHNSET_DEFAULT);
zainulcharbiwala 0:ee0649a9025a 200 writeRegister(CH2SET, CHNSET_DEFAULT);
zainulcharbiwala 0:ee0649a9025a 201 writeRegister(CH3SET, CHNSET_DEFAULT);
zainulcharbiwala 0:ee0649a9025a 202 writeRegister(CH4SET, CHNSET_DEFAULT);
zainulcharbiwala 0:ee0649a9025a 203 writeRegister(CH5SET, CHNSET_DEFAULT);
zainulcharbiwala 0:ee0649a9025a 204 writeRegister(CH6SET, CHNSET_DEFAULT);
zainulcharbiwala 0:ee0649a9025a 205 writeRegister(CH7SET, CHNSET_DEFAULT);
zainulcharbiwala 0:ee0649a9025a 206 writeRegister(CH8SET, CHNSET_DEFAULT);
zainulcharbiwala 0:ee0649a9025a 207
zainulcharbiwala 0:ee0649a9025a 208 }
zainulcharbiwala 0:ee0649a9025a 209
zainulcharbiwala 0:ee0649a9025a 210 void ADS1298::startCapture() {
zainulcharbiwala 0:ee0649a9025a 211 //Start conversion
zainulcharbiwala 0:ee0649a9025a 212 start_ = 1;
zainulcharbiwala 0:ee0649a9025a 213
zainulcharbiwala 0:ee0649a9025a 214 // Send RDATAC to start data collection
zainulcharbiwala 0:ee0649a9025a 215 sendCommand(RDATAC);
zainulcharbiwala 0:ee0649a9025a 216 }
zainulcharbiwala 0:ee0649a9025a 217
zainulcharbiwala 0:ee0649a9025a 218 void ADS1298::stopCapture() {
zainulcharbiwala 0:ee0649a9025a 219 //Stop conversion
zainulcharbiwala 0:ee0649a9025a 220 start_ = 0;
zainulcharbiwala 0:ee0649a9025a 221
zainulcharbiwala 0:ee0649a9025a 222 // Send SDATAC to stop data collection
zainulcharbiwala 0:ee0649a9025a 223 sendCommand(SDATAC);
zainulcharbiwala 0:ee0649a9025a 224 }
zainulcharbiwala 0:ee0649a9025a 225
zainulcharbiwala 0:ee0649a9025a 226 int ADS1298::updateLeadOff(uint8_t *buf) {
zainulcharbiwala 0:ee0649a9025a 227
zainulcharbiwala 0:ee0649a9025a 228 // Buffer contains 9 fields of 24 bits each
zainulcharbiwala 0:ee0649a9025a 229 // First field contains an identifier and the status bits
zainulcharbiwala 0:ee0649a9025a 230 // First nibble of first byte is always 0b1100
zainulcharbiwala 0:ee0649a9025a 231 // Second nibble of third byte is always 0x00 because GPIO are not used
zainulcharbiwala 0:ee0649a9025a 232 if ((buf[0] & 0xf0) != 0xc0 || (buf[2] & 0x0f) != 0x00)
zainulcharbiwala 0:ee0649a9025a 233 return -1;
zainulcharbiwala 0:ee0649a9025a 234
zainulcharbiwala 0:ee0649a9025a 235 // Second nibble of first byte has IN8P_OFF (V1), IN7P_OFF (V5), IN6P_OFF (V4), IN5P_OFF (V3)
zainulcharbiwala 0:ee0649a9025a 236 lOff_ = 0;
zainulcharbiwala 0:ee0649a9025a 237 lOff_ |= (buf[0] & 0x08) ? (1 << LOFFV1) : 0;
zainulcharbiwala 0:ee0649a9025a 238 lOff_ |= (buf[0] & 0x04) ? (1 << LOFFV5) : 0;
zainulcharbiwala 0:ee0649a9025a 239 lOff_ |= (buf[0] & 0x02) ? (1 << LOFFV4) : 0;
zainulcharbiwala 0:ee0649a9025a 240 lOff_ |= (buf[0] & 0x01) ? (1 << LOFFV3) : 0;
zainulcharbiwala 0:ee0649a9025a 241 // First nibble of second byte has IN4P_OFF (V2), IN3P_OFF (LL), IN2P_OFF (LA), IN1P_OFF (V6)
zainulcharbiwala 0:ee0649a9025a 242 lOff_ |= (buf[1] & 0x80) ? (1 << LOFFV2) : 0;
zainulcharbiwala 0:ee0649a9025a 243 lOff_ |= (buf[1] & 0x40) ? (1 << LOFFLL) : 0;
zainulcharbiwala 0:ee0649a9025a 244 lOff_ |= (buf[1] & 0x20) ? (1 << LOFFLA) : 0;
zainulcharbiwala 0:ee0649a9025a 245 lOff_ |= (buf[1] & 0x10) ? (1 << LOFFV6) : 0;
zainulcharbiwala 0:ee0649a9025a 246 // First nibble of third byte has IN2N_OFF (RA)
zainulcharbiwala 0:ee0649a9025a 247 lOff_ |= (buf[2] & 0x20) ? (1 << LOFFRA) : 0;
zainulcharbiwala 0:ee0649a9025a 248
zainulcharbiwala 0:ee0649a9025a 249 return 0;
zainulcharbiwala 0:ee0649a9025a 250 }