Yihui Xiong / Mbed 2 deprecated Seeed_nRF51822_Motion

initial

Dependencies:   mbed

mbed-src/hal/spi_api.h@0:638edba3adf6, 2016-01-11 (annotated)

Committer:
yihui
Date:
Mon Jan 11 02:32:24 2016 +0000
Revision:
0:638edba3adf6
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yihui 0:638edba3adf6 1 /* mbed Microcontroller Library
yihui 0:638edba3adf6 2 * Copyright (c) 2006-2013 ARM Limited
yihui 0:638edba3adf6 3 *
yihui 0:638edba3adf6 4 * Licensed under the Apache License, Version 2.0 (the "License");
yihui 0:638edba3adf6 5 * you may not use this file except in compliance with the License.
yihui 0:638edba3adf6 6 * You may obtain a copy of the License at
yihui 0:638edba3adf6 7 *
yihui 0:638edba3adf6 8 * http://www.apache.org/licenses/LICENSE-2.0
yihui 0:638edba3adf6 9 *
yihui 0:638edba3adf6 10 * Unless required by applicable law or agreed to in writing, software
yihui 0:638edba3adf6 11 * distributed under the License is distributed on an "AS IS" BASIS,
yihui 0:638edba3adf6 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
yihui 0:638edba3adf6 13 * See the License for the specific language governing permissions and
yihui 0:638edba3adf6 14 * limitations under the License.
yihui 0:638edba3adf6 15 */
yihui 0:638edba3adf6 16 #ifndef MBED_SPI_API_H
yihui 0:638edba3adf6 17 #define MBED_SPI_API_H
yihui 0:638edba3adf6 18
yihui 0:638edba3adf6 19 #include "device.h"
yihui 0:638edba3adf6 20 #include "dma_api.h"
yihui 0:638edba3adf6 21 #include "buffer.h"
yihui 0:638edba3adf6 22
yihui 0:638edba3adf6 23 #if DEVICE_SPI
yihui 0:638edba3adf6 24
yihui 0:638edba3adf6 25 #define SPI_EVENT_ERROR (1 << 1)
yihui 0:638edba3adf6 26 #define SPI_EVENT_COMPLETE (1 << 2)
yihui 0:638edba3adf6 27 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
yihui 0:638edba3adf6 28 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
yihui 0:638edba3adf6 29
yihui 0:638edba3adf6 30 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred
yihui 0:638edba3adf6 31
yihui 0:638edba3adf6 32 #define SPI_FILL_WORD (0xFFFF)
yihui 0:638edba3adf6 33
yihui 0:638edba3adf6 34 #if DEVICE_SPI_ASYNCH
yihui 0:638edba3adf6 35 /** Asynch spi hal structure
yihui 0:638edba3adf6 36 */
yihui 0:638edba3adf6 37 typedef struct {
yihui 0:638edba3adf6 38 struct spi_s spi; /**< Target specific spi structure */
yihui 0:638edba3adf6 39 struct buffer_s tx_buff; /**< Tx buffer */
yihui 0:638edba3adf6 40 struct buffer_s rx_buff; /**< Rx buffer */
yihui 0:638edba3adf6 41 } spi_t;
yihui 0:638edba3adf6 42
yihui 0:638edba3adf6 43 #else
yihui 0:638edba3adf6 44 /** Non-asynch spi hal structure
yihui 0:638edba3adf6 45 */
yihui 0:638edba3adf6 46 typedef struct spi_s spi_t;
yihui 0:638edba3adf6 47
yihui 0:638edba3adf6 48 #endif
yihui 0:638edba3adf6 49
yihui 0:638edba3adf6 50 #ifdef __cplusplus
yihui 0:638edba3adf6 51 extern "C" {
yihui 0:638edba3adf6 52 #endif
yihui 0:638edba3adf6 53
yihui 0:638edba3adf6 54 /**
yihui 0:638edba3adf6 55 * \defgroup GeneralSPI SPI Configuration Functions
yihui 0:638edba3adf6 56 * @{
yihui 0:638edba3adf6 57 */
yihui 0:638edba3adf6 58
yihui 0:638edba3adf6 59 /** Initialize the SPI peripheral
yihui 0:638edba3adf6 60 *
yihui 0:638edba3adf6 61 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
yihui 0:638edba3adf6 62 * @param[out] obj The SPI object to initialize
yihui 0:638edba3adf6 63 * @param[in] mosi The pin to use for MOSI
yihui 0:638edba3adf6 64 * @param[in] miso The pin to use for MISO
yihui 0:638edba3adf6 65 * @param[in] sclk The pin to use for SCLK
yihui 0:638edba3adf6 66 * @param[in] ssel The pin to use for SSEL
yihui 0:638edba3adf6 67 */
yihui 0:638edba3adf6 68 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
yihui 0:638edba3adf6 69
yihui 0:638edba3adf6 70 /** Release a SPI object
yihui 0:638edba3adf6 71 *
yihui 0:638edba3adf6 72 * TODO: spi_free is currently unimplemented
yihui 0:638edba3adf6 73 * This will require reference counting at the C++ level to be safe
yihui 0:638edba3adf6 74 *
yihui 0:638edba3adf6 75 * Return the pins owned by the SPI object to their reset state
yihui 0:638edba3adf6 76 * Disable the SPI peripheral
yihui 0:638edba3adf6 77 * Disable the SPI clock
yihui 0:638edba3adf6 78 * @param[in] obj The SPI object to deinitialize
yihui 0:638edba3adf6 79 */
yihui 0:638edba3adf6 80 void spi_free(spi_t *obj);
yihui 0:638edba3adf6 81
yihui 0:638edba3adf6 82 /** Configure the SPI format
yihui 0:638edba3adf6 83 *
yihui 0:638edba3adf6 84 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode
yihui 0:638edba3adf6 85 * @param[in,out] obj The SPI object to configure
yihui 0:638edba3adf6 86 * @param[in] bits The number of bits per frame
yihui 0:638edba3adf6 87 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
yihui 0:638edba3adf6 88 * @param[in] slave Zero for master mode or non-zero for slave mode
yihui 0:638edba3adf6 89 */
yihui 0:638edba3adf6 90 void spi_format(spi_t *obj, int bits, int mode, int slave);
yihui 0:638edba3adf6 91
yihui 0:638edba3adf6 92 /** Set the SPI baud rate
yihui 0:638edba3adf6 93 *
yihui 0:638edba3adf6 94 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
yihui 0:638edba3adf6 95 * Configures the SPI peripheral's baud rate
yihui 0:638edba3adf6 96 * @param[in,out] obj The SPI object to configure
yihui 0:638edba3adf6 97 * @param[in] hz The baud rate in Hz
yihui 0:638edba3adf6 98 */
yihui 0:638edba3adf6 99 void spi_frequency(spi_t *obj, int hz);
yihui 0:638edba3adf6 100
yihui 0:638edba3adf6 101 /**@}*/
yihui 0:638edba3adf6 102 /**
yihui 0:638edba3adf6 103 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
yihui 0:638edba3adf6 104 * @{
yihui 0:638edba3adf6 105 */
yihui 0:638edba3adf6 106
yihui 0:638edba3adf6 107 /** Write a byte out in master mode and receive a value
yihui 0:638edba3adf6 108 *
yihui 0:638edba3adf6 109 * @param[in] obj The SPI peripheral to use for sending
yihui 0:638edba3adf6 110 * @param[in] value The value to send
yihui 0:638edba3adf6 111 * @return Returns the value received during send
yihui 0:638edba3adf6 112 */
yihui 0:638edba3adf6 113 int spi_master_write(spi_t *obj, int value);
yihui 0:638edba3adf6 114
yihui 0:638edba3adf6 115 /** Check if a value is available to read
yihui 0:638edba3adf6 116 *
yihui 0:638edba3adf6 117 * @param[in] obj The SPI peripheral to check
yihui 0:638edba3adf6 118 * @return non-zero if a value is available
yihui 0:638edba3adf6 119 */
yihui 0:638edba3adf6 120 int spi_slave_receive(spi_t *obj);
yihui 0:638edba3adf6 121
yihui 0:638edba3adf6 122 /** Get a received value out of the SPI receive buffer in slave mode
yihui 0:638edba3adf6 123 *
yihui 0:638edba3adf6 124 * Blocks until a value is available
yihui 0:638edba3adf6 125 * @param[in] obj The SPI peripheral to read
yihui 0:638edba3adf6 126 * @return The value received
yihui 0:638edba3adf6 127 */
yihui 0:638edba3adf6 128 int spi_slave_read(spi_t *obj);
yihui 0:638edba3adf6 129
yihui 0:638edba3adf6 130 /** Write a value to the SPI peripheral in slave mode
yihui 0:638edba3adf6 131 *
yihui 0:638edba3adf6 132 * Blocks until the SPI peripheral can be written to
yihui 0:638edba3adf6 133 * @param[in] obj The SPI peripheral to write
yihui 0:638edba3adf6 134 * @param[in] value The value to write
yihui 0:638edba3adf6 135 */
yihui 0:638edba3adf6 136 void spi_slave_write(spi_t *obj, int value);
yihui 0:638edba3adf6 137
yihui 0:638edba3adf6 138 /** Checks if the specified SPI peripheral is in use
yihui 0:638edba3adf6 139 *
yihui 0:638edba3adf6 140 * @param[in] obj The SPI peripheral to check
yihui 0:638edba3adf6 141 * @return non-zero if the peripheral is currently transmitting
yihui 0:638edba3adf6 142 */
yihui 0:638edba3adf6 143 int spi_busy(spi_t *obj);
yihui 0:638edba3adf6 144
yihui 0:638edba3adf6 145 /** Get the module number
yihui 0:638edba3adf6 146 *
yihui 0:638edba3adf6 147 * @param[in] obj The SPI peripheral to check
yihui 0:638edba3adf6 148 * @return The module number
yihui 0:638edba3adf6 149 */
yihui 0:638edba3adf6 150 uint8_t spi_get_module(spi_t *obj);
yihui 0:638edba3adf6 151
yihui 0:638edba3adf6 152 /**@}*/
yihui 0:638edba3adf6 153
yihui 0:638edba3adf6 154 #if DEVICE_SPI_ASYNCH
yihui 0:638edba3adf6 155 /**
yihui 0:638edba3adf6 156 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
yihui 0:638edba3adf6 157 * @{
yihui 0:638edba3adf6 158 */
yihui 0:638edba3adf6 159
yihui 0:638edba3adf6 160 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
yihui 0:638edba3adf6 161 *
yihui 0:638edba3adf6 162 * @param[in] obj The SPI object which holds the transfer information
yihui 0:638edba3adf6 163 * @param[in] tx The buffer to send
yihui 0:638edba3adf6 164 * @param[in] tx_length The number of words to transmit
yihui 0:638edba3adf6 165 * @param[in] rx The buffer to receive
yihui 0:638edba3adf6 166 * @param[in] rx_length The number of words to receive
yihui 0:638edba3adf6 167 * @param[in] bit_width The bit width of buffer words
yihui 0:638edba3adf6 168 * @param[in] event The logical OR of events to be registered
yihui 0:638edba3adf6 169 * @param[in] handler SPI interrupt handler
yihui 0:638edba3adf6 170 * @param[in] hint A suggestion for how to use DMA with this transfer
yihui 0:638edba3adf6 171 */
yihui 0:638edba3adf6 172 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
yihui 0:638edba3adf6 173
yihui 0:638edba3adf6 174 /** The asynchronous IRQ handler
yihui 0:638edba3adf6 175 *
yihui 0:638edba3adf6 176 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
yihui 0:638edba3adf6 177 * conditions, such as buffer overflows or transfer complete.
yihui 0:638edba3adf6 178 * @param[in] obj The SPI object which holds the transfer information
yihui 0:638edba3adf6 179 * @return event flags if a transfer termination condition was met or 0 otherwise.
yihui 0:638edba3adf6 180 */
yihui 0:638edba3adf6 181 uint32_t spi_irq_handler_asynch(spi_t *obj);
yihui 0:638edba3adf6 182
yihui 0:638edba3adf6 183 /** Attempts to determine if the SPI peripheral is already in use.
yihui 0:638edba3adf6 184 *
yihui 0:638edba3adf6 185 * If a temporary DMA channel has been allocated, peripheral is in use.
yihui 0:638edba3adf6 186 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
yihui 0:638edba3adf6 187 * channel were allocated.
yihui 0:638edba3adf6 188 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
yihui 0:638edba3adf6 189 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
yihui 0:638edba3adf6 190 * there are any bytes in the FIFOs.
yihui 0:638edba3adf6 191 * @param[in] obj The SPI object to check for activity
yihui 0:638edba3adf6 192 * @return non-zero if the SPI port is active or zero if it is not.
yihui 0:638edba3adf6 193 */
yihui 0:638edba3adf6 194 uint8_t spi_active(spi_t *obj);
yihui 0:638edba3adf6 195
yihui 0:638edba3adf6 196 /** Abort an SPI transfer
yihui 0:638edba3adf6 197 *
yihui 0:638edba3adf6 198 * @param obj The SPI peripheral to stop
yihui 0:638edba3adf6 199 */
yihui 0:638edba3adf6 200 void spi_abort_asynch(spi_t *obj);
yihui 0:638edba3adf6 201
yihui 0:638edba3adf6 202
yihui 0:638edba3adf6 203 #endif
yihui 0:638edba3adf6 204
yihui 0:638edba3adf6 205 /**@}*/
yihui 0:638edba3adf6 206
yihui 0:638edba3adf6 207 #ifdef __cplusplus
yihui 0:638edba3adf6 208 }
yihui 0:638edba3adf6 209 #endif // __cplusplus
yihui 0:638edba3adf6 210
yihui 0:638edba3adf6 211 #endif // SPI_DEVICE
yihui 0:638edba3adf6 212
yihui 0:638edba3adf6 213 #endif // MBED_SPI_API_H