Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_NXP/TARGET_LPC2460/spi_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2015 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "mbed_assert.h"
elessair 0:f269e3021894 17 #include <math.h>
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19 #include "spi_api.h"
elessair 0:f269e3021894 20 #include "cmsis.h"
elessair 0:f269e3021894 21 #include "pinmap.h"
elessair 0:f269e3021894 22 #include "mbed_error.h"
elessair 0:f269e3021894 23
elessair 0:f269e3021894 24 static const PinMap PinMap_SPI_SCLK[] = {
elessair 0:f269e3021894 25 {P0_7 , SPI_1, 2},
elessair 0:f269e3021894 26 {P0_15, SPI_0, 2},
elessair 0:f269e3021894 27 {P1_20, SPI_0, 3},
elessair 0:f269e3021894 28 {P1_31, SPI_1, 2},
elessair 0:f269e3021894 29 {NC , NC , 0}
elessair 0:f269e3021894 30 };
elessair 0:f269e3021894 31
elessair 0:f269e3021894 32 static const PinMap PinMap_SPI_MOSI[] = {
elessair 0:f269e3021894 33 {P0_9 , SPI_1, 2},
elessair 0:f269e3021894 34 {P0_13, SPI_1, 2},
elessair 0:f269e3021894 35 {P0_18, SPI_0, 2},
elessair 0:f269e3021894 36 {P1_24, SPI_0, 3},
elessair 0:f269e3021894 37 {NC , NC , 0}
elessair 0:f269e3021894 38 };
elessair 0:f269e3021894 39
elessair 0:f269e3021894 40 static const PinMap PinMap_SPI_MISO[] = {
elessair 0:f269e3021894 41 {P0_8 , SPI_1, 2},
elessair 0:f269e3021894 42 {P0_12, SPI_1, 2},
elessair 0:f269e3021894 43 {P0_17, SPI_0, 2},
elessair 0:f269e3021894 44 {P1_23, SPI_0, 3},
elessair 0:f269e3021894 45 {NC , NC , 0}
elessair 0:f269e3021894 46 };
elessair 0:f269e3021894 47
elessair 0:f269e3021894 48 static const PinMap PinMap_SPI_SSEL[] = {
elessair 0:f269e3021894 49 {P0_6 , SPI_1, 2},
elessair 0:f269e3021894 50 {P0_14, SPI_1, 3},
elessair 0:f269e3021894 51 {P0_16, SPI_0, 2},
elessair 0:f269e3021894 52 {P1_21, SPI_0, 3},
elessair 0:f269e3021894 53 {NC , NC , 0}
elessair 0:f269e3021894 54 };
elessair 0:f269e3021894 55
elessair 0:f269e3021894 56 static inline int ssp_disable(spi_t *obj);
elessair 0:f269e3021894 57 static inline int ssp_enable(spi_t *obj);
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
elessair 0:f269e3021894 60 // determine the SPI to use
elessair 0:f269e3021894 61 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
elessair 0:f269e3021894 62 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
elessair 0:f269e3021894 63 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
elessair 0:f269e3021894 64 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
elessair 0:f269e3021894 65 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
elessair 0:f269e3021894 66 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
elessair 0:f269e3021894 67 obj->spi = (LPC_SSP_TypeDef*)pinmap_merge(spi_data, spi_cntl);
elessair 0:f269e3021894 68 MBED_ASSERT((int)obj->spi != NC);
elessair 0:f269e3021894 69
elessair 0:f269e3021894 70 // enable power and clocking
elessair 0:f269e3021894 71 switch ((int)obj->spi) {
elessair 0:f269e3021894 72 case SPI_0: LPC_SC->PCONP |= 1 << PCSSP0; break;
elessair 0:f269e3021894 73 case SPI_1: LPC_SC->PCONP |= 1 << PCSSP1; break;
elessair 0:f269e3021894 74 }
elessair 0:f269e3021894 75
elessair 0:f269e3021894 76 // set default format and frequency
elessair 0:f269e3021894 77 if (ssel == NC) {
elessair 0:f269e3021894 78 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
elessair 0:f269e3021894 79 } else {
elessair 0:f269e3021894 80 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
elessair 0:f269e3021894 81 }
elessair 0:f269e3021894 82 spi_frequency(obj, 1000000);
elessair 0:f269e3021894 83
elessair 0:f269e3021894 84 // enable the ssp channel
elessair 0:f269e3021894 85 ssp_enable(obj);
elessair 0:f269e3021894 86
elessair 0:f269e3021894 87 // pin out the spi pins
elessair 0:f269e3021894 88 pinmap_pinout(mosi, PinMap_SPI_MOSI);
elessair 0:f269e3021894 89 pinmap_pinout(miso, PinMap_SPI_MISO);
elessair 0:f269e3021894 90 pinmap_pinout(sclk, PinMap_SPI_SCLK);
elessair 0:f269e3021894 91 if (ssel != NC) {
elessair 0:f269e3021894 92 pinmap_pinout(ssel, PinMap_SPI_SSEL);
elessair 0:f269e3021894 93 }
elessair 0:f269e3021894 94 }
elessair 0:f269e3021894 95
elessair 0:f269e3021894 96 void spi_free(spi_t *obj) {}
elessair 0:f269e3021894 97
elessair 0:f269e3021894 98 void spi_format(spi_t *obj, int bits, int mode, int slave) {
elessair 0:f269e3021894 99 MBED_ASSERT(((bits >= 4) && (bits <= 16)) && ((mode >= 0) && (mode <= 3)));
elessair 0:f269e3021894 100 ssp_disable(obj);
elessair 0:f269e3021894 101
elessair 0:f269e3021894 102 int polarity = (mode & 0x2) ? 1 : 0;
elessair 0:f269e3021894 103 int phase = (mode & 0x1) ? 1 : 0;
elessair 0:f269e3021894 104
elessair 0:f269e3021894 105 // set it up
elessair 0:f269e3021894 106 int DSS = bits - 1; // DSS (data select size)
elessair 0:f269e3021894 107 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
elessair 0:f269e3021894 108 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
elessair 0:f269e3021894 109
elessair 0:f269e3021894 110 int FRF = 0; // FRF (frame format) = SPI
elessair 0:f269e3021894 111 uint32_t tmp = obj->spi->CR0;
elessair 0:f269e3021894 112 tmp &= ~(0xFFFF);
elessair 0:f269e3021894 113 tmp |= DSS << 0
elessair 0:f269e3021894 114 | FRF << 4
elessair 0:f269e3021894 115 | SPO << 6
elessair 0:f269e3021894 116 | SPH << 7;
elessair 0:f269e3021894 117 obj->spi->CR0 = tmp;
elessair 0:f269e3021894 118
elessair 0:f269e3021894 119 tmp = obj->spi->CR1;
elessair 0:f269e3021894 120 tmp &= ~(0xD);
elessair 0:f269e3021894 121 tmp |= 0 << 0 // LBM - loop back mode - off
elessair 0:f269e3021894 122 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
elessair 0:f269e3021894 123 | 0 << 3; // SOD - slave output disable - na
elessair 0:f269e3021894 124 obj->spi->CR1 = tmp;
elessair 0:f269e3021894 125
elessair 0:f269e3021894 126 ssp_enable(obj);
elessair 0:f269e3021894 127 }
elessair 0:f269e3021894 128
elessair 0:f269e3021894 129 void spi_frequency(spi_t *obj, int hz) {
elessair 0:f269e3021894 130 ssp_disable(obj);
elessair 0:f269e3021894 131
elessair 0:f269e3021894 132 // setup the spi clock diveder to /1
elessair 0:f269e3021894 133 switch ((int)obj->spi) {
elessair 0:f269e3021894 134 case SPI_0:
elessair 0:f269e3021894 135 LPC_SC->PCLKSEL1 &= ~(3 << 10);
elessair 0:f269e3021894 136 LPC_SC->PCLKSEL1 |= (1 << 10);
elessair 0:f269e3021894 137 break;
elessair 0:f269e3021894 138 case SPI_1:
elessair 0:f269e3021894 139 LPC_SC->PCLKSEL0 &= ~(3 << 20);
elessair 0:f269e3021894 140 LPC_SC->PCLKSEL0 |= (1 << 20);
elessair 0:f269e3021894 141 break;
elessair 0:f269e3021894 142 }
elessair 0:f269e3021894 143
elessair 0:f269e3021894 144 uint32_t PCLK = SystemCoreClock;
elessair 0:f269e3021894 145
elessair 0:f269e3021894 146 int prescaler;
elessair 0:f269e3021894 147
elessair 0:f269e3021894 148 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
elessair 0:f269e3021894 149 int prescale_hz = PCLK / prescaler;
elessair 0:f269e3021894 150
elessair 0:f269e3021894 151 // calculate the divider
elessair 0:f269e3021894 152 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
elessair 0:f269e3021894 153
elessair 0:f269e3021894 154 // check we can support the divider
elessair 0:f269e3021894 155 if (divider < 256) {
elessair 0:f269e3021894 156 // prescaler
elessair 0:f269e3021894 157 obj->spi->CPSR = prescaler;
elessair 0:f269e3021894 158
elessair 0:f269e3021894 159 // divider
elessair 0:f269e3021894 160 obj->spi->CR0 &= ~(0xFFFF << 8);
elessair 0:f269e3021894 161 obj->spi->CR0 |= (divider - 1) << 8;
elessair 0:f269e3021894 162 ssp_enable(obj);
elessair 0:f269e3021894 163 return;
elessair 0:f269e3021894 164 }
elessair 0:f269e3021894 165 }
elessair 0:f269e3021894 166 error("Couldn't setup requested SPI frequency");
elessair 0:f269e3021894 167 }
elessair 0:f269e3021894 168
elessair 0:f269e3021894 169 static inline int ssp_disable(spi_t *obj) {
elessair 0:f269e3021894 170 return obj->spi->CR1 &= ~(1 << 1);
elessair 0:f269e3021894 171 }
elessair 0:f269e3021894 172
elessair 0:f269e3021894 173 static inline int ssp_enable(spi_t *obj) {
elessair 0:f269e3021894 174 return obj->spi->CR1 |= (1 << 1);
elessair 0:f269e3021894 175 }
elessair 0:f269e3021894 176
elessair 0:f269e3021894 177 static inline int ssp_readable(spi_t *obj) {
elessair 0:f269e3021894 178 return obj->spi->SR & (1 << 2);
elessair 0:f269e3021894 179 }
elessair 0:f269e3021894 180
elessair 0:f269e3021894 181 static inline int ssp_writeable(spi_t *obj) {
elessair 0:f269e3021894 182 return obj->spi->SR & (1 << 1);
elessair 0:f269e3021894 183 }
elessair 0:f269e3021894 184
elessair 0:f269e3021894 185 static inline void ssp_write(spi_t *obj, int value) {
elessair 0:f269e3021894 186 while (!ssp_writeable(obj));
elessair 0:f269e3021894 187 obj->spi->DR = value;
elessair 0:f269e3021894 188 }
elessair 0:f269e3021894 189
elessair 0:f269e3021894 190 static inline int ssp_read(spi_t *obj) {
elessair 0:f269e3021894 191 while (!ssp_readable(obj));
elessair 0:f269e3021894 192 return obj->spi->DR;
elessair 0:f269e3021894 193 }
elessair 0:f269e3021894 194
elessair 0:f269e3021894 195 static inline int ssp_busy(spi_t *obj) {
elessair 0:f269e3021894 196 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
elessair 0:f269e3021894 197 }
elessair 0:f269e3021894 198
elessair 0:f269e3021894 199 int spi_master_write(spi_t *obj, int value) {
elessair 0:f269e3021894 200 ssp_write(obj, value);
elessair 0:f269e3021894 201 return ssp_read(obj);
elessair 0:f269e3021894 202 }
elessair 0:f269e3021894 203
elessair 0:f269e3021894 204 int spi_slave_receive(spi_t *obj) {
elessair 0:f269e3021894 205 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
elessair 0:f269e3021894 206 }
elessair 0:f269e3021894 207
elessair 0:f269e3021894 208 int spi_slave_read(spi_t *obj) {
elessair 0:f269e3021894 209 return obj->spi->DR;
elessair 0:f269e3021894 210 }
elessair 0:f269e3021894 211
elessair 0:f269e3021894 212 void spi_slave_write(spi_t *obj, int value) {
elessair 0:f269e3021894 213 while (ssp_writeable(obj) == 0) ;
elessair 0:f269e3021894 214 obj->spi->DR = value;
elessair 0:f269e3021894 215 }
elessair 0:f269e3021894 216
elessair 0:f269e3021894 217 int spi_busy(spi_t *obj) {
elessair 0:f269e3021894 218 return ssp_busy(obj);
elessair 0:f269e3021894 219 }