Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_NXP/TARGET_LPC2460/i2c_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2015 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "i2c_api.h"
elessair 0:f269e3021894 17 #include "cmsis.h"
elessair 0:f269e3021894 18 #include "pinmap.h"
elessair 0:f269e3021894 19
elessair 0:f269e3021894 20 static const PinMap PinMap_I2C_SDA[] = {
elessair 0:f269e3021894 21 {P0_0 , I2C_1, 3},
elessair 0:f269e3021894 22 {P0_10, I2C_2, 2},
elessair 0:f269e3021894 23 {P0_19, I2C_1, 3},
elessair 0:f269e3021894 24 {P0_27, I2C_0, 1},
elessair 0:f269e3021894 25 {P2_14, I2C_1, 3},
elessair 0:f269e3021894 26 {P2_30, I2C_2, 3},
elessair 0:f269e3021894 27 {P4_20, I2C_2, 2},
elessair 0:f269e3021894 28 {NC , NC , 0}
elessair 0:f269e3021894 29 };
elessair 0:f269e3021894 30
elessair 0:f269e3021894 31 static const PinMap PinMap_I2C_SCL[] = {
elessair 0:f269e3021894 32 {P0_1 , I2C_1, 3},
elessair 0:f269e3021894 33 {P0_11, I2C_2, 2},
elessair 0:f269e3021894 34 {P0_20, I2C_1, 3},
elessair 0:f269e3021894 35 {P0_28, I2C_0, 1},
elessair 0:f269e3021894 36 {P2_15, I2C_1, 3},
elessair 0:f269e3021894 37 {P2_31, I2C_2, 3},
elessair 0:f269e3021894 38 {P4_21, I2C_2, 2},
elessair 0:f269e3021894 39 {NC , NC, 0}
elessair 0:f269e3021894 40 };
elessair 0:f269e3021894 41
elessair 0:f269e3021894 42 #define I2C_CONSET(x) (x->i2c->I2CONSET)
elessair 0:f269e3021894 43 #define I2C_CONCLR(x) (x->i2c->I2CONCLR)
elessair 0:f269e3021894 44 #define I2C_STAT(x) (x->i2c->I2STAT)
elessair 0:f269e3021894 45 #define I2C_DAT(x) (x->i2c->I2DAT)
elessair 0:f269e3021894 46 #define I2C_SCLL(x, val) (x->i2c->I2SCLL = val)
elessair 0:f269e3021894 47 #define I2C_SCLH(x, val) (x->i2c->I2SCLH = val)
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49 static const uint32_t I2C_addr_offset[2][4] = {
elessair 0:f269e3021894 50 {0x0C, 0x20, 0x24, 0x28},
elessair 0:f269e3021894 51 {0x30, 0x34, 0x38, 0x3C}
elessair 0:f269e3021894 52 };
elessair 0:f269e3021894 53
elessair 0:f269e3021894 54 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
elessair 0:f269e3021894 55 I2C_CONCLR(obj) = (start << 5)
elessair 0:f269e3021894 56 | (stop << 4)
elessair 0:f269e3021894 57 | (interrupt << 3)
elessair 0:f269e3021894 58 | (acknowledge << 2);
elessair 0:f269e3021894 59 }
elessair 0:f269e3021894 60
elessair 0:f269e3021894 61 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
elessair 0:f269e3021894 62 I2C_CONSET(obj) = (start << 5)
elessair 0:f269e3021894 63 | (stop << 4)
elessair 0:f269e3021894 64 | (interrupt << 3)
elessair 0:f269e3021894 65 | (acknowledge << 2);
elessair 0:f269e3021894 66 }
elessair 0:f269e3021894 67
elessair 0:f269e3021894 68 // Clear the Serial Interrupt (SI)
elessair 0:f269e3021894 69 static inline void i2c_clear_SI(i2c_t *obj) {
elessair 0:f269e3021894 70 i2c_conclr(obj, 0, 0, 1, 0);
elessair 0:f269e3021894 71 }
elessair 0:f269e3021894 72
elessair 0:f269e3021894 73 static inline int i2c_status(i2c_t *obj) {
elessair 0:f269e3021894 74 return I2C_STAT(obj);
elessair 0:f269e3021894 75 }
elessair 0:f269e3021894 76
elessair 0:f269e3021894 77 // Wait until the Serial Interrupt (SI) is set
elessair 0:f269e3021894 78 static int i2c_wait_SI(i2c_t *obj) {
elessair 0:f269e3021894 79 int timeout = 0;
elessair 0:f269e3021894 80 while (!(I2C_CONSET(obj) & (1 << 3))) {
elessair 0:f269e3021894 81 timeout++;
elessair 0:f269e3021894 82 if (timeout > 100000) return -1;
elessair 0:f269e3021894 83 }
elessair 0:f269e3021894 84 return 0;
elessair 0:f269e3021894 85 }
elessair 0:f269e3021894 86
elessair 0:f269e3021894 87 static inline void i2c_interface_enable(i2c_t *obj) {
elessair 0:f269e3021894 88 I2C_CONSET(obj) = 0x40;
elessair 0:f269e3021894 89 }
elessair 0:f269e3021894 90
elessair 0:f269e3021894 91 static inline void i2c_power_enable(i2c_t *obj) {
elessair 0:f269e3021894 92 switch ((int)obj->i2c) {
elessair 0:f269e3021894 93 case I2C_0: LPC_SC->PCONP |= 1 << PCI2C0; break;
elessair 0:f269e3021894 94 case I2C_1: LPC_SC->PCONP |= 1 << PCI2C1; break;
elessair 0:f269e3021894 95 case I2C_2: LPC_SC->PCONP |= 1 << PCI2C2; break;
elessair 0:f269e3021894 96 }
elessair 0:f269e3021894 97 }
elessair 0:f269e3021894 98
elessair 0:f269e3021894 99 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
elessair 0:f269e3021894 100 // determine the SPI to use
elessair 0:f269e3021894 101 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
elessair 0:f269e3021894 102 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
elessair 0:f269e3021894 103 obj->i2c = (LPC_I2C_TypeDef *)pinmap_merge(i2c_sda, i2c_scl);
elessair 0:f269e3021894 104 MBED_ASSERT((int)obj->i2c != NC);
elessair 0:f269e3021894 105
elessair 0:f269e3021894 106 // enable power
elessair 0:f269e3021894 107 i2c_power_enable(obj);
elessair 0:f269e3021894 108
elessair 0:f269e3021894 109 // set default frequency at 100k
elessair 0:f269e3021894 110 i2c_frequency(obj, 100000);
elessair 0:f269e3021894 111 i2c_conclr(obj, 1, 1, 1, 1);
elessair 0:f269e3021894 112 i2c_interface_enable(obj);
elessair 0:f269e3021894 113
elessair 0:f269e3021894 114 pinmap_pinout(sda, PinMap_I2C_SDA);
elessair 0:f269e3021894 115 pinmap_pinout(scl, PinMap_I2C_SCL);
elessair 0:f269e3021894 116 }
elessair 0:f269e3021894 117
elessair 0:f269e3021894 118 inline int i2c_start(i2c_t *obj) {
elessair 0:f269e3021894 119 int status = 0;
elessair 0:f269e3021894 120 int isInterrupted = I2C_CONSET(obj) & (1 << 3);
elessair 0:f269e3021894 121
elessair 0:f269e3021894 122 // 8.1 Before master mode can be entered, I2CON must be initialised to:
elessair 0:f269e3021894 123 // - I2EN STA STO SI AA - -
elessair 0:f269e3021894 124 // - 1 0 0 x x - -
elessair 0:f269e3021894 125 // if AA = 0, it can't enter slave mode
elessair 0:f269e3021894 126 i2c_conclr(obj, 1, 1, 0, 1);
elessair 0:f269e3021894 127
elessair 0:f269e3021894 128 // The master mode may now be entered by setting the STA bit
elessair 0:f269e3021894 129 // this will generate a start condition when the bus becomes free
elessair 0:f269e3021894 130 i2c_conset(obj, 1, 0, 0, 1);
elessair 0:f269e3021894 131 // Clearing SI bit when it wasn't set on entry can jump past state
elessair 0:f269e3021894 132 // 0x10 or 0x08 and erroneously send uninitialized slave address.
elessair 0:f269e3021894 133 if (isInterrupted)
elessair 0:f269e3021894 134 i2c_clear_SI(obj);
elessair 0:f269e3021894 135
elessair 0:f269e3021894 136 i2c_wait_SI(obj);
elessair 0:f269e3021894 137 status = i2c_status(obj);
elessair 0:f269e3021894 138
elessair 0:f269e3021894 139 // Clear start bit now that it's transmitted
elessair 0:f269e3021894 140 i2c_conclr(obj, 1, 0, 0, 0);
elessair 0:f269e3021894 141 return status;
elessair 0:f269e3021894 142 }
elessair 0:f269e3021894 143
elessair 0:f269e3021894 144 inline int i2c_stop(i2c_t *obj) {
elessair 0:f269e3021894 145 int timeout = 0;
elessair 0:f269e3021894 146
elessair 0:f269e3021894 147 // write the stop bit
elessair 0:f269e3021894 148 i2c_conset(obj, 0, 1, 0, 0);
elessair 0:f269e3021894 149 i2c_clear_SI(obj);
elessair 0:f269e3021894 150
elessair 0:f269e3021894 151 // wait for STO bit to reset
elessair 0:f269e3021894 152 while (I2C_CONSET(obj) & (1 << 4)) {
elessair 0:f269e3021894 153 timeout ++;
elessair 0:f269e3021894 154 if (timeout > 100000) return 1;
elessair 0:f269e3021894 155 }
elessair 0:f269e3021894 156
elessair 0:f269e3021894 157 return 0;
elessair 0:f269e3021894 158 }
elessair 0:f269e3021894 159
elessair 0:f269e3021894 160 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
elessair 0:f269e3021894 161 // write the data
elessair 0:f269e3021894 162 I2C_DAT(obj) = value;
elessair 0:f269e3021894 163
elessair 0:f269e3021894 164 // clear SI to init a send
elessair 0:f269e3021894 165 i2c_clear_SI(obj);
elessair 0:f269e3021894 166
elessair 0:f269e3021894 167 // wait and return status
elessair 0:f269e3021894 168 i2c_wait_SI(obj);
elessair 0:f269e3021894 169 return i2c_status(obj);
elessair 0:f269e3021894 170 }
elessair 0:f269e3021894 171
elessair 0:f269e3021894 172 static inline int i2c_do_read(i2c_t *obj, int last) {
elessair 0:f269e3021894 173 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
elessair 0:f269e3021894 174 if (last) {
elessair 0:f269e3021894 175 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
elessair 0:f269e3021894 176 } else {
elessair 0:f269e3021894 177 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
elessair 0:f269e3021894 178 }
elessair 0:f269e3021894 179
elessair 0:f269e3021894 180 // accept byte
elessair 0:f269e3021894 181 i2c_clear_SI(obj);
elessair 0:f269e3021894 182
elessair 0:f269e3021894 183 // wait for it to arrive
elessair 0:f269e3021894 184 i2c_wait_SI(obj);
elessair 0:f269e3021894 185
elessair 0:f269e3021894 186 // return the data
elessair 0:f269e3021894 187 return (I2C_DAT(obj) & 0xFF);
elessair 0:f269e3021894 188 }
elessair 0:f269e3021894 189
elessair 0:f269e3021894 190 void i2c_frequency(i2c_t *obj, int hz) {
elessair 0:f269e3021894 191 // [TODO] set pclk to /4
elessair 0:f269e3021894 192 uint32_t PCLK = SystemCoreClock / 4;
elessair 0:f269e3021894 193
elessair 0:f269e3021894 194 uint32_t pulse = PCLK / (hz * 2);
elessair 0:f269e3021894 195
elessair 0:f269e3021894 196 // I2C Rate
elessair 0:f269e3021894 197 I2C_SCLL(obj, pulse);
elessair 0:f269e3021894 198 I2C_SCLH(obj, pulse);
elessair 0:f269e3021894 199 }
elessair 0:f269e3021894 200
elessair 0:f269e3021894 201 // The I2C does a read or a write as a whole operation
elessair 0:f269e3021894 202 // There are two types of error conditions it can encounter
elessair 0:f269e3021894 203 // 1) it can not obtain the bus
elessair 0:f269e3021894 204 // 2) it gets error responses at part of the transmission
elessair 0:f269e3021894 205 //
elessair 0:f269e3021894 206 // We tackle them as follows:
elessair 0:f269e3021894 207 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
elessair 0:f269e3021894 208 // which basically turns it in to a 2)
elessair 0:f269e3021894 209 // 2) on error, we use the standard error mechanisms to report/debug
elessair 0:f269e3021894 210 //
elessair 0:f269e3021894 211 // Therefore an I2C transaction should always complete. If it doesn't it is usually
elessair 0:f269e3021894 212 // because something is setup wrong (e.g. wiring), and we don't need to programatically
elessair 0:f269e3021894 213 // check for that
elessair 0:f269e3021894 214 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
elessair 0:f269e3021894 215 int count, status;
elessair 0:f269e3021894 216
elessair 0:f269e3021894 217 status = i2c_start(obj);
elessair 0:f269e3021894 218
elessair 0:f269e3021894 219 if ((status != 0x10) && (status != 0x08)) {
elessair 0:f269e3021894 220 i2c_stop(obj);
elessair 0:f269e3021894 221 return I2C_ERROR_BUS_BUSY;
elessair 0:f269e3021894 222 }
elessair 0:f269e3021894 223
elessair 0:f269e3021894 224 status = i2c_do_write(obj, (address | 0x01), 1);
elessair 0:f269e3021894 225 if (status != 0x40) {
elessair 0:f269e3021894 226 i2c_stop(obj);
elessair 0:f269e3021894 227 return I2C_ERROR_NO_SLAVE;
elessair 0:f269e3021894 228 }
elessair 0:f269e3021894 229
elessair 0:f269e3021894 230 // Read in all except last byte
elessair 0:f269e3021894 231 for (count = 0; count < (length - 1); count++) {
elessair 0:f269e3021894 232 int value = i2c_do_read(obj, 0);
elessair 0:f269e3021894 233 status = i2c_status(obj);
elessair 0:f269e3021894 234 if (status != 0x50) {
elessair 0:f269e3021894 235 i2c_stop(obj);
elessair 0:f269e3021894 236 return count;
elessair 0:f269e3021894 237 }
elessair 0:f269e3021894 238 data[count] = (char) value;
elessair 0:f269e3021894 239 }
elessair 0:f269e3021894 240
elessair 0:f269e3021894 241 // read in last byte
elessair 0:f269e3021894 242 int value = i2c_do_read(obj, 1);
elessair 0:f269e3021894 243 status = i2c_status(obj);
elessair 0:f269e3021894 244 if (status != 0x58) {
elessair 0:f269e3021894 245 i2c_stop(obj);
elessair 0:f269e3021894 246 return length - 1;
elessair 0:f269e3021894 247 }
elessair 0:f269e3021894 248
elessair 0:f269e3021894 249 data[count] = (char) value;
elessair 0:f269e3021894 250
elessair 0:f269e3021894 251 // If not repeated start, send stop.
elessair 0:f269e3021894 252 if (stop) {
elessair 0:f269e3021894 253 i2c_stop(obj);
elessair 0:f269e3021894 254 }
elessair 0:f269e3021894 255
elessair 0:f269e3021894 256 return length;
elessair 0:f269e3021894 257 }
elessair 0:f269e3021894 258
elessair 0:f269e3021894 259 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
elessair 0:f269e3021894 260 int i, status;
elessair 0:f269e3021894 261
elessair 0:f269e3021894 262 status = i2c_start(obj);
elessair 0:f269e3021894 263
elessair 0:f269e3021894 264 if ((status != 0x10) && (status != 0x08)) {
elessair 0:f269e3021894 265 i2c_stop(obj);
elessair 0:f269e3021894 266 return I2C_ERROR_BUS_BUSY;
elessair 0:f269e3021894 267 }
elessair 0:f269e3021894 268
elessair 0:f269e3021894 269 status = i2c_do_write(obj, (address & 0xFE), 1);
elessair 0:f269e3021894 270 if (status != 0x18) {
elessair 0:f269e3021894 271 i2c_stop(obj);
elessair 0:f269e3021894 272 return I2C_ERROR_NO_SLAVE;
elessair 0:f269e3021894 273 }
elessair 0:f269e3021894 274
elessair 0:f269e3021894 275 for (i=0; i<length; i++) {
elessair 0:f269e3021894 276 status = i2c_do_write(obj, data[i], 0);
elessair 0:f269e3021894 277 if (status != 0x28) {
elessair 0:f269e3021894 278 i2c_stop(obj);
elessair 0:f269e3021894 279 return i;
elessair 0:f269e3021894 280 }
elessair 0:f269e3021894 281 }
elessair 0:f269e3021894 282
elessair 0:f269e3021894 283 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
elessair 0:f269e3021894 284 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
elessair 0:f269e3021894 285 // i2c_clear_SI(obj);
elessair 0:f269e3021894 286
elessair 0:f269e3021894 287 // If not repeated start, send stop.
elessair 0:f269e3021894 288 if (stop) {
elessair 0:f269e3021894 289 i2c_stop(obj);
elessair 0:f269e3021894 290 }
elessair 0:f269e3021894 291
elessair 0:f269e3021894 292 return length;
elessair 0:f269e3021894 293 }
elessair 0:f269e3021894 294
elessair 0:f269e3021894 295 void i2c_reset(i2c_t *obj) {
elessair 0:f269e3021894 296 i2c_stop(obj);
elessair 0:f269e3021894 297 }
elessair 0:f269e3021894 298
elessair 0:f269e3021894 299 int i2c_byte_read(i2c_t *obj, int last) {
elessair 0:f269e3021894 300 return (i2c_do_read(obj, last) & 0xFF);
elessair 0:f269e3021894 301 }
elessair 0:f269e3021894 302
elessair 0:f269e3021894 303 int i2c_byte_write(i2c_t *obj, int data) {
elessair 0:f269e3021894 304 int ack;
elessair 0:f269e3021894 305 int status = i2c_do_write(obj, (data & 0xFF), 0);
elessair 0:f269e3021894 306
elessair 0:f269e3021894 307 switch(status) {
elessair 0:f269e3021894 308 case 0x18: case 0x28: // Master transmit ACKs
elessair 0:f269e3021894 309 ack = 1;
elessair 0:f269e3021894 310 break;
elessair 0:f269e3021894 311
elessair 0:f269e3021894 312 case 0x40: // Master receive address transmitted ACK
elessair 0:f269e3021894 313 ack = 1;
elessair 0:f269e3021894 314 break;
elessair 0:f269e3021894 315
elessair 0:f269e3021894 316 case 0xB8: // Slave transmit ACK
elessair 0:f269e3021894 317 ack = 1;
elessair 0:f269e3021894 318 break;
elessair 0:f269e3021894 319
elessair 0:f269e3021894 320 default:
elessair 0:f269e3021894 321 ack = 0;
elessair 0:f269e3021894 322 break;
elessair 0:f269e3021894 323 }
elessair 0:f269e3021894 324
elessair 0:f269e3021894 325 return ack;
elessair 0:f269e3021894 326 }
elessair 0:f269e3021894 327
elessair 0:f269e3021894 328 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
elessair 0:f269e3021894 329 if (enable_slave != 0) {
elessair 0:f269e3021894 330 i2c_conclr(obj, 1, 1, 1, 0);
elessair 0:f269e3021894 331 i2c_conset(obj, 0, 0, 0, 1);
elessair 0:f269e3021894 332 } else {
elessair 0:f269e3021894 333 i2c_conclr(obj, 1, 1, 1, 1);
elessair 0:f269e3021894 334 }
elessair 0:f269e3021894 335 }
elessair 0:f269e3021894 336
elessair 0:f269e3021894 337 int i2c_slave_receive(i2c_t *obj) {
elessair 0:f269e3021894 338 int status;
elessair 0:f269e3021894 339 int retval;
elessair 0:f269e3021894 340
elessair 0:f269e3021894 341 status = i2c_status(obj);
elessair 0:f269e3021894 342 switch(status) {
elessair 0:f269e3021894 343 case 0x60: retval = 3; break;
elessair 0:f269e3021894 344 case 0x70: retval = 2; break;
elessair 0:f269e3021894 345 case 0xA8: retval = 1; break;
elessair 0:f269e3021894 346 default : retval = 0; break;
elessair 0:f269e3021894 347 }
elessair 0:f269e3021894 348
elessair 0:f269e3021894 349 return(retval);
elessair 0:f269e3021894 350 }
elessair 0:f269e3021894 351
elessair 0:f269e3021894 352 int i2c_slave_read(i2c_t *obj, char *data, int length) {
elessair 0:f269e3021894 353 int count = 0;
elessair 0:f269e3021894 354 int status;
elessair 0:f269e3021894 355
elessair 0:f269e3021894 356 do {
elessair 0:f269e3021894 357 i2c_clear_SI(obj);
elessair 0:f269e3021894 358 i2c_wait_SI(obj);
elessair 0:f269e3021894 359 status = i2c_status(obj);
elessair 0:f269e3021894 360 if((status == 0x80) || (status == 0x90)) {
elessair 0:f269e3021894 361 data[count] = I2C_DAT(obj) & 0xFF;
elessair 0:f269e3021894 362 }
elessair 0:f269e3021894 363 count++;
elessair 0:f269e3021894 364 } while (((status == 0x80) || (status == 0x90) ||
elessair 0:f269e3021894 365 (status == 0x060) || (status == 0x70)) && (count < length));
elessair 0:f269e3021894 366
elessair 0:f269e3021894 367 if(status != 0xA0) {
elessair 0:f269e3021894 368 i2c_stop(obj);
elessair 0:f269e3021894 369 }
elessair 0:f269e3021894 370
elessair 0:f269e3021894 371 i2c_clear_SI(obj);
elessair 0:f269e3021894 372
elessair 0:f269e3021894 373 return count;
elessair 0:f269e3021894 374 }
elessair 0:f269e3021894 375
elessair 0:f269e3021894 376 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
elessair 0:f269e3021894 377 int count = 0;
elessair 0:f269e3021894 378 int status;
elessair 0:f269e3021894 379
elessair 0:f269e3021894 380 if(length <= 0) {
elessair 0:f269e3021894 381 return(0);
elessair 0:f269e3021894 382 }
elessair 0:f269e3021894 383
elessair 0:f269e3021894 384 do {
elessair 0:f269e3021894 385 status = i2c_do_write(obj, data[count], 0);
elessair 0:f269e3021894 386 count++;
elessair 0:f269e3021894 387 } while ((count < length) && (status == 0xB8));
elessair 0:f269e3021894 388
elessair 0:f269e3021894 389 if((status != 0xC0) && (status != 0xC8)) {
elessair 0:f269e3021894 390 i2c_stop(obj);
elessair 0:f269e3021894 391 }
elessair 0:f269e3021894 392
elessair 0:f269e3021894 393 i2c_clear_SI(obj);
elessair 0:f269e3021894 394
elessair 0:f269e3021894 395 return(count);
elessair 0:f269e3021894 396 }
elessair 0:f269e3021894 397
elessair 0:f269e3021894 398 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
elessair 0:f269e3021894 399 uint32_t addr;
elessair 0:f269e3021894 400
elessair 0:f269e3021894 401 if ((idx >= 0) && (idx <= 3)) {
elessair 0:f269e3021894 402 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
elessair 0:f269e3021894 403 *((uint32_t *) addr) = address & 0xFF;
elessair 0:f269e3021894 404 }
elessair 0:f269e3021894 405 }